Ultrasonic transducer based on piezoelectric MEMS chip and preparation method thereof

Abstract

The invention relates to the technical field of semiconductor technology ultrasonic transducer manufacturing, in particular to an ultrasonic transducer based on a piezoelectric MEMS chip and a preparation method thereof.The ultrasonic transducer comprises a substrate, a piezoelectric layer formed on the front face of the substrate, a penetrating back cavity formed in the substrate, and a structural layer formed on the surface of the piezoelectric layer; the thickness of the structural layer is greater than that of a piezoelectric film in the piezoelectric layer, so that a neutral surface is positioned in a transverse projection area range of the structural layer; a gap is formed in a vibrating diaphragm area penetrating through the structural layer and the piezoelectric layer, and the plurality of vibrating structures are connected through a central structure formed by the gap. The preparation method comprises the steps of growing a piezoelectric layer, etching the piezoelectric layer, forming a gap, growing a structural layer, and etching the structural layer. And penetrating through the etching substrate. Silicon oxide is used as a structural layer, the process stress is low, and the resonant frequency can be effectively reduced; through the etching gaps, the sensitivity of the chip is improved, the stress effect is reduced, and the central part is provided with a connecting part due to etching, so that sound leakage is avoided, and a plurality of resonant frequencies are also prevented from being generated.

Description

Technical Field

[0001] The present invention relates to the technical field of ultrasonic transducer manufacturing based on piezoelectric MEMS chip semiconductor process, and in particular to an ultrasonic transducer based on a piezoelectric MEMS chip and a preparation method thereof. Background Art

[0002] Piezoelectric ultrasonic transducers are sensors that convert ultrasonic signals into other energy signals. Ultrasonic waves are mechanical waves with a vibration frequency higher than 20kHz. They have the characteristics of high frequency, short wavelength, small diffraction phenomenon, especially good directionality, and the ability to propagate in a directional manner as rays. Ultrasonic waves have great penetrating power for liquids and solids, especially in solids that are opaque to sunlight. When ultrasonic waves encounter impurities or interfaces, they will produce significant reflections to form reflected echoes, and when they encounter moving objects, they can produce the Doppler effect. Ultrasonic sensors are widely used in industry, national defense, biomedicine, etc.

[0003] In the prior art, low-frequency ultrasonic sensors are needed in technical fields such as long-distance measurement, monitoring, and remote information transmission using ultrasound. Therefore, low-frequency MEMS chip devices also have a large market, but traditional piezoelectric MEMS chips are composed of a stacked SOI substrate with a back cavity and a piezoelectric layer. The top silicon in the SOI substrate serves as a structural layer and assumes the function of a neutral plane. The Young's modulus of silicon is high and the process stress is high, which leads to a high resonant frequency, which is not conducive to the production design and manufacturing of low-frequency devices. On this basis, in order to reduce the stress of the device and improve the sensitivity of the device, a gap is opened on the chip. The opening of the gap will cause the device to leak sound and have multiple resonant frequencies.

[0004] Patent document with application number 202323565644.9 discloses a piezoelectric micromechanical ultrasonic transducer chip structure and an ultrasonic transducer array structure. The chip structure of the application scheme includes an SOI wafer substrate and a chip sensitive layer; the SOI wafer substrate includes a substrate layer, a buried oxide layer and a device layer stacked from bottom to top, and a hexagonal opening penetrating the upper and lower end faces of the substrate layer is provided in the substrate layer; the chip sensitive layer includes a lower electrode layer, a first piezoelectric layer and an upper electrode layer stacked from bottom to top, and the lower electrode layer is stacked on the upper part of the device layer; the upper electrode layer is a hexagonal electrode structure, and the upper electrode layer is located directly above the hexagonal opening; a plurality of first depressions aligned one by one are provided on the buried oxide layer, the device layer, the lower electrode layer and the first piezoelectric layer; the plurality of first depressions are distributed on the periphery of the upper electrode layer in a hexagonal outline, and the hexagonal outline is close to or located at the edge of the hexagonal opening.

[0005] The application scheme improves the effective vibration displacement of the chip's sensitive layer and improves the chip's performance as a driver and sensor. However, the scheme also has the following problems: its structural scheme is a traditional one, and the top silicon in its SOI substrate serves as a structural layer to bear the function of the neutral plane, which is not conducive to the production design and manufacturing of low-frequency devices.

[0006] In summary, the present application now proposes an ultrasonic transducer based on a piezoelectric MEMS chip and a preparation method thereof, in order to solve the above-mentioned problems. Summary of the invention

[0007] In view of the above-mentioned problems, the present invention proposes an ultrasonic transducer based on a piezoelectric MEMS chip and a preparation method thereof, in which a structural layer is used to replace the traditional top silicon. The Young's modulus of silicon oxide / silicon nitride is low and the process stress is low, which can effectively reduce the resonant frequency. On this basis, the etching gap is penetrated to improve the sensitivity of the chip and reduce the stress. At the same time, a connection part is left in the center due to etching to avoid sound leakage and the generation of multiple resonant frequencies.

[0008] The purpose of the present invention can be achieved through the following technical solution: An ultrasonic transducer based on a piezoelectric MEMS chip:

[0009] The invention comprises a substrate, wherein the substrate has a front side and a back side opposite to each other, a piezoelectric layer is formed on the front side of the substrate, a back cavity penetrating to the piezoelectric layer is opened on the back side of the substrate, a structural layer is formed on the surface of the piezoelectric layer, the piezoelectric layer and the structural layer within the longitudinal projection area of ​​the back cavity are a diaphragm, the thickness of the structural layer is greater than the thickness of the piezoelectric film in the piezoelectric layer, and the neutral plane is located within the transverse projection area of ​​the structural layer;

[0010] Wherein, a gap is formed in the diaphragm region and penetrates the structural layer and the piezoelectric layer, and the gap is used to reduce stress.

[0011] As a further solution of the present invention, the diaphragm area is divided into a plurality of vibration structures due to the gap, and the plurality of vibration structures are connected via a central structure formed by the gap.

[0012] As a further solution of the present invention, the gaps are provided in four or six groups and are arranged in a ring array around the central structure of the diaphragm.

[0013] As a further solution of the present invention, the central structure is provided with V-shaped grooves, the number of which is the same as the number of the gaps and which are not connected to the gaps, and the V-shaped grooves are arranged in a ring array around the center of the diaphragm.

[0014] As a further solution of the present invention, the V-shaped groove is symmetrical along the axis of its inflection point.

[0015] As a further solution of the present invention, the material of the structural layer is silicon oxide.

[0016] As a further solution of the present invention, the structural layer is a double-layer structure or a triple-layer structure in which silicon nitride and silicon oxide are alternately stacked.

[0017] A preparation method for the piezoelectric ultrasonic transducer, the preparation method comprising the following steps:

[0018] S1, preparing a substrate, the substrate having a front side and a back side opposite to each other, and growing a piezoelectric layer on the front side of the substrate;

[0019] S2, etching the piezoelectric layer to pattern the piezoelectric layer, forming a through gap in the piezoelectric layer due to the etching, and the diaphragm is divided into a plurality of vibration structures due to the etched gap, and the plurality of vibration structures are connected through a central structure formed by the etching gap;

[0020] S3, growing a structural layer on the surface of the patterned piezoelectric layer;

[0021] S4, etching the structural layer to pattern the structural layer, so that the diaphragm region of the structural layer forms a pattern consistent with the diaphragm region of the piezoelectric layer due to the etching;

[0022] S5, etching through the substrate to form a back cavity;

[0023] The thickness of the structural layer is greater than the thickness of the piezoelectric film in the piezoelectric layer, so that the neutral plane is located within the lateral projection area of ​​the structural layer.

[0024] As a further solution of the present invention, when the piezoelectric layer is patterned in S2, V-shaped grooves having the same number as the gaps and not connected to the gaps are etched on the central structure.

[0025] As a further solution of the present invention, etching through the substrate to form a back cavity specifically includes:

[0026] Firstly, a dry process is used to etch part of the substrate from the back side of the substrate, and then a wet process is used to etch through the back cavity of the substrate.

[0027] Beneficial effects of the present invention:

[0028] 1. The piezoelectric ultrasonic transducer and preparation method thereof of the present invention adopts silicon oxide / silicon nitride as the structural layer, and the neutral plane is raised to the structural layer to replace the traditional top silicon. Silicon oxide / silicon nitride has a low Young's modulus and low process stress, which can effectively reduce the resonant frequency and is conducive to the design and manufacture of low-frequency devices.

[0029] 2. The present invention opens a gap in the diaphragm area, uses the gap to reduce stress, and uses a central structure to form each vibration module into a whole to avoid sound leakage and the occurrence of multiple resonant frequencies. The central structure can enhance the mechanical stability of the chip, so that it can still maintain good performance under vibration and impact environments.

[0030] 3. The present invention etches V-shaped grooves on the central structure, which are equal in number to the gaps and are not connected to the gaps. The V-shaped grooves enable the central structure to form a V-shaped beam structure. The V-shaped beam can maintain a high degree of stability of the diaphragm. The characteristics of the V-shaped structure enable the load to be transmitted along the axial direction of the V-shaped beam, thereby reducing the possibility of bending and twisting.

[0031] 4. Compared with the traditional preparation process, the preparation method of the piezoelectric ultrasonic transducer based on the MEMS chip proposed in the present invention first grows the piezoelectric layer and patterns it, then grows the structural layer on the surface of the piezoelectric layer, and then patterns the structural layer. The patterning steps of the piezoelectric layer and the structural layer are independent and do not interfere with each other. The piezoelectric layer does not need to be hollowed out unnecessarily due to the patterning of the structural layer, thereby ensuring the integrity of the piezoelectric layer to the greatest extent. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 A schematic diagram of the structure of an ultrasonic transducer based on a piezoelectric MEMS chip proposed in an embodiment of the present invention;

[0033] Figure 2 for Figure 1 Exploded diagram of the structure;

[0034] Figure 3 It is the structural explosion diagram of the structural layer;

[0035] Figure 4 for Figure 1 A top view of

[0036] Figure 5 A schematic diagram of the structure for opening a gap;

[0037] Figure 6 for Figure 5 A partial enlarged view of the middle A;

[0038] Figure 7-Figure 11 The present invention is a flowchart of a method for preparing an ultrasonic transducer based on a piezoelectric MEMS chip according to an embodiment of the present invention.

[0039] In the reference numerals:

[0040] 1. Substrate;

[0041] 2. piezoelectric layer; 21 bottom electrode; 22. piezoelectric film; 23. top electrode;

[0042] 3. Structural layer; 31. First structural layer; 32. Second structural layer; 33. Third structural layer; 3a. Gap; 3b. Vibration structure; 3c. Center structure; 3d. V-shaped groove. DETAILED DESCRIPTION

[0043] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar symbols throughout represent the same or similar elements or elements with the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.

[0044] Embodiment 1:

[0045] See also Figure 1-Figure 2 The ultrasonic transducer based on the piezoelectric MEMS chip proposed in the embodiment of the present invention includes a substrate 1, a piezoelectric layer 2 and a structural layer 3 which are stacked in sequence.

[0046] The substrate 1 has a front side and a back side opposite to each other. A back cavity is formed through the back side of the substrate 1. The piezoelectric layer 2 and the structural layer 3 within the longitudinal projection range of the back cavity are the diaphragm region. The back cavity provides a vibration space for the diaphragm.

[0047] Optionally, the substrate 1 is a silicon wafer substrate 1 , and the cost is reduced by replacing the SOI substrate 1 with the silicon wafer substrate 1 .

[0048] The piezoelectric layer 2 includes a bottom electrode 21, a piezoelectric film 22 and a top electrode 23 which are sequentially stacked on the surface of the substrate 1. The thickness of the structural layer 3 is greater than that of the piezoelectric film 22, so that the neutral plane is located within the lateral projection area of ​​the structural layer 3.

[0049] Optionally, the material of the structural layer 3 is silicon oxide / silicon nitride, and the Young's modulus of silicon oxide / silicon nitride is lower than that of silicon.

[0050] An optional structure of the structural layer 3 is: the structural layer 3 includes a first structural layer 31 and a second structural layer 32, the thickness of the second structural layer 32 is much greater than the thickness of the first structural layer 31, the material of the first structural layer 31 is silicon nitride (Si3N4), and the material of the second structural layer 32 is silicon oxide (SiO2), forming a double-layer structure of silicon nitride-silicon oxide.

[0051] An optional structure of the structural layer 3 is: the structural layer 3 includes a first structural layer 31 and a second structural layer 32, the thickness of the second structural layer 32 is much greater than the thickness of the first structural layer 31, the material of the first structural layer 31 is silicon oxide (SiO2), and the material of the second structural layer 32 is silicon nitride (Si3N4), forming a double-layer structure of silicon oxide-silicon nitride.

[0052] In the above two structures, the second structural layer 32 serves as the main structural layer. The thickness of the entire structural layer 3 is greater than the thickness of the piezoelectric film 22 in the piezoelectric layer 2, so that the neutral plane is located within the lateral projection area of ​​the structural layer 3. The second structural layer 32 mainly assumes the function of adjusting the neutral plane of the chip, and the device performance is mainly determined by the material and thickness of the second structural layer 32.

[0053] Another optional structure of the structural layer 3 is as follows: Figure 3 As shown, the structure layer 3 includes a first structure layer 31, a second structure layer 32 and a third structure layer 33; wherein the thickness of the second structure layer 32 is much greater than the thickness of the first structure layer 31 and / or the third structure layer 33. The material of the first structure layer 31 is silicon nitride (Si3N4), the material of the second structure layer 32 is silicon oxide (SiO2), and the material of the third structure layer 33 is silicon nitride (Si3N4), forming a three-layer structure of silicon nitride-silicon oxide-silicon nitride.

[0054] Another optional structure of the structural layer 3 is as follows: Figure 3 As shown, the structure layer 3 includes a first structure layer 31, a second structure layer 32 and a third structure layer 33; wherein the thickness of the second structure layer 32 is much greater than the thickness of the first structure layer 31 and / or the third structure layer 33. The material of the first structure layer 31 is silicon oxide (SiO2), the material of the second structure layer 32 is silicon nitride (Si3N4), and the material of the third structure layer 33 is silicon oxide (SiO2), forming a three-layer structure of silicon oxide-silicon nitride-silicon oxide.

[0055] In the above two three-layer structures, the second structural layer 32 serves as the main structural layer 3. The second structural layer 32 mainly undertakes the function of adjusting the neutral plane of the chip. The device performance is mainly determined by the material and thickness of the second structural layer 32. The first structural layer 31 mainly functions to improve the adhesion of the middle layer and improve the film forming quality. The third structural layer 33 mainly functions to enhance the tensile properties of the middle layer and improve the stability of the structural layer 3. With the above three-layer structure, the structural layer 3 is more stable, more reliable, and more conducive to improving the yield rate.

[0056] The piezoelectric PMUT based on the MEMS chip proposed in this embodiment adopts silicon oxide / silicon nitride instead of silicon as the material of the structural layer 3. Through the above two-layer or three-layer structure, the thickness of the entire structural layer 3 is greater than the thickness of the piezoelectric film 22 in the piezoelectric layer 2, so that the neutral plane is located within the lateral projection area of ​​the structural layer 3. By setting the structural layer 3, the position of the neutral plane is moved up to the structural layer 3. By utilizing the low Young's modulus and low process stress of silicon oxide / silicon nitride, the resonant frequency can be effectively reduced, which is beneficial to the design and manufacture of low-frequency devices.

[0057] Furthermore, if Figure 4As shown, a gap 3a is formed in the diaphragm region through the structural layer 3 and the piezoelectric layer 2. The gap 3a can reduce stress and improve the sensitivity of the chip.

[0058] The diaphragm area is divided into several vibration structures 3b due to the gap 3a, and the several vibration structures 3b are connected by a central structure 3c formed by the gap 3a. The vibration structures 3b are connected by the connecting structure at the center position to avoid sound leakage and the generation of multiple resonant frequencies.

[0059] Embodiment 2:

[0060] Based on Example 1, please refer to Figure 5 a and 5b, four or six groups of slits 3a are provided in the diaphragm area.

[0061] like Figure 6 As shown in Figs. 6a and 6b, the diaphragm area is divided into four or six vibration structures 3b due to the gap 3a, and the vibration structures 3b are connected to each other through a connecting structure at the center.

[0062] Optionally, the central structure 3c is provided with V-shaped grooves 3d, the number of which is the same as the number of the gaps 3a and which are not connected to the gaps 3a, and the V-shaped grooves 3d are arranged in a ring array around the center of the diaphragm.

[0063] Optionally, the V-shaped groove 3d is symmetrical along the axis of its inflection point.

[0064] The ultrasonic transducer based on the piezoelectric MEMS chip proposed in this embodiment has a V-shaped groove 3d on the central structure 3c of the chip. The V-shaped groove 3d is formed to form a V-shaped beam structure on the central structure 3c. The V-shaped beam can keep the diaphragm highly stable. At the same time, the characteristics of the V-shaped structure enable the load to be transmitted along the axial direction of the V-shaped beam, thereby reducing the possibility of bending and twisting.

[0065] Embodiment 3:

[0066] The present invention also discloses a method for preparing the ultrasonic transducer of embodiment 1 or 2, comprising the following steps:

[0067] S1, see Figure 7 , preparing a substrate 1, the substrate 1 can be a silicon wafer substrate, the substrate 1 has a front side and a back side opposite to each other, and growing a piezoelectric layer 2 on the front side of the substrate 1, specifically including:

[0068] S1-1, sputtering and growing a bottom electrode 21 on the front surface of the substrate 1;

[0069] S1-2, sputtering and growing a piezoelectric film 22 on the surface of the bottom electrode 21;

[0070] S1 - 3 , a top electrode 23 is sputtered and grown on the surface of the piezoelectric film 22 .

[0071] S2, see Figure 8 , etching the piezoelectric layer 2 to pattern the piezoelectric layer 2, the piezoelectric layer 2 forms a through-gap 3a due to the etching, the diaphragm is divided into a plurality of vibration structures 3b due to the etched gap 3a, and the plurality of vibration structures 3b are connected through a central structure 3c formed by the etching gap 3a, specifically including:

[0072] S2-1, using IBE dry etching to pattern the top electrode 23;

[0073] S2-2, wet etching the piezoelectric film 22 to pattern the piezoelectric film 22;

[0074] S2-3, using IBE dry etching to etch the bottom electrode 21, so as to pattern the bottom electrode 21.

[0075] When the piezoelectric layer 2 is patterned, V-shaped grooves 3d having the same number as the gaps 3a and not connected to the gaps 3a are etched on the central structure 3c.

[0076] S3, see Fig. 9 The structural layer 3 is deposited on the surface of the piezoelectric layer 2 by the PECVD process. The thickness of the structural layer 3 is greater than the thickness of the piezoelectric film 22 , so that the neutral plane is located within the lateral projection area of ​​the structural layer 3 .

[0077] S4, see Fig.10 , the structural layer 3 is etched to pattern the structural layer 3, and the diaphragm area of ​​the structural layer 3 forms a pattern consistent with the diaphragm area of ​​the piezoelectric layer 2 due to the etching.

[0078] S5, see Fig.11 The substrate 1 is etched through the back side of the substrate 1 to form a back cavity. The piezoelectric layer 2 and the structural layer 3 within the longitudinal projection area of ​​the back cavity are the diaphragm, and the back cavity provides a vibration space for the diaphragm.

[0079] Compared with the traditional preparation process, the preparation method of the piezoelectric PMUT based on the MEMS chip proposed in this embodiment first grows the piezoelectric layer 2 and patterns it, then grows the structural layer 3 on the surface of the piezoelectric layer 2, and then patterns the structural layer 3. Therefore, the patterning steps of the piezoelectric layer 2 and the structural layer 3 are independent and do not interfere with each other. The piezoelectric layer 2 does not need to be unnecessary hollowed out due to the patterning of the structural layer 3, thereby ensuring the integrity of the piezoelectric layer 2 to the greatest extent.

[0080] Embodiment 4:

[0081] As a preferred scheme of Example 3, when etching the structural layer 3 in step S4, the structural layer 3 is patterned, and the diaphragm area of ​​the structural layer 3 forms a pattern consistent with the diaphragm area of ​​the piezoelectric layer 2 due to the etching, and the structural layer 3 is a double-layer structure or a three-layer structure in which silicon nitride and silicon oxide are alternately stacked.

[0082] Optionally, the structural layer 3 includes a first structural layer 31, a second structural layer 32 and a third structural layer 33, the material of the first structural layer 31 and the third structural layer 33 is silicon nitride, the material of the second structural layer 32 is silicon oxide, and the thickness of the second structural layer 32 is much greater than the thickness of the first structural layer 31 and / or the third structural layer 33.

[0083] Optionally, when the back cavity process is opened in step S5, Fig.11 As shown, a dry process may be used to first etch a portion of the substrate 1 from the back side of the substrate 1, and then a wet process may be used to etch through the back cavity of the substrate 1, specifically including:

[0084] S5-1, etching the back side of the substrate 1 by a DRIE dry process, where the substrate 1 will not be penetrated, because the DRIE etching will damage the piezoelectric layer 2, so the substrate 1 will have a residual thickness of 5-15% after the DRIE etching;

[0085] S5-2, etching the back side of the substrate 1 by a wet process, completely penetrating the remaining 5-15% thickness of the substrate 1, forming a U-shaped support structure, and forming a back cavity.

[0086] In the above method, since the buried oxide layer serves as a cutoff line when the SOI substrate 1 is etched, a back cavity can be formed by penetrating the buried oxide layer. Pure dry etching may damage the piezoelectric layer 2. In order to improve the yield rate, a part of the silicon wafer substrate 1 is dry-etched, and then the remaining part is etched through by a wet process. The wet process will not affect the piezoelectric layer 2.

[0087] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical scheme and inventive concept of the present invention within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

[0088] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being "above", "above" or "above" a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being "below", "below" or "below" a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

Claims

1. An ultrasonic transducer based on a piezoelectric MEMS chip, comprising a substrate (1), wherein the substrate (1) has a front side and a back side opposite to each other, and a piezoelectric layer (2) is formed on the front side of the substrate (1), characterized in that: The back side of the substrate (1) is provided with a back cavity penetrating to the piezoelectric layer (2); a structural layer (3) is formed on the surface of the piezoelectric layer (2); the piezoelectric layer (2) and the structural layer (3) within the longitudinal projection area of ​​the back cavity are diaphragms; the thickness of the structural layer (3) is greater than the thickness of the piezoelectric film (22) in the piezoelectric layer (2), so that the neutral plane is located within the transverse projection area of ​​the structural layer (3); The diaphragm region forms a gap (3a) penetrating the structural layer (3) and the piezoelectric layer (2), and the gap (3a) is used to reduce stress.

2. The ultrasonic transducer based on a piezoelectric MEMS chip according to claim 1, characterized in that: The diaphragm region is divided into a plurality of vibration structures (3b) due to the gap (3a), and the plurality of vibration structures (3b) are connected via a central structure (3c) formed by the gap (3a).

3. The ultrasonic transducer based on a piezoelectric MEMS chip according to claim 2, characterized in that: The slits (3a) are provided in four or six groups and are arranged in a ring array around the diaphragm central structure (3c).

4. The ultrasonic transducer based on a piezoelectric MEMS chip according to claim 3, characterized in that: The central structure (3c) is provided with V-shaped grooves (3d) having the same number as the gaps (3a) and not connected to the gaps (3a), and the V-shaped grooves (3d) are arranged in a ring array around the center of the diaphragm.

5. The ultrasonic transducer based on a piezoelectric MEMS chip according to claim 4, characterized in that: The V-shaped groove (3d) is symmetrical along the axis of its inflection point.

6. The ultrasonic transducer based on a piezoelectric MEMS chip according to claim 2, characterized in that: The material of the structural layer (3) is silicon oxide.

7. The ultrasonic transducer based on a piezoelectric MEMS chip according to claim 2, characterized in that: The structural layer (3) is a double-layer structure or a triple-layer structure in which silicon nitride and silicon oxide are alternately stacked.

8. A method for preparing the piezoelectric ultrasonic transducer according to any one of claims 1 to 7, characterized in that: The preparation method comprises the following steps: S1, preparing a substrate (1), the substrate (1) having a front side and a back side opposite to each other, and growing a piezoelectric layer (2) on the front side of the substrate (1); S2, etching the piezoelectric layer (2) to pattern the piezoelectric layer (2), forming a through gap (3a) in the piezoelectric layer (2) due to the etching, dividing the diaphragm into a plurality of vibration structures (3b) due to the etched gap (3a), and connecting the plurality of vibration structures (3b) via a central structure (3c) formed by the etching gap (3a); S3, growing a structural layer (3) on the surface of the patterned piezoelectric layer (2); S4, etching the structural layer (3) to pattern the structural layer (3), so that the diaphragm region of the structural layer (3) forms a pattern consistent with the diaphragm region of the piezoelectric layer (2) due to the etching; S5, etching through the substrate (1) to form a back cavity; The thickness of the structural layer (3) is greater than the thickness of the piezoelectric film (22) in the piezoelectric layer (2), so that the neutral plane is located within the lateral projection area of ​​the structural layer (3).

9. The preparation method according to claim 8, characterized in that: When the piezoelectric layer (2) is patterned in S2, V-shaped grooves (3d) having the same number as the gaps (3a) and not connected to the gaps (3a) are etched on the central structure (3c).

10. The preparation method according to claim 8, characterized in that: Etching through the substrate (1) to form a back cavity specifically includes: Firstly, a dry process is used to etch a portion of the substrate (1) from the back side of the substrate (1), and then a wet process is used to etch through the back cavity of the substrate (1).

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