Cross-storage-medium data transmission platform and data transmission method

Abstract

The invention discloses a cross-storage-medium data transmission platform and a cross-storage-medium data transmission method. Based on a data transmission platform composed of a programmable logic chip and a PCIE bridging chip, the data exchange system supports storage interfaces of various types, and realizes data exchange among storage devices of various different forms. Specifically, one part of the SERDES of the programmable logic chip is instantiated into a storage interface of the SATA hard disk, and the other part of the SERDES of the programmable logic chip is converted into a storage interface of the M.2 hard disk through the PCIE bridging chip, so that data transmission between the SATA hard disk and the M.2 hard disk is realized. Meanwhile, the data transmission platform supports remote control, and the functions of remote data exchange and direct writing of remote data into storage equipment can be achieved.

Description

Technical Field

[0001] The present application relates to the technical field of storage media, and in particular to a data transmission platform and a data transmission method across storage media. Background Art

[0002] With the continuous advancement of data storage technology, the way data is stored and transmitted has undergone tremendous changes, from the original magnetic tape to modern solid-state drives and cloud storage. Storage media and data transmission technology also need to continue to develop to meet the growing demand for data storage and transmission.

[0003] Most existing storage media utilize dedicated chips, and their data transfer methods primarily focus on data transfer between similar storage media, failing to support data transfer between different storage media. For example, data exchange and copying between Serial Advanced Technology Attachment (SATA) hard disks and data exchange and copying between M.2 hard disks are unsuccessful. Therefore, achieving data transfer across storage media has become a pressing issue. Summary of the Invention

[0004] Based on the above problems, the present application provides a cross-storage medium data transmission platform and a data transmission method to achieve cross-storage medium data transmission.

[0005] The present application discloses a data transmission platform across storage media, comprising: a programmable logic chip and a PCIE bridge chip;

[0006] The first part of the serializer / deserializer SERDES of the programmable logic chip is instantiated as the storage interface of the SATA hard disk, and the second part of the SERDES is converted into the storage interface of the M.2 hard disk through the PCIE bridge chip; the first part of the SERDES does not overlap with the second part.

[0007] Optionally, the second part of the SERDES is converted into a storage interface of an M.2 hard disk through the PCIE bridge chip, including:

[0008] The second part of the SERDES is instantiated as a PCIE root endpoint;

[0009] The PCIE root endpoint is connected to the PCIE bridge chip to convert the second part of the SERDES into a storage interface of the M.2 hard disk.

[0010] Optionally, the programmable logic chip is an FPGA chip, and the data transmission platform further includes a CPU chip;

[0011] The CPU chip is connected to the PCIE device endpoint of the programmable logic chip, and is used to control the programmable logic chip through a high-speed interface;

[0012] The CPU chip provides a storage interface of a universal serial bus USB.

[0013] Optionally, the CPU chip is connected to the programmable logic chip via a management channel, and is used to control the programmable logic chip via a low-speed interface.

[0014] Optionally, the data transmission platform further includes: an Ethernet physical layer PHY chip;

[0015] The Reduced Gigabit Media Independent Interface (RGMⅡ) interface of the CPU chip or the FPGA chip is connected to the PHY chip, providing an Ethernet port for receiving remote control instructions.

[0016] Optionally, the programmable logic chip is a ZYNQ chip, and the ZYNQ chip further includes a processing system;

[0017] The processing system provides a USB storage interface.

[0018] Optionally, the data transmission platform further includes: an Ethernet physical layer PHY chip;

[0019] The RGMⅡ interface of the ZYNQ chip is connected to the PHY chip, providing an Ethernet port for receiving remote control instructions.

[0020] Optionally, the secure digital input and output SDIO interface of the programmable logic chip leads to a storage interface of a secure digital SD card and / or leads to a storage interface of an embedded multimedia card EMMC.

[0021] Based on the above-mentioned cross-storage medium data transmission platform, the present application also discloses a data transmission method, including:

[0022] The data transmission platform receives data from the first storage interface;

[0023] The data transmission platform transmits the data to the second storage interface; the first storage interface is different from the second storage interface; the first storage interface and the second storage interface include a SATA hard disk storage interface, an M.2 hard disk storage interface, a USB storage interface, an SD card storage interface and an EMMC storage interface.

[0024] Optionally, the data transmission platform receives a remote control instruction from an Ethernet port, and performs data transmission according to the remote control instruction.

[0025] This application discloses a data transmission platform and method across storage media. Based on a data transmission platform composed of a programmable logic chip and a PCIE bridge chip, it supports a wide variety of storage interfaces and enables data exchange between various storage devices. Specifically, data transmission between a SATA hard drive and an M.2 hard drive can be achieved by instantiating a portion of the programmable logic chip's SERDES as a storage interface for a SATA hard drive, and converting the other portion via a PCIE bridge chip into a storage interface for an M.2 hard drive. Furthermore, the data transmission platform described in this application supports remote control, enabling remote data exchange and the direct writing of remote data to storage devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are merely embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without any creative work.

[0027] Figure 1 A schematic diagram of the structure of a data transmission platform across storage media disclosed in an embodiment of the present application;

[0028] Figure 2 This is a schematic structural diagram of another cross-storage medium data transmission platform disclosed in an embodiment of the present application;

[0029] Figure 3 This is a schematic structural diagram of another cross-storage medium data transmission platform disclosed in an embodiment of the present application;

[0030] Figure 4 This is a structural diagram of another cross-storage medium data transmission platform disclosed in an embodiment of the present application. DETAILED DESCRIPTION

[0031] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0032] Embodiment 1: This application discloses a data transmission platform across storage media.

[0033] For details, please refer to Figure 1The embodiment discloses a cross-storage medium data transmission platform including a programmable logic chip 100 and a PCIE bridge chip 200. PCIE, or PCI-Express (Peripheral Component Interconnect Express), is a high-speed serial computer expansion bus standard.

[0034] In the data transmission platform described in this embodiment, the first portion of the SERDES 101 of the programmable logic chip 100 is instantiated as a storage interface 301 for a SATA hard drive, and the second portion of the SERDES 101 is converted to a storage interface 302 for an M.2 hard drive via the PCIE bridge chip 200. It should be noted that the first portion of the SERDES 101 does not overlap with the second portion. Different storage interfaces are used to connect to different storage media. Data is input from one storage medium and can be output to another storage medium through the programmable logic chip 100, enabling data exchange across storage media. This also allows for testing the performance of the storage interfaces.

[0035] Embodiment 2: This application discloses another data transmission platform across storage media. Figure 2 This is a structural diagram of another cross-storage medium data transmission platform disclosed in an embodiment of the present application. Figure 2 The data transmission platform described in this embodiment provides a more detailed structure based on the data transmission platform in embodiment one.

[0036] In the data transmission platform described in this embodiment, the programmable logic chip can be a field programmable gate array FPGA (Field Programmable Gate Array) chip. Figure 2 As can be seen, in the FPGA chip, the first part of the SERDES is directly instantiated as a SATA hard disk (SSD) storage interface for connecting to the SATA SSD. The second part of the SERDES is converted into an M.2 hard disk SSD storage interface through the PCIe bridge chip (PCIE bridge chip) for connecting to the M.2 SSD.

[0037] As an optional method, the second part of SERDES can be instantiated as Figure 2 The PCIE root complex (RC) is located in the lower right corner of the FPGA chip. The PCIE RC then connects to the PCIE bridge chip, converting the second part of the SERDES into an M.2 SSD storage interface. Figure 2 In the figure, X1, X2, X4, and X8 represent different specifications of the connector interface.

[0038] As an alternative method, Figure 2 As shown in the upper right corner of the FPGA chip, the data transmission platform also includes a PHY chip. The FPGA chip's RGMⅡ interface connects to the PHY chip, providing an RJ45 Ethernet port for receiving remote control commands. This enables data management functions such as remote data exchange and writing remote network data to storage media.

[0039] Furthermore, the FPGA chip's SDIO interface can lead to both the SD card storage interface and the EMMC storage interface, or it can lead to only one of the two. In actual operation, this can be configured as needed. The data transmission platform described in this embodiment does not specifically limit whether the SDIO interface leads to both storage interfaces. It only requires that data exchange across storage media can be achieved through the data transmission platform described in this embodiment.

[0040] As an optional method, Figure 2 The left side of the FPGA chip can also be connected to the third-generation double-data-rate synchronous dynamic random access memory DDR3 (Double-Data-Rate Three Synchronous Dynamic Random Access Memory) and the flash memory area Bootflash that stores the boot code (Bootloader), which is used to store the FPGA chip's own data and boot code. At the same time, the left side of the FPGA chip can also be connected to the UART / I2C debug interface for receiving typed commands to control the FPGA chip. It should be noted that the debug interface can only receive control commands, so controlling the FPGA chip through the debug interface requires the user to have certain debugging capabilities.

[0041] Example 3: This application discloses another data transmission platform across storage media. Figure 3 This is a structural diagram of another cross-storage medium data transmission platform disclosed in an embodiment of the present application. Figure 3 The data transmission platform described in this embodiment is based on the data transmission platform of the second embodiment, and a CPU chip is added.

[0042] In the data transmission platform described in this embodiment, when the programmable logic chip is an FPGA chip, the data transmission platform also includes a CPU chip. Figure 3 As shown in the lower left portion of the FPGA chip, the CPU chip is connected to the FPGA chip's PCIE device endpoint (EP) to control the FPGA chip via a high-speed interface. Alternatively, the CPU chip can also connect to the FPGA chip via a management channel to control the FPGA chip via a low-speed interface. Management tasks, such as data collection, can be performed via the low-speed interface.

[0043] As an optional method, the CPU chip also provides a universal serial bus (USB) storage interface. The USB storage interface can be connected to an operating system and a display device, etc., thereby more intuitively displaying the data and exchange progress during the cross-storage medium data exchange process in this embodiment through an interactive interface, so that the user can more conveniently and promptly understand the exchange progress.

[0044] As an optional method, the CPU chip's RGMⅡ interface can also be connected to a PHY chip to provide an Ethernet port for receiving remote control commands. However, in the data transmission platform described in this embodiment, the Ethernet port can also be provided by an FPGA chip. In actual operation of the data transmission platform described in this embodiment, either the CPU chip or the FPGA chip can provide the Ethernet port. This embodiment does not specifically limit the provider of the Ethernet port; it only needs to be able to receive remote control commands.

[0045] As an alternative method, Figure 3 As shown on the left, the CPU chip may have a display interface, which is used to display the CPU chip's own data. Correspondingly, the CPU chip may also be connected to DDR3 and system memory areas to store the CPU chip's own data. The CPU chip is often connected to the Basic Input / Output System (BIOS).

[0046] It should be noted that the debugging interface of the CPU chip can access richer signals than the debugging interface of the FGPA in the second embodiment and is not restricted to typing commands. Therefore, the debugging threshold of the data transmission platform of this embodiment is lower and easier to operate.

[0047] Example 4: This application discloses another data transmission platform across storage media. Figure 4 This is a structural diagram of another cross-storage medium data transmission platform disclosed in an embodiment of the present application. Figure 4 The programmable logic chip in this embodiment may be a ZYNQ chip. Specifically, the programmable logic chip serves as the programmable logic (PL) portion of the ZYNQ chip. The ZYNQ chip also includes a processing system (PS) portion.

[0048] In the data transmission platform described in this embodiment, the PL portion's RGMⅡ interface can connect to the PHY chip, providing an Ethernet port for receiving remote control commands. The PS portion can provide a USB storage interface. This USB storage interface provided by the PS portion of this embodiment can be used for data display within the ZYNQ chip itself, as well as for data exchange across storage media.

[0049] In summary, the data transmission platform described in this application supports a wide variety of storage interfaces, including SATA hard drives, M.2 hard drives, EMMC, SD cards, and USB, and has one-to-many and many-to-many parallel data exchange capabilities, which can realize data exchange between different forms of storage media and can be used to implement cross-interface performance testing. The data transmission platform described in this application also supports remote network management, can realize remote data exchange, and can realize the function of directly writing remote network data into storage media.

[0050] Based on the cross-storage medium data transmission platform disclosed in the above embodiment, this embodiment correspondingly discloses a data transmission method, the method comprising:

[0051] Step 1: The data transmission platform receives data from the first storage interface.

[0052] Step 2: The data transmission platform transmits the data to the second storage interface.

[0053] In the data transmission method described in this embodiment, the first storage interface is different from the second storage interface; the first storage interface and the second storage interface include the storage interface of the SATA hard disk, the storage interface of the M.2 hard disk, the storage interface of the USB, the storage interface of the SD card and the storage interface of the EMMC.

[0054] In the data transmission method described in this embodiment, the data transmission platform can receive remote control instructions from the Ethernet port and perform data transmission according to the remote control instructions to achieve data exchange across storage media.

[0055] The embodiments in this specification are described in a progressive manner. As for the devices disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the description is relatively simple, and the relevant parts can be referred to the description of the methods.

[0056] It should also be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or device comprising the element.

[0057] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein may be implemented directly using hardware, a software module executed by a processor, or a combination of the two. The software module may be placed in a random access memory (RAM), internal memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.

[0058] The features described in the embodiments of this specification can be replaced with each other or combined to enable professionals in this field to implement or use this application.

[0059] The above description of the disclosed embodiments is intended to enable one skilled in the art to implement or use the present application. Various modifications to these embodiments will be readily apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application is not limited to the embodiments shown herein, but is intended to conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A data transmission platform across storage media, characterized in that: include: Programmable logic chip and PCIE bridge chip; The first part of the serializer / deserializer SERDES of the programmable logic chip is instantiated as a storage interface of a SATA hard disk, and the second part of the SERDES is converted into a storage interface of an M.2 hard disk through the PCIE bridge chip; the first part of the SERDES does not overlap with the second part.

2. The data transmission platform according to claim 1, characterized in that: The second part of the SERDES is converted into a storage interface of an M.2 hard disk through the PCIE bridge chip, including: The second part of the SERDES is instantiated as a PCIE root endpoint; The PCIE root endpoint is connected to the PCIE bridge chip to convert the second part of the SERDES into a storage interface of the M.2 hard disk.

3. The data transmission platform according to claim 1, characterized in that: The programmable logic chip is an FPGA chip, and the data transmission platform also includes a CPU chip; The CPU chip is connected to the PCIE device endpoint of the programmable logic chip, and is used to control the programmable logic chip through a high-speed interface; The CPU chip provides a storage interface of a universal serial bus USB.

4. The data transmission platform according to claim 3, characterized in that: The CPU chip is connected to the programmable logic chip via a management channel and is used to control the programmable logic chip via a low-speed interface.

5. The data transmission platform according to claim 3, characterized in that: The data transmission platform also includes: an Ethernet physical layer PHY chip; The reduced gigabit media independent interface RGMⅡ interface of the CPU chip or the FPGA chip is connected to the PHY chip to provide an Ethernet port for receiving remote control instructions.

6. The data transmission platform according to claim 1, characterized in that: The programmable logic chip is a ZYNQ chip, and the ZYNQ chip also includes a processing system; The processing system provides a USB storage interface.

7. The data transmission platform according to claim 6, characterized in that: The data transmission platform also includes: an Ethernet physical layer PHY chip; The RGMⅡ interface of the ZYNQ chip is connected to the PHY chip, providing an Ethernet port to receive remote control instructions.

8. The data transmission platform according to any one of claims 1 to 7, characterized in that: The secure digital input and output SDIO interface of the programmable logic chip leads to a storage interface of a secure digital SD card and / or leads to a storage interface of an embedded multimedia card EMMC.

9. A data transmission method, characterized in that: The data transmission method is implemented by the data transmission platform according to any one of claims 1 to 8, and comprises: The data transmission platform receives data from the first storage interface; The data transmission platform transmits the data to a second storage interface; the first storage interface is different from the second storage interface; the first storage interface and the second storage interface include a SATA hard disk storage interface, an M.2 hard disk storage interface, a USB storage interface, an SD card storage interface and an EMMC storage interface.

10. The data transmission method according to claim 9, characterized in that: The data transmission platform receives a remote control instruction from an Ethernet port, and performs data transmission according to the remote control instruction.

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