Mini-LED chip huge transfer error compensation method based on neural network

Through the neural network-based method, the transfer error of Mini-LED chips is predicted and compensated, which solves the accuracy and efficiency problems caused by the difficulty in controlling the transfer error of a single chip in the prior art and the high transfer frequency, and achieves efficient and accurate Mini- The huge amount of LED chips has been transferred.

CN119495618AActive Publication Date: 2025-02-21GUANGDONG UNIV OF TECH
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Patent Information

Application Number
CN202411561170.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-04
Publication Date
2025-02-21
Estimated Expiration
2044-11-04

AI Technical Summary

Technical Problem

The existing Mini-LED chip huge transfer technology is difficult to effectively control the transfer error of a single chip. Due to the high transfer frequency, it is impossible to achieve camera positioning and crystallization during transfer of each chip, resulting in the difficulty of meeting the requirements of large-scale production. .

Method used

A huge transfer error compensation method based on neural network is adopted. By collecting the actual transfer data of each chip, a multi-layer neural network model is trained to predict the transfer error, and the motion path is adjusted according to the prediction results to achieve pre-compensation.

Benefits of technology

It realizes accurate transfer error compensation for each Mini-LED chip, improves transfer accuracy and efficiency, reduces manual intervention, and meets the high efficiency and high accuracy requirements of large-scale production.

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Abstract

The invention relates to the technical field of Mini-LED chip transfer packaging, and provides a Mini-LED chip huge transfer error compensation method based on a neural network, and the method comprises the steps: S1, obtaining an AOI reinspection result as a first result; s2, sorting the first results according to the transfer sequence, and performing normalization processing on the sorted first results to obtain second results; s3, adjacent interpolation is carried out on the chips with the transfer state identification being abnormal in the second result, and the difference of path variables of all the chips is calculated; s4, defining a multi-layer neural network model, constructing a loss function, and updating the weight of the multi-layer neural network model by using the loss function until the multi-layer neural network model does not have overfitting; and S5, generating a chip transfer path, inputting the chip transfer path into the multi-layer neural network model to obtain a transfer error predicted value, and realizing mass transfer of the chip. According to the method, the motion path is exported and input into the multi-layer neural network before transfer is started, and the predicted transfer error is obtained.
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Description

Technical Field

[0001] The present invention relates to the field of Mini-LED chip transfer and packaging technology, and in particular to a method for compensating Mini-LED chip mass transfer errors based on a neural network. Background Art

[0002] The process of transferring a large number of Mini-LEDs from their growth wafers to a designated display plane is called the mass transfer process. Mini-LED chips are very small, so it is necessary to ensure that each chip can be accurately placed in the predetermined position. Excessive transfer errors may cause defects such as poor contact or leakage, and the mass transfer process needs to ensure high efficiency to meet the requirements of large-scale production. Due to the small size of Mini-LED chips and the high transfer frequency, the source of transfer errors is more complicated and difficult to calculate clearly using mathematical models. Flying thorn crystals are one of the Mini-LED mass transfer technologies. In the existing flying thorn crystal technology, the relative positions of the needle, wafer and glass substrate are adjusted to control the overall translation of the Mini-LED chip landing point.

[0003] However, this compensation method can only reduce the average value of chip transfer error as much as possible, but cannot control the transfer error of a single chip. In addition, due to the high frequency of mass transfer, it is impossible to position each chip by camera before piercing the crystal. Therefore, a mass transfer error compensation method that pre-compensates each chip before transfer is urgently needed. Summary of the invention

[0004] In view of the above-mentioned defects, the purpose of the present invention is to propose a method for compensating the mass transfer errors of Mini-LED chips based on neural networks, which aims to use the existing transfer results to train the multi-layer neural network, export the motion path and input it into the multi-layer neural network before starting the transfer, obtain the predicted transfer error, and modify the motion path according to the predicted results to achieve the pre-compensation result.

[0005] To achieve this object, the present invention adopts the following technical solutions:

[0006] A method for compensating Mini-LED chip mass transfer errors based on a neural network, the compensation method comprising the steps of:

[0007] S1: Obtaining the AOI re-inspection result as the first result, the first result including data variables of each chip, the data variables including transfer state identification, and transfer errors in X and Y directions;

[0008] S2: remove irrelevant variables in the data variables, sort the first results according to the transfer order, and normalize the sorted first results to obtain the second results;

[0009] S3: performing neighbor interpolation for the chips whose transfer status is marked as abnormal in the second result, and calculating the chip distance and chip position angle in polar coordinates according to the transfer errors in the X and Y directions and removing extreme values, and calculating the chip angle information according to the chip position angle on the wafer and converting it into rectangular coordinate system information, so as to calculate the difference of the path variable of each chip;

[0010] S4: define a multi-layer neural network model and a corresponding dropout ratio, construct a loss function based on the chip distance in polar coordinates and its predicted value and the chip position angle and its predicted value, and use the optimizer and the loss function to update the weights of the multi-layer neural network model until no overfitting occurs after the chip distance and chip position angle in polar coordinates in the test set, the difference of the path variables, and the second result are input into the multi-layer neural network model;

[0011] S5: Generate a chip transfer path, input the chip transfer path into a multi-layer neural network model to obtain a transfer error prediction value, and implement a mass transfer of the chip based on the transfer error prediction value.

[0012] Preferably, the data variables further include: substrate row, substrate column, camera X-axis coordinate, camera Y-axis coordinate, substrate X-axis coordinate, substrate Y-axis coordinate, chip rotation angle after transfer, whether to transfer mark, wafer row, wafer column, wafer X-axis coordinate, wafer Y-axis coordinate, chip rotation angle on wafer, substrate serial number, wafer serial number, thorn crystal mode and transfer direction;

[0013] The irrelevant variables include: camera X-axis coordinates, camera Y-axis coordinates, chip rotation angle after transfer, whether to transfer mark, substrate serial number, wafer serial number and wafer pricking mode.

[0014] Further, generating a transfer path of the chip comprises the steps of:

[0015] S51: Rotate the wafer until the chip at the center of the wafer is parallel to the Y axis of the camera;

[0016] S52: Control the camera to move to the mark points at the four right-angle vertices of each glass substrate to obtain the position coordinates of each glass substrate;

[0017] S53: Control the camera to move to the position of each chip on the wafer to obtain the position coordinates of each chip;

[0018] S54: adjusting the ranges of the substrate rows, substrate columns, wafer rows, and wafer columns so that the target position matrix on the glass substrate and the chip matrix on the wafer are equal in size and correspond one to one;

[0019] S55: Generate a chip transfer path according to the position coordinates of the glass substrate and the position coordinates of the chip on the wafer.

[0020] Furthermore, the chip transfer path is input into the multi-layer neural network model to obtain a transfer error prediction value, and the massive transfer compensation of the chip is implemented according to the transfer error prediction value, including the steps of:

[0021] S56: Input the chip transfer path into the multi-layer neural network model updated in step S4 to obtain a transfer error prediction value, and convert the transfer error prediction value into a transfer error in the X-axis direction and the Y-axis direction;

[0022] S57: Subtracting the X-axis sub-coordinates of the position coordinates of the glass substrate and the chip from the transfer error in the X-axis direction, and subtracting the Y-axis sub-coordinates of the position coordinates of the glass substrate and the chip from the transfer error in the Y-axis direction, to obtain an adjusted chip transfer path;

[0023] S58: The chips are placed on the glass substrate according to the adjusted chip transfer path to achieve mass transfer.

[0024] Preferably, after step S58, the method further includes performing a flying shot on the chip on the glass substrate to obtain transfer error data.

[0025] Preferably, in step S3, if there are several consecutive chips with abnormal transfer status marks in the second data, the data of the two most recent chips with normal transfer status marks are retrieved forward and backward, and the values ​​of the abnormal rows are calculated in an equidistant distribution.

[0026] Preferably, in step S3, the path variables include: substrate X-axis coordinates, substrate Y-axis coordinates, wafer X-axis coordinates, and wafer Y-axis coordinates;

[0027] Calculating the difference of path variables involves:

[0028] Get the path variable of the current chip;

[0029] Obtain the path variables of the control chip;

[0030] The path variable of the current chip is subtracted from the path variable of the reference chip to obtain the distances moved by the glass substrate and the wafer in the X or Y axis direction, respectively.

[0031] Preferably, in step S4, the multi-layer neural network includes an input layer, a fully connected layer, a forgetting layer and an output layer;

[0032] The forward propagation output of the multi-layer neural network satisfies the relationship:

[0033] Output = Act(...Act(Act(W3·Act(W2·Act(W1·X+b1)+b2)+b3)));

[0034] Where W i represents the weight matrix, b irepresents the bias of layer i, and Act is the activation function.

[0035] Preferably, a loss function is constructed based on the chip distance in polar coordinates and its predicted value and the chip position angle and its predicted value, satisfying the relationship:

[0036]

[0037] Among them, loss represents the calculation result of the loss function, m represents the number of samples, and R i and Represent the true value and predicted value of the i-th chip, respectively, Theta i and They represent the post-transfer corner and predicted corner of the i-th chip respectively.

[0038] Furthermore, the optimizer and loss function are used to update the weights of the multi-layer neural network model to satisfy the relationship:

[0039]

[0040] Among them, W t+1 Represents the weight of the updated multi-layer neural network model, W t represents the weight of the multi-layer neural network model, η represents the learning rate, Represents the gradient of loss with respect to weight.

[0041] One of the above technical solutions has the following advantages or beneficial effects:

[0042] The present invention collects the actual transfer data of each chip to ensure accurate identification and compensation of transfer errors, thereby solving the problem that chips cannot be located and transferred one by one; taking into account the various error sources in the Mini-LED chip transfer process, a neural network model is used for complex data processing, which can more effectively capture and compensate for errors; through a suitable model structure and dropout mechanism, the generalization ability of the model is improved, and the problem that the source of transfer errors caused by the small size and high transfer frequency of Mini-LED chips is complex and difficult to calculate clearly with a mathematical model is solved, making the performance more stable in practical applications; through an automated pre-compensation method, manual intervention is reduced, and the transfer accuracy of the chip is improved without reducing the transfer efficiency of the Mini-LED chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0044] Figure 1 is a flow chart of a method for compensating for mass transfer errors of Mini-LED chips based on a neural network provided by an embodiment of the present invention;

[0045] Figure 2 is a flow chart of generating a chip transfer path of a method for compensating for a mass transfer error of Mini-LED chips based on a neural network provided by an embodiment of the present invention;

[0046] Figure 3 It is a flow chart of realizing mass transfer compensation for a chip according to a method for compensating mass transfer error of a Mini-LED chip based on a neural network provided in an embodiment of the present invention;

[0047] Figure 4 : is a comparison diagram between the pre-compensated transfer error and the actual transfer error in the X-axis direction of the Mini-LED chip mass transfer error compensation method based on a neural network provided by an embodiment of the present invention;

[0048] Figure 5 : is a comparison diagram between the pre-compensated transfer error and the actual transfer error in the Y-axis direction of the Mini-LED chip mass transfer error compensation method based on a neural network provided by an embodiment of the present invention;

[0049] Figure 6 This is a comparison diagram between the plane pre-compensation transfer error and the actual transfer error of the Mini-LED chip mass transfer error compensation method based on a neural network provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0050] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.

[0051] In the description of the present invention, it is to be understood that the terms “center”, “longitudinal”, “lateral”, “length”, “width”, “thickness”, “up”, “down”, “left”, “right”, “vertical”, “horizontal”, “top”, “bottom”, “inside”, “outside”, “axial”, “radial”, “circumferential”, etc., indicating orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.

[0052] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, unless otherwise specified, "plurality" means two or more.

[0053] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a direct connection, or an indirect connection through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0054] Mini-LED chips are very small, so it is necessary to ensure that each chip can be accurately placed in the predetermined position. Excessive transfer errors may cause defects such as poor contact or leakage, and the mass transfer process needs to ensure high efficiency to meet the requirements of large-scale production. Due to the small size of Mini-LED chips and the high transfer frequency, the source of transfer errors is more complicated and difficult to calculate clearly using mathematical models. Flying thorn crystal is one of the Mini-LED mass transfer technologies. In the existing flying thorn crystal technology, the relative positions of the needle, wafer and glass substrate are adjusted to control the overall translation of the Mini-LED chip landing point.

[0055] However, this compensation method can only reduce the average value of chip transfer error as much as possible, but cannot control the transfer error of a single chip. In addition, due to the high frequency of mass transfer, it is impossible to position each chip by camera before piercing the crystal. Therefore, a mass transfer error compensation method that pre-compensates each chip before transfer is urgently needed.

[0056] A neural network-based Mini-LED chip mass transfer error compensation method is proposed. Figure 1 As shown, the compensation method comprises the steps of:

[0057] S1: Obtaining the AOI re-inspection result as the first result, the first result including data variables of each chip, the data variables including transfer state identification, and transfer errors in X and Y directions;

[0058] In this step, the purpose is to collect the status information of the chip after transfer. Through AOI re-inspection, the position information and transfer status of each chip can be obtained, which provides a basis for subsequent analysis and model training. The physical meaning of the X-direction transfer error OffsetX and the Y-direction transfer error OffsetY is the distance between the actual position of each chip on the glass substrate after transfer and the target position. With the target position as the origin, the X-direction and Y-direction coordinate axes are established. The X-direction transfer error OffsetX and the Y-direction transfer error OffsetY represent the plane coordinates (x, y) of the actual position.

[0059] S2: remove irrelevant variables in the data variables, sort the first results according to the transfer order, and normalize the sorted first results to obtain the second results;

[0060] Irrelevant variables refer to variables that are not used in this method. These variables are generated by the machine's own software and can be helpful for actual production. However, in the present invention, the existence of irrelevant variables will affect the learning and generalization of the model, so it is necessary to remove irrelevant variables first. Then the data is reordered according to the transfer order to ensure the consistency of the time series. Finally, all features are linearly scaled to the [0,1] interval through minimum-maximum normalization. The normalization process can reduce the scale difference between features and prevent certain features from dominating the learning process, thereby improving the accuracy of the model. In addition, it can also reduce the risk of gradient explosion in the subsequent model training process.

[0061] S3: performing neighbor interpolation for the chips whose transfer status is marked as abnormal in the second result, and calculating the chip distance and chip position angle in polar coordinates according to the transfer errors in the X and Y directions and removing extreme values, and calculating the chip angle information according to the chip position angle on the wafer and converting it into rectangular coordinate system information, so as to calculate the difference of the path variable of each chip;

[0062] Specifically, firstly, the chips with abnormal transfer status are identified and interpolated, and the average value of all values ​​of the previous row and the next row is used as the value of the abnormal row. Secondly, the X-direction transfer error OffsetX and the Y-direction transfer error OffsetY are coupled, and the two variables are used to calculate the chip distance R and the chip position angle Theta in polar coordinates, and then the extreme values ​​are removed. It is worth noting that the extreme values ​​refer to chips whose chip distance R in polar coordinates exceeds 50μm. These chips can be visually detected, but they are abnormal state chips and have no reference for transfer error prediction. Therefore, it is necessary to remove extreme values. The chips with abnormal transfer status are chips whose state identification State is Missing after the variable is transferred in the data; then the chip angle DieAngle on the wafer is used to calculate the chip angle information. The chip angle information includes the sine value SinDieAngle and the cosine value CosDieAngle. The angle information is converted into rectangular coordinate system information, and finally the difference of the path variable is calculated to represent the movement path of the machine before reaching the current chip position.

[0063] S4: define a multi-layer neural network model and a corresponding dropout ratio, construct a loss function based on the chip distance in polar coordinates and its predicted value and the chip position angle and its predicted value, and use the optimizer and the loss function to update the weights of the multi-layer neural network model until no overfitting occurs after the chip distance and chip position angle in polar coordinates in the test set, the difference of the path variables, and the second result are input into the multi-layer neural network model;

[0064] This step is the process of building and training a multi-layer neural network model. First, the model structure is defined and the appropriate dropout ratio is set to prevent overfitting. The loss function combines the prediction error of chip distance and position angle to ensure that the model can optimize these two goals at the same time. Then, the optimizer is used to update the model weights and gradually improve the performance of the model. Finally, by verifying the performance of the model on the test set, it is ensured that the model is not overfitting, thereby improving its generalization ability and practical application effect.

[0065] S5: Generate a chip transfer path, input the chip transfer path into a multi-layer neural network model to obtain a transfer error prediction value, and implement a mass transfer of the chip based on the transfer error prediction value.

[0066] After the model training is completed, the error in the actual transfer process can be predicted by inputting the chip transfer path. The predicted value will guide the adjustment of the position and angle during the transfer process, thereby optimizing the transfer effect. Through precise path planning, the chip position deviation caused by error can be reduced and the success rate of transfer can be improved.

[0067] Preferably, the data variables further include: substrate row, substrate column, camera X-axis coordinate, camera Y-axis coordinate, substrate X-axis coordinate, substrate Y-axis coordinate, chip rotation angle after transfer, whether to transfer mark, wafer row, wafer column, wafer X-axis coordinate, wafer Y-axis coordinate, chip rotation angle on wafer, substrate serial number, wafer serial number, thorn crystal mode and transfer direction;

[0068] The irrelevant variables include: camera X-axis coordinates, camera Y-axis coordinates, chip rotation angle after transfer, whether to transfer mark, substrate serial number, wafer serial number and wafer pricking mode.

[0069] Specifically, the camera X-axis and Y-axis coordinates have a one-to-one mapping relationship with the substrate X-axis and Y-axis coordinates, and the two are highly collinear. Highly collinear variables should be excluded from the data input into the neural network, otherwise it will lead to problems such as difficulty in weight learning and decreased generalization ability of the model method. Therefore, the camera X-axis coordinate and the camera Y-axis coordinate are removed;

[0070] The transfer flag and the post-transfer state flag are highly collinear, and both indicate chip transfer / missing. Since highly collinear variables should be excluded when inputting data into the neural network, the transfer flag is removed. The chip rotation angle after transfer is the same as the transfer error in the X and Y directions, which is a result that can only be obtained after transfer. The method proposed in the present invention is to pre-compensate the machine motion path before transfer, and the input data for training the neural network should also use the data that can be obtained before transfer, so the chip rotation angle after transfer needs to be excluded.

[0071] The three variables of substrate serial number, wafer serial number and thorn pattern are used for material layout and planning in actual production, while the present invention focuses on error compensation during the transfer process of a single wafer, and therefore these three variables are discarded.

[0072] Further, generating a transfer path of the chip comprises the steps of:

[0073] S51: Rotate the wafer until the chip at the center of the wafer is parallel to the Y axis of the camera;

[0074] S52: Control the camera to move to the mark points at the four right-angle vertices of each glass substrate to obtain the position coordinates of each glass substrate;

[0075] S53: Control the camera to move to the position of each chip on the wafer to obtain the position coordinates of each chip;

[0076] S54: adjusting the ranges of the substrate rows, substrate columns, wafer rows, and wafer columns so that the target position matrix on the glass substrate and the chip matrix on the wafer are equal in size and correspond one to one;

[0077] S55: Generate a chip transfer path according to the position coordinates of the glass substrate and the position coordinates of the chip on the wafer.

[0078] Specifically, in semiconductor manufacturing, each chip on the wafer needs to be aligned with the camera's line of sight when photographing or processing to reduce image distortion and distortion. Rotating the wafer can adjust the angle of the chip to reduce the average rotation angle of all chips on the wafer so that their center is parallel to the camera's Y-axis, thereby ensuring the best image capture effect. In order to achieve effective chip transfer, it is necessary to ensure that the size and layout of the glass substrate and the wafer match, that is, each time the needle of the crystal needle machine falls, it corresponds to the coordinate values ​​of the four axes: substrate X-axis coordinate RulerX, substrate Y-axis coordinate RulerY, wafer X-axis coordinate DieX and wafer Y-axis coordinate DieY. This step achieves this goal by adjusting the range of rows and columns. The four coordinate axes of substrate X-axis coordinate RulerX, substrate Y-axis coordinate RulerY, wafer X-axis coordinate DieX and wafer Y-axis coordinate DieY can form the motion path of the two main moving parts of the glass substrate carrier platform and the wafer platform. By adjusting the row and column range of the substrate and wafer, the layout of the two is ensured to match, the consistency and reliability of the overall production are improved, the correspondence of the four coordinate axes is clarified, the chip transfer is more efficient, and the transfer time and potential errors are reduced.

[0079] Furthermore, the chip transfer path is input into the multi-layer neural network model to obtain a transfer error prediction value, and the massive transfer compensation of the chip is implemented according to the transfer error prediction value, including the steps of:

[0080] S56: Input the chip transfer path into the multi-layer neural network model updated in step S4 to obtain a transfer error prediction value, and convert the transfer error prediction value into a transfer error in the X-axis direction and the Y-axis direction;

[0081] S57: Subtracting the X-axis sub-coordinates of the position coordinates of the glass substrate and the chip from the transfer error in the X-axis direction, and subtracting the Y-axis sub-coordinates of the position coordinates of the glass substrate and the chip from the transfer error in the Y-axis direction, to obtain an adjusted chip transfer path;

[0082] S58: The chips are placed on the glass substrate according to the adjusted chip transfer path to achieve mass transfer.

[0083] Specifically, the multi-layer neural network captures complex patterns by learning a large amount of historical data (such as past transfer paths and corresponding actual positions). When the chip transfer path data is input, the model uses its internal weights and activation functions to calculate and generate a transfer error prediction value. For example, after step S55, the chip transfer path is saved as ManualReplanBondingPathOffset.csv, and ManualReplanBondingPathOffset.csv is input into the multi-layer neural network model updated in step S4 to output the transfer error prediction value. The predicted value is then converted from polar coordinates to the X-direction transfer error and Y direction transfer error The calculation formula is:

[0084]

[0085] After obtaining the transfer error, the position is corrected by coordinate calculation. Specifically, the original coordinates of the glass substrate and the chip are subtracted from the predicted transfer errors in the X-axis and Y-axis directions, which can intuitively reflect the deviation between the actual position and the target position, ensuring that the chip can be adjusted along the predetermined path, that is, compensating for the transfer error. For example: the X-axis coordinate of the modified substrate Modified substrate Y-axis coordinate Modified wafer X-axis coordinate Wafer Y-axis coordinate Save the modified motion path as BondingDataAddOffset.csv and import it into the Mass Transfer Machine.

[0086] In step S58, the needle machine transfers the Mini-LED chips according to BondingDataAddOffset.csv, drops the needle at the corresponding coordinates of each chip, and makes the chip fall on the glass substrate to achieve mass transfer. Figure 4 and Figure 5 As shown in the figure, the solid line represents the true value of the chip transfer error, and the dotted line represents the compensated transfer error after the multi-layer neural network predicts and modifies the path. It can be seen that after pre-compensation, the chip transfer error range is reduced and the fluctuation is reduced; in addition, as Figure 6 As shown, the circular scattered points represent the actual landing points of the chip relative to the target position, and the triangular scattered points represent the landing points of the chip after pre-compensation. It can be seen that after pre-compensation, the chip transfer error range is reduced and the transfer accuracy is higher.

[0087] Preferably, after step S58, the method further includes performing a flying shot on the chip on the glass substrate to obtain transfer error data.

[0088] Flying camera technology can quickly capture the actual position of the chip during the transfer process, compare it with the predetermined position, and monitor the accuracy of the transfer process in real time. By obtaining transfer error data, the transfer data can be fed back in time, allowing dynamic adjustments in subsequent transfers, thereby improving the overall response speed. Timely detection of transfer errors can prevent the generation of unqualified products, thereby improving the yield of the final product and reducing the scrap rate.

[0089] Preferably, in step S3, if there are several consecutive chips with abnormal transfer status marks in the second data, the data of the two most recent chips with normal transfer status marks are retrieved forward and backward, and the values ​​of the abnormal rows are calculated in an equidistant distribution.

[0090] The equidistant distribution ensures a smooth transition of the data, avoids unnatural fluctuations due to mutations, and makes the overall trend more consistent. Calculation using the equidistant distribution method can usually simplify the interpolation process, making the implementation more direct and efficient, and making the trend of abnormal data consistent with the surrounding normal data, which helps to improve the reliability of the prediction model.

[0091] Preferably, in step S3, the path variables include: substrate X-axis coordinates, substrate Y-axis coordinates, wafer X-axis coordinates, and wafer Y-axis coordinates;

[0092] Calculating the difference of path variables involves:

[0093] Get the path variable of the current chip;

[0094] Obtain the path variables of the control chip;

[0095] The path variable of the current chip is subtracted from the path variable of the reference chip to obtain the distances moved by the glass substrate and the wafer in the X or Y axis direction, respectively.

[0096] Specifically, for the i-th chip, take the current i-th row data and the n-th row data, and subtract the n-th row value from the i-th row path variable value, and record them as variables: substrate X-axis coordinate difference diffRulerXk, substrate Y-axis coordinate difference diffRulerYk, wafer X-axis coordinate difference diffDieXk, wafer Y-axis coordinate difference diffDieYk, where k = 1, 2, 3...n-1, where the physical meaning of substrate X-axis coordinate difference diffRulerXk is: when transferring the i-th chip, compared with the in-th chip, the substrate carries The distance traveled by the platform in the X-axis direction, the physical meaning of the substrate Y-axis coordinate difference diffRulerYk is: when transferring the i-th chip, compared with the in-th chip, the distance traveled by the substrate carrying platform in the Y-axis direction, the physical meaning of the wafer X-axis coordinate difference diffDieXk is: when transferring the i-th chip, compared with the in-th chip, the distance traveled by the wafer in the X-axis direction, the physical meaning of the wafer Y-axis coordinate difference diffDieYk is: when transferring the i-th chip, compared with the in-th chip, the distance traveled by the wafer in the Y-axis direction.

[0097] Preferably, in step S4, the multi-layer neural network includes an input layer, a fully connected layer, a forgetting layer and an output layer;

[0098] The forward propagation output of the multi-layer neural network satisfies the relationship:

[0099] Output = Act(...Act(Act(W3·Act(W2·Act(W1·X+b1)+b2)+b3)));

[0100] Where W i represents the weight matrix, b i represents the bias of layer i, and Act is the activation function.

[0101] Specifically, the forward propagation output of the multi-layer neural network realizes complex nonlinear mapping through the application of multiple activation functions. Each layer in the formula is transformed by the weight matrix W. i and bias b iPerform linear transformation, and then introduce nonlinear features through the activation function Act to improve the expressiveness of the model. The hierarchical structure enables the network to learn complex patterns in the data, improve prediction accuracy and generalization ability, and the network can be continuously optimized by adjusting weights and biases to adapt to different task requirements. Among them, the activation function can be the Relu function, input layer: the mapping of input variables to the fully connected layer, each input node represents a feature variable in the data set, fully connected layer: each neuron is connected to all neurons in the previous layer, used to learn the mapping from input variables to target variables, forgetting layer: randomly set the output of a certain proportion of neurons in the network to zero, forcing the network to learn more robust features, which helps to reduce the overfitting of the model to the training data and improve the generalization ability of the model, output layer: the mapping of the fully connected layer to the target variable, and the dropout ratio refers to the proportion of neurons set to zero in the forgetting layer.

[0102] Preferably, a loss function is constructed based on the chip distance in polar coordinates and its predicted value and the chip position angle and its predicted value, satisfying the relationship:

[0103]

[0104] Among them, loss represents the calculation result of the loss function, m represents the number of samples, and R i and Represent the true value and predicted value of the i-th chip, respectively, Theta i and They represent the post-transfer corner and predicted corner of the i-th chip respectively.

[0105] Specifically, the physical meaning of loss is the average distance from the predicted landing point of all chips to the actual landing point. In the process of training the multi-layer neural network model, the loss is continuously reduced to ensure that the predicted landing point is as close to the actual landing point as possible. Before constructing the loss function, since the transfer error of all chips in a single transfer is affected by the accumulation of motion errors and presents time series characteristics, the re-inspection results of a single transfer should be ensured as a whole epoch input when input into the model. Therefore, it is necessary to create a data loader to input AOI re-inspection results of different lengths into the neural network.

[0106] Furthermore, the optimizer and loss function are used to update the weights of the multi-layer neural network model to satisfy the relationship:

[0107]

[0108] Among them, W t+1 Represents the weight of the updated multi-layer neural network model, W t represents the weight of the multi-layer neural network model, η represents the learning rate, Represents the gradient of loss with respect to weight.

[0109] Specifically, the optimizer can be an adaptive matrix estimation algorithm Adam. The process of updating the weights of the multi-layer neural network model using the optimizer and the loss function can be expressed as: t+1 =W t -η· To verify whether the model is overfitting, the predicted value and true value of the target variable in the test set are used to calculate the loss, and the loss corresponding to the test set is compared with the loss corresponding to the training set and the validation set. If the loss corresponding to the test set is similar to the loss corresponding to the training set and the validation set and there is no difference in order of magnitude, it means that the model has generalization ability. Otherwise, it proves that the model is overfitting and the weights of the multi-layer neural network model need to be updated.

[0110] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0111] Although the embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

Claims

1. A method for compensating the mass transfer error of Mini-LED chips based on a neural network, characterized in that: The compensation method comprises the steps of: S1: Obtaining the AOI re-inspection result as the first result, the first result including data variables of each chip, the data variables including transfer state identification, and transfer errors in X and Y directions; S2: remove irrelevant variables in the data variables, sort the first results according to the transfer order, and normalize the sorted first results to obtain the second results; S3: performing neighbor interpolation for the chips whose transfer status is marked as abnormal in the second result, and calculating the chip distance and chip position angle in polar coordinates according to the transfer errors in the X and Y directions and removing extreme values, and calculating the chip angle information according to the chip position angle on the wafer and converting it into rectangular coordinate system information, so as to calculate the difference of the path variable of each chip; S4: define a multi-layer neural network model and a corresponding dropout ratio, construct a loss function based on the chip distance in polar coordinates and its predicted value and the chip position angle and its predicted value, and use the optimizer and the loss function to update the weights of the multi-layer neural network model until no overfitting occurs after the chip distance and chip position angle in polar coordinates in the test set, the difference of the path variables, and the second result are input into the multi-layer neural network model; S5: Generate a chip transfer path, input the chip transfer path into a multi-layer neural network model to obtain a transfer error prediction value, and implement a mass transfer of the chip based on the transfer error prediction value.

2. The compensation method according to claim 1, characterized in that: The data variables also include: substrate row, substrate column, camera X-axis coordinate, camera Y-axis coordinate, substrate X-axis coordinate, substrate Y-axis coordinate, chip rotation angle after transfer, whether to transfer mark, wafer row, wafer column, wafer X-axis coordinate, wafer Y-axis coordinate, chip rotation angle on wafer, substrate serial number, wafer serial number, wafer pricking mode and transfer direction; The irrelevant variables include: camera X-axis coordinates, camera Y-axis coordinates, chip rotation angle after transfer, whether to transfer mark, substrate serial number, wafer serial number and wafer pricking mode.

3. The compensation method according to claim 2, characterized in that: The transfer path to generate a chip includes the following steps: S51: Rotate the wafer until the chip at the center of the wafer is parallel to the Y axis of the camera; S52: Control the camera to move to the mark points at the four right-angle vertices of each glass substrate to obtain the position coordinates of each glass substrate; S53: Control the camera to move to the position of each chip on the wafer to obtain the position coordinates of each chip; S54: adjusting the ranges of the substrate rows, substrate columns, wafer rows, and wafer columns so that the target position matrix on the glass substrate and the chip matrix on the wafer are equal in size and correspond one to one; S55: Generate a chip transfer path according to the position coordinates of the glass substrate and the position coordinates of the chip on the wafer.

4. The compensation method according to claim 3, characterized in that: Inputting the chip transfer path into the multi-layer neural network model to obtain the transfer error prediction value, and realizing the massive transfer compensation of the chip according to the transfer error prediction value includes the following steps: S56: Input the chip transfer path into the multi-layer neural network model updated in step S4 to obtain a transfer error prediction value, and convert the transfer error prediction value into a transfer error in the X-axis direction and the Y-axis direction; S57: Subtracting the X-axis sub-coordinates of the position coordinates of the glass substrate and the chip from the transfer error in the X-axis direction, and subtracting the Y-axis sub-coordinates of the position coordinates of the glass substrate and the chip from the transfer error in the Y-axis direction, to obtain an adjusted chip transfer path; S58: The chips are placed on the glass substrate according to the adjusted chip transfer path to achieve mass transfer.

5. The compensation method according to claim 1, characterized in that: After step S58, the process further includes performing a flying shot of the chip on the glass substrate to obtain transfer error data.

6. The compensation method according to claim 1, characterized in that: In step S3, if there are several consecutive chips with abnormal transition status marks in the second data, the data of the two most recent chips with normal transition status marks are retrieved forward and backward, and the values ​​of the abnormal rows are calculated in an equidistant distribution.

7. The compensation method according to claim 1, characterized in that: In step S3, the path variables include: substrate X-axis coordinate, substrate Y-axis coordinate, wafer X-axis coordinate and wafer Y-axis coordinate; Calculating the difference of path variables involves: Get the path variable of the current chip; Obtain the path variables of the control chip; The path variable of the current chip is subtracted from the path variable of the reference chip to obtain the distances moved by the glass substrate and the wafer in the X or Y axis direction, respectively.

8. The compensation method according to claim 1, characterized in that: In step S4, the multi-layer neural network includes an input layer, a fully connected layer, a forgetting layer and an output layer; The forward propagation output of the multi-layer neural network satisfies the relationship: Output = Act(...Act(Act(W3·Act(W2·Act(W1·X+b1)+b2)+b3))); Where W i represents the weight matrix, b i represents the bias of layer i, and Act is the activation function.

9. The compensation method according to claim 1, characterized in that: The loss function is constructed based on the chip distance and its predicted value in polar coordinates and the chip position angle and its predicted value, satisfying the relationship: Among them, loss represents the calculation result of the loss function, m represents the number of samples, and R i and Represent the true value and predicted value of the i-th chip, respectively, Theta i and They represent the post-transfer corner and predicted corner of the i-th chip respectively.

10. The compensation method according to claim 9, characterized in that: Use the optimizer and loss function to update the weights of the multi-layer neural network model to satisfy the relationship: Among them, W t+1 Represents the weight of the updated multi-layer neural network model, W t represents the weight of the multi-layer neural network model, η represents the learning rate, Represents the gradient of loss with respect to weight.

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