A parallel current adding system and a control method thereof

Abstract

A kind of parallel machine current adding system belongs to the technical field of electronic equipment for measurement and testing, solve how to design a kind of hardware circuit simple, control precision high parallel machine current adding and system problem;The parallel machine current adding and system of the present application, comprising: multiple single machine current sampling circuits, parallel machine current adding and circuit;Single machine current sampling circuit includes: first differential amplifier circuit, first proportional regulating circuit, first unit inverter circuit, first digital potentiometer;Parallel machine current adding and circuit includes: instrument amplifier circuit, second proportional regulating circuit, second unit inverter circuit, second digital potentiometer and multiple proportional input end resistance;Digital potentiometer is applied to parallel machine circuit, and the resistance value of potentiometer is assigned by the number of parallel machine table set to realize the adjustment of amplification factor, replace the single proportional resistance resistance value of traditional resistance proportional circuit to realize the adjustment of amplification factor, hardware circuit is simple, amplification factor control is accurate.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of electronic equipment for measurement test, and relates to a parallel machine current adding system and a control method thereof. BACKGROUND

[0002] In an AC / DC power supply and load system, a high-precision resistor and an operational amplifier are generally used to form a current sampling circuit, and a device reads a current code value through an ADC chip, and the chip calculates an actual current through a calibration coefficient. Most parallel machine power supplies and load parallel machine methods are divided into two types: analog parallel machine and digital parallel machine.

[0003] The analog parallel machine method mainly uses a differential amplifier to sample the current of each device, converts the current signal into a voltage signal, and finally inputs the voltage signal into a host current adding and circuit, and then the host ADC collects a total current signal to calculate a parallel machine total current. When multiple devices are parallel connected to generate a large current, this method needs to change the adding operational amplifier proportional resistor, which affects the parallel machine current sampling precision. In addition, when the number of parallel machines is changed, the adding proportion needs to be switched, the circuit is complex, the control is cumbersome, and calibration is difficult. In the digital parallel machine method, each unit in the parallel machine system collects the current of the unit through an ADC, and then transmits the collected current values of each unit to a host through CAN, SPI, or other digital communication methods, and then the host calculates the total current and sends it to each slave. This method solves the interference problem in transmission, but the ADC collection and digital communication need a certain time, which introduces a time delay and cannot realize real-time collection.

[0004] The difficulty of the current technology is that in the case of multiple machine parallel connection, the proportional coefficient in the parallel machine adding circuit needs to be switched through an analog switch or other switching devices. Each time a device is added, the differential amplification multiple needs to be adjusted, which causes the problems of complex hardware circuit, more control interfaces, and difficult calibration. SUMMARY

[0005] The technical solution of the present application is used to solve the problem of how to design a parallel machine current adding system with simple hardware circuit and high control precision.

[0006] The present application solves the above technical problems by the following technical solutions:

[0007] A parallel machine current adding system, comprising: a plurality of single machine current sampling circuits, a parallel machine current adding circuit; the single machine current sampling circuit comprises: a first differential amplifier circuit, a first proportional adjusting circuit, a first unit inverting circuit and a first digital potentiometer; the parallel machine current adding circuit comprises: an instrument amplifier circuit, a second proportional adjusting circuit, a second unit inverting circuit, a second digital potentiometer and a plurality of proportional input terminal resistors; the input terminal of the first differential amplifier circuit samples the single machine current flowing through the sampling resistor, the output terminal of the first differential amplifier circuit is connected with the B terminal of the first digital potentiometer, the W terminal of the first digital potentiometer is connected with the inverting input terminal of the first proportional adjusting circuit, the A terminal of the first digital potentiometer is connected with the output terminal of the first proportional adjusting circuit; the output terminal of the first proportional adjusting circuit is connected with the input terminal of the first unit inverting circuit, wherein the output terminal of the first proportional adjusting circuit outputs a PARA+ signal, and the output terminal of the first unit inverting circuit outputs a PARA- signal; the PARA+ signal terminals of the plurality of single machine current sampling circuits are connected with the PARA+ signal terminal of the parallel machine current adding circuit, and the PARA- signal terminals of the plurality of single machine current sampling circuits are connected with the PARA- signal terminal of the parallel machine current adding circuit; the number of the proportional input terminal resistors is twice the number of the single machine current sampling circuits, the plurality of proportional input terminal resistors are divided into two groups, the proportional input terminal resistors in the first group are all connected in parallel, one parallel common terminal after the parallel connection is used as the PARA+ signal terminal of the parallel machine current adding circuit, and the other parallel common terminal after the parallel connection is connected with the first input terminal of the instrument amplifier circuit, the proportional input terminal resistors in the second group are also all connected in parallel, one parallel common terminal after the parallel connection is used as the PARA- signal terminal of the parallel machine current adding circuit, and the other parallel common terminal after the parallel connection is connected with the second input terminal of the instrument amplifier circuit; the output terminal of the instrument amplifier circuit is connected with the A terminal of the second digital potentiometer, the W terminal of the second digital potentiometer is connected with the inverting input terminal of the second proportional adjusting circuit, and the B terminal of the second digital potentiometer is connected with the input terminal of the second unit inverting circuit;

[0008] When being set as the single machine mode, the single machine current passes through the sampling resistor and is converted into a single machine ADC1 signal through the first differential amplifier circuit (1), the ADC1 signal is directly connected to the current ADC sampling chip, the ammeter current is read, and the calibration coefficients k1 and b1 are calculated together with the ADC code value and saved to the CPU; the ADC code value = actual current Ir1 * k1 + b1;

[0009] When calibrating, the first digital potentiometer code value of each single machine current sampling circuit is adjusted so that PARA+, PARA- equals the target value; at this time, the PARA+ and PARA- of each single machine current sampling circuit is connected to the parallel machine current summation circuit, the second digital potentiometer of the parallel machine current summation circuit is adjusted so that the voltage of point B of the parallel machine current summation circuit is equal to the size of PARA+ in the single machine current sampling circuit; the connection between ADC1 of the single machine current sampling circuit and the ADC chip is disconnected, ADC2 of the parallel machine current summation circuit is connected to the ADC chip, the k2 and b2 coefficients at this time are calculated, the ADC code value = actual current Ir2*k2+b2, and the calibration is completed.

[0010] When set to parallel machine mode, after each single machine completes calibration of two sets of coefficients, parallel connection of n single machines is performed, at this time, parallel machine configuration information is issued, the second digital potentiometer setting value is changed by the number of parallel machines to achieve the effect of parallel machine current summation.

[0011] Further, the first differential amplification circuit comprises: a sampling resistor R3, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, and a first operational amplifier U1; one end of the resistor R5 is connected to the inverting input terminal of the first operational amplifier U1, one end of the resistor R6 is connected to the non-inverting input terminal of the first operational amplifier U1, the other end of the resistor R5 and the other end of the resistor R6 are respectively connected to two ends of the sampling resistor R3; one end of the resistor R7 is connected to the inverting input terminal of the first operational amplifier U1, the other end of the resistor R7 is connected to the output terminal of the first operational amplifier U1; one end of the resistor R8 is connected to the non-inverting input terminal of the first operational amplifier U1, the other end of the resistor R8 is grounded, one end of the resistor R9 is connected to the output terminal of the first operational amplifier U1, the other end of the resistor R9 is connected to the B terminal of the first digital potentiometer; the output terminal signal of the first operational amplifier U1 is used as the single machine ADC1 signal.

[0012] Further, the first proportional adjustment circuit comprises: a resistor R10 and a second operational amplifier U2; the W terminal of the first digital potentiometer is connected to the inverting input terminal of the second operational amplifier U2, the non-inverting input terminal of the second operational amplifier U2 is grounded, the A terminal of the first digital potentiometer is connected to one end of the resistor R10, the other end of the resistor R10 is connected to the output terminal of the second operational amplifier U2; the output terminal signal of the second operational amplifier U2 is used as the PARA+ signal.

[0013] Further, the first unit inverting circuit comprises: a resistor R14, a resistor R15, and a third operational amplifier U3; one end of the resistor R14 is connected with the output end of the second operational amplifier U2, and the other end of the resistor R14 is connected with the inverting input end of the third operational amplifier U3; one end of the resistor R15 is connected with the inverting input end of the third operational amplifier U3, and the other end of the resistor R15 is connected with the output end of the third operational amplifier U3, and the non-inverting input end of the third operational amplifier U3 is grounded; and the output end signal of the third operational amplifier U3 is taken as the PARA- signal.

[0014] Further, the instrument amplifier circuit comprises: a resistor R16, a resistor R17, a resistor R18, a resistor R19, a resistor R20, a resistor R21, a fourth operational amplifier U4, a fifth operational amplifier U5, and a sixth operational amplifier U6; the other parallel common end of the first group of parallel proportional input end resistors is connected with the inverting input end of the fourth operational amplifier U4, the non-inverting input end of the fourth operational amplifier U4 is grounded, one end of the resistor R16 is connected with the inverting input end of the fourth operational amplifier U4, and the other end of the resistor R16 is connected with the output end of the fourth operational amplifier U4; the other parallel common end of the second group of parallel proportional input end resistors is connected with the inverting input end of the fifth operational amplifier U5, the non-inverting input end of the fifth operational amplifier U5 is grounded, one end of the resistor R17 is connected with the inverting input end of the fifth operational amplifier U5, and the other end of the resistor R17 is connected with the output end of the fifth operational amplifier U5; one end of the resistor R18 is connected with the output end of the fourth operational amplifier U4, and the other end of the resistor R18 is connected with the inverting input end of the sixth operational amplifier U6; one end of the resistor R19 is connected with the output end of the fifth operational amplifier U5, and the other end of the resistor R19 is connected with the non-inverting input end of the sixth operational amplifier U6; one end of the resistor R20 is connected with the inverting input end of the sixth operational amplifier U6, and the other end of the resistor R20 is connected with the output end of the sixth operational amplifier U6; one end of the resistor R21 is connected with the non-inverting input end of the sixth operational amplifier U6, and the other end of the resistor R21 is grounded.

[0015] Further, the second proportional adjusting circuit comprises: a seventh operational amplifier U7; the A end of the second digital potentiometer is connected with the output end of the sixth operational amplifier U6, the W end of the second digital potentiometer is connected with the inverting input end of the seventh operational amplifier U7, the B end of the second digital potentiometer is connected with the output end of the seventh operational amplifier U7, and the non-inverting input end of the seventh operational amplifier U7 is grounded.

[0016] Further, the second unit inverting circuit comprises: a resistor R24, a resistor R25, and an eighth operational amplifier U8; one end of the resistor R24 is connected with the output end of the seventh operational amplifier U7, the other end of the resistor R24 is connected with the inverting input end of the eighth operational amplifier U8, one end of the resistor R25 is connected with the inverting input end of the eighth operational amplifier U8, the other end of the resistor R25 is connected with the output end of the eighth operational amplifier U8, the non-inverting input end of the eighth operational amplifier U8 is grounded, and the output end of the eighth operational amplifier U8 is used as the ADC2 signal output end.

[0017] A control method of the above-mentioned parallel current adding system, when set as a single machine mode, the single machine current passes through a sampling resistor and is converted into a single machine ADC1 signal through a first differential amplification circuit (1), the ADC1 signal is directly connected to a current ADC sampling chip, the ammeter current is read, and the calibration coefficients k1 and b1 are calculated together with the ADC sampling code value and saved to the CPU; the ADC code value = actual current Ir1*k1+b1; when calibration, the first digital potentiometer code value of each single machine current sampling circuit is adjusted, so that PARA+ and PARA- are equal to the target value; at this time, PARA+ and PARA- of each single machine current sampling circuit are connected to the parallel current adding circuit, the second digital potentiometer of the parallel current adding circuit is adjusted, so that the voltage at point B of the parallel current adding circuit is equal to the size of PARA+ in the single machine current sampling circuit; the connection between the ADC1 of the single machine current sampling circuit and the ADC chip is disconnected, the ADC2 of the parallel current adding circuit is connected to the ADC chip, the coefficients k2 and b2 at this time are calculated, the ADC code value = actual current Ir2*k2+b2, and the calibration is completed; when set as a parallel machine mode, after each single machine completes the calibration of two sets of coefficients, the parallel connection of n single machines is performed, at this time, the parallel machine configuration information is issued, the second digital potentiometer setting value is changed according to the number of parallel machines, so as to achieve the effect of parallel current adding.

[0018] Further, the amplification multiple of the first proportional adjusting circuit is:

[0019]

[0020] wherein, A V1 is the amplification multiple of the first proportional adjusting circuit, R AW1 is the resistance between the A end and the W end of the first digital potentiometer, and R BW1 is the resistance between the B end and the W end of the first digital potentiometer.

[0021] Further, the amplification multiple of the second proportional adjusting circuit is:

[0022]

[0023] wherein, AV2 R is the amplification factor of the second proportional adjustment circuit AW2 R is the resistance between the A terminal and the W terminal of the second digital potentiometer BW2 R is the resistance between the B terminal and the W terminal of the second digital potentiometer.

[0024] The present application has the advantages of:

[0025] The present application combines analog and digital parallel operation, configures parameters from a digital channel, adds analog current signals, and uses a digital potentiometer for calibration and adjustment, achieving the advantages of simple hardware circuit and high current accuracy after calibration. The digital potentiometer is used to replace the traditional resistance proportional circuit. After calculating the calibration coefficient according to the above calibration method under single machine configuration, a higher precision current value can be obtained by changing the parallel operation digital potentiometer when multiple power sources or loads are connected in parallel. The present application applies the digital potentiometer to the parallel operation circuit, adjusts the amplification factor by assigning the resistance value of the potentiometer according to the number of parallel operation machines, replaces the traditional resistance proportional circuit, and adjusts the amplification factor by changing the resistance value of a single proportional resistor. The present application achieves precise control of parallel operation and amplification factor by controlling the digital potentiometer, has the advantages of high current accuracy, and the like. BRIEF DESCRIPTION OF DRAWINGS

[0026] Figure 1 is a schematic diagram of a single machine current sampling circuit of a parallel operation current summing system according to an embodiment of the present application;

[0027] Figure 2 is a schematic diagram of a parallel operation current summing circuit of a parallel operation current summing system according to an embodiment of the present application;

[0028] Figure 3 is a pin package diagram of a digital potentiometer used in a parallel operation current summing system according to an embodiment of the present application;

[0029] Figure 4 is an internal circuit structure diagram of a digital potentiometer used in a parallel operation current summing system according to an embodiment of the present application. DETAILED DESCRIPTION

[0030] To make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described below in a clear and complete manner. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.

[0031] The technical solutions of the present application will be further described below in combination with the drawings in the specification and specific embodiments.

[0032] Embodiment one

[0033] The parallel machine current adding system of the embodiment of the application comprises a plurality of single machine current sampling circuits and a parallel machine current adding circuit.

[0034] As shown in the figure, the single machine current sampling circuit comprises a first differential amplification circuit, a first proportional adjustment circuit, a first unit inversion circuit and a first digital potentiometer. Figure 1 The first differential amplification circuit comprises a sampling resistor R3, resistors R5, R6, R7, R8, R9 and a first operational amplifier U1.

[0035] One end of the resistor R5 is connected to the inverting input terminal of the first operational amplifier U1, one end of the resistor R6 is connected to the non-inverting input terminal of the first operational amplifier U1, the other ends of the resistors R5 and R6 are connected to the two ends of the sampling resistor R3 respectively; one end of the resistor R7 is connected to the inverting input terminal of the first operational amplifier U1, the other end of the resistor R7 is connected to the output terminal of the first operational amplifier U1; one end of the resistor R8 is connected to the non-inverting input terminal of the first operational amplifier U1, the other end of the resistor R8 is grounded; one end of the resistor R9 is connected to the output terminal of the first operational amplifier U1, the other end of the resistor R9 is connected to the B terminal of the first digital potentiometer, the W terminal of the first digital potentiometer is connected to the inverting input terminal of the second operational amplifier U2, the non-inverting input terminal of the second operational amplifier U2 is grounded, the A terminal of the first digital potentiometer is connected to one end of the resistor R10, the other end of the resistor R10 is connected to the output terminal of the second operational amplifier U2, one end of the resistor R14 is connected to the output terminal of the second operational amplifier U2, the other end of the resistor R14 is connected to the inverting input terminal of the third operational amplifier U3; one end of the resistor R15 is connected to the inverting input terminal of the third operational amplifier U3, the other end of the resistor R15 is connected to the output terminal of the third operational amplifier U3, the non-inverting input terminal of the third operational amplifier U3 is grounded; the output terminal signal of the first operational amplifier U1 is the single machine ADC1 signal, the output terminal signal of the second operational amplifier U2 is the PARA+ signal, and the output terminal signal of the third operational amplifier U3 is the PARA- signal.

[0036] As shown in the figure, the single machine current sampling circuit comprises a first differential amplification circuit, a first proportional adjustment circuit, a first unit inversion circuit and a first digital potentiometer. Figure 2As shown, taking two-way current addition as an example, the composition of the parallel machine current addition circuit is described in detail, and the parallel machine current addition circuit comprises: an instrument amplifier circuit, a second proportional adjusting circuit, a second unit inverting circuit and a second digital potentiometer. The instrument amplifier circuit comprises: resistors R16, R17, R18, R19, R20, R21, a fourth operational amplifier U4, a fifth operational amplifier U5 and a sixth operational amplifier U6. The second proportional adjusting circuit comprises: a seventh operational amplifier U7. The second unit inverting circuit comprises: resistors R24, R25 and an eighth operational amplifier U8. When two-way current addition is performed, the proportional input end resistors of the instrument amplifier circuit are two pairs of parallel resistors, a total of four resistors, as shown in Figure 2 Resistors R26, R27, R28 and R29.

[0037] The other parallel common end of the parallel connection of the resistor R27 and the resistor R29 is connected with the inverting input end of the fifth operational amplifier U5, the noninverting input end of the fifth operational amplifier U5 is grounded, one end of the resistor R17 is connected with the inverting input end of the fifth operational amplifier U5, and the other end of the resistor R17 is connected with the output end of the fifth operational amplifier U5; one end of the resistor R18 is connected with the output end of the fourth operational amplifier U4, the other end of the resistor R18 is connected with the inverting input end of the sixth operational amplifier U6, one end of the resistor R19 is connected with the output end of the fifth operational amplifier U5, the other end of the resistor R19 is connected with the noninverting input end of the sixth operational amplifier U6, one end of the resistor R20 is connected with the inverting input end of the sixth operational amplifier U6, the other end of the resistor R20 is connected with the output end of the sixth operational amplifier U6, one end of the resistor R21 is connected with the noninverting input end of the sixth operational amplifier U6, and the other end of the resistor R21 is grounded; the A end of the second digital potentiometer is connected with the output end of the sixth operational amplifier U6, the W end of the second digital potentiometer is connected with the inverting input end of the seventh operational amplifier U7, the B end of the second digital potentiometer is connected with the output end of the seventh operational amplifier U7, and the noninverting input end of the seventh operational amplifier U7 is grounded; one end of the resistor R24 is connected with the output end of the seventh operational amplifier U7, the other end of the resistor R24 is connected with the inverting input end of the eighth operational amplifier U8, one end of the resistor R25 is connected with the inverting input end of the eighth operational amplifier U8, the other end of the resistor R25 is connected with the output end of the eighth operational amplifier U8, the noninverting input end of the eighth operational amplifier U8 is grounded, and the output end of the eighth operational amplifier U8 is used as the ADC2 signal output end.

[0038] As shown in Figure 3 and Figure 4 the pin package diagram and the internal circuit structure diagram of the digital potentiometer are shown respectively, and the model of the digital potentiometer is AD5292.

[0039] The working principle is as follows:

[0040] When being set as the single machine mode, the single machine current passes through the sampling resistor R3 and is converted into the single machine ADC1 signal through the first differential amplification circuit (1), the ADC1 signal is directly connected to the current ADC sampling chip, the ammeter current is read, the calibration coefficients k1 and b1 are calculated together with the ADC sampling code value and saved to the CPU; the ADC code value = actual current Ir1*k1+b1.

[0041] A, W, B position in the first proportional adjusting circuit access to the first digital potentiometer, through the SPI to send code value, using 1024 digital potentiometer, R AB The resistance is 20k, then R AW1 The value of R BW1 can be set by sending 0-1023 code value, the amplification factor of the first proportional adjusting circuit is:

[0042]

[0043] Wherein, A V1 is the amplification factor of the first proportional adjusting circuit, R AW1 is the resistance between the A end and the W end of the first digital potentiometer, R BW1 is the resistance between the B end and the W end of the first digital potentiometer.

[0044] Adjust the code value of the first digital potentiometer of each single machine current sampling circuit during calibration, so that PARA+, PARA- is equal to the target value;

[0045] At this time, connect PARA+, PARA- of each single machine current sampling circuit to the parallel machine current summing circuit, adjust the second digital potentiometer of the parallel machine current summing circuit, so that the voltage of point B of the parallel machine current summing circuit is equal to the size of PARA+ in the single machine current sampling circuit; the amplification factor of the second proportional adjusting circuit of the parallel machine current summing circuit is:

[0046]

[0047] Wherein, A V2 is the amplification factor of the second proportional adjusting circuit, R AW2 is the resistance between the A end and the W end of the second digital potentiometer, R BW2 is the resistance between the B end and the W end of the second digital potentiometer.

[0048] Disconnect the connection between ADC1 of the single machine current sampling circuit and the ADC chip, connect ADC2 of the parallel machine current summing circuit to the ADC chip, calculate the k2, b2 coefficients at this time, ADC code value = actual current Ir2*k2+b2, calibration is completed; assuming that the single machine digital digital potentiometer is set to 512, then R AW = R BW = 10K, at this time, the amplification factor of the U2 inverting amplifier is -1, PARA+ is obtained, and PARA- is obtained after inversion. Here, two currents are reloaded to obtain two groups of data, and the calibration value of the parallel machine is calculated according to the single machine calibration coefficient calculation method.

[0049] The calibration adopts two-point calibration method, such as first pulling a positive 30A DC current, reading the ammeter data at this time, recording the corresponding ADC code value, then pulling a negative 30A DC current, reading the ammeter data at this time, recording the corresponding ADC code value, a total of two groups of data, calculating the coefficients k1, b1, obtaining the corresponding relationship between the ADC sampling code value and the actual current, ADC code value = actual current Ir*k1+b1; when calibrating, the digital potentiometer code value is adjusted so that PARA+, PARA- equals the target value. The target value is the theoretical calibration voltage, and when pulling a 30A current, assuming that the internal proportional coefficient after the sampling resistor is 0.1, 3V needs to be output.

[0050] When set to parallel calibration mode, after each single machine completes calibration of two groups of coefficients, parallel connection of n single machines is performed, at this time, parallel configuration information is issued, the second digital potentiometer setting value is changed by the number of parallel machines, so as to achieve the effect of parallel current summation.

[0051] At this time, the fourth operational amplifier U4, the fifth operational amplifier U5, and the sixth operational amplifier U6 constitute a current summation circuit, the second digital potentiometer is set, when the number of parallel machines is 1, the digital potentiometer multiple is set to 10 times, and so on, when multiple machines are used in parallel, the number of parallel machines is 2, 3, 4... and the multiple of the second proportional adjustment circuit is 5 times, 10 / 3 times, 2.5 times, 2 times... Finally, the parallel current sampling signal is obtained.

[0052] The above embodiments are only used to illustrate the technical solutions of the present application, but not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A parallel current adding system, characterized by, The utility model relates to a kind of current sampling circuit, comprising: Multiple single-machine current sampling circuits, parallel machine current summing circuits; The single-machine current sampling circuit includes: first differential amplifier circuit, first proportional regulating circuit, first unit inverter circuit, first digital potentiometer;The parallel machine current summing circuit includes: instrument amplifier circuit, second proportional regulating circuit, second unit inverter circuit, second digital potentiometer and multiple proportional input end resistors;The input end of the first differential amplifier circuit samples the single-machine current flowing through the sampling resistor, and the output end of the first differential amplifier circuit is connected with the B end of the first digital potentiometer;The W end of the first digital potentiometer is connected with the inverting input end of the first proportional regulating circuit, and the A end of the first digital potentiometer is connected with the output end of the first proportional regulating circuit;The output end of the first proportional regulating circuit is connected with the input end of the first unit inverter circuit, wherein the output end of the first proportional regulating circuit outputs PARA+ signal, and the output end of the first unit inverter circuit outputs PARA- signal;The PARA+ signal end of multiple single-machine current sampling circuits is connected with the PARA+ signal end of parallel machine current summing circuit, and the PARA- signal end of multiple single-machine current sampling circuits is connected with the PARA- signal end of parallel machine current summing circuit;The number of proportional input end resistors is twice that of single-machine current sampling circuits, and multiple proportional input end resistors are divided into two groups;The first group of proportional input end resistors are all connected in parallel, and one parallel common end after parallel connection is used as the PARA+ signal end of parallel machine current summing circuit, and the other parallel common end after parallel connection is connected with the first input end of the instrument amplifier circuit;The second group of proportional input end resistors are also all connected in parallel, and one parallel common end after parallel connection is used as the PARA- signal end of parallel machine current summing circuit, and the other parallel common end after parallel connection is connected with the second input end of the instrument amplifier circuit;The output end of the instrument amplifier circuit is connected with the A end of the second digital potentiometer, the W end of the second digital potentiometer is connected with the inverting input end of the second proportional regulating circuit, and the B end of the second digital potentiometer is connected with the input end of the second unit inverter circuit; When set to single-machine mode, the single-machine current passes through the sampling resistor, and is converted into single-machine ADC1 signal through the first differential amplifier circuit, and the ADC1 signal is directly connected to the current ADC sampling chip, the ammeter current is read, and the calibration coefficients k1 and b1 are calculated together with the ADC code value and saved to CPU;ADC code value = actual current Ir1 × k1 + b1 When calibrating, the first digital potentiometer code value of each single machine current sampling circuit is adjusted so that PARA+, PARA- is equal to the target value; at this time, the PARA+ and PARA- of each single machine current sampling circuit are connected to the parallel machine current summing circuit, the second digital potentiometer of the parallel machine current summing circuit is adjusted so that the voltage of point B of the parallel machine current summing circuit is equal to the size of PARA+ in the single machine current sampling circuit; the connection between ADC1 of the single machine current sampling circuit and the ADC sampling chip is disconnected, the ADC2 signal output from the output end of the second unit inverter of the parallel machine current summing circuit is connected to the ADC sampling chip, the k2 and b2 coefficients at this time are calculated, the ADC code value = actual current Ir2 x k2 + b2, and the calibration is completed. When set to parallel mode, after each single machine completes the calibration of two groups of coefficients, parallel connection of n single machines is performed, at this time, parallel connection configuration information is issued, the second digital potentiometer setting value is changed according to the number of parallel machines, so as to achieve the effect of parallel machine current summation.

2. The parallel current summing system of claim 1, wherein The first differential amplification circuit comprises a sampling resistor R3, resistors R5, R6, R7, R8, R9, and a first operational amplifier U1; one end of the resistor R5 is connected with the inverting input end of the first operational amplifier U1, one end of the resistor R6 is connected with the non-inverting input end of the first operational amplifier U1, the other end of the resistor R5 and the other end of the resistor R6 are respectively connected with two ends of the sampling resistor R3; one end of the resistor R7 is connected with the inverting input end of the first operational amplifier U1, the other end of the resistor R7 is connected with the output end of the first operational amplifier U1; one end of the resistor R8 is connected with the non-inverting input end of the first operational amplifier U1, the other end of the resistor R8 is grounded, one end of the resistor R9 is connected with the output end of the first operational amplifier U1, the other end of the resistor R9 is connected with the B end of the first digital potentiometer; the output end signal of the first operational amplifier U1 is used as a single machine ADC1 signal.

3. The parallel current summing system of claim 2, wherein, The first proportional adjustment circuit comprises a resistor R10 and a second operational amplifier U2; the W end of the first digital potentiometer is connected with the inverting input end of the second operational amplifier U2, the non-inverting input end of the second operational amplifier U2 is grounded, the A end of the first digital potentiometer is connected with one end of the resistor R10, the other end of the resistor R10 is connected with the output end of the second operational amplifier U2; the output end signal of the second operational amplifier U2 is used as a PARA+ signal.

4. The parallel current summing system of claim 3, wherein The first unit inverter comprises a resistor R14, a resistor R15, and a third operational amplifier U3; one end of the resistor R14 is connected with the output end of the second operational amplifier U2, the other end of the resistor R14 is connected with the inverting input end of the third operational amplifier U3; one end of the resistor R15 is connected with the inverting input end of the third operational amplifier U3, the other end of the resistor R15 is connected with the output end of the third operational amplifier U3, the non-inverting input end of the third operational amplifier U3 is grounded; the output end signal of the third operational amplifier U3 is used as a PARA- signal.

5. The parallel current summing system of claim 4, wherein, The instrument amplifier circuit comprises resistance R16, resistance R17, resistance R18, resistance R19, resistance R20, resistance R21, fourth operational amplifier U4, fifth operational amplifier U5, sixth operational amplifier U6; the other parallel common end of the first group of parallel input terminal resistors is connected with the inverting input terminal of the fourth operational amplifier U4, the noninverting input terminal of the fourth operational amplifier U4 is grounded, one end of the resistance R16 is connected with the inverting input terminal of the fourth operational amplifier U4, the other end of the resistance R16 is connected with the output terminal of the fourth operational amplifier U4; the other parallel common end of the second group of parallel input terminal resistors is connected with the inverting input terminal of the fifth operational amplifier U5, the noninverting input terminal of the fifth operational amplifier U5 is grounded, one end of the resistance R17 is connected with the inverting input terminal of the fifth operational amplifier U5, the other end of the resistance R17 is connected with the output terminal of the fifth operational amplifier U5; one end of the resistance R18 is connected with the output terminal of the fourth operational amplifier U4, the other end of the resistance R18 is connected with the inverting input terminal of the sixth operational amplifier U6, one end of the resistance R19 is connected with the output terminal of the fifth operational amplifier U5, the other end of the resistance R19 is connected with the noninverting input terminal of the sixth operational amplifier U6, one end of the resistance R20 is connected with the inverting input terminal of the sixth operational amplifier U6, the other end of the resistance R20 is connected with the output terminal of the sixth operational amplifier U6, one end of the resistance R21 is connected with the noninverting input terminal of the sixth operational amplifier U6, the other end of the resistance R21 is grounded.

6. The parallel current summing system of claim 5, wherein, The second proportional adjusting circuit comprises seventh operational amplifier U7; the A end of the second digital potentiometer is connected with the output terminal of the sixth operational amplifier U6, the W end of the second digital potentiometer is connected with the inverting input terminal of the seventh operational amplifier U7, the B end of the second digital potentiometer is connected with the output terminal of the seventh operational amplifier U7, the noninverting input terminal of the seventh operational amplifier U7 is grounded.

7. The parallel current summing system of claim 6, wherein, The second unit inverting circuit comprises resistance R24, resistance R25, eighth operational amplifier U8; one end of the resistance R24 is connected with the output terminal of the seventh operational amplifier U7, the other end of the resistance R24 is connected with the inverting input terminal of the eighth operational amplifier U8, one end of the resistance R25 is connected with the inverting input terminal of the eighth operational amplifier U8, the other end of the resistance R25 is connected with the output terminal of the eighth operational amplifier U8, the noninverting input terminal of the eighth operational amplifier U8 is grounded, and the output terminal of the eighth operational amplifier U8 is used as the ADC2 signal output terminal.

8. A control method for the parallel current addition system according to any one of claims 1 to 7, characterized by, When set to single machine mode, single machine current passes through sampling resistance, through first differential amplification circuit to convert into single machine ADC1 signal, connect ADC1 signal directly to current ADC sampling chip, read ammeter current, calculate calibration coefficient k1, b1 together with ADC sampling code value and save to CPU; ADC code value = actual current Ir1 x k1 + b1; adjust first digital potentiometer code value of each single machine current sampling circuit during calibration, so that PARA+, PARA- equals target value; at this time, connect PARA+ and PARA- of each single machine current sampling circuit to parallel machine current summing circuit, adjust second digital potentiometer of parallel machine current summing circuit, so that B point voltage of parallel machine current summing circuit is equal to PARA+ in single machine current sampling circuit; disconnect ADC1 of single machine current sampling circuit and ADC sampling chip, connect ADC2 signal output from output end of second unit inverter circuit of parallel machine current summing circuit to ADC sampling chip, calculate k2, b2 coefficient at this time, ADC code value = actual current Ir2 x k2 + b2, calibration is completed; when set to parallel machine mode, after each single machine completes calibration of two sets of coefficients, parallel connection of n single machines is carried out, at this time, parallel machine configuration information is issued, second digital potentiometer setting value is changed by parallel machine number, so as to achieve parallel machine current summing effect.

9. The control method of the parallel machine current summing system according to claim 8, characterized in that, the amplification multiple of the first proportional adjusting circuit is: Wherein, A V1 is the amplification of the first proportional regulating circuit, R AW1 is the resistance between the A terminal and the W terminal of the first digital potentiometer, R BW1 is the resistance between the B terminal and the W terminal of the first digital potentiometer, R9 represents the resistance connected between the output terminal of the first operational amplifier U1 in the first differential amplification circuit and the B terminal of the first digital potentiometer, and R10 represents the resistance connected between the output terminal of the second operational amplifier U2 in the first proportional regulating circuit and the A terminal of the first digital potentiometer.

10. The control method of the parallel current addition system according to claim 8, characterized by, the amplification multiple of the second proportional adjusting circuit is: Wherein, A V2 is the amplification of the second proportional adjusting circuit, R AW2 is the resistance between the A terminal and the W terminal of the second digital potentiometer, R BW2 is the resistance between the B terminal and the W terminal of the second digital potentiometer.

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