Solid state disk data writing method and device and electronic equipment

Abstract

The invention provides a solid state disk data writing method and device and electronic equipment, and the method comprises the steps: when a solid state disk receives to-be-written data from a host, the to-be-written data is preferentially written into a target SLC physical block in a plurality of SLC physical blocks; if the quantity of the data written into the target SLC physical block reaches a moving waterline, selecting a target QLC physical block from the plurality of QLC physical blocks, and moving the data written into the target SLC physical block to the target QLC physical block; in the moving process, if the current writing programming mode is a QLC mode, effective data are screened out from the data written into the target SLC physical block during first programming; according to the writing sequence, storing the physical address and the logic address corresponding to the valid data in a pre-constructed temporary cache table; and when the second programming is passed, extracting the physical address and the logic address stored in the temporary cache table according to the write-in sequence, and reading data corresponding to the extracted physical address and logic address.

Description

Technical Field

[0001] The present application relates to the technical field of solid state hard disks, and in particular to a method, device and electronic device for writing data into a solid state hard disk. Background Art

[0002] With the continuous development of storage technology, solid state drives (SSDs) using NAND Flash as storage media have gradually become the mainstream storage form. With the evolution of NAND technology, the storage density has evolved from the early 1bit / cell (SLC) to 2bit / cell (MLC), 3bit / cell (TLC), and 4bit / cell (QLC), and the corresponding storage data capacity is getting larger and larger. Among them, cell represents the smallest storage unit of NAND Flash particles, and bit is the data unit, that is, bit. Typical NAND such as SLC, MLC, and TLC only need one programming to complete data storage, and then they can be read normally; but QLC, due to its complex NAND cell voltage distribution, requires multiple programming to truly complete data storage for subsequent data reading. Summary of the invention

[0003] The present application provides a method, device and electronic device for writing data to a solid state drive. The relevant technical solutions are as follows: In a first aspect, an embodiment of the present application provides a method for writing data to a solid-state hard disk, wherein the solid-state hard disk includes a plurality of independently concurrently operable units, each of the independently concurrently operable units includes a plurality of SLC physical blocks and a plurality of QLC physical blocks; the method includes: When the solid state drive receives data to be written from the host, the solid state drive preferentially writes the data to be written into a target SLC physical block among the multiple SLC physical blocks; If the amount of data written to the target SLC physical block reaches the migration waterline, a target QLC physical block is selected from the multiple QLC physical blocks, and the data written to the target SLC physical block is migrated to the target QLC physical block; During the migration process, if the current programming mode is the QLC mode, valid data is screened out from the data written into the target SLC physical block during the first programming; The physical address and the logical address corresponding to the valid data are stored in a pre-built temporary cache table according to the writing order; During the second programming, the physical addresses and logical addresses stored in the temporary cache table are retrieved in the writing order, and the data corresponding to the retrieved physical addresses and logical addresses are read.

[0004] In one possible implementation manner, after filtering out valid data from the data written into the target SLC physical block, the method further includes: According to the writing order, the logical addresses corresponding to the valid data are updated into a preset P2L table to obtain an updated P2L table; The reading of the data corresponding to the retrieved physical address and logical address includes: According to the writing order, the logical addresses stored in the temporary cache table are retrieved, and are verified one by one with the logical addresses stored in the updated P2L table; If the verification is consistent, the data corresponding to the physical address corresponding to the logical address is written to the target QLC physical block.

[0005] In one possible implementation, after taking out the logical addresses stored in the temporary cache table in the writing order and performing one-to-one verification with the logical addresses stored in the updated P2L table, the method further includes: If the check is inconsistent, reporting to the host a data write error corresponding to the physical address corresponding to the logical address, and marking the SLC physical block where the written error data is located as abnormal; The data in the abnormal SLC physical block is moved back to the target QLC physical block.

[0006] In one possible implementation, the temporary cache table is a circular queue, and the amount of data that can be stored in the circular queue is less than or equal to AU num. ; Wherein, Die_num represents the number of the multiple independent concurrent operation units, Plane_num represents the number of planes included in each independent concurrent operation unit, String_num represents the number of programming units included in each independent concurrent operation unit, Page_per_WL represents the number of physical pages included in each programming unit, and AU_per_Page represents the maximum amount of data that can be read by each physical page.

[0007] In one possible implementation, before moving the data written in the target SLC physical block to the target QLC physical block, the method further includes: If all data in the target SLC physical block are moved to the target QLC physical block, the storage space of the target SLC physical block is released.

[0008] In one possible implementation manner, after preferentially writing the to-be-written data into a target SLC physical block among the multiple SLC physical blocks, the method further includes: If the target SLC physical block is fully written by part of the data to be written, another SLC physical block for writing the remaining data except the data to be written is reallocated.

[0009] In a second aspect, an embodiment of the present application provides a solid state hard disk data writing device, wherein the solid state hard disk includes a plurality of independently concurrently operable units, each of the independently concurrently operable units includes a plurality of SLC physical blocks and a plurality of QLC physical blocks; the device includes: a writing unit, configured to, when the solid state drive receives data to be written from a host, preferentially write the data to be written into a target SLC physical block among the multiple SLC physical blocks; A selection unit, configured to select a target QLC physical block from the plurality of QLC physical blocks and move the data written in the target SLC physical block to the target QLC physical block if the amount of data written in the target SLC physical block reaches a migration waterline; A screening unit, used for screening out valid data from data written into the target SLC physical block during the first programming if the current programming mode of writing is the QLC mode during the migration process; A storage unit, used to store the physical address and the logical address corresponding to the valid data in a pre-built temporary cache table according to a write order; The reading unit is used to fetch the physical address and the logical address stored in the temporary cache table according to the writing order during the second programming, and read the data corresponding to the fetched physical address and the logical address.

[0010] In one possible implementation manner, after the screening unit screens out valid data from the data written into the target SLC physical block, the device further includes an updating unit, wherein the updating unit is configured to: According to the writing order, the logical addresses corresponding to the valid data are updated into a preset P2L table to obtain an updated P2L table; The reading unit is used for: According to the writing order, the logical addresses stored in the temporary cache table are retrieved, and the logical addresses are verified one by one with the logical addresses stored in the updated P2L table; If the verification is consistent, the data corresponding to the physical address corresponding to the logical address is written to the target QLC physical block.

[0011] In one possible implementation, after the reading unit retrieves the logical addresses stored in the temporary cache table in a write order and performs one-to-one verification with the logical addresses stored in the updated P2L table, the device further includes a processing unit, which is configured to: If the check is inconsistent, reporting to the host a data write error corresponding to the physical address corresponding to the logical address, and marking the SLC physical block where the written error data is located as abnormal; The data in the abnormal SLC physical block is moved back to the target QLC physical block.

[0012] In one possible implementation, the selection unit moves the data written in the target SLC physical block to the target QLC physical block, and the device further includes a release unit, wherein the release unit is used to: If all data in the target SLC physical block are moved to the target QLC physical block, the storage space of the target SLC physical block is released.

[0013] In one possible implementation manner, after the writing unit preferentially writes the to-be-written data into a target SLC physical block among the multiple SLC physical blocks, the apparatus further includes a reallocation unit, wherein the reallocation unit is configured to: If the target SLC physical block is fully written by part of the data to be written, another SLC physical block for writing the remaining data except the data to be written is reallocated.

[0014] In a third aspect, an embodiment of the present application provides an electronic device, including: Memory, used to store computer programs; The processor is used to implement the steps of the solid state hard disk data writing method as described in any one of the above items when executing the computer program stored in the memory.

[0015] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and the computer program is used to enable a computer to execute the steps of the solid-state hard disk data writing method as described in any one of the above items.

[0016] In a fifth aspect, an embodiment of the present application provides a computer program product, which includes: a computer program code, which, when executed on a computer, enables the computer to execute any one of the above-described methods for writing data to a solid-state hard disk.

[0017] The beneficial effects of the embodiments of the present application are as follows: The embodiments of the present application provide a method, device and electronic device for writing data to a solid-state hard disk. When the solid-state hard disk receives data to be written from a host, the data to be written is preferentially written to a target SLC physical block in the SLC physical block; if the amount of data written in the target SLC physical block reaches the migration waterline, a target QLC physical block is selected from multiple QLC physical blocks, and the data written in the target SLC physical block is migrated to the target QLC physical block; during the migration process, if the current programming module to be written is the QLC mode, valid data is filtered out from the data written in the target SLC physical block during the first programming; according to the write In order, the physical address and logical address corresponding to the valid data are stored in a pre-built temporary cache table; that is, the data to be written is first written to the SLC physical block, and then the data written to the SLC physical block is moved to the QLC physical block. Specifically, if the current writing programming mode is the QLC mode, then in the first programming, the valid data is screened out, and the physical address and logical address corresponding to the valid data are stored in the pre-built temporary buffer table in the writing order; in the second programming, the physical address and logical address stored in the temporary cache table are taken out in the writing order, and the data corresponding to the taken out physical address and logical address are read; In this way, valid data written into the SLC physical block is stored in a pre-built temporary cache table, and subsequently only the valid data needs to be moved from the SLC physical block to the QLC physical block, thereby avoiding the movement of invalid data while ensuring a smaller write amplification and avoiding disk wear. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 A method flow chart of a method for writing data to a solid state hard disk provided in an embodiment of the present application; Figure 2 For Figure 1 A flow chart of one of the methods after step S103; Figure 3 For Figure 2 A flowchart of one of the methods after step S202; Figure 4 A schematic diagram of a method for writing data to a solid state hard disk provided in an embodiment of the present application; Figure 5 A structural block diagram of a solid state hard disk data writing device provided in an embodiment of the present application; Figure 6 This is a structural block diagram of one of the electronic devices provided in an embodiment of the present application. DETAILED DESCRIPTION

[0019] In order to make the purpose, technical scheme and advantages of the present application clearer, the technical scheme in the embodiment of the present application will be clearly and completely described below in conjunction with the drawings in the embodiment of the present application. Obviously, the described embodiment is only a part of the embodiment of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present application. In the absence of conflict, the embodiments in the present application and the features in the embodiments can be arbitrarily combined with each other. In addition, although the logical order is shown in the flow chart, in some cases, the steps shown or described can be performed in an order different from that here.

[0020] The terms "first" and "second" in the specification and claims of the present application and the above-mentioned drawings are used to distinguish different objects, rather than to describe a specific order. In addition, the term "comprising" and any of their variations are intended to cover non-exclusive protection. For example, a process, method, system, product or device comprising a series of steps or units is not limited to the listed steps or units, but optionally also includes steps or units that are not listed, or optionally also includes other steps or units inherent to these processes, methods, products or devices. "Multiple" in the present application can mean at least two, for example, two, three or more, and the embodiments of the present application are not limited.

[0021] The following is a description of exemplary embodiments of the present application in conjunction with the accompanying drawings, including various details of the embodiments of the present application to facilitate understanding, which should be considered as merely exemplary. Therefore, those of ordinary skill in the art should recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope of the present application. Similarly, for the sake of clarity and conciseness, the description of well-known functions and structures is omitted in the following description. It should be noted that in the embodiments of the present application, certain software, components, models and other existing solutions in the industry may be mentioned, which should be considered as exemplary, and their purpose is only to illustrate the feasibility of the implementation of the technical solution of the present application, but it does not mean that the applicant has or will necessarily use the solution.

[0022] In the technical solution of this application, the acquisition, transmission, storage, and use of data are in compliance with the requirements of relevant national laws and regulations.

[0023] Before introducing the solid state hard disk data writing method provided in the embodiment of the present application, in order to facilitate understanding, some technical terms in the embodiment of the present application are first introduced.

[0024] Die: can operate units independently and concurrently; Block: physical block, as the smallest erasable unit of flash memory, a block contains multiple flash memory pages; SLC: the full name of English is Single-Level Cell, that is, a single-layer storage unit, with a single-layer electronic structure, each of which can store 1 bit of data, with a fast write speed, but low storage density; QLC: The full name of QLC is Quad-Level Cell, which has a four-layer electronic structure. Each storage cell can store 4 bits of data, with a slow write speed but high storage density. Word Line: programming unit. The same programming unit can include multiple flash memory pages. Page: physical page, the basic unit of reading or writing; Among them, a part of the storage units in the QLC physical block can work in SLC mode. At this time, each programming unit contains one page, and only one programming is required to complete data solidification for subsequent reading; another part of the storage units in the QLC physical block can work in QLC mode. At this time, each programming unit contains four pages, and two programmings including One Pass and Two Pass are required to complete data solidification; when only One Pass programming is completed, the data cannot be read. Because when the data written in the SLC physical block is moved to the QLC physical block, once the data stored in the SLC physical block is updated, it is very easy to move invalid data to the QLC physical block, thereby increasing write amplification and accelerating disk wear; in particular, for the case where the storage unit is in QLC mode, once the data written in the two programmings are inconsistent, it will lead to low reading efficiency.

[0025] In view of this, the present application provides a method, device and electronic device for writing data to a solid-state hard disk, which are used to avoid moving invalid data while ensuring a small write amplification and avoiding disk wear.

[0026] In an embodiment of the present application, part of the space of the solid-state hard disk can be set as an SLC physical block, and part of the space of the solid-state hard disk can also be set as a QLC physical block. The solid-state hard disk includes multiple independent concurrent operation units (Die); the multiple independent concurrent operation units can be two, or three or more, which is not limited here. Among them, each independently concurrent operation unit includes multiple SLC physical blocks and multiple QLC physical blocks. The multiple SLC physical blocks can be two, or three or more, which is not limited here. The multiple QLC physical blocks can be two, or three or more, which is not limited here.

[0027] like Figure 1 As shown, an embodiment of the present application provides a method for writing data to a solid state drive, the method comprising: S101: When the solid state drive receives data to be written from a host, the solid state drive preferentially writes the data to be written into a target SLC physical block among the multiple SLC physical blocks; In the specific implementation process, according to the wear leveling principle, the physical block with the least number of uses can be selected from multiple SLC physical blocks of the solid-state drive and used as the target SLC physical block. When the solid-state drive receives data to be written from the host, the data to be written can be written to the target SLC physical block first. In actual applications, when an SLC physical block is full, an SLC physical block can be reallocated to continue writing data.

[0028] S102: If the amount of data written to the target SLC physical block reaches the migration waterline, a target QLC physical block is selected from the multiple QLC physical blocks, and the data written to the target SLC physical block is migrated to the target QLC physical block; In the specific implementation process, first, it is determined whether the amount of data written in the target SLC physical block has reached the migration waterline. Exemplarily, if the amount of data written in the target SLC physical block has not reached the migration waterline, the data can continue to be written to the target SLC physical block; Exemplarily, if the amount of data written in the target SLC physical block reaches the migration waterline, the target QLC physical block is selected from multiple QLC physical blocks, and the data written in the target SLC physical block is moved to the target QLC physical block. In actual applications, the target QLC physical block can be selected from multiple QLC physical blocks according to the wear leveling principle. It should be noted that the target SLC physical block and the target QLC physical block can be located in the same Die, or in two different Dies respectively. It can be set according to the actual application needs and is not limited here.

[0029] S103: During the migration process, if the current programming mode is the QLC mode, then during the first programming, valid data is screened out from the data written into the target SLC physical block; In the specific implementation process, in the process of moving the data written in the target SLC physical block to the target QLC physical block, first, determine whether the current programming mode of writing is the QLC mode; exemplarily, if the current programming mode of writing is the QLC mode, then in the QLC mode, the data written in the target SLC physical block can be read into the target QLC physical block after the first programming (One Pass) and the second programming (Two Pass); specifically, during the first programming, the valid data is screened out from the data written in the target SLC physical block; exemplarily, the valid data can be the data obtained after the invalid data (dirty data) is removed from the data written in the target SLC physical block. Exemplarily, the invalid data can be expired data caused by different reasons; for example, the chaotic and invalid data caused by irregular operations such as repeated data entry and joint processing.

[0030] S104: storing the physical address and the logical address corresponding to the valid data in a pre-built temporary cache table according to the writing order; In the specific implementation process, it is necessary to pre-build a temporary cache table; specifically, a part of the memory area of ​​the solid-state drive can be used as a temporary cache area to store the pre-built temporary cache table (denoted as GC_Qlc_Buffer). Exemplarily, the temporary cache table can be a circular queue. In practical applications, the storage size of the temporary cache table can be set as needed. During the migration process, the physical address and logical address corresponding to the valid data can be stored in the pre-built temporary cache table in the order of writing, and accordingly, the insertion pointer InsertIdx is incremented.

[0031] S105: During the second programming, the physical addresses and logical addresses stored in the temporary cache table are retrieved according to the write order, and data corresponding to the retrieved physical addresses and logical addresses are read.

[0032] In the specific implementation process, during the second programming, the physical address and logical address stored in the temporary cache table are taken out in the write order, and the data corresponding to the taken out physical address and logical address are read; in this way, the valid data written in the SLC physical block is stored in the pre-built temporary cache table, and subsequently only the valid data needs to be moved from the SLC physical block to the QLC physical block, thereby avoiding the movement of invalid data while ensuring a smaller write amplification and avoiding disk wear.

[0033] In the embodiments of the present application, Figure 2 As shown, in step S103: during the migration process, if the current programming mode is the QLC mode, then during the first programming, after filtering out valid data from the data written into the target SLC physical block, the method further includes: S201: updating the logical addresses corresponding to the valid data into a preset P2L table according to a write order, to obtain an updated P2L table; Step S105: reading the data corresponding to the retrieved physical address and logical address, including: S202: taking out the logical addresses stored in the temporary cache table in the order of writing, and performing one-to-one verification with the logical addresses stored in the updated P2L table; S203: If the verification is consistent, the data corresponding to the physical address corresponding to the logical address is written into the target QLC physical block.

[0034] In the specific implementation process, the specific implementation process of step S201 to step S203 is as follows: During the first programming, after filtering out valid data from the data written into the target SLC physical block, the logical address corresponding to the valid data is updated to the pre-set P2L table in the writing order to obtain the updated P2L table. Among them, the pre-set P2L table is a mapping table for storing the relationship between physical addresses and logical addresses. In this way, during the second programming, the logical address stored in the temporary cache table can be taken out in the writing order. Accordingly, the temporary cache table deletes the relevant information of the valid data cached therein after taking it out, and the DeleteIdx pointer increases; then, the logical address is verified one by one with the logical address stored in the updated P2L table; if the verification is consistent (that is, the logical addresses of the two are the same), the data corresponding to the physical address corresponding to the logical address is written to the target QLC physical block. In this way, the consistency of the data written in the first programming and the second programming is guaranteed. Accordingly, by performing data verification in the QLC programming twice, the data written to the Nand is guaranteed to be correct.

[0035] In the embodiments of the present application, Figure 3 As shown, in step S202: after taking out the logical addresses stored in the temporary cache table in the writing order and performing one-to-one verification with the logical addresses stored in the updated P2L table, the method further includes: S301: If the check is inconsistent, reporting to the host a data write error corresponding to the physical address corresponding to the logical address, and marking the SLC physical block where the written error data is located as abnormal; S302: Move the data in the abnormal SLC physical block to the target QLC physical block again.

[0036] In the specific implementation process, the specific implementation process of step S301 to step S302 is as follows: After taking out the logical addresses stored in the temporary cache table in the write order and verifying them one by one with the logical addresses stored in the updated P2L table, if the verification is inconsistent, the data write error corresponding to the physical address corresponding to the logical address is reported to the host. In other words, if the verification is inconsistent, the error is reported to the host. In addition, the SLC physical block where the data with the write error is located is marked as abnormal, and the data in the abnormal SLC physical block is moved back to the target QLC physical block. Subsequently, until the data written in the two programmings are consistent, the valid data in the data to be written is actually written to the Nand.

[0037] In the embodiment of the present application, the temporary cache table is a circular queue, and the amount of data that can be stored in the circular queue is less than or equal to AU num. ; Wherein, Die_num represents the number of the multiple independent concurrent operation units, Plane_num represents the number of planes included in each independent concurrent operation unit, String_num represents the number of programming units included in each independent concurrent operation unit, Page_per_WL represents the number of physical pages included in each programming unit, and AU_per_Page represents the maximum amount of data that can be read by each physical page.

[0038] In the specific implementation process, the temporary cache table is a circular queue, and the amount of data that can be stored in the circular queue is less than or equal to AU num. AU is the smallest operation unit for data writing in the embodiment of the present application. The size of each AU is 512 bytes, and the size of each Page is 16KB. Usually, a solid-state drive includes multiple Dies, each Die includes multiple Planes, each Plane includes multiple physical blocks, and each physical block includes multiple Pages. In this way, the characteristics of the QLC particles of the solid-state drive are taken into account, which provides a guarantee for concurrent writing of multiple Dies and improves access efficiency.

[0039] In the embodiment of the present application, in step S101: when the solid state drive receives data to be written from the host, after the data to be written is preferentially written into a target SLC physical block among the multiple SLC physical blocks, the method further includes: If the target SLC physical block is fully written by part of the data to be written, another SLC physical block for writing the remaining data except the data to be written is reallocated.

[0040] In a specific implementation process, after the data to be written is preferentially written into a target SLC physical block among multiple SLC physical blocks, once the target SLC physical block is filled with part of the data to be written, another SLC physical block for writing the remaining data except the data to be written is reallocated. That is, when a target SLC physical block is filled, another SLC physical block can be reallocated for writing subsequent data.

[0041] It should be noted that after all the data in a target SLC physical block is moved to the target QLC physical block, the target SLC physical block is released, and after the release, the target SLC physical block can be used for the storage of subsequent host write data. When the SSD receives new data from the host, it can reselect the target SLC physical block, and then move the data written in the target SLC physical block to the target QLC physical block in the above-mentioned manner, thereby realizing the writing of the QLC SSD.

[0042] Combine the following Figure 4 The method schematic diagram shown fully explains the entire process of a solid state hard disk data writing method provided in an embodiment of the present application.

[0043] S1: host data is written into an SLC physical block; specifically, when the solid state drive receives data to be written from the host, the data to be written is preferentially written into a target SLC physical block among multiple SLC physical blocks; S2: Determine whether the migration waterline has been reached; specifically, determine whether the amount of data written into the target SLC physical block has reached the migration waterline; If not: continue to execute step S1; If yes, then execute step S3: S3: Move the SLC physical block to the QLC physical block; specifically, move the data written in the target SLC physical block to the target QLC physical block; S4: construct a temporary cache table; wherein the temporary cache table is pre-constructed, which is a circular queue, and the amount of data that can be stored in the circular queue is less than or equal to AU num; S5: One Pass selects valid data and stores it in a temporary cache table; specifically, during the migration process, if the current programming mode is the QLC mode, then during One Pass, the valid data is selected from the data written into the target SLC physical block; and the physical address and logical address corresponding to the valid data are stored in the temporary cache table in the writing order, and the insertion pointer InsertIdx is incremented; and the logical address of the valid data is updated to the pre-set P2L table in the writing order to obtain the updated P2L table; S6: Two Pass is retrieved from the temporary cache table; specifically, in Two Pass, the physical address and logical address stored in the temporary cache table are retrieved in the order of writing; S7: Determine whether the logical addresses written twice are verified to be consistent; specifically, according to the writing order, take out the logical addresses stored in the temporary cache table, and verify them one by one with the logical addresses stored in the updated P2L table; thereby, determine whether the logical addresses written twice by One Pass and Two Pass are verified to be consistent; If yes, then execute step S8: S8: Data is written to Nand; that is, if the data written by One Pass and Two Pass are verified to be consistent, the data is flushed to Nand; If no, then execute step S9: S9: Mark the SLC physical block as abnormal. Specifically, if the data written twice by One Pass and Two Pass are inconsistent, the data write error corresponding to the corresponding physical address is reported to the host, and the SLC physical block where the written error data is located is marked as abnormal. S10: Re-move the data of the SLC physical block; specifically, move the data in the abnormal SLC physical block to the QLC physical block again until the data written twice are the same, and then the valid data is truly written to the Nand.

[0044] Based on the same inventive concept, Figure 5 As shown, the embodiment of the present application further provides a solid state hard disk data writing device, the solid state hard disk includes a plurality of independently concurrently operable units, each of the independently concurrently operable units includes a plurality of SLC physical blocks and a plurality of QLC physical blocks; the device includes: The writing unit 10 is used for preferentially writing the data to be written into a target SLC physical block among the multiple SLC physical blocks when the solid state hard disk receives the data to be written from the host; A selection unit 20, configured to select a target QLC physical block from the plurality of QLC physical blocks and move the data written in the target SLC physical block to the target QLC physical block if the amount of data written in the target SLC physical block reaches the migration waterline; The screening unit 30 is used to screen out valid data from the data written into the target SLC physical block during the first programming if the current programming mode is the QLC mode during the migration process; A storage unit 40, used to store the physical address and the logical address corresponding to the valid data in a pre-built temporary cache table according to the writing order; The reading unit 50 is used to retrieve the physical address and the logical address stored in the temporary cache table according to the write order during the second programming, and read the data corresponding to the retrieved physical address and the logical address.

[0045] In the embodiment of the present application, after the screening unit 30 screens out valid data from the data written into the target SLC physical block, the device further includes an updating unit, which is used to: According to the writing order, the logical addresses corresponding to the valid data are updated into a preset P2L table to obtain an updated P2L table; The reading unit 50 is used for: According to the writing order, the logical addresses stored in the temporary cache table are retrieved, and are verified one by one with the logical addresses stored in the updated P2L table; If the verification is consistent, the data corresponding to the physical address corresponding to the logical address is written to the target QLC physical block.

[0046] In the embodiment of the present application, after the reading unit 50 retrieves the logical addresses stored in the temporary cache table in the writing order and performs one-to-one verification with the logical addresses stored in the updated P2L table, the device further includes a processing unit, which is used to: If the check is inconsistent, reporting to the host a data write error corresponding to the physical address corresponding to the logical address, and marking the SLC physical block where the written error data is located as abnormal; The data in the abnormal SLC physical block is moved back to the target QLC physical block.

[0047] In the embodiment of the present application, the temporary cache table is a circular queue, and the amount of data that can be stored in the circular queue is less than or equal to AU num. ; Wherein, Die_num represents the number of the multiple independent concurrent operation units, Plane_num represents the number of planes included in each independent concurrent operation unit, String_num represents the number of programming units included in each independent concurrent operation unit, Page_per_WL represents the number of physical pages included in each programming unit, and AU_per_Page represents the maximum amount of data that can be read by each physical page.

[0048] In the embodiment of the present application, the selection unit 20 moves the data written in the target SLC physical block to the target QLC physical block, and the device further includes a release unit, which is used to: If all data in the target SLC physical block are moved to the target QLC physical block, the storage space of the target SLC physical block is released.

[0049] In the embodiment of the present application, after the writing unit 10 preferentially writes the to-be-written data into a target SLC physical block among the multiple SLC physical blocks, the apparatus further includes a reallocation unit, the reallocation unit being configured to: If the target SLC physical block is fully written by part of the data to be written, another SLC physical block for writing the remaining data except the data to be written is reallocated.

[0050] Based on the same inventive concept, an electronic device is also provided in an embodiment of the present application, and the electronic device can realize the above Figure 5 For the functions of each module, refer to Figure 6 , the electronic device comprises: Memory 100, used for storing computer programs; The processor 200 is used to implement the steps of the solid state hard disk data writing method as described in any of the above items when executing the computer program stored in the memory 100.

[0051] The specific connection medium between the processor 200 and the memory 100 is not limited in the embodiment of the present application. Figure 6 In the example, the processor 200 and the memory 100 are connected via the bus 300. The bus 300 is connected to the memory 100 via the bus 300. Figure 6 The bus 300 is represented by a bold line, and the connection between other components is only for schematic illustration and is not intended to be limiting. The bus 300 can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 6 Only one thick line is used in the figure, but it does not mean that there is only one bus or one type of bus. Alternatively, the processor 200 can also be called a controller, and there is no limitation on the name.

[0052] In the embodiment of the present application, the memory 100 stores instructions that can be executed by the processor 200. When the processor 200 executes the computer program stored in the memory 100, the solid state drive data writing method discussed above can be executed. The processor 200 can implement Figure 5 The functions of each module are shown in the figure.

[0053] Among them, the processor 200 is the control center of the device, and can use various interfaces and lines to connect various parts of the entire control device, and through running or executing computer programs stored in the memory 100 and calling data stored in the memory 100, the various functions of the device and process data, thereby monitoring the device as a whole.

[0054] In one possible design, the processor 200 may include one or more processing units, and the processor 200 may integrate an application processor and a modem processor, wherein the application processor mainly processes an operating system, a user interface, and application programs, and the modem processor mainly processes wireless communications. In some embodiments, the processor 200 and the memory 100 may be implemented on the same chip, and in some embodiments, they may also be implemented separately on separate chips.

[0055] The memory 100, as a non-volatile computer-readable storage medium, can be used to store non-volatile software programs, non-volatile computer executable programs and modules. The memory 100 may include at least one type of storage medium, such as a flash memory, a hard disk, a multimedia card, a card-type memory, a random access memory (Random Access Memory, RAM), a static random access memory (Static Random Access Memory, SRAM), a programmable read-only memory (Programmable Read Only Memory, PROM), a read-only memory (Read Only Memory, ROM), an electrically erasable programmable read-only memory (Electrically Erasable Programmable Read-Only Memory, EEPROM), a magnetic memory, a disk, an optical disk, etc. Alternatively, the memory 100 is any other medium that can be used to carry or store a desired program code in the form of an instruction or data structure and can be accessed by a computer, but is not limited thereto. The memory 100 in the embodiment of the present application can also be a circuit or any other device that can realize a storage function, for storing program instructions and / or data.

[0056] By designing and programming the processor 200, the code corresponding to the method for writing data to the solid state drive described in the above embodiment can be fixed into the chip, so that the chip can execute the steps of writing data to the solid state drive discussed above when it is running. How to design and program the processor 200 is a technology well known to those skilled in the art and will not be described in detail here.

[0057] Based on the same inventive concept, an embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, and the computer program is used to enable a computer to execute the steps of the solid-state hard disk data writing method discussed above.

[0058] In some possible implementations, various aspects of the solid-state hard drive data writing method provided in the present application can also be implemented in the form of a program product, which includes a program code. When the program product is run on an apparatus, the program code is used to enable the control device to execute the steps of the solid-state hard drive data writing method according to various exemplary embodiments of the present application described above in this specification.

[0059] The embodiments of the present application provide a method, device and electronic device for writing data to a solid-state hard disk. When the solid-state hard disk receives data to be written from a host, the data to be written is preferentially written to a target SLC physical block in the SLC physical block; if the amount of data written in the target SLC physical block reaches the migration waterline, a target QLC physical block is selected from multiple QLC physical blocks, and the data written in the target SLC physical block is migrated to the target QLC physical block; during the migration process, if the current programming module to be written is the QLC mode, valid data is filtered out from the data written in the target SLC physical block during the first programming; according to the write In order, the physical address and logical address corresponding to the valid data are stored in a pre-built temporary cache table; that is, the data to be written is first written to the SLC physical block, and then the data written to the SLC physical block is moved to the QLC physical block. Specifically, if the current writing programming mode is the QLC mode, then in the first programming, the valid data is screened out, and the physical address and logical address corresponding to the valid data are stored in the pre-built temporary buffer table in the writing order; in the second programming, the physical address and logical address stored in the temporary cache table are taken out in the writing order, and the data corresponding to the taken out physical address and logical address are read; In this way, valid data written into the SLC physical block is stored in a pre-built temporary cache table, and subsequently only the valid data needs to be moved from the SLC physical block to the QLC physical block, thereby avoiding the movement of invalid data while ensuring a smaller write amplification and avoiding disk wear.

[0060] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present application may adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes.

[0061] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the present application. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0062] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0063] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0064] Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.

Claims

1. A method for writing data to a solid state hard disk, characterized in that: The solid state drive comprises a plurality of independently concurrently operable units, each of which comprises a plurality of SLC physical blocks and a plurality of QLC physical blocks; the method comprises: When the solid state drive receives data to be written from the host, the solid state drive preferentially writes the data to be written into a target SLC physical block among the multiple SLC physical blocks; If the amount of data written to the target SLC physical block reaches the migration waterline, a target QLC physical block is selected from the multiple QLC physical blocks, and the data written to the target SLC physical block is migrated to the target QLC physical block; During the migration process, if the current programming mode is the QLC mode, valid data is screened out from the data written into the target SLC physical block during the first programming; The physical address and the logical address corresponding to the valid data are stored in a pre-built temporary cache table according to the writing order; During the second programming, the physical addresses and logical addresses stored in the temporary cache table are retrieved in the writing order, and the data corresponding to the retrieved physical addresses and logical addresses are read.

2. The method according to claim 1, characterized in that After filtering out valid data from the data written into the target SLC physical block, the method further includes: According to the writing order, the logical addresses corresponding to the valid data are updated into a preset P2L table to obtain an updated P2L table; The reading of the data corresponding to the retrieved physical address and logical address includes: According to the writing order, the logical addresses stored in the temporary cache table are retrieved, and are verified one by one with the logical addresses stored in the updated P2L table; If the verification is consistent, the data corresponding to the physical address corresponding to the logical address is written to the target QLC physical block.

3. The method according to claim 2, characterized in that After taking out the logical addresses stored in the temporary cache table in the writing order and performing one-to-one verification with the logical addresses stored in the updated P2L table, the method further includes: If the check is inconsistent, reporting to the host a data write error corresponding to the physical address corresponding to the logical address, and marking the SLC physical block where the written error data is located as abnormal; The data in the abnormal SLC physical block is moved back to the target QLC physical block.

4. The method according to any one of claims 1 to 3, characterized in that: The temporary cache table is a circular queue, and the amount of data that can be stored in the circular queue is less than or equal to AU num, AU num= Die_num*Plane_num*String_num*Page_per_WL*AU_per_Page*2; wherein Die_num represents the number of the multiple independent concurrent operation units, Plane_num represents the number of surfaces included in each independent concurrent operation unit, String_num represents the number of programming units included in each independent concurrent operation unit, Page_per_WL represents the number of physical pages included in each programming unit, and AU_per_Page represents the maximum amount of data that can be read by each physical page.

5. The method according to any one of claims 1 to 3, characterized in that: When moving the data written in the target SLC physical block to the target QLC physical block, the method further includes: If all data in the target SLC physical block are moved to the target QLC physical block, the storage space of the target SLC physical block is released.

6. The method according to any one of claims 1 to 3, characterized in that: After the step of preferentially writing the to-be-written data into a target SLC physical block among the multiple SLC physical blocks, the method further includes: If the target SLC physical block is fully written by part of the data to be written, another SLC physical block for writing the remaining data except the data to be written is reallocated.

7. A solid state hard disk data writing device, characterized in that: The solid state drive comprises a plurality of independently concurrently operable units, each of which comprises a plurality of SLC physical blocks and a plurality of QLC physical blocks; the device comprises: a writing unit, configured to, when the solid state hard disk receives data to be written from a host, preferentially write the data to be written into a target SLC physical block among the multiple SLC physical blocks; A selection unit, configured to select a target QLC physical block from the plurality of QLC physical blocks and move the data written in the target SLC physical block to the target QLC physical block if the amount of data written in the target SLC physical block reaches a migration waterline; A screening unit, used for screening out valid data from data written into the target SLC physical block during the first programming if the current programming mode of writing is the QLC mode during the migration process; A storage unit, used to store the physical address and the logical address corresponding to the valid data in a pre-built temporary cache table according to a write order; The reading unit is used to fetch the physical address and the logical address stored in the temporary cache table according to the writing order during the second programming, and read the data corresponding to the fetched physical address and the logical address.

8. An electronic device, characterized in that: include: Memory, used to store computer programs; A processor, configured to implement the method steps as described in any one of claims 1 to 6 when executing the computer program stored in the memory.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and the computer program is used to enable a computer to execute the method steps according to any one of claims 1 to 6.

10. A computer program product, characterized in that The computer program product comprises: a computer program code, and when the computer program code is run on a computer, the computer is enabled to execute the method according to any one of claims 1 to 6.

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