Solar cell, preparation method thereof and photovoltaic module
By forming a specific layer structure on the semiconductor substrate of the solar cell, the problems of amorphous silicon damage, insufficient anti-reflection effect of TCO film and easy corrosion are solved, and higher light energy utilization and cell efficiency are achieved, and the reliability of the components is improved.
Patent Information
- Application Number
- CN202411586141.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-07
- Publication Date
- 2025-03-21
AI Technical Summary
During the manufacturing process, existing crystalline silicon heterojunction solar cells have problems such as amorphous silicon damage, insufficient anti-reflection effect of TCO film and easy corrosion, which affects the power stability of the component.
By forming an intrinsic amorphous silicon layer, a doped layer, a transparent conductive layer and a metal electrode on the front and back sides of the semiconductor substrate, and forming a dielectric layer on the transparent conductive layer, a double-layer optical film structure is formed to improve the light energy utilization and short-circuit current, and at the same time, the transparent conductive layer is protected by the acid-base corrosion resistance characteristics of the dielectric layer.
It improves the photoelectric utilization and short-circuit current of solar cells, improves cell efficiency, and makes the components more stable in reliability tests by enhancing corrosion resistance.
Smart Images
Figure CN119677175A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the technical field of solar cells, and in particular to a solar cell and a preparation method thereof, and a photovoltaic module. Background Art
[0002] In the current manufacturing process of crystalline silicon heterojunction solar cells (HJT), after the intrinsic amorphous silicon passivation layer and amorphous silicon doping layer are deposited on both sides of the textured silicon wafer, due to its low lateral conductivity, a physical vapor deposition (PVD) process is used to deposit a transparent conductive oxide (TCO) to complete the dual functions of carrier collection and anti-reflection film. There are three problems in this process: 1. Amorphous silicon damage caused by the deposition of TCO; 2. The anti-reflection effect of the TCO film itself is insufficient; 3. The TCO film itself is easily corroded and has poor reliability, which affects the power stability of the component. Summary of the invention
[0003] The present disclosure provides a solar cell and a preparation method thereof, and a photovoltaic module to at least solve the above technical problems existing in the prior art.
[0004] According to a first aspect of the present disclosure, a solar cell is provided, comprising:
[0005] A semiconductor substrate, the semiconductor substrate comprising a front side and a back side arranged opposite to each other;
[0006] The semiconductor substrate is provided with a first intrinsic amorphous silicon layer, a first doped layer, a first transparent conductive layer and a first metal electrode on the front side, and a second intrinsic amorphous silicon layer, a second doped layer, a second transparent conductive layer and a second metal electrode on the back side;
[0007] a first aluminum oxide layer, located between the first doped layer and the first transparent conductive layer;
[0008] The first dielectric layer is located on the first transparent conductive layer; wherein the first metal electrode penetrates the first dielectric layer and is connected to the first transparent conductive layer.
[0009] In one embodiment, the thickness of the first aluminum oxide layer is in the range of 1-10 nm; the thickness of the first dielectric layer is in the range of 40-120 nm.
[0010] In one embodiment, the material of the first dielectric layer includes SiN x 、SiNO x 、SiO x MgF x At least one of .
[0011] In one possible implementation, it also includes:
[0012] a second aluminum oxide layer, located between the second doped layer and the second transparent conductive layer;
[0013] The second dielectric layer is located on the second transparent conductive layer; wherein the second metal electrode penetrates the second dielectric layer and is connected to the second transparent conductive layer.
[0014] According to a second aspect of the present disclosure, a method for preparing a solar cell is provided, the method comprising:
[0015] Providing a semiconductor substrate, the semiconductor substrate comprising a front side and a back side arranged opposite to each other;
[0016] forming a first intrinsic amorphous silicon layer on the front surface of the semiconductor substrate, and forming a second intrinsic amorphous silicon layer on the back surface of the semiconductor substrate;
[0017] forming a first doped layer on the first intrinsic amorphous silicon layer, and forming a second doped layer on the second intrinsic amorphous silicon layer;
[0018] forming a first aluminum oxide layer on the first doped layer;
[0019] forming a first transparent conductive layer on the first aluminum oxide layer, and forming a second transparent conductive layer on the second doped layer;
[0020] forming a first dielectric layer on the first transparent conductive layer;
[0021] forming a plurality of first grooves on the first dielectric layer, wherein the first grooves penetrate the first dielectric layer and expose a surface of the first transparent conductive layer;
[0022] A first metal electrode is formed in the first groove, and a second metal electrode is formed on the second transparent conductive layer.
[0023] In one possible implementation, the forming of the plurality of first grooves includes: forming the plurality of first grooves by a laser process.
[0024] In one possible implementation, the forming of the first aluminum oxide layer includes: forming the first aluminum oxide layer by an atomic layer deposition process;
[0025] The forming of the first dielectric layer includes: forming the first dielectric layer by a plasma enhanced chemical vapor deposition process.
[0026] In one embodiment, the thickness of the first aluminum oxide layer is in the range of 1-10 nm; the thickness of the first dielectric layer is in the range of 40-120 nm.
[0027] In one embodiment, the method further comprises:
[0028] After forming the second doping layer, a second aluminum oxide layer is formed on the second doping layer, wherein the second aluminum oxide layer is located between the second doping layer and the second transparent conductive layer.
[0029] In one embodiment, the method further comprises:
[0030] After forming the second transparent conductive layer, forming a second dielectric layer on the second transparent conductive layer;
[0031] forming a plurality of second grooves on the second dielectric layer, wherein the second grooves penetrate the second dielectric layer and expose the surface of the second transparent conductive layer;
[0032] The forming of the second metal electrode includes: forming the second metal electrode in the second groove.
[0033] According to a third aspect of the present disclosure, a photovoltaic assembly is provided, comprising a solar cell as described in any one of the above embodiments.
[0034] The solar cell and its preparation method, as well as the photovoltaic module disclosed in the present invention form a first dielectric layer on the first transparent conductive layer. The first dielectric layer and the first transparent conductive layer can form a double-layer optical film structure, which makes up for the poor anti-reflection effect of the single-layer transparent conductive film, improves the utilization rate of light energy, increases the short-circuit current, and improves the efficiency; at the same time, the acid and alkali corrosion resistance of the first dielectric layer can also be used to protect the first transparent conductive layer, so that the device can pass reliability tests such as PID (anti-potential induced decay), DH (Damp heat, wet heat test) and HF (Halogen Free, halogen-free test).
[0035] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present disclosure, nor is it intended to limit the scope of the present disclosure. Other features of the present disclosure will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS
[0036] The above and other objects, features and advantages of the exemplary embodiments of the present disclosure will become readily understood by reading the detailed description below with reference to the accompanying drawings. In the accompanying drawings, several embodiments of the present disclosure are shown in an exemplary and non-limiting manner, in which:
[0037] In the drawings, the same or corresponding reference numerals represent the same or corresponding parts.
[0038] Figure 1 A schematic diagram of the structure of a solar cell provided in an embodiment of the present disclosure;
[0039] Figure 2 A schematic structural diagram of a solar cell provided in another embodiment of the present disclosure;
[0040] Figure 3 A flow chart of a method for preparing a solar cell provided in an embodiment of the present disclosure;
[0041] Figures 4a to 4f A schematic diagram of a solar cell during preparation provided by Embodiment 1 of the present disclosure;
[0042] Figure 5a to Figure 5d This is a schematic diagram of the solar cell provided in the second embodiment of the present disclosure during the preparation process.
[0043] Figure Number:
[0044] 10. Semiconductor substrate; 21. First intrinsic amorphous silicon layer; 22. Second intrinsic amorphous silicon layer; 31. First doped layer; 32. Second doped layer; 41. First aluminum oxide layer; 42. Second aluminum oxide layer; 51. First transparent conductive layer; 52. Second transparent conductive layer; 61. First dielectric layer; 62. Second dielectric layer; 71. First metal electrode; 72. Second metal electrode; 81. First groove; 82. Second groove. DETAILED DESCRIPTION
[0045] In order to make the purpose, features, and advantages of the present disclosure more obvious and easy to understand, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present disclosure.
[0046] The present disclosure provides a solar cell. Figure 1 A schematic diagram of the structure of a solar cell provided in an embodiment of the present disclosure, such as Figure 1 As shown, the solar cell comprises:
[0047] The semiconductor substrate 10 includes a front side and a back side which are opposite to each other.
[0048] The semiconductor substrate 10 may be a single semiconductor material substrate (e.g., a silicon substrate, a germanium substrate, etc.), a composite semiconductor material substrate (e.g., a germanium silicon substrate, etc.), or a silicon on insulator substrate (SOI), a germanium on insulator (GOI) substrate, or a polycrystalline silicon substrate, etc. In a preferred embodiment, the semiconductor substrate 10 may be crystalline silicon, and the crystalline silicon may be P-type single crystal silicon or N-type single crystal silicon. Preferably, it may be N-type single crystal silicon.
[0049] At least one of the front surface and the back surface of the semiconductor substrate 10 is formed into a pyramid texture structure (not shown in the figure).
[0050] The solar cell also includes: a first intrinsic amorphous silicon layer 21, a first doped layer 31, a first transparent conductive layer 51 and a first metal electrode 71 are prepared upward from the front side of the semiconductor substrate 10, and a second intrinsic amorphous silicon layer 22, a second doped layer 32, a second transparent conductive layer 52 and a second metal electrode 72 are prepared downward from the back side of the semiconductor substrate 10.
[0051] In one embodiment, the first intrinsic amorphous silicon layer 21 and the second intrinsic amorphous silicon layer 22 are passivation layers, which have a good passivation effect on the surface of the semiconductor substrate. Excellent surface passivation ability is an important condition for obtaining higher battery efficiency and can greatly improve the minority carrier life of the battery.
[0052] In one embodiment, the first doping layer 31 may be an N-type doping layer, and the second doping layer 32 may be a P-type doping layer.
[0053] The first doping layer 31 and the second doping layer 32 may be microcrystalline silicon doping layers or amorphous silicon doping layers.
[0054] The first doping layer 31 and the second doping layer 32 form a PN junction and a back field of a heterojunction solar cell.
[0055] In one embodiment, the first transparent conductive layer 51 and the second transparent conductive layer 52 are made of transparent conductive oxide, which can be a single layer or a stacked layer structure of materials such as indium tin oxide, aluminum-doped zinc oxide or tungsten-doped indium oxide. The transparent conductive layer can effectively increase the collection of carriers and reduce light reflection.
[0056] The thickness of the first transparent conductive layer 51 and the second transparent conductive layer 52 is 10 to 100 nm.
[0057] In one embodiment, the first metal electrode 71 and the second metal electrode 72 are used to form the positive and negative electrodes of the battery, effectively collecting photogenerated carriers, and their materials can be silver, silver-coated copper grid or copper. The first metal electrode 71 is arranged on the first transparent conductive layer 51, and the second metal electrode 72 is arranged on the second transparent conductive layer 52, so that the metal electrode and the transparent conductive layer are in direct contact, ensuring good ohmic contact.
[0058] The solar cell further includes: a first aluminum oxide layer 41 located between the first doping layer 31 and the first transparent conductive layer 51 .
[0059] In this embodiment, a first aluminum oxide layer is formed between the first doped layer and the first transparent conductive layer. In this way, when laser grooving is subsequently performed on the first dielectric layer, the laser heat involved is transferred to the first aluminum oxide layer. The first aluminum oxide layer protects the underlying amorphous silicon layer from being damaged by high temperature, and at the same time, the heat is used to thermally activate the first aluminum oxide layer, thereby achieving the expected field passivation effect, further improving the open circuit voltage, and improving the battery conversion efficiency.
[0060] In one embodiment, the thickness of the first aluminum oxide layer 41 is in the range of 1-10 nm. If the thickness of the first aluminum oxide layer is too thick, the overall thickness of the solar cell is increased, affecting the performance of the cell; if the thickness of the first aluminum oxide layer is too thin, it cannot protect the underlying amorphous silicon layer.
[0061] The solar cell further includes: a first dielectric layer 61 located on the first transparent conductive layer 51 ; wherein the first metal electrode 71 penetrates through the first dielectric layer 61 and is connected to the first transparent conductive layer 51 .
[0062] In this embodiment, by forming a first dielectric layer on the first transparent conductive layer, the first dielectric layer and the first transparent conductive layer can form a double-layer optical film structure, which makes up for the poor anti-reflection effect of the single-layer transparent conductive film, improves the utilization rate of light energy, increases the short-circuit current, and improves efficiency; at the same time, the acid and alkali corrosion resistance of the first dielectric layer can also be used to protect the first transparent conductive layer, so that the device can pass reliability tests such as PID (anti-potential induced decay), DH (Damp heat, wet heat experiment) and HF (Halogen Free, halogen-free test).
[0063] In one embodiment, the material of the first dielectric layer 61 includes SiN x 、SiNO x 、SiO x MgF x At least one of .
[0064] The first dielectric layer 61 may be a multi-layer composite film structure, such as a double-layer SiN x / SiNO structure, double-layer SiN x / SiO x Structure or SiN x / SiNO / MF x wait.
[0065] In one embodiment, the thickness of the first dielectric layer is in the range of 40-120 nm.
[0066] Figure 2 A schematic structural diagram of a solar cell provided in another embodiment of the present disclosure.
[0067] like Figure 2As shown, the solar cell further includes: a second aluminum oxide layer 42, located between the second doping layer 32 and the second transparent conductive layer 52;
[0068] The second dielectric layer 62 is located on the second transparent conductive layer 52 ; wherein the second metal electrode 72 penetrates the second dielectric layer 62 and is connected to the second transparent conductive layer 52 .
[0069] Figure 2 In the illustrated embodiment, both sides of the solar cell adopt the same structure, wherein the structure and function of the second aluminum oxide layer 42 are the same as those of the first aluminum oxide layer 41 , and the structure and function of the second dielectric layer 62 are the same as those of the first dielectric layer 61 .
[0070] The present disclosure provides a method for preparing a solar cell. Figure 3 Flow chart of the method for preparing a solar cell provided in the embodiment of the present disclosure, see Figure 3 , the method comprises the following steps:
[0071] Step 301: providing a semiconductor substrate, wherein the semiconductor substrate comprises a front side and a back side that are oppositely arranged;
[0072] Step 302: forming a first intrinsic amorphous silicon layer on the front surface of the semiconductor substrate, and forming a second intrinsic amorphous silicon layer on the back surface of the semiconductor substrate;
[0073] Step 303: forming a first doped layer on the first intrinsic amorphous silicon layer, and forming a second doped layer on the second intrinsic amorphous silicon layer;
[0074] Step 304: forming a first aluminum oxide layer on the first doped layer;
[0075] Step 305: forming a first transparent conductive layer on the first aluminum oxide layer, and forming a second transparent conductive layer on the second doped layer;
[0076] Step 306: forming a first dielectric layer on the first transparent conductive layer;
[0077] Step 307: forming a plurality of first grooves on the first dielectric layer, wherein the first grooves penetrate the first dielectric layer to expose the surface of the first transparent conductive layer;
[0078] Step 308: forming a first metal electrode in the first groove, and forming a second metal electrode on the second transparent conductive layer.
[0079] The method for preparing a solar cell provided by the embodiment of the present disclosure is further described in detail below in conjunction with specific embodiments. Figures 4a to 4f This is a schematic diagram of a solar cell during the preparation process provided in the first embodiment of the present disclosure. Figure 5a to Figure 5dThis is a schematic diagram of a solar cell during the preparation process provided by the second embodiment of the present disclosure. The first embodiment will be described in detail below.
[0080] First, see Figure 4a , perform step 301, provide a semiconductor substrate 10, and the semiconductor substrate 10 includes a front side and a back side that are arranged opposite to each other.
[0081] The semiconductor substrate 10 may be a single semiconductor material substrate (e.g., a silicon substrate, a germanium substrate, etc.), a composite semiconductor material substrate (e.g., a germanium silicon substrate, etc.), or a silicon on insulator substrate (SOI), a germanium on insulator (GOI) substrate, or a polycrystalline silicon substrate, etc. In a preferred embodiment, the semiconductor substrate 10 may be crystalline silicon, and the crystalline silicon may be P-type single crystal silicon or N-type single crystal silicon. Preferably, it may be N-type single crystal silicon.
[0082] Next, the method further includes: pre-cleaning the semiconductor substrate 10 and performing gettering on the semiconductor substrate 10 .
[0083] Next, the semiconductor substrate 10 is subjected to a texturing process. After the texturing step, at least one of the front and back surfaces of the semiconductor substrate 10 is formed into a pyramid texture structure (not shown in the figure).
[0084] In actual operation, the texturing process includes: placing the semiconductor substrate 10 in a 0.5%-10% KOH solution, reacting at 50-85°C for 1min-20min. Under this condition, the velvet structure obtained is the best, which can reduce reflection and absorb more light sources. This embodiment mainly utilizes the anisotropic corrosion characteristics of silicon in low-concentration alkali solution. Silicon and alkali solution undergo a series of chemical reactions to form a pyramid velvet surface on the surface of the silicon wafer.
[0085] Next, continue to see Figure 4a , perform step 302 to form a first intrinsic amorphous silicon layer 21 on the front surface of the semiconductor substrate 10 , and form a second intrinsic amorphous silicon layer 22 on the back surface of the semiconductor substrate 10 .
[0086] In actual operation, the first intrinsic amorphous silicon layer 21 and the second intrinsic amorphous silicon layer 22 may be deposited by a chemical vapor deposition (CVD) method.
[0087] In one embodiment, the first intrinsic amorphous silicon layer 21 and the second intrinsic amorphous silicon layer 22 are passivation layers, which have a good passivation effect on the surface of the semiconductor substrate. Excellent surface passivation ability is an important condition for obtaining higher battery efficiency and can greatly improve the minority carrier life of the battery.
[0088] Next, continue to see Figure 4a , perform step 303 to form a first doping layer 31 on the first intrinsic amorphous silicon layer 21 , and form a second doping layer 32 on the second intrinsic amorphous silicon layer 22 .
[0089] In actual operation, the first doping layer 31 and the second doping layer 32 may be deposited by chemical vapor deposition (CVD).
[0090] In one embodiment, the first doping layer 31 may be an N-type doping layer, and the second doping layer 32 may be a P-type doping layer.
[0091] The first doping layer 31 and the second doping layer 32 may be microcrystalline silicon doping layers or amorphous silicon doping layers.
[0092] The first doping layer 31 and the second doping layer 32 form a PN junction and a back field of a heterojunction solar cell.
[0093] Next, see Figure 4b , perform step 304 to form a first aluminum oxide layer 41 on the first doping layer 32 .
[0094] In one embodiment, forming the first aluminum oxide layer 41 includes: forming the first aluminum oxide layer 41 by an atomic layer deposition (ALD) process.
[0095] Specifically, during the atomic layer deposition process, trimethylaluminum is reacted with H2O to generate AlO x The film layer is the first aluminum oxide layer 41. During the process, the process temperature is 150-210°C and the process time is 18-36 minutes.
[0096] In one embodiment, the thickness of the first aluminum oxide layer 41 is in the range of 1-10 nm. If the thickness of the first aluminum oxide layer is too thick, the overall thickness of the solar cell is increased, affecting the performance of the cell; if the thickness of the first aluminum oxide layer is too thin, it cannot protect the underlying amorphous silicon layer.
[0097] Next, see Figure 4c , perform step 305 to form a first transparent conductive layer 51 on the first aluminum oxide layer 41 , and form a second transparent conductive layer 52 on the second doping layer 32 .
[0098] In actual operation, the first transparent conductive layer 51 and the second transparent conductive layer 52 can be deposited by a physical vapor deposition process (PVD).
[0099] The first transparent conductive layer 51 and the second transparent conductive layer 52 are made of transparent conductive oxide, which may be a single layer or a stacked layer structure of materials such as indium tin oxide, aluminum-doped zinc oxide or tungsten-doped indium oxide. The transparent conductive layer can effectively increase the collection of carriers and reduce light reflection.
[0100] The thickness of the first transparent conductive layer 51 and the second transparent conductive layer 52 is 10 to 100 nm.
[0101] Next, see Figure 4d , perform step 306 to form a first dielectric layer 61 on the first transparent conductive layer 51 .
[0102] In one embodiment, forming the first dielectric layer 61 includes: forming the first dielectric layer 61 by a plasma enhanced chemical vapor deposition process. During the process, the process temperature is 200-270° C. and the process time is 20-30 minutes.
[0103] In one embodiment, the material of the first dielectric layer 61 includes SiN x 、SiNO x 、SiO x MgF x At least one of .
[0104] The first dielectric layer 61 may be a multi-layer composite film structure, such as a double-layer SiN x / SiNO structure, double-layer SiN x / SiO x Structure or SiN x / SiNO / MF x wait.
[0105] In one embodiment, the thickness of the first dielectric layer is in the range of 40-120 nm.
[0106] Next, see Figure 4e , perform step 307 to form a plurality of first grooves 81 on the first dielectric layer 61 , wherein the first grooves 81 penetrate the first dielectric layer 61 and expose the surface of the first transparent conductive layer 51 .
[0107] In one embodiment, forming the plurality of first trenches 81 includes: forming the plurality of first trenches 81 by a laser process.
[0108] In order to ensure good electrical contact, a laser grooving process is required to open the first dielectric layer 61 according to a preset pattern, and form a plurality of first grooves 81 in the first dielectric layer 61. During the laser grooving process, a large amount of laser heat will be generated. The first aluminum oxide layer 41 can be used as a heat absorption layer to absorb and use the heat transmitted by the laser for activation, so as to achieve the expected field passivation effect, further increase the open circuit voltage, and improve the battery conversion efficiency; without this layer, the heat brought by the laser grooving will damage the amorphous silicon in the lower layer, resulting in efficiency loss.
[0109] In this embodiment, the laser technology may be picosecond UV laser or femtosecond UV laser, and the depth of the first groove 81 may be adjusted by power to stop only at the first dielectric layer 61. During the laser grooving process, the power may be 60-70 W, and in a preferred embodiment, the power may be 64 W. During the laser grooving process, the spot size of the laser is 80-240 μm, and the width of the formed first groove is 10-20 μm.
[0110] In another embodiment, the first trench 81 may also be formed by a mask process.
[0111] In actual operation, a mask layer may be formed on the first dielectric layer 61 , and then patterned to form a pattern of the first trench on the mask layer. Then, the first dielectric layer 61 may be etched downward according to the pattern of the first trench to form the first trench 81 .
[0112] Next, see Figure 4f , perform step 308 to form a first metal electrode 71 in the first groove 81 and a second metal electrode 72 on the second transparent conductive layer 52 .
[0113] In actual operation, the process of forming the first metal electrode 71 and the second metal electrode 72 includes but is not limited to a screen printing process.
[0114] The first metal electrode 71 and the second metal electrode 72 are used to form the positive and negative electrodes of the battery, effectively collecting photogenerated carriers, and the materials thereof can be silver, silver-coated copper grid or copper. The first metal electrode 71 is disposed on the first transparent conductive layer 51, and the second metal electrode 72 is disposed on the second transparent conductive layer 52, so that the metal electrode and the transparent conductive layer are in direct contact, ensuring good ohmic contact.
[0115] Finally, the solar cell is cured.
[0116] Combine the following Figure 5a to Figure 5d The second embodiment is described in detail.
[0117] It should be noted that Figure 5a The previous steps and Figure 4a The same, no further description here.
[0118] Next, see Figure 5a After the second doping layer 32 is formed, a second aluminum oxide layer 42 is formed on the second doping layer 32 , and the second aluminum oxide layer 42 is located between the second doping layer 32 and the second transparent conductive layer 52 .
[0119] In this embodiment, the second aluminum oxide layer 42 is formed on the second doping layer 31 while the first aluminum oxide layer 41 is being formed.
[0120] The formation process and function of the second aluminum oxide layer 42 are the same as those of the first aluminum oxide layer 41 , and are not described in detail here.
[0121] Next, see Figure 5b After forming the second transparent conductive layer 52 , a second dielectric layer 62 is formed on the second transparent conductive layer 52 .
[0122] In this embodiment, the second dielectric layer 62 is formed on the second transparent conductive layer 52 while the first dielectric layer 61 is being formed.
[0123] The formation process and function of the second dielectric layer 62 are the same as those of the first dielectric layer 61 , and will not be described in detail herein.
[0124] Next, see Figure 5c , a plurality of second grooves 82 are formed on the second dielectric layer 62 , and the second grooves 82 penetrate the second dielectric layer 62 to expose the surface of the second transparent conductive layer 52 .
[0125] In this embodiment, the second trench 82 is formed at the same time as the first trench 81 is formed.
[0126] The process of forming the second groove 82 is the same as the process of forming the first groove 81 , and will not be described again here.
[0127] Next, see Figure 5d , a second metal electrode 72 is formed in the second trench 82 .
[0128] In the second embodiment, both sides of the solar cell adopt the same structure, wherein the structure and function of the second aluminum oxide layer 42 are the same as those of the first aluminum oxide layer 41 , and the structure and function of the second dielectric layer 62 are the same as those of the first dielectric layer 61 .
[0129] The embodiments of the present disclosure also provide a photovoltaic assembly, comprising a solar cell as described in any of the above embodiments.
[0130] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps recorded in this disclosure can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solutions disclosed in this disclosure can be achieved, and this document does not limit this.
[0131] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of the present disclosure, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.
[0132] The above is only a specific embodiment of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art who is familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present disclosure, which should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.
Claims
1. A solar cell, characterized in that: The solar cell comprises: a semiconductor substrate, the semiconductor substrate comprising a front surface and a back surface disposed opposite to each other; The semiconductor substrate is provided with a first intrinsic amorphous silicon layer, a first doped layer, a first transparent conductive layer and a first metal electrode on the front side, and a second intrinsic amorphous silicon layer, a second doped layer, a second transparent conductive layer and a second metal electrode on the back side. a first aluminum oxide layer, located between the first doped layer and the first transparent conductive layer; A first dielectric layer is located on the first transparent conductive layer; wherein the first metal electrode passes through the first dielectric layer and is connected to the first transparent conductive layer.
2. The solar cell according to claim 1, wherein The thickness of the first aluminum oxide layer is in the range of 1-10 nm; the thickness of the first dielectric layer is in the range of 40-120 nm.
3. The solar cell according to claim 1, wherein The material of the first dielectric layer includes SiN x 、SiNO x 、SiO x or MgF x At least one of .
4. The solar cell according to claim 1, wherein Also includes: a second aluminum oxide layer, located between the second doped layer and the second transparent conductive layer; The second dielectric layer is located on the second transparent conductive layer; wherein the second metal electrode penetrates the second dielectric layer and is connected to the second transparent conductive layer.
5. A method for preparing a solar cell, characterized in that: The method comprises: Providing a semiconductor substrate, the semiconductor substrate comprising a front surface and a back surface disposed opposite to each other; forming a first intrinsic amorphous silicon layer on the front surface of the semiconductor substrate, and forming a second intrinsic amorphous silicon layer on the back surface of the semiconductor substrate; forming a first doping layer on the first intrinsic amorphous silicon layer, and forming a second doping layer on the second intrinsic amorphous silicon layer; forming a first aluminum oxide layer on the first doped layer; forming a first transparent conductive layer on the first aluminum oxide layer, and forming a second transparent conductive layer on the second doped layer; forming a first dielectric layer on the first transparent conductive layer; forming a plurality of first grooves on the first dielectric layer, wherein the first grooves penetrate the first dielectric layer and expose the surface of the first transparent conductive layer; A first metal electrode is formed in the first groove, and a second metal electrode is formed on the second transparent conductive layer.
6. The method according to claim 5, characterized in that The forming of the plurality of first trenches includes: forming the plurality of first trenches by a laser process.
7. The method according to claim 5, characterized in that The forming of the first aluminum oxide layer comprises: forming the first aluminum oxide layer by an atomic layer deposition process; The forming of the first dielectric layer includes: forming the first dielectric layer by a plasma enhanced chemical vapor deposition process.
8. The method according to claim 5, characterized in that The thickness of the first aluminum oxide layer is in the range of 1-10 nm; the thickness of the first dielectric layer is in the range of 40-120 nm.
9. The method according to claim 5, characterized in that The method further comprises: After forming the second doping layer, a second aluminum oxide layer is formed on the second doping layer, wherein the second aluminum oxide layer is located between the second doping layer and the second transparent conductive layer.
10. The method according to claim 5, characterized in that The method further comprises: After forming the second transparent conductive layer, forming a second dielectric layer on the second transparent conductive layer; forming a plurality of second grooves on the second dielectric layer, wherein the second grooves penetrate the second dielectric layer and expose the surface of the second transparent conductive layer; The forming of the second metal electrode includes: forming the second metal electrode in the second groove.
11. A photovoltaic module, characterized in that: The solar cell comprises the solar cell according to any one of claims 1 to 4.