High-precision power control method and system for high-power pulse output of radio frequency power supply

Abstract

The invention discloses a high-precision power control method for high-power pulse output of a radio-frequency power supply, which comprises the following steps of: acquiring a radio-frequency emission signal before power amplification of a radio-frequency emission circuit in the high-power radio-frequency power supply to obtain an emission feedback signal TXFB, and acquiring a coupling signal of a detection circuit to obtain an emission feedback signal TXFB; obtaining a forward power feedback signal FWD and a reflection power feedback signal RFL of the radio frequency emission signal; processing the acquired TXFB, FWD and RFL, and calculating the power value of each signal; according to the pulse signal edge, synchronously selecting effective signal power values of TXFB, FWD and RFL; correcting a signal power value of the FWD according to the TXFB; the signal power value change trend of the TXFB and the corrected FWD is analyzed, and the response delay of the TXFB passing through the power amplification circuit is estimated; and calculating forward power output by the radio frequency power supply after response delay, judging whether the forward power is within an allowable range or not, if so, outputting the power to meet the requirement, and otherwise, continuing closed-loop power adjustment. The control precision and the response time of the pulse output power can be improved.

Description

Technical Field

[0001] The present invention relates to the field of radio frequency power supply control, and in particular to a high-precision power control method and system for high-power pulse output of a radio frequency power supply. Background Art

[0002] Many high-power industrial equipment, medical equipment, and semiconductor processing equipment use RF power as the driving source of the equipment. Due to the requirements of processing cost and efficiency, the demand for high-power pulse power output of RF power is becoming more and more widespread, and the application scenarios have higher and higher requirements for the accuracy of RF power pulse output power. The pulse frequency is adjustable from 1Hz to 50kHz, and the duty cycle is adjustable from 1% to 99%. Traditional detection and control methods cannot adapt to such a large range of signal changes, which urgently requires a high-precision control method for high-power pulse output power of RF power. Summary of the invention

[0003] The main purpose of the present invention is to provide a high-precision power control method and system for high-power pulse output of a radio frequency power supply, so as to achieve high-precision power regulation of the high-power radio frequency power supply.

[0004] The technical solution adopted by the present invention is:

[0005] A high-precision power control method for high-power pulse output of a radio frequency power supply is provided, comprising the following steps:

[0006] The RF transmission signal before the power amplifier of the RF transmission circuit in the high-power RF power supply is collected to obtain the transmission feedback signal TXFB, and the coupling signal of the detection circuit is collected to obtain the forward power feedback signal FWD and the reflected power feedback signal RFL of the RF transmission signal; wherein the coupling signal is obtained by coupling the transmission signal after the power amplifier of the RF transmission circuit through the detection circuit;

[0007] Process the collected TXFB, FWD and RFL, and calculate the power values ​​of each signal;

[0008] Select the effective signal power values ​​of TXFB, FWD and RFL synchronously according to the edge of the pulse signal output by the control RF transmission circuit;

[0009] Correct the signal power value of FWD according to the signal power value of TXFB;

[0010] Analyze the changing trend of the signal power values ​​of TXFB and the corrected FWD, and estimate the response delay of TXFB after the power amplifier circuit; calculate the current forward power after the response delay. If it is within the allowable range, the output power meets the requirements, otherwise continue to perform closed-loop power adjustment.

[0011] Following the above technical solution, the response delay T is calculated specificallypd The forward power output by the rear RF power supply is recorded as the current forward power P current , the preset target forward power is P o , the allowable power deviation is ΔP; if P current In P o If the output power is within the range of ±ΔP, it meets the requirement, otherwise the closed-loop power adjustment will continue.

[0012] According to the above technical solution, the collected TXFB, FWD and RFL are subjected to frequency shift and filtering processing.

[0013] According to the above technical solution, when the signal power value of RFL exceeds the preset threshold value, the forward output power value when the signal power value of the RF power supply RFL is maintained at the preset threshold value is calculated based on the current VSWR standing wave ratio value, and then the link parameters are calculated and adjusted based on this forward power value to reduce the forward output power of the RF power supply until the signal power value of RFL is within the allowable preset threshold value.

[0014] According to the above technical solution, the effective TXFB, FWD and RFL are the sampled data when the RF transmitting circuit in the RF power supply is turned on, and the sampled data is invalid when it is turned off.

[0015] According to the above technical solution, before collecting the signal, the steps are also included: according to the power acquisition table, a power mapping algorithm is used to calculate when the output power value is P o The various parameter values ​​of the link in the RF power supply are obtained and configured; the generation process of the power acquisition table is as follows: the RF power supply acquires power in the RF power normal transmission mode, obtains K power point data, and each power point uses the square cumulative sum of N consecutive ADC sampling data to represent the output power value of the RF power supply, and generates a power acquisition table of the corresponding relationship between various parameters of the RF power supply and the output power.

[0016] The calculation process of the current forward power is: Specific calculation response delay T pd The forward power output by the rear RF power supply is recorded as the current forward power P current , the preset target forward power is P o , the allowable power deviation is ΔP; if P current In P o If the output power is within the range of ±ΔP, it meets the requirement, otherwise the closed-loop power adjustment will continue.

[0017] Following the above technical solution, TXFB, FWD and RFL are collected specifically by high-speed analog-to-digital sampling.

[0018] The present invention also provides a high-precision power control system for high-power pulse output of a radio frequency power supply, comprising:

[0019] The detection circuit is used to couple the transmission signal of the high-power radio frequency power supply after being amplified by the radio frequency transmission circuit to obtain a coupled signal;

[0020] The high-speed analog-to-digital conversion module is used to collect the RF transmission signal before the RF transmission circuit power amplifier to obtain the transmission feedback signal TXFB, and collect the coupling signal of the detection circuit to obtain the forward power feedback signal FWD and the reflected power feedback signal RFL of the RF transmission signal;

[0021] The FPGA control module is used to process the collected TXFB, FWD and RFL and calculate the power values ​​of each signal; select the effective signal power values ​​of TXFB, FWD and RFL according to the edge synchronization of the pulse signal output by the control RF transmission circuit; correct the signal power value of FWD according to the signal power value of TXFB; analyze the change trend of the signal power values ​​of TXFB and the corrected FWD, and estimate the response delay of TXFB after the power amplifier circuit; calculate the current forward power after the response delay. If it is within the allowable range, the output power meets the requirements, otherwise continue to perform closed-loop power adjustment.

[0022] In accordance with the above technical solution, the system also includes a first signal conditioning module, which is connected between the RF transmitting circuit and the high-speed analog-to-digital conversion module, and is used to first process the RF transmitting signal before the RF transmitting circuit power amplifier, and then output it to the high-speed analog-to-digital conversion module for collection.

[0023] In accordance with the above technical solution, the system also includes a second signal conditioning module connected between the detection circuit and the high-speed analog-to-digital conversion module, which is used to first process the coupled signal and then output it to the high-speed analog-to-digital conversion module for collection.

[0024] Following the above technical solution, the FPGA control module is also used to calculate the forward output power value when the signal power value of the RF power supply RFL is maintained at the preset threshold value based on the current VSWR standing wave ratio value when the signal power value of the RFL exceeds the preset threshold value, and then calculate and adjust the link parameters based on this forward power value to reduce the forward output power of the RF power supply until the signal power value of the RFL is within the allowable preset threshold value.

[0025] According to the above technical solution, the FPGA control module is also used to receive the external pulse signal after level conversion, and analyze the pulse signal frequency and duty cycle. When it is detected that the frequency and duty cycle of the external pulse signal meet the locking conditions, and the external pulse signal is continuously detected within a certain period of time, and its frequency and duty cycle are stable, the pulse frequency and duty cycle of the RF power supply output signal are synchronized to the locked pulse signal.

[0026] The beneficial effects of the present invention are as follows: the present invention selects effective sampling signals TXFB, FWD and RFL, and corrects the forward power FWD data of the radio frequency power amplifier circuit PA output collected by the feedback link in real time according to the power change trend data of the TXFB signal. The corrected forward power FWD data removes the influence of high-speed ADC sampling and noise floor change, and can more accurately reflect the output power of the radio frequency power amplifier circuit PA; and then the response delay of the radio frequency power amplifier circuit PA can be calculated by comparing and analyzing the power change trends of the two signals TXFB and FWD sampled in real time by the high-speed ADC, and the current forward power is calculated according to the response delay and compared with the target forward power, thereby providing a basis for the radio frequency power supply to quickly and accurately perform closed-loop power adjustment at different output powers.

[0027] Of course, any product implementing the present invention does not necessarily need to achieve all of the advantages described above at the same time. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0029] Figure 1 It is a flow chart of a high-precision power control method for high-power pulse output of a radio frequency power supply according to an embodiment of the present invention;

[0030] Figure 2 is a flow chart of a high-precision power control method for high-power pulse output of a radio frequency power supply according to another embodiment of the present invention;

[0031] Figure 3 It is a schematic diagram of the structure of a high-precision power control system for high-power pulse output of a radio frequency power supply according to an embodiment of the present invention. DETAILED DESCRIPTION

[0032] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0033] It should be noted that the illustrations provided in the embodiments of the present invention are only used to illustrate the basic concept of the present invention in a schematic manner. Therefore, the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout type may also be more complicated.

[0034] In the present invention, it is also necessary to explain that, if the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. appear, the orientation or position relationship indicated is based on the orientation or position relationship shown in the drawings, which is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. In addition, if the terms "first" and "second" appear, they are only used for description and distinction purposes, and cannot be understood as indicating or implying relative importance.

[0035] In addition, it should be noted that the features of the various embodiments of the present invention may be combined or combined in part or in whole, and may interact and operate in different ways as will be appreciated by those skilled in the art. Each embodiment may be implemented independently of one another, or in an associated relationship.

[0036] Explanation of English abbreviations:

[0037] TXFB: TX feedback signal transmission feedback signal, this patent specifically refers to the transmission feedback signal of the RF transmission signal before the power amplifier of the RF transmission circuit in the high-power RF power supply;

[0038] FWD: Forward power. This patent specifically refers to the forward power feedback signal of the transmission signal after the RF transmission circuit power amplifier.

[0039] RFL: Reflected power. This patent specifically refers to the reflected power feedback signal of the transmission signal after the RF transmission circuit power amplifier.

[0040] ADC: analog-to-digital conversion module (chip or acquisition card);

[0041] VSWR: Standing Wave Ratio;

[0042] FPGA: Field Programmable Gate Array;

[0043] PA: power amplifier circuit;

[0044] FB:Feedback.

[0045] Example 1

[0046] like Figure 1 As shown, the high-precision power control method for high-power pulse output of a radio frequency power supply according to an embodiment of the present invention comprises the following steps:

[0047] S101, collecting the radio frequency transmission signal before the power amplifier of the radio frequency transmission circuit in the high-power radio frequency power supply to obtain the transmission feedback signal TXFB, and collecting the coupling signal of the detection circuit to obtain the forward power feedback signal FWD and the reflected power feedback signal RFL of the radio frequency transmission signal; wherein the coupling signal is obtained by coupling the transmission signal after the power amplifier of the radio frequency transmission circuit through the detection circuit;

[0048] S102, processing the collected TXFB, FWD and RFL, and calculating the power value of each signal;

[0049] S103, selecting effective signal power values ​​of TXFB, FWD and RFL according to the edge synchronization of the pulse signal output by the control radio frequency transmission circuit;

[0050] S104, correcting the signal power value of FWD according to the signal power value of TXFB;

[0051] S105, analyzing the change trend of the signal power values ​​of TXFB and the corrected FWD, estimating the response delay of TXFB after the power amplifier circuit; calculating the current forward power after the response delay, if it is within the allowable range, the output power meets the requirement, otherwise continue to perform closed-loop power adjustment.

[0052] In step S101, TXFB, FWD and RFL are collected by high-speed analog-to-digital sampling, such as by a high-speed ADC (analog-to-digital conversion chip).

[0053] In step S102, frequency shifting and filtering are performed on the collected TXFB, FWD and RFL.

[0054] Furthermore, when the signal power value of RFL exceeds the preset threshold value, the forward output power value when the signal power value of the RF power supply RFL is maintained at the preset threshold value is calculated based on the current VSWR standing wave ratio value, and then the link parameters are calculated and adjusted based on this forward power value to reduce the forward output power of the RF power supply until the signal power value of RFL is within the allowable preset threshold value.

[0055] In step S103, the valid TXFB, FWD and RFL are the sampled data when the RF transmitting circuit in the RF power supply is turned on, and the sampled data is invalid when it is turned off.

[0056] Specifically, before collecting the signal, the method further includes the following steps:

[0057] S000, according to the power acquisition table, use the power mapping algorithm to calculate when the output power value is P oThe various parameter values ​​of the link in the RF power supply are obtained and configured; the generation process of the power acquisition table is as follows: the RF power supply acquires power in the RF power normal transmission mode, obtains K power point data, and each power point uses the square cumulative sum of N consecutive ADC sampling data to represent the output power value of the RF power supply, and generates a power acquisition table of the corresponding relationship between various parameters of the RF power supply and the output power, wherein K and N are both integers.

[0058] In step S105, specifically: analyzing the change trend of the signal power value of TXFB and the corrected FWD, estimating the response delay T of TXFB after passing through the power amplifier circuit pd ; Calculate the delay T pd The forward power P output by the rear RF power supply fwd and reflected power P rfl , record the current forward power P fwd The power value is P current , the preset target forward power is P o , the allowable power deviation is ΔP; if P current In P o If the output power is within the range of ±ΔP, it meets the requirement, otherwise the closed-loop power adjustment will continue.

[0059] This embodiment selects effective sampling signals TXFB, FWD and RFL, and corrects the forward power FWD data of the RF power amplifier circuit PA output collected by the feedback link in real time according to the power change trend data of the TXFB signal. The corrected forward power FWD data removes the influence of high-speed ADC sampling and noise floor change, and can more accurately reflect the output power of the RF power amplifier circuit PA. Then, by comparing and analyzing the power change trends of the two signals TXFB and FWD sampled in real time by the high-speed ADC, the response delay of the RF power amplifier circuit PA can be calculated, and the current forward power is calculated according to the response delay and compared with the target forward power, thereby providing a basis for the RF power supply to quickly and accurately perform closed-loop power adjustment at different output powers.

[0060] Example 2

[0061] like Figure 2 As shown, this embodiment is based on embodiment 1 and is further improved on the basis of embodiment 1. The high-precision control method of high-power pulse output power in this embodiment includes the following steps:

[0062] S1: The device (i.e., high-power RF power supply) acquires power data in the RF power normal transmission mode, acquires K power point data, and uses the square cumulative sum of N consecutive ADC sampling data to represent the output power value of the device at each power point, and forms a device power acquisition table, which is a correspondence table between power-related parameters in each link of the device and the corresponding output power, wherein the parameters in each link mainly include gate voltage, drain voltage, link gain and other parameters;

[0063] S2: The device can be configured through ARM to output the signal frequency, the pulse frequency and pulse duty cycle of the output signal, and the pulse output power is P o FPGA uses the power mapping algorithm to calculate the values ​​of various link parameters when the output power is Po according to the data in the corresponding relationship table of the device power acquisition, configures various link parameters, and turns on the RF output;

[0064] S3: Power detection, real-time acquisition of FWD, RFL and TXFB signal data through FPGA control of high-speed ADC;

[0065] S4: High-speed ADC collects FWD, RFL and TXFB signal data, and FPGA frequency shifts and filters these data, and uses the square accumulation sum of N consecutive ADC sampling data to represent the signal power value;

[0066] Among them, the FWD and RFL signal data are the forward power FWD and reflected power RFL of the RF small signal after the PA power amplification output, the coupling detection circuit couples the PA output power signal, and then the FWD and RFL power data are collected by the high-speed ADC after the feedback FB link; the TXFB signal data is the TXFB signal power data collected by the high-speed ADC after the RF small signal passes through the TX feedback FBTX link.

[0067] S5: FPGA synchronously selects the effective FWD, RFL and TXFB signal power data sampled by the ADC according to the edge of the pulse signal. The sampled data when the output signal is turned off is invalid.

[0068] S6: Analyze the power change trend data of the TXFB signal sampled by the high-speed ADC through FPGA, and use the power change of the TXFB signal multiplied by the correction factor to correct the forward power FWD data output by the RF PA circuit collected by the feedback link in real time. The corrected forward power FWD data removes the influence of high-speed ADC sampling and noise floor changes, and can more accurately reflect the output power of the RF PA circuit.

[0069] S7: FPGA analyzes the power data change trend of the TXFB signal and the corrected FWD signal, and estimates the response delay T of the RF PA circuit. pdSpecifically, the two signals TXFB and FWD sampled by the high-speed ADC in real time are correlated, and the peak position is obtained based on the correlation operation result. The number of sample points of the FWD signal delayed relative to the TXFB signal can be known. Combined with the sampling clock period, the response delay of the PA circuit can be calculated, providing a basis for the device to quickly and accurately perform closed-loop power adjustment at different output powers.

[0070] S8: FPGA calculation delay T pd The forward power P output by the rear device fwd and reflected power P rfl , record the current forward power P fwd The power value is P current , the target forward power is P o , the allowable power deviation is deltP;

[0071] S9: Determine whether the output power of the device meets the requirements, that is, whether it is within P o ±deltP range; if P current In P o If the output power of the device meets the requirement, the process returns to S3 and continues to execute the subsequent steps. Otherwise, the process goes to step S10.

[0072] S10: The device performs closed-loop power control. According to the data table of the power data obtained by the S1 device, the FPGA calculates the relevant control parameters through the power mapping algorithm, adjusts the link parameters, and then returns to S3 to continue to execute subsequent steps.

[0073] Among them, step S1, each power point uses the square accumulation sum of N continuous ADC sampling data to represent the output power value of the device, and the value of N should be appropriate, taking into account the requirements of fast response and numerical stability of the square accumulation sum of sampling data; the device performs power sampling at K points in the RF power constant transmission mode, and the value of K should be appropriate. The piecewise linear interpolation of the power sampling data at K points can represent the power within the output power range of the RF power supply.

[0074] Step S2, the main control machine configures the output signal frequency, the pulse frequency, pulse duty cycle, output power and pulse working mode of the output signal through the communication control interface; the ARM configures the FPGA parameters according to the received output signal frequency, the pulse frequency, pulse duty cycle, output power and pulse working mode configuration information of the output signal; the FPGA controls the signal transmission, including the signal frequency, the pulse frequency and pulse duty cycle of the signal; the FPGA calculates the initial value of the control parameter according to the configured output power through the power mapping algorithm, and the voltage amplitude of the control parameter controls the size of the signal output power.

[0075] In steps S3 and S4, the power detection circuit of S3 suppresses interference signals outside the frequency band through the filter of the analog part of the high-precision feedback sampling circuit; S4 performs secondary filtering on the interference signal through FPGA digital domain frequency shift and bandpass filter to further suppress interference signals outside the frequency band. This process removes the influence of stray signals within the sampling bandwidth, realizes the signal frequency selection within the sampling bandwidth, and the data can more accurately reflect the power value of the output signal.

[0076] Step S5, FPGA synchronously selects valid ADC sampled TXFB and FWD signal data according to the pulse signal edge. The sampled data when the output signal is turned off is invalid. Only valid ADC sampled TXFB and FWD signal data are used for analysis, calculation and adjustment.

[0077] Step S6, the forward power FWD data output by the RF PA circuit collected by the feedback link is corrected in real time by the power change trend data of the TXFB signal sampled by the high-speed ADC. The corrected forward power FWD data removes the influence of high-speed ADC sampling and noise floor changes, and can more accurately reflect the output power of the RF PA circuit.

[0078] Step S7, by comparing and analyzing the power change trends of the two signals TXFB and FWD sampled in real time by the high-speed ADC, the response delay of the RF PA circuit can be calculated, providing a basis for the device to quickly and accurately perform closed-loop power adjustment at different output powers.

[0079] In steps S5, S6 and S7, the FPGA selects the effective ADC sampled TXFB and FWD signal data synchronously according to the pulse signal edge, uses the power change trend data of the TXFB signal to correct the FWD power data in real time, and compares and analyzes the TXFB and FWD signal data processed by the FPGA. After analyzing several pulse cycles, the response delay T of the RF PA circuit can be estimated. pd , FPGA in the subsequent cycle according to the delay T pd Start closed-loop adjustment of the device output power. Using the above method, the power control accuracy and response time of the device in pulse mode can reach the same level as that in regular mode.

[0080] The pulses of the above-mentioned high-power pulse output power are pulse signals generated inside the device, which adopt an internal pulse mode. Optionally, the pulse signal can also be an external pulse signal. The external pulse signal enters the FPGA after level conversion to perform pulse signal frequency and duty cycle analysis. The FPGA detects that the frequency and duty cycle of the external pulse signal meet the locking conditions, that is, the frequency and duty cycle of the external pulse signal are within the range supported by the device pulse parameters, and the external pulse signal is continuously detected within a certain period of time, and its frequency and duty cycle are stable. Then, the pulse frequency and duty cycle of the output signal can be synchronized to this locked pulse signal. The power control accuracy of the external pulse signal and the internal pulse signal is equivalent.

[0081] The high-precision control method of high-power pulse output power is applied to RF power control. The FPGA is sampling at high speed and calculating the reflected power output by the device in real time. When the reflected power exceeds the threshold value, the FPGA calculates the forward output power value when the reflected power of the device is maintained at the threshold value based on the current VSWR value. The FPGA then calculates and immediately adjusts the link parameters based on this forward power value to reduce the forward output power of the device so that the reflected power output of the device does not exceed the allowable threshold value, thereby avoiding the problem of power amplifier failure caused by excessive reflected power of the RF power supply under mismatch conditions.

[0082] This embodiment acquires power data in the power constant mode, configures the device output signal frequency, pulse frequency, duty cycle, and output power P o , configure the various parameters of the link through the power mapping algorithm and turn on the RF output; FPGA controls the high-speed ADC to collect the feedback TXFB, FWD and RFL signals in real time, select the effective TXFB, FWD and RFL signal data synchronously according to the pulse signal edge, use the power change trend data of the TXFB signal to correct the FWD power data in real time, compare and analyze the TXFB and FWD signal data, and estimate the response delay T of the RF PA circuit. pd , considering T pd Get a more accurate P out Real-time power value; calculate the deviation power value, calculate the voltage value that needs to be adjusted for the control parameter through the power mapping algorithm, and the FPGA adjusts this output voltage to adjust the power of the output signal, so as to achieve the purpose of accurately controlling the pulse output power. After the regulation of the present invention, the control accuracy and response time of the pulse output power of the RF power supply can reach a level equivalent to that in the normal mode within the range of pulse frequency 1Hz to 50kHz and duty cycle 1% to 99%, thereby improving the detection accuracy, response time and control accuracy of the RF power supply product; and the control method of the present invention can perform reflected power alarm protection in real time through FPGA, and the output power adjustment response speed is fast, avoiding the problem of overexcitation and excessive reflected power under mismatch conditions that easily leads to failure of the power amplifier tube, thereby improving the application reliability of the RF power supply product.

[0083] Example 3

[0084] In order to implement the above method embodiment, the present invention also provides a high-precision power control system for high-power pulse output of a radio frequency power supply, such as Figure 3 As shown, the system includes:

[0085] The detection circuit is used to couple the transmission signal of the high-power radio frequency power supply after being amplified by the radio frequency transmission circuit to obtain a coupled signal;

[0086] The high-speed analog-to-digital conversion module is used to collect the RF transmission signal before the RF transmission circuit power amplifier to obtain the transmission feedback signal TXFB, and collect the coupling signal of the detection circuit to obtain the forward power feedback signal FWD and the reflected power feedback signal RFL of the RF transmission signal;

[0087] The FPGA control module is used to process the collected TXFB, FWD and RFL and calculate the power values ​​of each signal; select the effective signal power values ​​of TXFB, FWD and RFL according to the edge synchronization of the pulse signal output by the control RF transmission circuit; correct the signal power value of FWD according to the signal power value of TXFB; analyze the change trend of the signal power value of TXFB and the corrected FWD, and estimate the response delay T of TXFB after passing through the power amplifier circuit pd ; Calculate the delay T pd The forward power P output by the rear RF power supply fwd and reflected power P rfl , the current forward power is P current , the preset target forward power is P o , the allowable power deviation is ΔP; if P current In P o If the output power is within the range of ±ΔP, it meets the requirement, otherwise the closed-loop power adjustment will continue.

[0088] Furthermore, the system also includes a first signal conditioning module, which is connected between the RF transmitting circuit and the high-speed analog-to-digital conversion module, and is used to first process the RF transmitting signal before the RF transmitting circuit power amplifier, and then output it to the high-speed analog-to-digital conversion module for collection.

[0089] The system also includes a second signal conditioning module connected between the detection circuit and the high-speed analog-to-digital conversion module, which is used to process the coupled signal first and then output it to the high-speed analog-to-digital conversion module for collection.

[0090] The FPGA control module is also used to calculate the forward output power value when the signal power value of the RF power supply RFL is maintained at the preset threshold value based on the current VSWR standing wave ratio value when the signal power value of the RFL exceeds the preset threshold value, and then calculate and adjust the link parameters based on this forward power value to reduce the forward output power of the RF power supply until the signal power value of the RFL is within the allowable preset threshold value.

[0091] The FPGA control module is also used to receive the external pulse signal after level conversion, and analyze the pulse signal frequency and duty cycle. When it is detected that the frequency and duty cycle of the external pulse signal meet the locking conditions, and the external pulse signal is continuously detected within a certain period of time, and its frequency and duty cycle are stable, the pulse frequency and duty cycle of the RF power supply output signal are synchronized to the locked pulse signal.

[0092] The various modules of the system are mainly used to implement the steps of the above method embodiment, which will not be described one by one here.

[0093] It should be pointed out that, according to the needs of implementation, the various steps / components described in this application can be split into more steps / components, and two or more steps / components or partial operations of steps / components can be combined into new steps / components to achieve the purpose of the present invention.

[0094] The order of execution of each step in the above embodiment does not mean the order of execution. The order of execution of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiment of the present application.

[0095] It should be understood that those skilled in the art can make improvements or changes based on the above description, and all these improvements and changes should fall within the scope of protection of the appended claims of the present invention.

Claims

1. A high-precision power control method for high-power pulse output of a radio frequency power supply, characterized in that: The following steps are involved: The RF transmission signal before the power amplifier of the RF transmission circuit in the high-power RF power supply is collected to obtain the transmission feedback signal TXFB, and the coupling signal of the detection circuit is collected to obtain the forward power feedback signal FWD and the reflected power feedback signal RFL of the RF transmission signal; wherein the coupling signal is obtained by coupling the transmission signal after the power amplifier of the RF transmission circuit through the detection circuit; Process the collected TXFB, FWD and RFL, and calculate the power values ​​of each signal; Select the effective signal power values ​​of TXFB, FWD and RFL synchronously according to the edge of the pulse signal output by the control RF transmission circuit; Correct the signal power value of FWD according to the signal power value of TXFB; Analyze the changing trend of the signal power values ​​of TXFB and the corrected FWD, and estimate the response delay of TXFB after the power amplifier circuit; calculate the current forward power after the response delay. If it is within the allowable range, the output power meets the requirements, otherwise continue to perform closed-loop power adjustment.

2. The high-precision power control method for high-power pulse output of a radio frequency power supply according to claim 1, characterized in that: The collected TXFB, FWD and RFL are specifically processed by frequency shifting and filtering.

3. The high-precision power control method for high-power pulse output of a radio frequency power supply according to claim 1, characterized in that: When the signal power value of RFL exceeds the preset threshold value, the forward output power value when the signal power value of the RF power supply RFL is maintained at the preset threshold value is calculated based on the current VSWR standing wave ratio value, and then the link parameters are calculated and adjusted based on this forward power value to reduce the forward output power of the RF power supply until the signal power value of RFL is within the allowable preset threshold value.

4. The high-precision power control method for high-power pulse output of a radio frequency power supply according to claim 1, characterized in that: The valid TXFB, FWD and RFL are the sampled data when the RF transmitting circuit in the RF power supply is turned on. The sampled data is invalid when it is turned off.

5. The high-precision power control method for high-power pulse output of a radio frequency power supply according to claim 1, characterized in that: Before collecting the signal, the steps include: according to the power acquisition table, using the power mapping algorithm to calculate when the output power value is P o The various parameter values ​​of the link in the RF power supply are obtained and configured; the generation process of the power acquisition table is as follows: the RF power supply acquires power in the RF power normal transmission mode, obtains K power point data, and each power point uses the square cumulative sum of N consecutive ADC sampling data to represent the output power value of the RF power supply, and generates a power acquisition table of the corresponding relationship between various parameters of the RF power supply and the output power.

6. The high-precision power control method for high-power pulse output of a radio frequency power supply according to claim 1, characterized in that: The calculation process of the current forward power is: Specific calculation response delay T pd The forward power output by the rear RF power supply is used as the current forward power P current , the preset target forward power is P o , the allowable power deviation is ΔP; if P current In P o If the output power is within the range of ±ΔP, it meets the requirement, otherwise the closed-loop power adjustment will continue.

7. A high-precision power control system for high-power pulse output of a radio frequency power supply, characterized in that: include: The detection circuit is used to couple the transmission signal of the high-power radio frequency power supply after being amplified by the radio frequency transmission circuit to obtain a coupled signal; The high-speed analog-to-digital conversion module is used to collect the RF transmission signal before the RF transmission circuit power amplifier to obtain the transmission feedback signal TXFB, and collect the coupling signal of the detection circuit to obtain the forward power feedback signal FWD and the reflected power feedback signal RFL of the RF transmission signal; The FPGA control module is used to process the collected TXFB, FWD and RFL and calculate the power values ​​of each signal; select the effective signal power values ​​of TXFB, FWD and RFL according to the edge synchronization of the pulse signal output by the control RF transmission circuit; correct the signal power value of FWD according to the signal power value of TXFB; analyze the change trend of the signal power values ​​of TXFB and the corrected FWD, and estimate the response delay of TXFB after the power amplifier circuit; calculate the current forward power after the response delay. If it is within the allowable range, the output power meets the requirements, otherwise continue to perform closed-loop power adjustment.

8. The high-precision power control system for high-power pulse output of a radio frequency power supply according to claim 7, characterized in that: The system also includes a first signal conditioning module, which is connected between the RF transmitting circuit and the high-speed analog-to-digital conversion module, and is used to process the RF transmitting signal before the RF transmitting circuit power amplifier, and then output it to the high-speed analog-to-digital conversion module for collection.

9. The high-precision power control system for high-power pulse output of a radio frequency power supply according to claim 7, characterized in that: The system also includes a second signal conditioning module connected between the detection circuit and the high-speed analog-to-digital conversion module, which is used to process the coupled signal first and then output it to the high-speed analog-to-digital conversion module for collection.

10. The high-precision power control system for high-power pulse output of a radio frequency power supply according to claim 7, characterized in that: The FPGA control module is also used to receive the external pulse signal after level conversion, and analyze the pulse signal frequency and duty cycle. When it is detected that the frequency and duty cycle of the external pulse signal meet the locking conditions, and the external pulse signal is continuously detected within a certain period of time, and its frequency and duty cycle are stable, the pulse frequency and duty cycle of the RF power supply output signal are synchronized to the locked pulse signal.

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