SAS / SATA protocol-based dial link drop method and device, computer equipment and storage medium

Abstract

The invention relates to the technical field of data communication interfaces, and discloses an SAS / SATA protocol-based dial link drop method and device, computer equipment and a storage medium, the method is used for target equipment, and the method comprises the following steps: detecting the equipment type of the target equipment; when the physical coding sub-layer of the target equipment is in a physical layer ready state, detecting a receiving state of an indication signal corresponding to the equipment type of the target equipment in real time; and if the receiving state of the indication signal corresponding to the device type of the target device meets the link drop condition of the device type, triggering the physical coding sub-layer to drop the link from the physical layer ready state. According to the invention, a dial-off link function based on the SAS / SATA protocol is realized, the problem that the physical coding sub-layer does not drop the link after dial-off is solved, and the reliability and the stability of serial communication are improved.

Description

Technical Field

[0001] The present invention relates to the technical field of data communication interfaces, and in particular to a method and device for disconnecting a disk based on a SAS / SATA protocol, a computer device and a storage medium. Background Art

[0002] Serial Attached SCSI (SAS) is a new generation of SCSI technology. Compared with traditional parallel SCSI, it has better transmission speed, longer transmission distance, and stronger anti-interference ability. SAS hard disk is the mainstream enterprise-level storage method, such as data centers, servers, etc. Serial ATA (SATA) is also a hard disk interface technology based on serial communication protocol. SATA hard disk is widely used in personal computers, consumer electronics and other fields. Among them, SAS interface technology is backward compatible with SATA, which is mainly reflected in the physical layer (Phy layer), that is, SATA can be used in the SAS topology.

[0003] Hot-swap testing is an essential part of SAS / SATA chips. However, when hot-swap testing of SAS and SATA disks is performed on FPGA or ASIC, if it is in 8b / 10b mode (8b10b encoding and decoding is used for speeds other than 22.5G), after the disk is unplugged, the physical coding sublayer (Pcs) is likely to remain in the Phyready state without link drop. This not only violates the requirements of testers, but also affects the reliability of the chip, resulting in fatal I / O errors in the application layer. Although the existing SPL-5 protocol defines the complete process of link establishment for SAS and SATA interfaces, it does not take into account the diversity of SerDes (SERializer / DESerializer). In the Phyready state, different SerDes may have different performances after unplugging the disk, and the SPL-5 protocol only stipulates the link drop conditions from the perspective of Pcs, and does not cover all possible SerDes situations. Summary of the invention

[0004] In view of this, the present invention provides a method, device, computer equipment and storage medium for disconnecting a disk after unplugging the disk based on the SAS / SATA protocol, so as to solve the problem that the physical coding sublayer does not disconnect the link after unplugging the disk.

[0005] In a first aspect, the present invention provides a method for disconnecting a disk by unplugging it based on the SAS / SATA protocol, the method being used for a target device, the method comprising: detecting the device type of the target device; when the physical coding sublayer of the target device is in a physical layer ready state, detecting in real time the reception state of an indication signal corresponding to the device type of the target device; if the reception state of the indication signal corresponding to the device type of the target device meets the disconnection condition of the device type, triggering the physical coding sublayer to disconnect from the physical layer ready state.

[0006] In an optional embodiment, when the indication signal is a K code; if the reception status of the indication signal corresponding to the device type of the target device meets the disconnection condition of the device type, the physical coding sublayer is triggered to disconnect from the physical layer ready state, including: if the K code is not detected after the physical coding sublayer enters the physical layer ready state for the first preset time, the physical coding sublayer is triggered to disconnect from the physical layer ready state.

[0007] In an optional embodiment, when the indication signal is an electrical indication signal; the electrical indication signal represents whether the SerDes is in an electrical idle state; if the reception status of the indication signal corresponding to the device type of the target device satisfies the disconnection condition of the device type, the physical coding sublayer is triggered to disconnect from the physical layer ready state, including: if the SerDes is in an electrical idle state for more than a second preset time, the physical coding sublayer is triggered to disconnect from the physical layer ready state.

[0008] In an optional embodiment, if the reception status of the indication signal corresponding to the device type of the target device meets the disconnection condition of the device type, the physical coding sublayer is triggered to disconnect from the physical layer ready state, including: detecting the K code and the electrical indication signal at the same time, if the K code is not detected after the physical coding sublayer enters the physical layer ready state after a first preset time or the SerDes is in an electrical idle state for more than a second preset time, the physical coding sublayer is triggered to disconnect from the physical layer ready state.

[0009] In an optional implementation, the first preset time and the second preset time are configured via a register.

[0010] In an optional embodiment, the indication signal is a K code; real-time detection of the reception status of the indication signal corresponding to the device type of the target device includes: based on a preset protocol, receiving a data alignment signal every third preset time; detecting the K code from the data alignment signal.

[0011] In an optional implementation, when the physical coding sublayer is disconnected from the physical layer ready state, the physical coding sublayer is reset.

[0012] In a second aspect, the present invention provides a disk unplugging and link dropping device based on the SAS / SATA protocol, the device comprising: a device detection module, used to detect the device type of the target device; a signal detection module, used to detect the receiving state of the indication signal corresponding to the device type of the target device in real time when the physical coding sublayer of the target device is in the physical layer ready state; and a link dropping trigger module, used to trigger the physical coding sublayer to drop the link from the physical layer ready state if the receiving state of the indication signal corresponding to the device type of the target device meets the link dropping condition of the device type.

[0013] In an optional implementation, the device detection module is also used for the device type of the target device to be FPGA or ASIC.

[0014] In an optional embodiment, when the device type is FPGA, the indication signal is a K code; the link drop trigger module includes: an FPGA link drop unit, which is used to trigger the physical coding sublayer to drop the link from the physical layer ready state if the K code is not detected after the physical coding sublayer enters the physical layer ready state for a first preset time.

[0015] In an optional embodiment, when the device type is ASIC, the indication signal is an electrical indication signal; the electrical indication signal represents whether the SerDes is in an electrical idle state; the link drop trigger module also includes: an ASIC link drop unit, which is used to trigger the physical coding sublayer to drop the link from the physical layer ready state if the SerDes is in an electrical idle state for more than a second preset time.

[0016] In an optional implementation, the link-off triggering module further includes: a time configuration unit, configured to configure the first preset time and the second preset time through a register.

[0017] In an optional implementation, the indication signal is a K code; the signal detection module includes: a first K code acquisition unit, used to receive a data alignment signal every third preset time based on a preset protocol; and a second K code acquisition unit, used to detect the K code from the data alignment signal.

[0018] In an optional implementation, the device further includes: a resetting unit, configured to reset the physical coding sublayer when the physical coding sublayer is disconnected from the physical layer ready state.

[0019] On the other hand, the present invention provides a computer device, including: a memory and a processor, the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the computer instructions to execute a method for removing a disk from the chain based on the SAS / SATA protocol according to the first aspect or any corresponding embodiment thereof.

[0020] On the other hand, the present invention provides a computer-readable storage medium having computer instructions stored thereon, the computer instructions being used to enable a computer to execute a method for removing a disk from a connection based on the SAS / SATA protocol according to the first aspect or any corresponding embodiment thereof.

[0021] In yet another aspect, the present invention provides a computer program product, including computer instructions for causing a computer to execute a method for removing a disk from a computer based on the SAS / SATA protocol according to the first aspect or any corresponding implementation manner thereof.

[0022] The technical solution provided by this application may have the following beneficial effects:

[0023] Detect the device type of the target device to provide a basis for subsequent steps. When the physical coding sublayer of the target device is in the physical layer ready state, the receiving state of the indication signal corresponding to the device type of the target device is detected in real time. The indication signal can reflect the state change of the SerDes after the disk is unplugged, and determine whether the physical coding sublayer should trigger the link drop operation. If the receiving state of the indication signal corresponding to the device type of the target device meets the link drop condition of the device type, the physical coding sublayer is triggered to drop the link from the physical layer ready state, ensuring that the physical coding sublayer can drop the link in time in various SerDes situations, thereby avoiding unnecessary I / O errors and improving chip reliability. The above scheme realizes the unplugging link drop function based on the SAS / SATA protocol by detecting whether the receiving state of the indication signal meets the link drop condition of the device type, solves the problem that the physical coding sublayer does not drop the link after the disk is unplugged, and improves the reliability and stability of serial communication. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0025] Figure 1 It is a flowchart of a method for disconnecting a disk based on the SAS / SATA protocol according to an embodiment of the present invention;

[0026] Figure 2 This is a schematic diagram of a SAS disk / SATA disk unplugging operation according to an embodiment of the present invention;

[0027] Figure 3 It is a structural block diagram of a disk unplugging and disconnecting device based on SAS / SATA protocol according to an embodiment of the present invention;

[0028] Figure 4 It is a schematic diagram of the hardware structure of a computer device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0029] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0030] According to an embodiment of the present invention, an embodiment of a method for removing a disk from a connection based on the SAS / SATA protocol is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0031] In this embodiment, a method for disconnecting a disk based on the SAS / SATA protocol is provided, and the method is used for a target device. Figure 1 FIG. 1 is a flow chart of a method for disconnecting a disk based on a SAS / SATA protocol according to an embodiment of the present invention. Figure 1 As shown, the process includes the following steps:

[0032] Step S101, detecting the device type of the target device;

[0033] In the method of removing the disk and disconnecting the link based on the SAS / SATA protocol, it is first necessary to detect and obtain the type of the target device. As an example of the present invention, the target device takes FPGA (field programmable gate array) or ASIC (application-specific integrated circuit) as an example to more fully explain the steps of the method of removing the disk and disconnecting the link based on the SAS / SATA protocol provided by the specific implementation of the present invention, but the method disclosed by the present invention is not limited to the above two exemplary devices, and other device types that ordinary technicians in the field can directly think of based on the content of the specific implementation of the present invention are also applicable to this method.

[0034] Specifically, FPGA is a semiconductor device whose internal logic circuit can be configured through software programming, including a large number of programmable logic blocks (PLBs) and programmable interconnects, allowing users to define the functions and connections of logic blocks according to their needs. ASIC is an integrated circuit customized for a specific application or function, which can only perform one or several specific tasks.

[0035] The reasons why the physical coding sublayer does not drop the link after the SerDes of FPGA and ASIC is unplugged may be:

[0036] After unplugging the disk, the SerDes will return to the default value, which is unlikely to cause PCS 8b / 10b decoding errors; for example, when testing FPGA, Xilinx SerDes is used, and the default value returned is 40'haaaaaaaaaa;

[0037] For example, during ASIC testing, after unplugging the disk, although the RX on the local end is suspended, the TX on the local end is sending normal 8b / 10b data, which will interfere with the RX and cause the PCS to not drop the link.

[0038] Step S102: When the physical coding sublayer of the target device is in a physical layer ready state, a reception state of an indication signal corresponding to the device type of the target device is detected in real time.

[0039] When the physical coding sublayer of the target device is in the physical layer ready state, it is necessary to detect the receiving state of the indication signal corresponding to the target device type in real time. Among them, the physical coding sublayer is part of the SAS / SATA protocol stack, which is responsible for physically encoding the data transmitted from the upper layer for transmission on the physical link, and is also responsible for receiving the data on the physical link and decoding it, and then passing it to the upper layer. The physical layer ready state refers to the state in which the SAS / SATA interface has completed the connection and initialization on the physical layer and is ready for data transmission. The indication signal refers to a signal used to indicate a certain state or condition, and its receiving state represents the reception of the indication signal on the target device, including whether the signal is successfully received. The indication signal may come from the physical layer or a lower-level hardware interface, and is used to reflect the current connection status or data transmission status of the device. By monitoring these indication signals in real time, abnormal situations can be discovered in time, such as recognizing that the disk has been unplugged.

[0040] Step S103: If the reception status of the indication signal corresponding to the device type of the target device meets the disconnection condition of the device type, the physical coding sublayer is triggered to disconnect from the physical layer ready state.

[0041] When the physical coding sublayer is in the physical layer ready state, the connection may be accidentally disconnected due to various reasons (such as signal interference, equipment failure, etc.), which refers to the unplugging operation in the present invention. At this time, it is necessary to trigger the link drop operation.

[0042] When it is detected that the receiving status of the indication signal corresponding to the target device type meets the drop-link condition, the physical coding sublayer will be triggered to drop the link from the physical layer ready state. The drop-link operation refers to forcibly exiting the PCS from the physical layer ready state to prevent data transmission errors or system crashes caused by unstable connections. Drop-link conditions are defined according to device types and protocol standards (such as SPL-5), including signal loss, signal reset, electrical idle state, etc. After the drop-link operation is triggered, the resources associated with the device are released and prepared for the next connection or data transmission. The setting of the drop-link condition needs to be determined according to the device type and protocol standard to ensure the compatibility and reliability of the system. Optionally, before triggering the drop-link operation, some preprocessing work is performed, such as saving the current data status, notifying related modules, etc.

[0043] The disk unplugging and link dropping method based on the SAS / SATA protocol provided in this embodiment can timely trigger the link dropping operation when the device is unplugged by detecting whether the receiving status of the indication signal meets the link dropping condition of the device type, thereby reducing the risk of misjudgment and missed judgment, solving the problem that the physical coding sublayer does not drop the link after the disk is unplugged, and improving the reliability and stability of serial communication.

[0044] In an optional implementation, when the indication signal is a K code, the above step S103 includes the following steps:

[0045] Step S103A: if the K code is not detected after the physical coding sublayer enters the physical layer ready state for the first preset time, the physical coding sublayer is triggered to drop from the physical layer ready state.

[0046] K code is a special codeword used for synchronization, error detection or other specific purposes in serial communication. In SAS / SATA communication, K code may be used to indicate data alignment, synchronization status or other key information. By detecting the presence or absence of K code, it can be determined whether the link is stable. If the K code is not detected after the first preset time, it indicates that the link is disconnected or there are other problems, such as the device being unplugged, thus triggering the link disconnection. The first preset time is a configurable parameter used to set the maximum time to wait for the detection of K code.

[0047] Optionally, the K code (K28.5) in the SPL-5 protocol usually does not exist alone, and contains two data formats, dword and primitive, both of which are 4 bytes. There is a certain difference between dword and primitive. The first byte of primitive is the K code, and dword is pure data. Primitive is usually used for data synchronization at the PCS layer. The absence of primitive does not necessarily mean that there is a problem with the link or that synchronization has been lost. It is possible that the current link is sending and receiving dword. However, if the K code is not received after the second preset time (for example, the time corresponding to 128 dwords), the link is disconnected.

[0048] In an optional implementation, when the indication signal is an electrical indication signal; the electrical indication signal indicates whether the SerDes is in an electrical idle state; the above step S103 includes the following steps:

[0049] Step S103B: if the SerDes is in the electrical idle state for longer than a second preset time, the physical coding sublayer is triggered to disconnect from the physical layer ready state.

[0050] In serial communications, such as SAS and SATA, SerDes is responsible for converting parallel data into serial data for transmission, and converting serial data back to parallel data at the receiving end. When a device communicates with the system through SerDes, if the device is unplugged, SerDes may enter an electrical idle state, that is, a state where no data is transmitted. By detecting the electrical idle state, it can be determined whether the link is in an inactive state. In this embodiment, SerDes has an electrical indication signal to characterize whether it is in an electrical idle state, and the state of SerDes is determined by monitoring this indication signal. If the SerDes continues to be in an electrical idle state after a preset time, it means that the device has been unplugged or the link has been interrupted, thereby triggering a link drop. The second preset time is a configurable parameter used to set the maximum time that the SerDes waits in the electrical idle state.

[0051] This implementation adds an additional detection mechanism to ensure that the physical coding sublayer drops out of the physical layer ready state at an appropriate time, thereby improving the reliability and stability of serial communication.

[0052] In an optional embodiment, the above step S103 also includes: detecting the K code and the electrical indication signal at the same time, if the K code cannot be detected after the physical coding sublayer enters the physical layer ready state after the first preset time is met or the SerDes is in the electrical idle state for more than the second preset time, the physical coding sublayer is triggered to drop the link from the physical layer ready state.

[0053] Two detection processes are started at the same time: K code detection and electrical idle state detection. In these two detection processes, as long as any one of the detection conditions is met (i.e. the physical coding sublayer fails to detect the K code after entering the physical layer ready state for the first preset time, or the SerDes is in the electrical idle state for more than the second preset time), the physical coding sublayer is triggered to drop from the physical layer ready state.

[0054] This implementation ensures that the link status change can be responded to quickly, thereby improving the reliability and stability of serial communication.

[0055] Furthermore, the first preset time and the second preset time are configured through a register.

[0056] The first preset time and the second preset time are configured through registers. In the scenario of FPGA devices, the timing starts when the physical coding sublayer enters the physical layer ready state. If the K code is not detected within the set first preset time, the physical coding sublayer will be triggered to drop from the physical layer ready state. In the scenario of ASIC devices, monitor whether the SerDes is in the electrical idle state. If the SerDes continues to be in the electrical idle state within the set second preset time, the physical coding sublayer will be triggered to drop from the physical layer ready state.

[0057] Optionally, the first preset time and the second preset time are not fixed and can be flexibly adjusted according to actual application scenarios and requirements. For example, in scenarios requiring rapid response, the preset time can be shortened; and in scenarios requiring higher stability, the preset time can be appropriately extended.

[0058] In this implementation, the first preset time and the second preset time are configured by a register, and can be flexibly adjusted according to different application scenarios and requirements, thereby improving the flexibility of serial communication.

[0059] In an optional implementation, the indication signal is a K code; the above step S102 includes the following steps:

[0060] Step a11: receiving a data alignment signal every third preset time based on a preset protocol.

[0061] The data alignment signal is sent periodically to maintain the correct alignment of the data during data transmission. The third preset time refers to the interval time for sending the data alignment signal, which is a configurable parameter, configured according to the SAS / SATA protocol requirements, and is related to the period of the data alignment signal. For example, the Align primitive is used to implement data alignment during data transmission or storage, including specific patterns or identifiers so that the receiving end can identify and align the data. The SPL-5 protocol stipulates that the upper layer inserts an Align primitive once every 128Dwords corresponding time, and the Align primitive contains a K code.

[0062] Step a12, detecting the K code from the data alignment signal.

[0063] After receiving the data alignment signal, it is analyzed and processed to detect whether it contains the K code. The detection process may involve bit-level operations such as bit synchronization, bit counting, pattern matching, etc.

[0064] In this implementation manner, by setting the third preset time and detecting the K code, data alignment and synchronization can be effectively performed to ensure the accuracy and reliability of data transmission.

[0065] Optionally, the first preset time is greater than or equal to the third preset time, indicating that at least one data alignment signal will be received within the time window of waiting for detecting the K code, thereby improving the reliability of K code detection.

[0066] Specifically, in an embodiment of the present invention, Figure 2 As shown in the figure, the SAS disk / SATA disk is unplugged at positions ① and ②. To solve the problem of unplugging the disk without losing the connection, the present invention proposes two solutions:

[0067] Regarding the problem on FPGA: The SPL-5 protocol stipulates that the SerDes upper layer inserts an Align primitive every 128Dwords of time, and adds a K code detection mechanism to the physical coding sublayer. When the physical layer is in the ready state, if the K code is not detected after a period of time (configurable by the register), the physical coding sublayer will automatically drop from the physical layer ready state.

[0068] Regarding the problem on ASIC: SerDes outputs an indication signal to the physical coding sublayer to indicate whether the SerDes is in an electrically idle state. When the physical coding sublayer detects that the SerDes is in an electrically idle state for a long time (register configurable), the physical coding sublayer will automatically drop the link from the physical layer ready state.

[0069] In an optional implementation, when the physical coding sublayer is disconnected from the physical layer ready state, the physical coding sublayer is reset.

[0070] After a link is lost, the physical coding sublayer is reset in order to clear possible error states and prepare to re-establish a connection. Optionally, the reset operation includes restoring the internal state of the physical coding sublayer to an initial state, clearing any pending errors or interrupts, and reinitializing necessary configuration parameters. When retrying to establish a connection, the physical coding sublayer will be in a known and stable state, helping to ensure the reliability of data transmission.

[0071] In this embodiment, a SAS / SATA protocol-based unplugging and disconnecting device is also provided, which is used to implement the above-mentioned embodiments and preferred implementation modes, and the descriptions that have been made will not be repeated. As used below, the term "module" can be a combination of software and / or hardware that implements a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and conceivable.

[0072] This embodiment provides a disk unplugging and disconnecting device based on SAS / SATA protocol, such as Figure 3 As shown, including:

[0073] A device detection module 301 is used to detect the device type of the target device;

[0074] The signal detection module 302 is used to detect the reception status of the indication signal corresponding to the device type of the target device in real time when the physical coding sublayer of the target device is in the physical layer ready state;

[0075] The link-off triggering module 303 is used to trigger the physical coding sublayer to drop the link from the physical layer ready state if the reception state of the indication signal corresponding to the device type of the target device meets the link-off condition of the device type.

[0076] In an optional implementation, when the indication signal is a K code, the link drop trigger module 303 includes:

[0077] The K code detection unit is used to trigger the physical coding sublayer to drop the link from the physical layer ready state if the K code cannot be detected after the physical coding sublayer enters the physical layer ready state for a first preset time.

[0078] In an optional implementation, when the indication signal is an electrical indication signal; the electrical indication signal indicates whether the SerDes is in an electrical idle state; the above-mentioned link drop trigger module 303 further includes:

[0079] The electrical detection unit is used to trigger the physical coding sublayer to drop the link from the physical layer ready state if the SerDes is in the electrical idle state for more than a second preset time.

[0080] In an optional implementation, the above-mentioned link drop triggering module 303 further includes:

[0081] The simultaneous detection unit is used to detect the K code and the electrical indication signal at the same time. If the K code cannot be detected after the physical coding sublayer enters the physical layer ready state for the first preset time or the SerDes is in the electrical idle state for more than the second preset time, the physical coding sublayer is triggered to drop the link from the physical layer ready state.

[0082] In an optional implementation, the above-mentioned link drop triggering module 303 further includes:

[0083] The time configuration unit is used to configure the first preset time and the second preset time through a register.

[0084] In an optional implementation, the indication signal is a K code; the signal detection module 302 includes:

[0085] A first K code acquisition unit, configured to receive a data alignment signal at a third preset time interval based on a preset protocol;

[0086] The second K code acquisition unit is used to detect the K code from the data alignment signal.

[0087] In an optional embodiment, the device further comprises:

[0088] The reset unit is used to reset the physical coding sublayer when the physical coding sublayer is disconnected from the physical layer ready state.

[0089] The further functional description of each of the above modules and units is the same as that of the above corresponding embodiments and will not be repeated here.

[0090] The SAS / SATA protocol-based disk unplugging and chain-dropping device in this embodiment is presented in the form of a functional unit, where the unit refers to an ASIC (Application Specific Integrated Circuit) circuit, a processor and memory that executes one or more software or fixed programs, and / or other devices that can provide the above functions.

[0091] The embodiment of the present invention also provides a computer device having the above Figure 3 The device for removing a disk from a drive based on the SAS / SATA protocol is shown.

[0092] See also Figure 4 , Figure 4 is a schematic diagram of the structure of a computer device provided by an optional embodiment of the present invention, such as Figure 4As shown, the computer device includes: one or more processors 10, a memory 20, and interfaces for connecting various components, including high-speed interfaces and low-speed interfaces. Various components are connected to each other using different buses for communication, and can be installed on a common mainboard or installed in other ways as needed. The processor can process the instructions executed in the computer device, including instructions stored in or on the memory to display the graphical information of the GUI on an external input / output device (such as, a display device coupled to the interface). In some optional embodiments, if necessary, multiple processors and / or multiple buses can be used together with multiple memories and multiple memories. Similarly, multiple computer devices can be connected, and each device provides some necessary operations (for example, as a server array, a group of blade servers, or a multi-processor system). Figure 4 A processor 10 is taken as an example.

[0093] The processor 10 may be a central processing unit, a network processor or a combination thereof. The processor 10 may further include a hardware chip. The hardware chip may be a dedicated integrated circuit, a programmable logic device or a combination thereof. The programmable logic device may be a complex programmable logic device, a field programmable gate array, a general purpose array logic or any combination thereof.

[0094] The memory 20 stores instructions executable by at least one processor 10, so that at least one processor 10 executes the method shown in the above embodiment.

[0095] The memory 20 may include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required for at least one function; the data storage area may store data created according to the use of the computer device, etc. In addition, the memory 20 may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage device. In some optional embodiments, the memory 20 may optionally include a memory remotely arranged relative to the processor 10, and these remote memories may be connected to the computer device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0096] The memory 20 may include a volatile memory, such as a random access memory; the memory may also include a non-volatile memory, such as a flash memory, a hard disk or a solid state drive; the memory 20 may also include a combination of the above types of memory.

[0097] The computer device further includes an input device 30 and an output device 40. The processor 10, the memory 20, the input device 30 and the output device 40 may be connected via a bus or other means, and FIG. X takes the bus connection as an example.

[0098] The input device 30 can receive input digital or character information, and generate key signal input related to the user settings and function control of the computer device, such as a touch screen, a keypad, a mouse, a track pad, a touch pad, an indicator bar, one or more mouse buttons, a trackball, a joystick, etc. The output device 40 may include a display device, an auxiliary lighting device (e.g., an LED) and a tactile feedback device (e.g., a vibration motor), etc. The above-mentioned display device includes but is not limited to a liquid crystal display, a light emitting diode, a display and a plasma display. In some optional embodiments, the display device can be a touch screen.

[0099] The embodiment of the present invention also provides a computer-readable storage medium. The method according to the embodiment of the present invention can be implemented in hardware, firmware, or can be implemented as a computer code that can be recorded in a storage medium, or can be implemented as a computer code that is originally stored in a remote storage medium or a non-temporary machine-readable storage medium and will be stored in a local storage medium through a network download, so that the method described herein can be stored in such software processing on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only storage memory, a random access memory, a flash memory, a hard disk or a solid-state hard disk, etc.; further, the storage medium can also include a combination of the above types of memories. It can be understood that a computer, a processor, a microprocessor controller, or programmable hardware includes a storage component that can store or receive software or computer code. When the software or computer code is accessed and executed by a computer, a processor, or hardware, the method shown in the above embodiment is implemented.

[0100] A portion of the embodiments of the present invention may be applied as a computer program product, such as a computer program instruction, which, when executed by a computer, can call or provide the method and / or technical solution according to the present invention through the operation of the computer. Those skilled in the art should understand that the existence of computer program instructions in a computer-readable medium includes, but is not limited to, source files, executable files, installation package files, etc., and accordingly, the way in which the computer program instructions are executed by the computer includes, but is not limited to: the computer directly executes the instruction, or the computer compiles the instruction and then executes the corresponding compiled program, or the computer reads and executes the instruction, or the computer reads and installs the instruction and then executes the corresponding installed program. Here, the computer-readable medium may be any available computer-readable storage medium or communication medium accessible to the computer.

[0101] Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations are all within the scope defined by the appended claims.

Claims

1. A method for disconnecting a disk by pulling out a disk based on the SAS / SATA protocol, characterized in that: The method is used for a target device, and the method comprises: Detect the device type of the target device; When the physical coding sublayer of the target device is in a physical layer ready state, detecting in real time a reception state of an indication signal corresponding to a device type of the target device; If the reception status of the indication signal corresponding to the device type of the target device meets the disconnection condition of the device type, the physical coding sublayer is triggered to disconnect from the physical layer ready state.

2. The method according to claim 1, characterized in that When the indication signal is a K code; If the reception state of the indication signal corresponding to the device type of the target device meets the disconnection condition of the device type, triggering the physical coding sublayer to disconnect from the physical layer ready state includes: If the K code is not detected after the physical coding sublayer enters the physical layer ready state for a first preset time, the physical coding sublayer is triggered to drop the link from the physical layer ready state.

3. The method according to claim 1, characterized in that When the indication signal is an electrical indication signal; the electrical indication signal indicates whether the SerDes is in an electrical idle state; If the reception state of the indication signal corresponding to the device type of the target device meets the disconnection condition of the device type, triggering the physical coding sublayer to disconnect from the physical layer ready state includes: If the SerDes is in the electrical idle state for more than a second preset time, the physical coding sublayer is triggered to disconnect from the physical layer ready state.

4. The method according to claim 2 or 3, characterized in that: If the reception state of the indication signal corresponding to the device type of the target device meets the disconnection condition of the device type, triggering the physical coding sublayer to disconnect from the physical layer ready state includes: The K code and the electrical indication signal are detected at the same time. If the K code cannot be detected after the physical coding sublayer enters the physical layer ready state for a first preset time or the SerDes is in an electrical idle state for more than a second preset time, the physical coding sublayer is triggered to drop from the physical layer ready state.

5. The method according to claim 2 or 3, characterized in that: The first preset time and the second preset time are configured through a register.

6. The method according to claim 2, characterized in that The indication signal is a K code; the real-time detection of the receiving state of the indication signal corresponding to the device type of the target device includes: Based on a preset protocol, receiving a data alignment signal every third preset time; The K code is detected from the data alignment signal.

7. The method according to claim 2 or 3, characterized in that: When the physical coding sublayer is disconnected from the physical layer ready state, the physical coding sublayer is reset.

8. A disk unplugging and disconnecting device based on SAS / SATA protocol, characterized in that: The device comprises: A device detection module, used to detect the device type of the target device; A signal detection module, used for detecting in real time the reception state of an indication signal corresponding to a device type of the target device when the physical coding sublayer of the target device is in a physical layer ready state; The link-off triggering module is used to trigger the physical coding sublayer to drop the link from the physical layer ready state if the reception state of the indication signal corresponding to the device type of the target device meets the link-off condition of the device type.

9. A computer device, characterized in that: include: A memory and a processor, wherein the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the method according to any one of claims 1 to 7 by executing the computer instructions.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a computer to execute the method according to any one of claims 1 to 7.

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