Ultra-wideband low-noise amplifier based on double-coupling structure

Abstract

The invention discloses an ultra-wideband low-noise amplifier based on a double-coupling structure, relates to the field of electronic devices, and is used for solving the problems of large occupied area and large noise coefficient of a distributed amplifier in the prior art. Comprising a broadband input matching network acting on a first-stage circuit, a transconductance enhancement coupling structure and an active bias structure; the parallel RC negative feedback structure and the series-parallel coupling inductance peaking structure act on the second-stage circuit; the transconductance enhancement coupling structure at least comprises a first transistor, a first microstrip line connected with a source electrode of the first transistor and a second microstrip line connected with a drain electrode of the first transistor, and the first microstrip line and the second microstrip line are mutually coupled. Part of drain electrode current signals are coupled to the source electrode to be secondarily amplified, the high-frequency gain of the first-stage circuit is effectively improved, post-stage noise can be restrained, meanwhile, minimum noise matching under high frequency is carried out through the source electrode degeneration inductor and the broadband input matching network, and the noise performance is excellent; and the area can be saved.

Description

Technical Field

[0001] The invention relates to the technical field of electronic devices, and in particular to an ultra-wideband low-noise amplifier based on a double-coupling structure. Background Art

[0002] The advent of informatization has promoted the development of communication systems, and wireless communication systems are increasingly widely used around the world. People's demand for high-speed data transmission in wireless communications is also increasing. Driven by this, the performance requirements of the RF front end of the communication system are also getting higher and higher. As the first stage of the RF front-end receiving chip, the performance of the low noise amplifier directly affects the working bandwidth, noise figure, dynamic range, sensitivity and other indicators of the entire receiving system.

[0003] The bandwidth characteristics of the low-noise amplifier are closely related to the signal transmission quality of the RF front-end system. In the past, when multiple single-band devices were used in the same system, they often faced problems such as complex systems, large transmission losses, and high costs. However, the broadband low-noise amplifier can achieve impedance matching and noise matching over a wide frequency range, meeting the needs of modern communication systems for wide bandwidths. This allows it to be flexibly applied in different communication standards and application scenarios, improving the compatibility and adaptability of the equipment.

[0004] However, although the current distributed amplifiers have outstanding performance in expanding bandwidth, they do not have advantages in terms of noise and gain. Moreover, due to the use of a large number of artificial transmission lines and multi-stage amplification units, the distributed amplifiers occupy a large area.

[0005] Therefore, there is an urgent need to provide a more reliable ultra-wideband low-noise amplifier based on a dual-coupled structure. Summary of the invention

[0006] The object of the present invention is to provide an ultra-wideband low noise amplifier based on a dual-coupling structure, which is used to solve the problems of large occupied area and large noise coefficient of the distributed amplifier in the prior art.

[0007] In order to achieve the above object, the present invention provides the following technical solutions:

[0008] In a first aspect, the present invention provides an ultra-wideband low noise amplifier based on a dual-coupling structure, wherein the ultra-wideband low noise amplifier is a multi-stage cascade amplifier, comprising at least:

[0009] A broadband input matching network, a transconductance enhanced coupling structure, and an active bias structure acting on the first stage circuit;

[0010] and a parallel RC negative feedback structure and a series-parallel coupled inductor peaking structure acting on the second stage circuit;

[0011] The transconductance enhanced coupling structure at least includes a first transistor, a first microstrip line connected to the source of the first transistor, and a second microstrip line connected to the drain of the first transistor, and the first microstrip line and the second microstrip line are coupled to each other.

[0012] Optionally, the first stage circuit is a common source amplifier circuit with a source degeneration inductor formed by a first transistor and a first microstrip line;

[0013] The second stage circuit is a common-source and common-gate amplifier circuit formed by a second transistor and a third transistor; the second transistor is a common-source stage, and the third transistor is a common-gate stage.

[0014] Optionally, the ultra-wideband low noise amplifier further includes:

[0015] An inter-stage matching network; the inter-stage matching network comprises a third inductor, a fourth inductor, a second capacitor and a third capacitor;

[0016] The broadband input matching network includes a first inductor, a second inductor, a first capacitor and a parasitic capacitor of the first transistor;

[0017] The active bias structure includes a fourth transistor, a second resistor, a third resistor and a sixth capacitor;

[0018] The parallel RC negative feedback structure includes a first resistor and a fourth capacitor;

[0019] The series-parallel coupled inductor peaking structure includes a fifth inductor and a sixth inductor.

[0020] Optionally, the first capacitor in the broadband input matching network is a DC blocking capacitor; one end of the first capacitor is connected to the RF input port, and the other end of the first capacitor is connected to the gate of the first transistor; the first capacitor is connected in series with the first inductor, and the other end of the first inductor is connected to the gate of the first transistor; one end of the second inductor is connected to the gate of the first transistor, and the other end of the second inductor is connected to the bias voltage node; the first inductor is a matching inductor, and the second inductor is a bias inductor.

[0021] Optionally, one end of the second microstrip line in the transconductance enhanced coupling structure is connected to the drain of the first transistor, the other end of the second microstrip line is connected to one end of the second capacitor, and the other end of the second microstrip line is also connected to one end of the third inductor;

[0022] The first microstrip line and the second microstrip line are both double-layer microstrip lines with the same width, parallel and closely spaced, and coupled to each other; the second capacitor is an inter-stage DC capacitor.

[0023] Optionally, the source of the fourth transistor in the active bias structure is grounded, and the fourth transistor is used for dynamic voltage division;

[0024] The gate of the fourth transistor is connected to the source through the second resistor, and the drain of the fourth transistor is connected to the bias voltage node; one end of the third resistor is connected to the bias voltage node, and the other end of the third resistor is connected to a DC power supply;

[0025] One end of the sixth capacitor is grounded, and the other end of the sixth capacitor is connected to the bias voltage node.

[0026] Optionally, one end of the second capacitor in the inter-stage matching network is connected to one end of the second microstrip line, and the other end of the second capacitor is connected to one end of the fourth inductor; the other end of the fourth inductor is connected to the gate of the second transistor;

[0027] One end of the third inductor is connected to one end of the second microstrip line and one end of the second capacitor respectively, and the other end of the third inductor is connected to the source of the second transistor; one end of the third capacitor is connected to the source of the second transistor, and the other end of the third capacitor is grounded.

[0028] Optionally, the parallel RC negative feedback structure connects the output end and the input end of the second stage circuit through the first resistor and the fourth capacitor;

[0029] One end of the first resistor is connected to the gate of the second transistor, the other end of the first resistor is connected to one end of the fourth capacitor, and the other end of the fourth capacitor is connected to the drain of the third transistor.

[0030] Optionally, the fifth inductor and the sixth inductor in the series-parallel coupled inductor peaking structure are located in the same layer, and the fifth inductor and the sixth inductor share one end, are closely arranged side by side, and are coupled to each other;

[0031] The other end of the fifth inductor is connected to one end of the fifth capacitor; the fifth capacitor is an output-end DC-isolating capacitor; the other end of the sixth inductor is connected to the DC power supply through a fifth resistor; and the fifth resistor is a series resistor.

[0032] Optionally, the inter-stage matching network includes a radio frequency signal path and a direct current signal path;

[0033] The radio frequency signal output by the first stage circuit enters the gate terminal of the second transistor through the second capacitor and the fourth inductor;

[0034] The RF signal at the source end of the second transistor reaches the ground through the third capacitor, and the DC signal at the source end of the second transistor enters the drain end of the first stage circuit through the third inductor connected in series for current multiplexing.

[0035] Compared with the prior art, the present invention provides an ultra-wideband low-noise amplifier based on a dual-coupling structure, which is a multi-stage cascade amplifier, and at least includes: a broadband input matching network, a transconductance enhanced coupling structure, and an active bias structure acting on the first-stage circuit; and a parallel RC negative feedback structure and a series-parallel coupled inductor peaking structure acting on the second-stage circuit; the transconductance enhanced coupling structure at least includes a first transistor, a first microstrip line connected to the source of the first transistor, and a second microstrip line connected to the drain of the first transistor, and the first microstrip line and the second microstrip line are coupled to each other. The above structure provided by the present invention applies the transconductance enhanced coupling structure to the first-stage circuit, and part of the drain current signal is coupled to the source and amplified twice, which effectively improves the high-frequency gain of the first-stage circuit, is conducive to suppressing the noise of the subsequent stage, and at the same time uses the source degeneration inductance and the broadband input matching network to perform minimum noise matching at high frequencies, and has excellent noise performance. In addition, the present invention adopts an active bias structure, which can play the role of process compensation, resistance to power supply voltage fluctuation and temperature compensation, and effectively solves the problem that the noise, gain and other performances of the common source amplifier are affected by environmental factors such as process, temperature and voltage; the second-stage circuit adopts deep negative feedback, series-parallel coupling peaking inductance, and current multiplexing technology, while improving the high-frequency gain of the second-stage circuit, suppressing the low-frequency gain of the second-stage circuit, so that the gain curve of the second-stage circuit shows a trend of increasing with frequency, which is complementary to the trend of the gain curve of the first-stage circuit, thereby achieving a wider bandwidth. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0037] Figure 1 A circuit diagram of an ultra-wideband low noise amplifier based on a dual-coupling structure provided by the present invention;

[0038] Figure 2 A schematic diagram of a small signal equivalent model of a common source transconductance enhanced coupling structure in an ultra-wideband low noise amplifier based on a dual coupling structure provided by the present invention;

[0039] Figure 3 A schematic diagram of the circuit structure of active bias in an ultra-wideband low-noise amplifier based on a dual-coupling structure provided by the present invention;

[0040] Figure 4 A schematic diagram of the coupling structure of series-parallel coupled peaking inductors in an ultra-wideband low-noise amplifier based on a dual-coupling structure provided by the present invention;

[0041] Figure 5A schematic diagram of an equivalent circuit structure of a series-parallel coupled peaking inductor in an ultra-wideband low-noise amplifier based on a dual-coupling structure provided by the present invention;

[0042] Figure 6 A noise coefficient simulation result diagram of an ultra-wideband low noise amplifier based on a dual-coupling structure provided by the present invention;

[0043] Figure 7 This is a gain simulation result diagram of an ultra-wideband low-noise amplifier based on a dual-coupling structure provided by the present invention.

[0044] Reference numerals:

[0045] 1-transconductance enhanced coupling structure, 2-series-parallel coupled inductor peaking structure, M1-first transistor, M2-second transistor, M3-third transistor, M4-fourth transistor, L1-first inductor, L2-second inductor, L3-third inductor, L4-fourth inductor, L5-fifth inductor, L6-sixth inductor, C1-first capacitor, C2-second capacitor, C3-third capacitor, C4-fourth capacitor, C5-fifth capacitor, C6-sixth capacitor, R1-first resistor, R2-second resistor, R3-third resistor, Ls-first microstrip line, Ld-second microstrip line, Vg1-bias voltage node, Vdd-DC power supply. DETAILED DESCRIPTION

[0046] In order to clearly describe the technical solutions of the embodiments of the present invention, in the embodiments of the present invention, words such as "first" and "second" are used to distinguish the same items or similar items with basically the same functions and effects. For example, the first threshold and the second threshold are only used to distinguish different thresholds, and their order is not limited. Those skilled in the art can understand that words such as "first" and "second" do not limit the quantity and execution order, and words such as "first" and "second" do not necessarily limit them to be different.

[0047] It should be noted that, in the present invention, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the present invention should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a specific way.

[0048] In the present invention, "at least one" means one or more, and "plurality" means two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the associated objects before and after are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b or c can mean: a, b, c, the combination of a and b, the combination of a and c, the combination of b and c, or the combination of a, b and c, where a, b, c can be single or multiple.

[0049] At present, the mainstream ultra-wideband low-noise amplifier adopts a distributed structure. The distributed amplifier uses artificial transmission lines to connect multiple parallel transistors. The transmission lines are used as absorption loads. By setting appropriate characteristic impedance, the distributed amplifier can work in a very wide frequency band. However, the distributed amplifier has the problems of low gain of a single amplification unit, thermal noise introduced by a large number of artificial transmission lines leading to deterioration of the noise coefficient, high overall power consumption, and large area. In addition to the distributed structure, balanced, lossy matching, negative feedback and other structures can also play a role in expanding the bandwidth: the balanced type uses a coupler to expand the bandwidth to twice the frequency, but there are problems of large occupied area and additional loss introduced by the coupler; the lossy matching type uses resistors in the matching network to achieve broadband matching, but at the same time it will introduce additional thermal noise; negative feedback technology expands the circuit equivalent to 3dB gain bandwidth by reducing part of the gain, but the disadvantage is that the feedback loop will introduce additional noise.

[0050] In recent years, low noise amplifiers have been developing towards high frequency and broadband. As the operating frequency of the amplifier increases, the noise and gain performance of the amplifier due to transistor parasitic effects become more and more obvious. Therefore, while expanding the bandwidth, suppressing high-frequency noise deterioration and improving high-frequency gain have become the key to designing broadband low noise amplifiers. Although distributed amplifiers have outstanding performance in expanding bandwidth, they do not have advantages in terms of noise and gain. Moreover, due to the use of a large number of artificial transmission lines and multi-stage amplification units, distributed amplifiers occupy a large area.

[0051] In order to solve the problems in the prior art, the present invention provides an ultra-wideband low noise amplifier based on a dual coupling structure. Next, the solution provided by the embodiment of this specification is described in conjunction with the accompanying drawings:

[0052] The present invention provides an ultra-wideband low-noise amplifier based on a dual-coupling structure, which can be a multi-stage cascade amplifier. The noise of the multi-stage cascade amplifier is mainly contributed by the first-stage circuit, and the gain of the first-stage circuit can effectively suppress the subsequent stage noise. Therefore, for the low-noise amplifier, the design of the first-stage circuit is particularly critical.

[0053] like Figure 1 As shown, an ultra-wideband low noise amplifier based on a dual-coupling structure provided by the present invention can be a multi-stage cascade amplifier and specifically can include the following structure:

[0054] A broadband input matching network, a transconductance enhanced coupling structure 1, and an active bias structure acting on the first stage circuit;

[0055] and a parallel RC negative feedback structure and a series-parallel coupled inductor peaking structure 2 acting on the second stage circuit;

[0056] The transconductance enhanced coupling structure 1 at least includes a first transistor M1, a first microstrip line Ls connected to the source of the first transistor M1, and a second microstrip line Ld connected to the drain of the first transistor M1, and the first microstrip line Ls and the second microstrip line Ld are coupled to each other.

[0057] More specifically, the first transistor M1 and the first microstrip line Ls in the first stage circuit constitute a common source amplifier circuit with source degeneration inductance, and the second transistor M2 and the third transistor M3 in the second stage circuit constitute a common source and common gate amplifier circuit, wherein the second transistor M2 is a common source stage and the third transistor M3 is a common gate stage.

[0058] The transistors used in the technical solution provided by the present invention are all pHEMT transistors.

[0059] Figure 1 In the above structure, the first-stage circuit adopts a common-source amplifier circuit with a transconductance enhanced coupling structure, which can couple part of the high-frequency signal at the drain end of the first transistor M1 to the source for secondary amplification. Compared with the traditional common-source structure, it has a higher high-frequency gain and can better suppress the subsequent noise; at the same time, the first microstrip line Ls is coupled to play the role of source degeneration inductance, taking into account both the noise coefficient and broadband input matching; the second-stage circuit adopts series-parallel coupled inductor peaking technology to neutralize and offset the parasitic capacitance of the transistor, compensate for the high-frequency gain, and expand the bandwidth; and combined with parallel RC negative feedback and current multiplexing technology, the second-stage circuit presents a gain trend that increases with frequency, which is complementary to the gain curve trend of the first-stage circuit, so that the overall circuit has a wider bandwidth.

[0060] based on Figure 1 The structural diagram of the present specification can further refine the specific structure of the ultra-wideband low noise amplifier based on the dual coupling structure provided by the present invention, which is described below.

[0061] In more detail, for Figure 1 The broadband input matching network in may specifically include a first capacitor C1, a first inductor L1 (matching inductor), a second inductor L2 (bias inductor) and a parasitic capacitance of a first transistor M1; the RF input port is connected to one end of the first capacitor C1, the first capacitor C1 is connected in series with the first inductor L1 (matching inductor), and the other end of the first inductor L1 (matching inductor) is connected to the gate of the first transistor M1; one end of the second inductor L2 (bias inductor) is connected to the gate of the first transistor M1, and the other end of the second inductor L2 (bias inductor) is connected to the bias voltage node Vg1.

[0062] The structure of the broadband input matching network above has the following effects:

[0063] Since the broadband input matching network is composed of LC passive devices, minimum noise matching at high frequencies can be performed by adjusting the LC value; the first microstrip line Ls can provide a real part for the input characteristic impedance, shortening the distance between the minimum noise matching point and the impedance matching point on the Smith chart, so that the broadband input matching network has good impedance matching within the broadband while satisfying the minimum noise matching.

[0064] for Figure 1 The transconductance enhanced coupling structure may specifically include a first transistor M1, a first microstrip line Ls, and a second microstrip line Ld, wherein one end of the second microstrip line Ld is connected to the drain of the first transistor M1, and the other end is simultaneously connected to one end of a second capacitor C2 (interstage coupling capacitor) and one end of a third inductor L3 (interstage choke inductor); the first microstrip line Ls and the second microstrip line Ld are both double-layer microstrip lines with the same width, parallel and closely juxtaposed, and coupled to each other.

[0065] The specific structural setting of the above transconductance enhanced coupling structure has the following corresponding effects:

[0066] The transconductance enhanced coupling structure 1 may include a first microstrip line Ls connecting the source of the common source pHMET transistor and a second microstrip line Ld connecting the drain of the common source pHMET transistor. The two sections of microstrip lines are close to each other and coupled to each other. At high frequencies, the small signal of part of the drain of the transistor can be coupled to the source for secondary amplification, and the equivalent transconductance of the transistor is enhanced. By reasonably selecting the length and coupling coefficient of the microstrip lines at both ends, the high-frequency gain of the first-stage circuit is improved to a certain extent. At the same time, the increase in the gain of the first-stage circuit can effectively suppress the noise of the subsequent stage, thereby reducing the high-frequency noise coefficient of the overall circuit.

[0067] for Figure 1The active bias structure in may specifically include a fourth transistor M4, a second resistor R2 (choke resistor), a third resistor R3 (voltage dividing resistor), and a sixth capacitor C6 (bypass capacitor), wherein the source of the fourth transistor M4 which plays a dynamic voltage dividing role is grounded, and the gate is connected to the source through the choke resistor-the second resistor R2, and the drain of the fourth transistor M4 is connected to the bias voltage node Vg1; one end of the third resistor R3 (voltage dividing resistor) is connected to the bias voltage node Vg1, and the other end is connected to the DC power supply Vdd; one end of the sixth capacitor C6 (bypass capacitor) is grounded, and the other end is connected to the bias voltage node Vg1.

[0068] The specific structural setting of the above active bias structure has the following corresponding effects:

[0069] The first-stage circuit (common-source amplifier circuit) adopts active bias, which can play the role of process compensation, resistance to power supply voltage fluctuation, and temperature compensation, and effectively solves the problem that the noise, gain and other performance of the common-source amplifier are affected by environmental factors such as process, temperature and voltage.

[0070] The interstage matching network may include a third inductor L3 (choke inductor), a fourth inductor L4 (interstage matching inductor), a second capacitor C2 (interstage coupling capacitor), and a radio frequency third capacitor C3 (virtual ground capacitor), wherein one end of the second capacitor C2 (interstage coupling capacitor) is connected to one end of the second microstrip line Ld, the other end of the second capacitor C2 (interstage coupling capacitor) is connected to one end of the fourth inductor L4 (interstage matching inductor), and the other end of the fourth inductor L4 (interstage matching inductor) is connected to the gate of the second transistor M2; one end of the third inductor L3 (interstage choke inductor) is simultaneously connected to one end of the second microstrip line Ld and one end of the second capacitor C2 (interstage coupling capacitor), and the other end of the third inductor L3 (interstage choke inductor) is connected to the source of the second transistor M2; one end of the third capacitor C3 is connected to the source of the second transistor M2, and the other end is grounded.

[0071] The specific structure of the above-mentioned inter-stage matching network has the following corresponding effects:

[0072] The inter-stage matching network includes an RF signal path and a DC signal path. The RF signal output by the first-stage circuit enters the gate terminal of the second transistor M2 through the second capacitor C2 (inter-stage coupling capacitor) and the fourth inductor L4 (inter-stage matching inductor). The RF signal at the source terminal of the second transistor M2 reaches the ground through a third capacitor C3 (virtual ground capacitor). The DC signal at the source terminal of the second transistor M2 enters the drain terminal of the first-stage circuit through the third inductor L3 (choke inductor) in series, thereby realizing current multiplexing. This structure can reduce power consumption while suppressing the low-frequency gain of the second-stage circuit. In combination with the inductor peaking technology, the second-stage circuit presents a gain trend that increases with frequency, which is complementary to the gain curve trend of the first-stage circuit and is conducive to expanding the bandwidth of the overall circuit.

[0073] The parallel RC negative feedback structure includes a first resistor R1 (feedback resistor) and a fourth capacitor C4 (feedback capacitor), wherein one end of the first resistor R1 (feedback resistor) is connected to the gate of the second transistor M2, the other end of the first resistor R1 (feedback resistor) is connected to one end of the fourth capacitor C4 (feedback capacitor), and the other end of the fourth capacitor C4 (feedback capacitor) is connected to the drain of the third transistor M3, and the resistance value of R1 determines the feedback depth.

[0074] The specific structural setting of the above parallel RC negative feedback structure has the following corresponding effects:

[0075] The parallel RC negative feedback structure connects the output end and the input end of the common source and common gate structure of the second-stage circuit through a feedback resistor and a feedback capacitor. By sacrificing part of the gain, the circuit's equivalent 3dB gain bandwidth is expanded, and it also has the function of optimizing the output matching.

[0076] The series-parallel coupled inductor peaking structure 2 may include a fifth inductor L5 (series coupled peaking inductor) and a sixth inductor L6 (parallel coupled peaking inductor), wherein the fifth inductor L5 and the sixth inductor L6 are located in the same layer, the fifth inductor L5 and the sixth inductor L6 share one end, are closely arranged side by side, and are coupled to each other, the other end of the fifth inductor L5 is connected to one end of a fifth capacitor C5 (output end DC blocking capacitor); the other end of the sixth inductor L6 is connected to a DC power supply Vdd through a fifth resistor R5 (series resistor).

[0077] The specific structural setting of the series-parallel coupled inductor peaking structure 2 has the following corresponding effects:

[0078] The series-parallel coupled inductor peaking structure 2 may include a fifth inductor L5 connected in series with the drain terminal of the third transistor M3 and a sixth inductor L6 connected in parallel with the output terminal. The fifth inductor L5 and the sixth inductor L6 are located in the same layer, share one end, are closely arranged side by side, and are coupled with each other, which can neutralize the parasitic effect of the transistor at high frequency, play the role of inductor peaking, and effectively compensate for the high-frequency gain drop caused by the parasitic effect of the transistor; the fifth inductor L5 and the sixth inductor L6 are coupled with each other, which saves area and obtains an equivalent negative inductance at the output terminal, providing an additional zero point for the frequency response curve, which is conducive to expanding the high-frequency bandwidth.

[0079] In order to further illustrate the technical solution provided by the present invention, the specific structure and implementation method of the ultra-wideband low noise amplifier based on the dual coupling structure provided by the present invention are described in detail below in combination with the specific implementation method:

[0080] As an optional implementation, Figure 1As shown, the broadband input matching network includes a first capacitor C1, a first inductor L1 (matching inductor), a second inductor L2 (bias inductor) and a parasitic capacitor of a first transistor M1; the RF input port is connected to one end of the first capacitor C1, the first capacitor C1 is connected in series with the first inductor L1 (matching inductor), and the other end of the first inductor L1 (matching inductor) is connected to the gate of the first transistor M1; one end of the second inductor L2 (bias inductor) is connected to the gate of the first transistor M1, and the other end of the second inductor L2 (bias inductor) is connected to the bias voltage node Vg1. With such a configuration, the broadband input matching network can perform minimum noise matching at high frequencies by adjusting the LC value, and the source degeneration inductance of the first transistor M1 can provide a real part for the input characteristic impedance, shortening the distance between the minimum noise matching point and the impedance matching point on the Smith chart, so that the broadband input matching network has good impedance matching within the broadband while satisfying the minimum noise matching.

[0081] As an optional implementation, Figure 1 As shown, the transconductance enhanced coupling structure 1 includes a first transistor M1, a first microstrip line Ls, and a second microstrip line Ld, wherein one end of the second microstrip line Ld is connected to the drain of the first transistor M1, and the other end is simultaneously connected to one end of the second capacitor C2 (interstage coupling capacitor) and one end of the third inductor L3 (interstage choke inductor); the first microstrip line Ls and the second microstrip line Ld are both double-layer microstrip lines with the same width, parallel and closely juxtaposed, and mutually coupled, with a coupling coefficient of k1;

[0082] This coupling structure can couple the high-frequency signal of the transistor drain to the source, such as Figure 2 As shown, the mutual inductance between the coupled lines can be measured by the mutual inductance coefficient M, The existence of this mutual inductance will cause the source to sense Mi d / Ls current, the drain senses Mi s / Ld, the two parts of the induced current are in the same direction as the output current Iout, the current is amplified twice, the equivalent transconductance of the transistor Gm = Iout / Vin is enhanced, and the high-frequency gain of the first-stage circuit is improved to a certain extent by reasonably selecting the length and coupling coefficient of the microstrip lines at both ends. According to the Friis formula, in the multi-stage amplifier connection link of the two-port network, the power gain of each stage is represented by Gi, and the noise coefficient is represented by Fi. The noise coefficient of the output port of the amplifier, that is, the total noise coefficient is:

[0083]

[0084] It can be seen from the above formula that the noise is mainly contributed by the previous stage. Increasing the gain of the first stage circuit can effectively suppress the noise of the subsequent stage, thereby reducing the high-frequency noise factor of the overall circuit.

[0085] As an optional implementation, Figure 1 As shown, the interstage matching network is composed of a third inductor L3 (interstage choke inductor), a fourth inductor L4 (interstage matching inductor), a second capacitor C2 (interstage coupling capacitor), and a third capacitor C3 (virtual ground capacitor), wherein one end of the second capacitor C2 (interstage coupling capacitor) is connected to one end of the second microstrip line Ld, the other end of the second capacitor C2 (interstage coupling capacitor) is connected to one end of the fourth inductor L4 (interstage matching inductor), and the other end of the fourth inductor L4 (interstage matching inductor) is connected to the gate of the second transistor M2; one end of the third inductor L3 (interstage choke inductor) is simultaneously connected to one end of the second microstrip line Ld and one end of the second capacitor C2 (interstage coupling capacitor), and the third inductor L3 (interstage choke inductor) is connected to one end of the second microstrip line Ld and one end of the second capacitor C2 (interstage coupling capacitor). The other end of the inductor) is connected to the source of the second transistor M2; one end of the third capacitor C3 (virtual ground capacitor) is connected to the source of the second transistor M2, and the other end is grounded; the second capacitor C2 (inter-stage coupling capacitor) couples the AC signal output by the first-stage circuit to the next stage, and plays a role of inter-stage matching together with the fourth inductor L4; the third capacitor C3 (virtual ground capacitor) provides a ground path for the RF signal at the source end of the second transistor M2, and blocks the DC signal, allowing the DC signal to enter the drain end of the first transistor M1 through the third inductor L3 (choke inductor), thereby realizing two-stage current multiplexing. While this structure reduces power consumption, it can suppress the low-frequency gain of the second-stage circuit, which is beneficial to expanding the bandwidth of the overall circuit.

[0086] As an optional implementation, Figure 1 As shown, the parallel RC negative feedback structure includes a first resistor R1 (feedback resistor) and a fourth capacitor C4 (feedback capacitor), wherein one end of the feedback resistor is connected to the gate of the second transistor M2, and the other end is connected to one end of the fourth capacitor C4 (feedback capacitor), and the other end of the fourth capacitor C4 (feedback capacitor) is connected to the drain of the third transistor M3, and the resistance value of R1 determines the feedback depth; the negative feedback structure expands the circuit equivalent 3dB gain bandwidth by sacrificing part of the gain, and optimizes the output matching at the same time;

[0087] In an optional embodiment of the present invention, Figure 1 As shown, the series-parallel coupled inductor peaking structure 2 may include: a fifth inductor L5 (series coupled peaking inductor) and a sixth inductor L6 (parallel coupled peaking inductor). The fifth inductor L5 and the sixth inductor L6 share one end, the other end of the fifth inductor L5 is connected to one end of a fifth capacitor C5 (output end DC blocking capacitor), and the other end of the sixth inductor L6 is connected to a DC power supply Vdd via a fifth resistor R5 (series resistor). Figure 4 As shown, the fifth inductor L5 and the sixth inductor L6 are located in the same layer, closely side by side, and coupled to each other, with a coupling coefficient of k2. The equivalent circuit is as follows: Figure 5As shown, the coupling equivalent inductance of the fifth inductor L5 and the sixth inductor L6 is enhanced. Considering that the fifth inductor L5 and the sixth inductor L6 have large inductances and occupy a large area, the area can be reduced by enhancing the coupling inductance. When the upper limit frequency of the amplifier is high frequency, the parasitic capacitance of the transistor cannot be ignored, which will seriously reduce the high frequency response. The fifth inductor L5 and the sixth inductor L6 can play a role in compensating and neutralizing the parasitic capacitance, and at the same time couple with each other at the output end to obtain an equivalent negative inductance, such as Figure 5 As shown, Lm=-M, and the equivalent inductance Lm provides an additional zero point for the circuit transfer function, so that the circuit not only maintains the original gain but also expands the bandwidth.

[0088] As an optional implementation, Figure 3 As shown, the active bias structure includes a fourth transistor M4, a second resistor R2 (choke resistor), a third resistor R3 (voltage divider resistor), and a sixth capacitor C6 (bypass capacitor), wherein the source of the fourth transistor M4, which plays a dynamic voltage divider role, is grounded, and the gate is connected to the source through the second resistor R2 (choke resistor), and the second resistor R2 (choke resistor) can choke the gate-source current of the fourth transistor M4, thereby improving the load capacity of the fourth transistor M4; the drain of the fourth transistor M4 is connected to the bias voltage node Vg1, one end of the third resistor R3 (voltage divider resistor) is connected to the bias voltage node Vg1, and the other end is connected to the DC power supply Vdd, and one end of the sixth capacitor C6 (bypass capacitor) is connected to the bias voltage node Vg1, and the other end is grounded. The active bias can play the role of process compensation, anti-power supply voltage fluctuation, and temperature compensation, and effectively solves the problem that the performance of the common source amplifier, such as noise and gain, is affected by environmental factors such as process, temperature, and voltage.

[0089] In summary, the present invention applies the transconductance enhancement coupling structure to the first stage circuit of the common source-common source common gate two-stage amplifier, and realizes secondary amplification of part of the high-frequency signal through the gate-source microstrip line coupling channel, thereby increasing the equivalent transconductance and improving the high-frequency gain. At the same time, the source coupling microstrip line plays the role of source degeneration inductance, and takes into account impedance matching while performing minimum noise matching. The transconductance enhancement coupling structure weakens the mutual restriction and compromise relationship between noise, gain, and matching, so that the first stage circuit has good noise matching while the high-frequency gain is compensated; the second stage circuit adopts the series-parallel coupling inductor peaking technology to neutralize and offset the parasitic capacitance of the transistor and compensate for the high-frequency gain. At the same time, the series-parallel peaking inductors are coupled with each other to provide an additional zero point, which plays a role in expanding the bandwidth; combined with the parallel RC negative feedback and current multiplexing technology, the second stage circuit presents a gain trend that increases with frequency, which is complementary to the gain curve trend of the first stage circuit, so that the overall circuit has a wider bandwidth.

[0090] Next, combine Figure 6 and Figure 7The technical effects of the present invention are demonstrated as follows:

[0091] Figure 6 and Figure 7 The data in the table can be summarized as follows. It can be seen from the table that the noise coefficient of the present invention has obvious advantages in ultra-wideband LNA:

[0092] Ref. Techn. Freq(GHz) NF(dB) Gain(dB) S11 / S22(dB) <![CDATA[P DC (mW)]]> TCAS1'2018 0.15umGaAs 0.1-20 ＜5.8 28.6 -13 / -13 505 TMTT'2021 0.15umGaAs 0.9-30 ＜3.5 15 -8 / -7 263 ICCS'2016 0.15umGaAs 3-15 ＜2.5 28 -9 / -8 200 MWTL'2020 0.25umGaAs 4-15 ＜2.1 27 -11 / -10 158 TCAS2'2023 0.15umGaAs 1-20 ＜2 22.6 -7 / -6.8 189 This work 0.25umGaAs 2-18 ＜1.3 25 -10 / -9 82

[0093] As shown in the above table, the present invention achieves 2-18GHz ultra-wideband with a noise figure of less than 1.3dB based on 0.25um GaAs pHEMT process and only two-stage amplification units, and has a smaller area and noise than distributed amplifiers in the same frequency band.

[0094] Therefore, the ultra-wideband low noise amplifier based on a dual-coupling structure provided by the present invention can achieve at least the following technical effects:

[0095] 1) The transconductance enhanced coupling structure is applied to the first-stage circuit, and part of the drain current signal is coupled to the source and amplified twice, which effectively improves the high-frequency gain of the first-stage circuit and is beneficial to suppress the noise of the subsequent stage. At the same time, the source degeneration inductance and broadband input matching network are used to perform minimum noise matching at high frequencies, and the noise performance is excellent.

[0096] 2) The series-parallel inductor peaking structure can neutralize the parasitic effect of the transistor at high frequency, play the role of inductor peaking, and effectively compensate for the high-frequency gain decrease caused by the parasitic effect of the transistor; the fifth inductor L5 and the sixth inductor L6 are coupled with each other, saving area while obtaining an equivalent negative inductance at the output end, providing an additional zero point for the frequency response curve, which is conducive to expanding the high-frequency bandwidth.

[0097] 3) Due to the characteristic that transistor gain deteriorates with frequency, the gain of the first-stage circuit still shows a trend of decreasing with increasing frequency under the action of the transconductance enhanced coupling structure. The second-stage circuit adopts deep negative feedback, series-parallel coupled peaking inductor, and current multiplexing technology. While improving the high-frequency gain of the second-stage circuit, it suppresses the low-frequency gain of the second-stage circuit, making the gain curve of the second-stage circuit show an increasing trend with frequency, which is complementary to the trend of the gain curve of the first-stage circuit, thereby achieving a wider bandwidth.

[0098] Although the present invention is described herein in conjunction with various embodiments, in the process of implementing the claimed invention, those skilled in the art may understand and implement other variations of the disclosed embodiments by viewing the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other components or steps, and "one" or "an" does not exclude multiple situations. A single processor or other unit may implement several functions listed in the claims. Certain measures are recorded in different dependent claims, but this does not mean that these measures cannot be combined to produce good results.

[0099] Although the present invention has been described in conjunction with specific features and embodiments thereof, it is apparent that various modifications and combinations may be made thereto without departing from the spirit and scope of the present invention. Accordingly, this specification and the accompanying drawings are merely exemplary illustrations of the present invention as defined by the appended claims and are deemed to cover any and all modifications, variations, combinations or equivalents within the scope of the present invention. Obviously, those skilled in the art may make various modifications and variations to the present invention without departing from the spirit and scope of the present invention. Thus, the present invention is intended to include such modifications and variations if they fall within the scope of the claims of the present invention and their equivalents.

Claims

1. An ultra-wideband low noise amplifier based on a dual-coupling structure, characterized in that: The ultra-wideband low noise amplifier is a multi-stage cascade amplifier, comprising at least: A broadband input matching network, a transconductance enhanced coupling structure, and an active bias structure acting on the first stage circuit; and a parallel RC negative feedback structure and a series-parallel coupled inductor peaking structure acting on the second stage circuit; The transconductance enhanced coupling structure at least includes a first transistor, a first microstrip line connected to the source of the first transistor, and a second microstrip line connected to the drain of the first transistor, and the first microstrip line and the second microstrip line are coupled to each other.

2. The ultra-wideband low noise amplifier based on a dual coupling structure according to claim 1, characterized in that: The first stage circuit is a common source amplifier circuit with a source degeneration inductor formed by a first transistor and a first microstrip line; The second stage circuit is a common-source and common-gate amplifier circuit formed by a second transistor and a third transistor; the second transistor is a common-source stage, and the third transistor is a common-gate stage.

3. The ultra-wideband low noise amplifier based on a dual coupling structure according to claim 2, characterized in that: The ultra-wideband low noise amplifier also includes: An inter-stage matching network; the inter-stage matching network comprises a third inductor, a fourth inductor, a second capacitor and a third capacitor; The broadband input matching network includes a first inductor, a second inductor, a first capacitor and a parasitic capacitor of the first transistor; The active bias structure includes a fourth transistor, a second resistor, a third resistor and a sixth capacitor; The parallel RC negative feedback structure includes a first resistor and a fourth capacitor; The series-parallel coupled inductor peaking structure includes a fifth inductor and a sixth inductor.

4. The ultra-wideband low noise amplifier based on a dual coupling structure according to claim 3, characterized in that: The first capacitor in the broadband input matching network is a DC blocking capacitor; one end of the first capacitor is connected to the RF input port, and the other end of the first capacitor is connected to the gate of the first transistor; the first capacitor is connected in series with the first inductor, and the other end of the first inductor is connected to the gate of the first transistor; one end of the second inductor is connected to the gate of the first transistor, and the other end of the second inductor is connected to the bias voltage node; the first inductor is a matching inductor, and the second inductor is a bias inductor.

5. The ultra-wideband low noise amplifier based on a dual coupling structure according to claim 3, characterized in that: One end of the second microstrip line in the transconductance enhanced coupling structure is connected to the drain of the first transistor, the other end of the second microstrip line is connected to one end of the second capacitor, and the other end of the second microstrip line is also connected to one end of the third inductor; The first microstrip line and the second microstrip line are both double-layer microstrip lines with the same width, parallel and closely spaced, and coupled to each other; the second capacitor is an inter-stage DC capacitor.

6. The ultra-wideband low noise amplifier based on a dual coupling structure according to claim 4, characterized in that: The source of the fourth transistor in the active bias structure is grounded, and the fourth transistor is used for dynamic voltage division; The gate of the fourth transistor is connected to the source through the second resistor, and the drain of the fourth transistor is connected to the bias voltage node; one end of the third resistor is connected to the bias voltage node, and the other end of the third resistor is connected to a DC power supply; One end of the sixth capacitor is grounded, and the other end of the sixth capacitor is connected to the bias voltage node.

7. The ultra-wideband low noise amplifier based on a dual coupling structure according to claim 3, characterized in that: One end of the second capacitor in the inter-stage matching network is connected to one end of the second microstrip line, and the other end of the second capacitor is connected to one end of the fourth inductor; the other end of the fourth inductor is connected to the gate of the second transistor; One end of the third inductor is connected to one end of the second microstrip line and one end of the second capacitor respectively, and the other end of the third inductor is connected to the source of the second transistor; one end of the third capacitor is connected to the source of the second transistor, and the other end of the third capacitor is grounded.

8. The ultra-wideband low noise amplifier based on a dual coupling structure according to claim 3, characterized in that: The parallel RC negative feedback structure connects the output end and the input end of the second stage circuit through the first resistor and the fourth capacitor; One end of the first resistor is connected to the gate of the second transistor, the other end of the first resistor is connected to one end of the fourth capacitor, and the other end of the fourth capacitor is connected to the drain of the third transistor.

9. The ultra-wideband low noise amplifier based on a dual coupling structure according to claim 6, characterized in that: The fifth inductor and the sixth inductor in the series-parallel coupled inductor peaking structure are located in the same layer, and the fifth inductor and the sixth inductor share one end, are closely arranged side by side, and are coupled to each other; The other end of the fifth inductor is connected to one end of the fifth capacitor; the fifth capacitor is an output-end DC-isolating capacitor; the other end of the sixth inductor is connected to the DC power supply through a fifth resistor; and the fifth resistor is a series resistor.

10. The ultra-wideband low noise amplifier based on a dual coupling structure according to claim 7, characterized in that: The inter-stage matching network includes a radio frequency signal path and a direct current signal path; The radio frequency signal output by the first stage circuit enters the gate terminal of the second transistor through the second capacitor and the fourth inductor; The RF signal at the source end of the second transistor reaches the ground through the third capacitor, and the DC signal at the source end of the second transistor enters the drain end of the first stage circuit through the third inductor connected in series for current multiplexing.

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