Leadless packaging pressure-sensitive core body and preparation process thereof

Abstract

The core comprises a pressure-sensitive chip, sintered glass is arranged on the back face of the pressure-sensitive chip, a groove is formed in the side, close to the pressure-sensitive chip, of the pressure-sensitive chip, a pressure cavity is formed through the groove, a plurality of through holes are formed in the sintered glass, metal columns are arranged in the through holes, metal seed layers are arranged on the peripheries of the metal columns, and the metal seed layers are arranged on the periphery of the pressure-sensitive chip. Metal contact is formed between the metal seed layer and the pressure-sensitive chip, and the other end of the metal seed layer is connected with a metal bump. The preparation process comprises the following steps: bonding to form the pressure cavity, preparing the metal seed layer and the metal column in the through hole, and preparing the metal ball to form the metal bump. The lead-free packaging pressure-sensitive core has the characteristics of high reliability, high temperature resistance, short interconnection, high temperature resistance and high response rate, can effectively improve the working temperature and response rate of the sensor, can meet the requirement scene of high temperature and high reliability, and can expand the application range of the piezoresistive pressure sensor.

Description

Technical Field

[0001] The invention relates to a leadless package pressure-sensitive core and a preparation process thereof. Background Art

[0002] The packaging structure of the existing MEMS pressure sensor is to bond the chip to the base by glue, and then use wire bonding to connect the chip to the pins to form an electrical interconnection. Subsequently, the corrugated diaphragm is welded to the base by laser welding, and then the core is filled with oil and pin welded. In this packaging structure, when the corrugated diaphragm is subjected to pressure, the pressure will be transferred to the diaphragm of the chip through silicone oil, so that the diaphragm is deformed to produce stress concentration, and the pressure signal in the stress concentration area is collected to achieve the purpose of signal amplification. However, the packaging form of this packaging structure is gold wire bonding and silicone oil filling. Due to the gold wire and silicone oil, unpredictable reliability problems may be caused, such as silicone oil leakage, gold wire softening and falling off, etc., and the pressure is transmitted to the diaphragm through silicone oil, not directly acting on the diaphragm, which will lead to a decrease in response rate, resulting in the pressure-sensitive core being not resistant to high temperature and having a low response rate. In particular, in some high temperature and high response rate demand scenarios, such as working requirements above 250°C, this type of packaging type of pressure-sensitive core cannot meet application requirements. In order to improve the temperature resistance and reliability of the sensor, the researchers proposed a leadless packaging structure for piezoresistive sensors. The homogeneous bonding of the silicon carbide chip and the silicon carbide cup can ensure good bonding strength and good high-temperature stability after bonding. The pressure sensing film is formed by the first groove, and the metal wire lead and the internal transfer structure design are eliminated with the help of the through-hole structure. The first transition layer is used to achieve thermal expansion transition at the sealing interface of the packaging material, so that the internal thermal stress of the packaging structure is effectively reduced. However, in the leadless packaging structure, the silicon carbide cup and the first transition layer are set between the chip and the base, which makes the interconnection distance of the core body longer. At the same time, the metal welding plate is set on the core body, which is easy to damage the structure of the core body itself, which not only leads to complex preparation process and low yield, but also leads to poor reliability of the chip. In addition, there is no protection mechanism on the surface of the chip, which makes the chip easily damaged by particulate matter in the high-temperature and high-pressure gas, resulting in a shorter service life and even easy failure. In addition, in the existing leadless packaging structure, the interconnection between the chip and the core body is mostly achieved by metal paste sintering and tin solder bonding. Metal paste sintering can lead to problems such as insufficient filling, resulting in low product yield, and tin solder cannot work in a high temperature environment for a long time.

[0003] Therefore, obtaining a leadless packaged varistor core with short interconnects, high reliability and high temperature resistance is of great significance for effectively improving the operating temperature and response rate of the varistor core and making it meet the requirements of ultra-high temperature resistance and high response rate. Summary of the invention

[0004] The technical problem to be solved by the present invention is to overcome the deficiencies of the prior art and provide a leadless packaged varistor core with short interconnection, high reliability and high temperature resistance and a preparation process thereof.

[0005] In order to solve the above technical problems, the technical solution adopted by the present invention is:

[0006] A leadless packaged varistor core comprises a varistor chip, wherein sintered glass is provided on the back of the varistor chip, a groove is provided on the side of the sintered glass close to the varistor chip, a pressure cavity is formed between the varistor chip and the sintered glass through the groove, a plurality of through holes are provided in the sintered glass, a metal column is provided in each of the through holes, a metal seed layer is provided around the metal column, one end of the metal column forms a metal contact with the varistor chip through the metal seed layer, and the other end is connected to a metal bump.

[0007] The above-mentioned leadless packaged pressure-sensitive core is further improved in that the metal seed layer is a composite film composed of a titanium film and a copper film; the titanium film is connected to the inner wall of the through hole, and the copper film is coated on the surface of the metal column.

[0008] The leadless packaged varistor core mentioned above is further improved in that the thickness of the titanium film is 50nm to 100nm; the thickness of the copper film is 1000nm to 2000nm.

[0009] The above-mentioned leadless packaged pressure-sensitive core is further improved in that the metal column is a copper column.

[0010] The above-mentioned leadless packaged pressure-sensitive core is further improved, wherein the pressure-sensitive chip is a MEMS chip; the sintered glass is BF33 glass; the metal bumps are gold bumps; the metal bumps are spherical; and the diameter of the metal bumps is 100μm to 200μm.

[0011] The above-mentioned leadless packaged varistor core is further improved and also includes a base, and the sintered glass is bonded to the base on the side away from the varistor chip; the base is provided with a lead pin, and the lead pin is connected to the metal bump; the inner wall of the base and the lead pin are filled with insulating material; the insulating material is glass slurry; the material of the base is 316L stainless steel.

[0012] The above-mentioned leadless packaged varistor core is further improved and also includes a cap, which is installed on the base; the varistor chip is located inside the cap; the cap is also provided with a hole, which is arranged opposite to the diaphragm of the varistor chip, and the varistor chip is connected to the external environment through the hole; the material of the cap is 316L stainless steel.

[0013] As a general technical concept, the present invention also provides a process for preparing the leadless package pressure-sensitive core, comprising the following steps:

[0014] S1. Provide a sintered glass having grooves and through holes;

[0015] S2, bonding the SOI sheet with the membrane to the sintered glass to close the groove;

[0016] S3, preparing a metal seed layer on the inner wall of the through hole of the sintered glass;

[0017] S4, preparing a metal plating layer on the metal seed layer to form a metal column in the through hole;

[0018] S5, thinning the back of the sintered glass until the sintered glass is exposed, and polishing;

[0019] S6, preparing a mask on the back side of the sintered glass to expose the metal column;

[0020] S7, preparing a pad on the surface of the metal column;

[0021] S8, performing annealing treatment on the pad so that the metal column forms metal contact with the pad;

[0022] S9, preparing metal balls on the pads to form metal bumps on the surface of the sintered glass;

[0023] S10, dicing the SOI wafer to obtain a pressure-sensitive chip.

[0024] The above preparation process is further improved and further comprises the following steps:

[0025] S11, bonding the sintered glass to the base, so that the metal bumps are connected to the lead pins in the base;

[0026] S12. Install the cap on the base so that the pressure-sensitive chip is located inside the cap.

[0027] The above-mentioned preparation process is further improved, in step S2, the SOI sheet prepared with the membrane is bonded to the sintered glass by using an anodic bonding process.

[0028] The above preparation process is further improved, in step S3, a metal seed layer is prepared on the inner wall of the through hole of the sintered glass by using a PECVD method.

[0029] The above preparation process is further improved, in step S4, an ion beam plating process is used to prepare a metal coating on the metal seed layer.

[0030] The above preparation process is further improved in that in step S5, the thickness of the sintered glass is reduced to 400 μm.

[0031] The above-mentioned preparation process is further improved, in step S6, a mask is prepared on the back side of the sintered glass by using a photolithography process.

[0032] The above-mentioned preparation process is further improved. In step S7, an ion beam plating process is used to prepare a pad on the surface of the metal column; the pad is a titanium / gold pad; the titanium / gold pad is a composite film of a titanium film and a gold film; the titanium film is attached to the surface of the metal column; the thickness of the titanium film is 50nm to 100nm; the thickness of the gold film is 250nm to 750nm.

[0033] The above-mentioned preparation process is further improved, in step S9, a ball planting machine is used to prepare metal balls on the pads.

[0034] The above-mentioned preparation process is further improved, in step S10, a dicing machine is used to slice the SOI wafer.

[0035] The above-mentioned preparation process is further improved, in step S11, the sintered glass is bonded to the base by using an ultrasonic hot pressing bonding process.

[0036] The above-mentioned preparation process is further improved, in which in step S13, the cap is mounted on the base by laser welding.

[0037] Compared with the prior art, the advantages of the present invention are:

[0038] (1) In view of the shortcomings of the existing varistor core, such as long interconnection distance, low reliability, poor high temperature resistance, and the resulting defects such as low operating temperature, poor response rate, and easy failure, the present invention creatively provides a leadless packaged varistor core, which directly sets the varistor chip on sintered glass, can shorten the interconnection distance, which is beneficial to improving the response rate. At the same time, the metal seed layer is used to form a metal contact between the metal column and the varistor chip, which will not only prevent the original structure of the varistor chip from being destroyed due to welding pads, but also will not reduce the detection performance of the varistor chip due to pad detachment caused by long-term operation in a high temperature environment, which is beneficial to improving the working temperature of the core, so that it can achieve stable detection under higher temperature conditions. More importantly, by connecting metal bumps on the metal columns, the chip and the base can be interconnected by flip-chip bonding, which is beneficial to further shortening the interconnection distance, simplifying the preparation process, and improving the product yield, facilitating large-scale preparation, and generating higher economic benefits. Compared with conventional leadless packaged piezoresistive cores, the leadless packaged piezoresistive core of the present invention has the characteristics of high reliability and high temperature resistance. It also has the characteristics of short interconnection, high temperature resistance and fast response rate. It can effectively improve the operating temperature and response rate of the sensor, meet the requirements of high temperature and high reliability, and expand the application scope of piezoresistive pressure sensors.

[0039] (2) The leadless packaged varistor core of the present invention also includes a base and a cap. On the one hand, the varistor chip can be bonded to the base by sintered glass, which can effectively reduce the internal thermal stress under the action of sintered glass, so that the varistor chip can be stably fixed on the base in a high temperature environment, which is beneficial to improving the high temperature stability and reliability of the varistor chip. On the other hand, the varistor chip can be wrapped inside the cap by installing it on the base. It can not only be connected to the external atmosphere through the holes on the cap, but also can be protected by the cap, which is beneficial to improving its reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In order to make the purpose, technical solution and advantages of the embodiments of the present invention more clear, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention.

[0041] Figure 1 It is a schematic diagram of the structure of the leadless packaged pressure-sensitive core in Example 1 of the present invention.

[0042] Figure 2 It is a schematic diagram of the cross-sectional structure of the leadless packaged pressure-sensitive core in Example 1 of the present invention.

[0043] Figures 3a to 3i This is a schematic diagram of the preparation process of the leadless packaged pressure-sensitive core in Example 2 of the present invention.

[0044] Legend:

[0045] 1. Cap; 2. Pressure-sensitive chip; 3. Base; 4. Lead pin; 5. Sintered glass; 6. Groove; 7. Metal column; 8. Metal seed layer; 9. Metal bump. DETAILED DESCRIPTION

[0046] The present invention is further described below in conjunction with the accompanying drawings and specific preferred embodiments, but the protection scope of the present invention is not limited thereby.

[0047] Embodiment 1:

[0048] like Figure 1 As shown, a leadless packaged varistor core includes a varistor chip 2, a sintered glass 5 is provided on the back of the varistor chip 2, a groove 6 is provided on the side of the sintered glass 5 close to the varistor chip 2, a pressure cavity is formed between the varistor chip 2 and the sintered glass 5 through the groove 6, a plurality of through holes are provided in the sintered glass 5, a metal column 7 is provided in each through hole, a metal seed layer 8 is provided around the metal column 7, one end of the metal column 7 forms a metal contact with the varistor chip 2 through the metal seed layer 8, and the other end is connected to a metal bump 9.

[0049] In this embodiment, the metal seed layer 8 is a composite film composed of a titanium film and a copper film. The titanium film is connected to the inner wall of the through hole, and the copper film is coated on the surface of the metal column 7. Under the joint action of the titanium film and the copper film, the thermal stress between the varistor chip 2 and the metal column 7 can be effectively reduced. At the same time, it is also beneficial to achieve metal contact between the varistor chip 2 and the metal column 2, so that the metal column 7 can be used to quickly transmit the electrical signal generated by the diaphragm deformation of the varistor chip 2.

[0050] In this embodiment, the thickness of the titanium film is 50 nm, and the thickness of the copper film is 1000 nm.

[0051] In this embodiment, the metal pillar 7 is a copper pillar.

[0052] In this embodiment, the pressure-sensitive chip 2 is a MEMS chip.

[0053] In this embodiment, the sintered glass 5 is BF33 glass.

[0054] In this embodiment, the metal bumps 9 are gold bumps, and the metal bumps 9 are spherical with a diameter of 150 μm.

[0055] In the present invention, the varistor chip is directly arranged on the sintered glass, which can shorten the interconnection distance and is beneficial to improving the response rate. At the same time, the metal column and the varistor chip form metal contact through the metal seed layer. Not only will the original structure of the varistor chip not be destroyed due to the welding pad, but also the detection performance of the varistor chip will not be reduced due to the pad falling off due to long-term operation in a high-temperature environment. It is beneficial to increase the working temperature of the core body, so that it can achieve stable detection under higher temperature conditions. More importantly, by connecting the metal bumps on the metal columns, the chip and the base can be interconnected by simple bonding, which is beneficial to further shorten the interconnection distance. At the same time, it is beneficial to simplify the preparation process and improve the product yield, which is convenient for large-scale preparation and can generate higher economic benefits.

[0056] like Figure 2 As shown, in this embodiment, a base 3 is also included, wherein the sintered glass 5 is bonded to the base 3 on a side away from the pressure-sensitive chip 2 .

[0057] In this embodiment, a lead pin 4 is provided in the base 3, and the lead pin 4 is electrically connected to the metal bump 8. An insulating material is filled between the inner wall of the base 3 and the lead pin 4, wherein the insulating material is glass paste, and the material of the base is 316L stainless steel.

[0058] In this embodiment, the varistor chip can be bonded to the base through sintered glass, and the internal thermal stress can be effectively reduced under the action of sintered glass, so that the varistor chip can be stably fixed on the base in a high temperature environment, which is beneficial to improving the high temperature stability and reliability of the varistor chip.

[0059] like Figure 2 As shown, in this embodiment, a cap 1 is further included, and the cap 1 is mounted on the base 3 , specifically, the cap 1 is welded to the base 3 .

[0060] In this embodiment, the pressure-sensitive chip 2 is located inside the cap 1. The cap 1 is also provided with a hole. The hole is arranged opposite to the diaphragm of the pressure-sensitive chip 2. The pressure-sensitive chip 2 is connected to the external environment through the hole. The material of the cap 1 is 316L stainless steel.

[0061] In this embodiment, the pressure-sensitive chip can be wrapped inside the cap by installing the cap on the base. Not only can it be connected to the outside atmosphere through the holes on the cap, but the cap can also be used to protect the pressure-sensitive chip, which is beneficial to improving its reliability.

[0062] A method for preparing the leadless packaged pressure-sensitive core in the present embodiment, the preparation process flow chart of which is shown in FIG3 , comprises the following steps:

[0063] S1. Provide sintered glass with grooves and through holes, and an SOI sheet with a membrane.

[0064] S2, aligning the SOI sheet with the diaphragm and the sintered glass, bonding them by anodic bonding process, so that the SOI sheet and the sintered glass are combined together and the groove is closed, such as Figure 3a shown.

[0065] S3, preparing a metal seed layer on the inner wall of the through hole of the sintered glass, specifically: using the PECVD method to sequentially deposit a titanium film and a copper film on the inner wall of the through hole of the sintered glass, such as Figure 3b As shown, a composite film composed of a titanium film and a copper film is deposited on BF33 glass, referred to as Ti / Cu film, wherein the thickness of the titanium film is 50nm and the thickness of the copper film is 1000nm.

[0066] S4, preparing a metal plating layer on the metal seed layer to form a metal column in the through hole, specifically: using an ion beam plating process to plate copper on the Ti / Cu film to form a copper column in the through hole surrounded by the Ti / Cu film, such as Figure 3c shown.

[0067] S5, thinning the back of the sintered glass until the sintered glass is exposed, wherein the thickness of the sintered glass is thinned to 400 μm, and polishing is performed to make the surface of the deposited copper smooth and flat. Figure 3d shown.

[0068] S6. Prepare a mask on the back of the sintered glass to expose the metal column. Specifically, perform photolithography processes such as photoresist, pre-bake, photolithography, development, and hardening on the back of the SOI wafer, and prepare a mask on the back of the sintered glass to expose only the copper surface of the copper column.

[0069] S7, preparing a pad on the surface of the metal column, specifically: using an ion beam plating process to sequentially plate a titanium film and a gold film on the surface of the copper column, such as Figure 3e As shown, the pad is a composite film of titanium film and gold film, referred to as titanium / gold pad, wherein the titanium film is attached to the surface of the copper column, the thickness of the titanium film is 50nm, and the thickness of the gold film is 500nm.

[0070] S8. Performing annealing treatment on the pad so that the metal column forms metal contact with the pad. Specifically, rapid annealing is performed so that the copper and titanium / gold pad form good metal contact.

[0071] S9, prepare metal balls on the pads to form metal bumps on the sintered glass surface, specifically: use a ball planting machine to plant gold balls with a diameter of 150um on the titanium / gold pads, i.e., gold bumps, such as Figure 3f shown.

[0072] S10, using a dicing machine to dicing the bonded SOI wafer to obtain a single pressure-sensitive chip, such as Figure 3g shown.

[0073] S11, align the sintered glass and the base, and use ultrasonic hot pressing bonding process to bond the pressure sensitive chip to the base through the sintered glass, and connect the gold bumps with the lead pins in the base to form metal contact, such as Figure 3h shown.

[0074] S12, installing the cap on the base, specifically: aligning the cap with the base, welding the cap and the base of the bonded chip together by laser welding, so that the pressure-sensitive chip is located in the cap, and obtaining a single leadless package pressure-sensitive core body, such as Figure 3i shown.

[0075] After testing, the response rate of the leadless packaged varistor prepared in Example 1 of the present invention is 10-25μs, the highest working temperature is 245°C, and the working time at this temperature is up to 1000h; while the response rate of the conventional varistor is 50-100μs, and the working time at 245°C does not exceed 200h. From the above results, it can be seen that compared with the conventional leadless packaged varistor, the leadless packaged varistor of the present invention has the characteristics of high reliability and high temperature resistance, and also has the characteristics of short interconnection, high temperature resistance and fast response rate, which can effectively improve the working temperature and response rate of the sensor, can meet the demand scenarios of ultra-high temperature resistance and high response rate, and can expand the application scope of piezoresistive pressure sensors.

[0076] The above embodiments are only preferred implementations of the present invention, and the protection scope of the present invention is not limited to the above embodiments. All technical solutions under the concept of the present invention belong to the protection scope of the present invention. It should be pointed out that for ordinary technicians in this technical field, improvements and modifications without departing from the principle of the present invention should also be regarded as the protection scope of the present invention.

Claims

1. A leadless packaged pressure-sensitive core, characterized in that: It includes a varistor chip, the back of which is provided with sintered glass, a groove is provided on the side of the sintered glass close to the varistor chip, a pressure cavity is formed between the varistor chip and the sintered glass through the groove, a plurality of through holes are provided in the sintered glass, a metal column is provided in each of the through holes, a metal seed layer is provided around the metal column, one end of the metal column forms a metal contact with the varistor chip through the metal seed layer, and the other end is connected to a metal bump.

2. The leadless package pressure-sensitive core according to claim 1, characterized in that: The metal seed layer is a composite film composed of a titanium film and a copper film; the titanium film is connected to the inner wall of the through hole, and the copper film is coated on the surface of the metal column.

3. The leadless package pressure-sensitive core according to claim 2, characterized in that: The thickness of the titanium film is 50nm-100nm; the thickness of the copper film is 1000nm-2000nm.

4. The leadless package pressure-sensitive core according to claim 3, characterized in that: The metal pillar is a copper pillar.

5. The leadless package pressure-sensitive core according to claim 1, characterized in that: The pressure-sensitive chip is a MEMS chip; the sintered glass is BF33 glass; the metal bumps are gold bumps; the metal bumps are spherical; and the diameter of the metal bumps is 100 μm to 200 μm.

6. The leadless packaged pressure-sensitive core according to any one of claims 1 to 5, characterized in that: It also includes a base, and the sintered glass is bonded to the base on the side away from the pressure-sensitive chip; a lead pin is provided in the base, and the lead pin is connected to the metal bump; an insulating material is filled between the inner wall of the base and the lead pin; the insulating material is glass slurry; the material of the base is 316L stainless steel.

7. The leadless package pressure-sensitive core according to claim 6, characterized in that: It also includes a cap, which is installed on the base; the pressure-sensitive chip is located inside the cap; the cap is also provided with a hole, which is arranged opposite to the diaphragm of the pressure-sensitive chip, so that the pressure-sensitive chip is connected to the external environment through the hole; the material of the cap is 316L stainless steel.

8. A process for preparing a leadless package pressure-sensitive core according to any one of claims 1 to 7, characterized in that: The following steps are involved: S1. Provide a sintered glass having grooves and through holes; S2, bonding the SOI sheet with the membrane to the sintered glass to close the groove; S3, preparing a metal seed layer on the inner wall of the through hole of the sintered glass; S4, preparing a metal plating layer on the metal seed layer to form a metal column in the through hole; S5, thinning the back of the sintered glass until the sintered glass is exposed, and polishing; S6, preparing a mask on the back side of the sintered glass to expose the metal column; S7, preparing a pad on the surface of the metal column; S8, performing annealing treatment on the pad so that the metal column forms metal contact with the pad; S9, preparing metal balls on the pads to form metal bumps on the surface of the sintered glass; S10, dicing the SOI wafer to obtain a pressure-sensitive chip.

9. The preparation process according to claim 8, characterized in that: The following steps are also included: S11, bonding the sintered glass to the base, so that the metal bumps are connected to the lead pins in the base; S12. Install the cap on the base so that the pressure-sensitive chip is located inside the cap.

10. The preparation process according to claim 9, characterized in that: In step S2, the SOI sheet with the membrane is bonded to the sintered glass by using an anodic bonding process; In step S3, a metal seed layer is prepared on the inner wall of the through hole of the sintered glass by using a PECVD method; In step S4, a metal coating is prepared on the metal seed layer by using an ion beam coating process; In step S5, the thickness of the sintered glass is reduced to 400 μm; In step S6, a mask is prepared on the back side of the sintered glass using a photolithography process; In step S7, a pad is prepared on the surface of the metal column by an ion beam plating process; the pad is a titanium / gold pad; the titanium / gold pad is a composite film of a titanium film and a gold film; the titanium film is attached to the surface of the metal column; the thickness of the titanium film is 50nm to 100nm; the thickness of the gold film is 250nm to 750nm; In step S9, a ball planting machine is used to prepare metal balls on the pads; In step S10, the SOI wafer is diced using a dicing machine; In step S11, the sintered glass is bonded to the base using an ultrasonic hot-compression bonding process; In step S13, the cap is mounted on the base by laser welding.

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