Dual-chip unit system-on-chip flashing method, chip and in-vehicle infotainment system

Abstract

The invention discloses a dual-chip unit system-on-chip flashing method, a chip and an in-vehicle infotainment system, each of dual-chip units is configured with a subsystem, and the two subsystems can trigger a system flashing command; the method comprises the following steps: after a triggering subsystem triggers a system reinstallation command, entering a system reinstallation mode, and meanwhile, notifying an updating subsystem to enter the system reinstallation mode; the triggering subsystem mounts and shares an external memory; the triggering subsystem and the updating subsystem respectively read corresponding flash small systems from a shared external memory and operate the flash small systems; and the triggering subsystem and the updating subsystem respectively read the flash program mirror images from the external memory and store the flash program mirror images in respective storage media. According to the double-chip-unit system-on-chip flashing method, software updating of the two systems of the double-die SOC can be achieved by connecting one flashing interface with one external storage, flashing operation is simple and rapid, meanwhile, a hardware circuit is simple, and cost is saved.

Description

Technical Field

[0001] The present application relates to the technical field of vehicle-mounted intelligent cockpits, and in particular to a dual-chip unit system-level chip flashing method, chip, and vehicle-mounted system. Background Art

[0002] In the existing in-vehicle solutions, the two chip units in the dual-die SOC chip (dual-chip unit system-on-chip) run different subsystems respectively, and the two chip units are interconnected through the PCIE interface in hardware. When using external memory (such as a USB flash drive) to update the system, the two subsystems need to insert USB flash drives into their respective small systems for flashing, and both subsystems need to reserve external memory interfaces. The flashing process is not only complicated and cumbersome, but also wastes system resources. Summary of the invention

[0003] In order to solve at least one problem existing in the prior art, the purpose of the present application is to provide a dual-chip unit system-level chip flashing method, chip and vehicle-mounted system. Through the basic PCIE communication method and NFS sharing external memory method, only one external memory interface is needed to complete the flashing of two subsystems at one time, making the dual-chip unit system-level chip flashing convenient and fast, providing users with a better experience.

[0004] To achieve the above-mentioned purpose, the present application provides a dual-chip unit system-level chip flashing method, where each dual-chip unit is configured with a subsystem, and both subsystems can trigger a system flashing command; the method comprises:

[0005] After the trigger subsystem triggers the system flash command, it enters the system flash mode and notifies the update subsystem to enter the system flash mode;

[0006] The trigger subsystem mounts and shares the external memory;

[0007] The trigger subsystem and the update subsystem read the corresponding flashing subsystem from the shared external memory and run them respectively;

[0008] The trigger subsystem and the update subsystem respectively read the flash program image from the external memory and store them in their respective storage media.

[0009] Furthermore, after the trigger subsystem triggers the system update command, the step of entering the system flashing mode also includes:

[0010] Inside the trigger subsystem, the AP1 domain sends the system flash command to the Safety domain;

[0011] The Safety domain notifies the Security domain to enter the system flashing mode;

[0012] After the Security domain sets the startup reason information, it notifies the AP1 domain to restart and enter the system flashing mode;

[0013] The Safety domain notifies the update subsystem to enter the system flashing mode.

[0014] Furthermore, the step of the update subsystem entering the system flashing mode further includes:

[0015] Within the update subsystem, after receiving the notification from the trigger subsystem, the Safety domain notifies the Security domain to enter the system flashing mode;

[0016] After the Security domain sets the startup reason information, it notifies the AP1 domain to restart and enter the system flashing mode;

[0017] The AP1 domain enters the system flashing mode.

[0018] Furthermore, the step of triggering the subsystem to mount the external memory further includes:

[0019] In the system flashing mode, the trigger subsystem reads the startup reason information generated by the Security domain in its AP1 domain and mounts the external memory;

[0020] The AP1 domain reads the update subsystem flashing small system image in the external memory and sends it to the update subsystem.

[0021] Furthermore, the step of triggering the subsystem to share the external memory further includes:

[0022] The trigger subsystem AP1 domain reads its flashing small system image from the external memory and runs it;

[0023] The trigger subsystem AP1 domain sets up an NFS server program to share the external memory with the update subsystem.

[0024] Furthermore, the step of the trigger subsystem AP1 domain reading its flashing small system image from the external memory and running it further includes:

[0025] The boot loader of the trigger subsystem AP1 domain reads its flashing small system image from the external memory according to the startup reason information and runs it.

[0026] Furthermore, it also includes:

[0027] After receiving and verifying the update subsystem flashing small system image sent by the trigger subsystem, the boot loader of the update subsystem AP1 domain runs the update subsystem flashing small system;

[0028] The update subsystem AP1 domain starts the NFS client program.

[0029] Furthermore, it also includes: the trigger subsystem and the update subsystem communicate with each other using PCIE as a physical layer virtual network card.

[0030] To achieve the above object, the present application also provides a dual-chip unit system-level chip, which uses the dual-chip unit system-level chip flashing method as described above, including:

[0031] Two heterogeneous multi-core chip units interconnected via a PCIE interface; and a flash interface connected to an external memory;

[0032] The two heterogeneous multi-core chip units are respectively connected to the external memory via a flash interface.

[0033] To achieve the above objectives, the present application also provides a vehicle system, including the dual-chip unit system-level chip as described above.

[0034] The dual-chip unit system-level chip flashing method, chip and vehicle system only use one external memory interface to realize the flashing of the dual-chip unit system-level chip, saving the hardware resources of the vehicle system and reducing the number of flashing triggers. Only one trigger is needed to realize the flashing of two subsystems, making the flashing simple and fast, and bringing better user experience to customers.

[0035] Other features and advantages of the present application will be set forth in the following description, and in part will become apparent from the description, or may be understood by practicing the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] The accompanying drawings are used to provide a further understanding of the present application and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the present application and do not constitute a limitation of the present application. In the accompanying drawings:

[0037] Figure 1 This is a flow chart of a dual-chip unit system-level chip flashing method according to an embodiment of the present application;

[0038] Figure 2 This is a schematic diagram of the flashing process triggered by subsystem A according to an embodiment of the present application;

[0039] Figure 3 This is a schematic diagram of the flashing process triggered by subsystem B according to an embodiment of the present application;

[0040] Figure 4 is a block diagram of a system-on-chip structure according to an embodiment of the present application;

[0041] Figure 5It is a structural block diagram of a vehicle system according to an embodiment of the present application. DETAILED DESCRIPTION

[0042] The embodiments of the present application will be described in more detail below with reference to the accompanying drawings. Although certain embodiments of the present application are shown in the accompanying drawings, it should be understood that the present application can be implemented in various forms and should not be construed as being limited to the embodiments described herein. Instead, these embodiments are provided to provide a more thorough and complete understanding of the present application. It should be understood that the drawings and embodiments of the present application are only for exemplary purposes and are not intended to limit the scope of protection of the present application.

[0043] The term "including" and its variations used herein are open inclusions, i.e., "including but not limited to". The term "based on" means "based at least in part on". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment"; the term "some embodiments" means "at least some embodiments". The relevant definitions of other terms will be given in the following description.

[0044] It should be noted that the concepts such as "trigger subsystem" and "update subsystem" mentioned in this application are only used to distinguish different devices, systems or data, and are not used to limit the order or interdependence of the functions performed by these devices, systems or data.

[0045] It should be noted that the modifications of "one" and "plurality" mentioned in this application are illustrative rather than restrictive, and those skilled in the art should understand that unless otherwise clearly indicated in the context, it should be understood as "one or more". "Plurality" should be understood as two or more.

[0046] First of all, it should be noted that the method in this application is applied to a dual-die SOC chip, and each die (chip unit) on the dual-die SOC chip is a heterogeneous multi-core architecture. The system on the first die is called SSA or subsystem A, and the system on the second die is called SSB or subsystem B. The two die hardware are interconnected through the PCIE interface. Both the SSA and SSB systems need to burn firmware and start independently. SSA and SSB have their own safety domain, security domain, and AP1 domain.

[0047] A safety domain (functional safety domain) refers to a logical area in a system that consists of a group of systems with the same security protection requirements and mutual trust. These systems share the same security policies and security mechanisms to ensure the security of data and systems. A functional safety domain is a collection of logical or physical assets with the same security requirements, typically used in network management and protection. In automotive electronic systems, a safety domain typically refers to a specific hardware functional area that is responsible for handling safety-related functions. These functions in automotive electronic systems can ensure the safety and reliability of the vehicle.

[0048] The security domain (information security domain) is to protect systems and data from malicious attacks or unauthorized access, tampering and destruction. Its goal is to ensure the confidentiality, integrity and availability of the system and prevent external or internal attackers from exploiting system vulnerabilities to damage or steal data. It focuses on the security of the system to prevent malicious attacks and data leakage. It covers encryption services, key management, security policies and other aspects to ensure that the sensitive information and assets of the system are protected. The security domain usually includes components such as hardware security modules (HSM) or secure hardware extensions (SHE) to provide strong security protection.

[0049] The AP1 domain, in SOC (system-on-chip), usually refers to a specific functional area or module related to the application processor (AP). SOC is a technology that integrates the entire information processing system on a chip. In smart devices, AP is responsible for the operation of applications and is an integration of all computing chips in SOC including the CPU. Therefore, the AP1 domain involves functions related to application processing, computing task allocation, resource management, etc.

[0050] It should be noted that the SSA and SSB of the dual-die SOC chip of this application use PCIE as the underlying communication channel, and can trigger the entire system to enter the flashing mode regardless of SSA or SSB. The safety domain of SSA / SSB acts as an administrator to uniformly manage the restart requests sent by other domains in their respective systems. When the SSAAP1 domain or SSB AP1 domain triggers the flashing command, the safety domain of SSA or SSB detects the command and notifies the opposite safety domain (functional safety domain) of each other. The respective safety domains then send the request to restart their respective AP1s to their respective security domains (information security domains), and their respective security domains set their own boot reason (startup reason) and restart their respective AP1 domains.

[0051] PCIE (PCI Express) is a high-speed serial computer expansion bus standard. It can realize high-speed serial point-to-point dual-channel high-bandwidth transmission, and the device is allocated exclusive channel bandwidth. It supports active power management, error reporting, end-to-end reliable transmission, hot plugging, and quality of service (QOS) and other functions.

[0052] It should be noted that a mini system is a small system image file that contains modified system files and optimized configurations, and is used to upgrade and install an existing system to provide a better user experience and more powerful functions.

[0053] The flashing small system mentioned in the embodiment of the present application includes the SSA flashing small system and the SSB flashing small system, which are respectively stored in the external memory for the chip unit to read, and can be a simplified Linux system or other system. After the SSA / SSB flashing small system (Linux system) is started, the virtual network card communication based on PCIE as the physical layer is used, SSA starts the NFS server, and SSB starts the NFS client. SSA shares its external memory with SSB, and the flashing program of SSB reads the image in the external memory mounted on the SSA side through NFS and writes it to the storage medium of SSB. SSA reads the external memory flashing program image and writes it to the storage medium of SSA.

[0054] Technical terms used in this application:

[0055] SOC (System on chip): system-on-chip;

[0056] SSA (SubsystemA): Subsystem A;

[0057] SSB (Subsystem B): Subsystem B;

[0058] NFS (Network File System): Network file service;'

[0059] OTA (Over-the-Air): Over-the-Air download technology.

[0060] Hereinafter, embodiments of the present application will be described in detail with reference to the accompanying drawings.

[0061] Example 1

[0062] Figure 1 The flowchart of the dual-chip unit system-level chip flashing method according to the embodiment of the present application is as follows. Figure 1 , the dual-chip unit system-level chip flashing method of the present application is described in detail.

[0063] In the embodiment of the present application, the flash interface is connected to any one of the two chip unit sub-(die) of the dual chip unit system-level chip. Subsystem A and subsystem B respectively run in the two chip units of the dual chip unit system-level chip, and the two chip unit hardware are interconnected through the PCIE interface as the underlying communication channel for data exchange.

[0064] In the embodiment of the present application, the two chip unit hardwares respectively have their own safety domain, security domain and AP1 domain.

[0065] In step 101, after the triggering subsystem triggers the system flashing command, it enters the system flashing mode and notifies the updating subsystem to enter the system flashing mode.

[0066] Among them, the trigger subsystem can be subsystem A of the dual-chip unit system-level chip (dual-die SOC chip), or it can be subsystem B of the dual-chip unit system-level chip. The update subsystem can also be subsystem A of the dual-chip unit system-level chip, or it can be subsystem B of the dual-chip unit system-level chip. Both subsystem A and subsystem B of the dual-chip unit system-level chip can trigger the system flash command.

[0067] It can be understood that the way in which the flashing is triggered in the present application can be that subsystem A or subsystem B acts as a triggering subsystem to actively detect whether the flashing interface is connected to the external memory, or the inserted external memory triggers subsystem A or subsystem B to initiate the entire system to enter the system flashing mode. This application does not make specific limitations.

[0068] It can be understood that the external memory in the embodiment of the present application can be a USB flash drive, a mobile hard disk, or any other memory that can store system update software, and the present application does not make any specific limitation.

[0069] In the embodiment of the present application, the trigger subsystem sets the boot reason (boot reason information) and restarts the application domain of the trigger subsystem to enter the flashing mode, and the trigger subsystem notifies the update subsystem to enter the system flashing mode. After the update subsystem receives the notification from the trigger subsystem, the update subsystem domain sets the boot reason and restarts the application domain of the update subsystem to enter the flashing mode.

[0070] In step 102, the trigger subsystem mounts the external memory.

[0071] In the embodiment of the present application, the trigger subsystem reads the startup reason information generated by the Security domain in the system flashing mode, mounts the external memory connected to the flashing interface; reads the update subsystem flashing mini-system image in the external memory and sends it to the update subsystem.

[0072] In step 103, the trigger subsystem and the update subsystem read the corresponding flashing subsystem from the shared external memory and run them respectively.

[0073] In the embodiment of the present application, after the trigger subsystem reads its own flashing mini-system image from the external memory and runs it, the trigger subsystem sets up an NFS server program to share the external memory with the update subsystem.

[0074] After receiving and verifying the update subsystem flashing mini-system image sent by the trigger subsystem, the update subsystem boot loader runs the update subsystem flashing mini-system and starts the NFS client program.

[0075] In step 104, the trigger subsystem and the update subsystem respectively read the flashing program image from the shared external memory and store it in their respective storage media.

[0076] In the embodiment of the present application, the trigger subsystem triggers the system to enter the flashing mode, reads the flashing program image from the shared external memory and flashes its own firmware; at the same time, the trigger subsystem receives the NFS client program request of the update subsystem through the NFS server program, reads the update subsystem flashing program image from the external memory and sends it to the update subsystem; the update subsystem flashes its own firmware using the received update subsystem flashing program image, and only one of the dual chip units is needed to complete the system update of the two chip unit subsystems, which also reduces the number of flashing triggers, and the flashing of the two subsystems can be achieved with just one trigger.

[0077] Example 2

[0078] Figure 2 The flash process diagram of the subsystem A triggered according to the embodiment of the present application is shown below. Figure 2 , the flashing process triggered by subsystem A in the embodiment of the present application is described in detail.

[0079] In the embodiment of the present application, the flashing interface is connected to the subsystem A of the dual-chip unit system-level chip and used as the trigger subsystem as an example to illustrate the flashing method of the dual-chip unit system-level chip of the present application. It can be understood that this method is also applicable to the subsystem B whose flashing interface is connected to the dual-chip unit system-level chip.

[0080] It can be understood that subsystem A and subsystem B in the embodiment of the present application respectively run in two chip units (die) of the dual-chip unit system-level chip, and the two chip unit hardware are interconnected through a PCIE interface as the underlying communication channel for data exchange.

[0081] In the embodiment of the present application, the two chip unit hardwares respectively have their own safety domain, security domain and AP1 domain.

[0082] 1) In subsystem A, the AP1 domain sends a flashing mode command to the safety domain. The safety domain notifies the security domain to restart the AP1 domain to enter the system flashing mode. The safety domain notifies subsystem B to enter the system flashing mode. After receiving the notification from the safety domain, the security domain sets the boot reason information (boot reason) and sends the set boot reason information to the AP1 domain. After receiving the boot reason information, the AP1 domain restarts to enter the system flashing mode.

[0083] 2) In subsystem B, after the safety domain receives the notification of entering the system flashing mode sent by subsystem A, it sends the command of restarting AP1 to enter the system flashing mode to the security domain; after the security domain receives the command of restarting AP1 to enter the system flashing mode, it sends the set boot reason information (boot reason) to the AP1 domain; the AP1 domain receives the boot reason information, restarts to enter the system flashing mode, and waits for the flashing small system image sent by subsystem A.

[0084] 3) After the AP1 domain of subsystem A enters the system flashing mode, it reads the boot reason and mounts the external storage, and reads the flashing small system image of subsystem B from the external storage through the flashing interface and sends it to the AP1 domain of subsystem B.

[0085] 4) After receiving the flashing small system image of subsystem B sent by subsystem A, the AP1 domain of subsystem B enters the flashing small system, starts the NFS client program and waits for the NFS server program of subsystem A to be ready.

[0086] 5) The AP1 domain of subsystem A reads the subsystem A flashing small system image in the external memory through the flashing interface and enters the flashing small system.

[0087] 6) The AP1 domain of subsystem A mounts the external storage, sets up the NFS server program, and then shares the external storage with the AP1 domain of subsystem B.

[0088] 7) The AP1 domain of subsystem A reads the flashing program image from the external memory and stores it to the storage medium, refreshing the subsystem A firmware.

[0089] 8) The AP1 domain of subsystem B reads the flashing program image from the NFS server program and stores it to the storage medium, refreshing the firmware of subsystem B.

[0090] Example 3

[0091] Figure 3 The flash process diagram of the subsystem B triggered according to the embodiment of the present application is shown below. Figure 3, the flashing process triggered by subsystem B in the embodiment of the present application is described in detail.

[0092] In the embodiment of the present application, the flashing interface is connected to the subsystem A and subsystem B of the dual-chip unit system-level chip as the trigger subsystem to illustrate the flashing method of the dual-chip unit system-level chip of the present application. It can be understood that this method is also applicable to the subsystem B of the dual-chip unit system-level chip whose flashing interface is connected.

[0093] It can be understood that subsystem A and subsystem B in the embodiment of the present application respectively run in the two chip units of the dual-chip unit system-level chip, and the two chip unit hardware are interconnected through the PCIE interface as the underlying communication channel for data exchange.

[0094] In the embodiment of the present application, the two chip unit hardwares respectively have their own safety domain, security domain and AP1 domain.

[0095] 1) In subsystem B, the AP1 domain sends a flashing mode command to the safety domain, and the safety domain notifies the security domain to restart the AP1 domain to enter the system flashing mode; the safety domain notifies subsystem A to enter the system flashing mode; after receiving the safety domain notification, the security domain sets the boot reason information (boot reason) and sends the set boot reason information to the AP1 domain; after receiving the boot reason information, the AP1 domain restarts to enter the system flashing mode and waits for subsystem A to send the flashing small system image.

[0096] 2) Inside subsystem A, after the safety domain receives the notification that subsystem B has entered the system flashing mode, it sends a command to restart AP1 to enter the flashing mode to the security domain; after the security domain receives the command to restart AP1 to enter the flashing mode, it sends the set boot reason information (boot reason) to the AP1 domain; the AP1 domain receives the boot reason information, restarts to enter the system flashing mode, and reads the boot reason to mount the external storage; the AP1 domain reads the flashing small system image of subsystem B from the external storage through the flashing interface and sends it to subsystem B.

[0097] 3) The AP1 domain of subsystem B receives the flashing small system image of subsystem B and jumps into the flashing small system to run.

[0098] 4) The AP1 domain of subsystem A reads the flashing small system image of subsystem A from the external memory through the flashing interface and jumps into the flashing small system to run.

[0099] 5) The AP1 domain of subsystem A mounts the external storage, sets up the NFS server program, and then shares the external storage with the AP1 domain of subsystem B.

[0100] 6) The AP1 domain of subsystem B starts the NFS client program and waits for the NFS server program to be ready.

[0101] 7) The AP1 domain of subsystem A reads the flashing program image from the external memory and stores it to the storage medium, refreshing the subsystem A firmware.

[0102] 8) The AP1 domain of subsystem B reads the flashing program image from the NFS server program and stores it to the storage medium, refreshing the firmware of subsystem B.

[0103] Example 4

[0104] The present application also provides a system-on-chip. Figure 4 is a principle block diagram of a system-level chip according to an embodiment of the present application, such as Figure 4 As shown, the system-level chip 400 of the present application includes two chip modules (401 and 402), and the chip module 401 and the chip module 402 exchange data through PCIE as the underlying communication channel. The software update of the chip module 401 subsystem and the chip module 402 subsystem adopts the dual-chip unit system-level chip flashing method of the above embodiment.

[0105] Example 5

[0106] The present application also provides a vehicle system. Figure 5 is a functional block diagram of a vehicle system according to an embodiment of the present application, such as Figure 5 As shown, the vehicle system 500 of the embodiment of the present application includes a dual-chip unit system-level chip 501 and a flash interface 502, wherein:

[0107] The dual-chip unit system-on-chip 501 is connected to an external memory via a flashing interface 502 , and the dual-chip unit system-on-chip flashing method of the above embodiment is used to complete the software update.

[0108] In the embodiment of the present application, the dual-chip unit system-on-chip 501 adopts the system-on-chip 400 in the above embodiment.

[0109] In the embodiment of the present application, the flash interface 502 can be a USB interface, a USB Type C interface, etc.

[0110] The system-level chip flashing method of the dual-chip unit of the present application can update the software version of the entire system by connecting to an external storage device (such as a USB flash drive) through a flashing interface when the vehicle system is not convenient to upgrade via network OTA or when the partition table on the entire storage device needs to be changed.

[0111] It should be understood that, although the steps in the flowcharts of the accompanying drawings of the specification are displayed in sequence according to the indications of the arrows, these steps are not necessarily executed in sequence in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowchart may include multiple sub-steps or multiple stages, and these sub-steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these sub-steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the sub-steps or stages of other steps.

[0112] It should be noted that the specific numerical values ​​mentioned above are only used as examples to illustrate the implementation of the present application in detail, and should not be understood as limiting the present application. In other examples or implementations or embodiments, other numerical values ​​can be selected according to the present application, and are not specifically limited here.

[0113] Those skilled in the art can understand that the above are only preferred embodiments of the present application and are not intended to limit the present application. Although the present application is described in detail with reference to the aforementioned embodiments, those skilled in the art can still modify the technical solutions recorded in the aforementioned embodiments or replace some of the technical features therein by equivalents. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A dual-chip unit system-level chip flashing method, characterized in that: Each of the dual-chip units is configured with a subsystem, and both subsystems can trigger a system flash command; the method includes: After the trigger subsystem triggers the system flash command, it enters the system flash mode and notifies the update subsystem to enter the system flash mode; The trigger subsystem mounts and shares the external memory; The trigger subsystem and the update subsystem read the corresponding flashing subsystem from the shared external memory and run them respectively; The trigger subsystem and the update subsystem respectively read the flash program image from the external memory and store them in their respective storage media.

2. The method according to claim 1, characterized in that: After the trigger subsystem triggers the system update command, the step of entering the system flashing mode also includes: Inside the trigger subsystem, the AP1 domain sends the system flash command to the Safety domain; The Safety domain notifies the Security domain to enter the system flashing mode; After the Security domain sets the startup reason information, it notifies the AP1 domain to restart and enter the system flashing mode; The Safety domain notifies the update subsystem to enter the system flashing mode.

3. The method according to claim 1, characterized in that The step of updating the subsystem to enter the system flashing mode also includes: Within the update subsystem, after receiving the notification from the trigger subsystem, the Safety domain notifies the Security domain to enter the system flashing mode; After the Security domain sets the startup reason information, it notifies the AP1 domain to restart and enter the system flashing mode; The AP1 domain enters the system flashing mode.

4. The method according to claim 1, characterized in that: The step of triggering the subsystem to mount the external memory also includes: In the system flashing mode, the trigger subsystem reads the startup reason information generated by the Security domain in its AP1 domain and mounts the external memory; The AP1 domain reads the update subsystem flashing small system image in the external memory and sends it to the update subsystem.

5. The method according to claim 4, characterized in that The step of triggering the subsystem to share the external memory also includes: The trigger subsystem AP1 domain reads its flashing small system image from the external memory and runs it; The trigger subsystem AP1 domain sets up an NFS server program to share the external memory with the update subsystem.

6. The method according to claim 5, characterized in that The step of the trigger subsystem AP1 domain reading its flashing small system image from the external memory and running it also includes: The boot loader of the trigger subsystem AP1 domain reads its flashing small system image from the external memory according to the startup reason information and runs it.

7. The method according to claim 5, characterized in that Also includes: After receiving and verifying the update subsystem flashing small system image sent by the trigger subsystem, the boot loader of the update subsystem AP1 domain runs the update subsystem flashing small system; The update subsystem AP1 domain starts the NFS client program.

8. The method according to claim 1, characterized in that Also includes: The trigger subsystem communicates with the update subsystem using PCIE as a physical layer virtual network card.

9. A dual-chip unit system-on-chip, using the method according to any one of claims 1 to 8, characterized in that: include: Two heterogeneous multi-core chip units interconnected by a PCIE interface; and a flash interface connected to an external memory; The two heterogeneous multi-core chip units are respectively connected to the external memory via a flash interface.

10. A vehicle computer system, characterized in that: A dual-chip unit system-on-chip comprising the dual-chip unit system-on-chip of claim 9.

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