Rate-compatible tail-biting convolutional code encoding method and device based on selective multiplicative repetition

Abstract

The application relates to the field of digital communication and digital storage, and particularly relates to a rate-compatible tail-biting convolutional code encoding method and device based on selective multiplicative repetition. The method comprises the following steps: obtaining an information sequence to be encoded; performing CRC encoding on the information sequence by using a cyclic redundancy polynomial to obtain a redundancy sequence, wherein the redundancy sequence comprises the information sequence and a CRC redundancy information sequence; periodically inserting the CRC redundancy information sequence into the information sequence in a symbol unit formed by a preset number of bits to obtain a new redundancy sequence; performing tail-biting convolutional encoding according to the new redundancy sequence to obtain an encoded sequence; and performing selective multiplicative repetition encoding according to a preset target code rate, the encoded sequence and a randomly determined multiplicative coefficient to obtain a selective repetition encoded sequence. The encoding method provided by the application has a lower block error rate under various code rates.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of digital communication and digital storage, and particularly relates to a rate-compatible tail-biting convolutional code encoding method and device based on selective multiplicative repetition. BACKGROUND

[0002] The fifth generation communication technology meets the specific needs of autonomous machines and devices by providing two novel wireless modes, ultra-reliable communication (URC) in short code range and massive machine-to-machine communication (MM2M). In future 6G communication technology, virtual reality, Internet of Everything will greatly depend on these two wireless modes, so they will still be the main driving factors of 6G. In order to meet the requirements of ultra-high reliability and ultra-low delay of the communication system, it is necessary to further improve the coding and decoding ability of the communication system. Channel coding technology is a key technology to achieve ultra-high reliability and ultra-low delay communication.

[0003] To construct short codes approaching the performance bound, in 2015, Alexander Vardy in his published paper “List decoding of polar codes” (IEEE Trans. Inf. Theory, vol. 61, no. 5, pp. 2213-2226, 2015) disclosed a cyclic redundancy check (CRC) polar code decoded with a successive cancellation list decoder, demonstrating its competitiveness in short code communications. In 2019, Erdal Ar1kan in his published paper “From sequential decoding to channel polarization and back again” (arXiv preprint arXiv:1908.09594, 2019) disclosed a polar-adjusted convolutional code, whose performance approaches the finite-length bound. In 2023, Yulin Shao in his published paper “Attention code: Ultra-reliable feedback codes for short-packet communications” (IEEE Transactions on Communications, vol. 71, no. 8, pp. 4437-4452, 2023) disclosed an Attention code constructed with deep learning, demonstrating its potential in short code communications. In 2022, Hengjie Yang in his published paper “CRC-aided list decoding of convolutional codes in the short block length regime” (IEEE Trans. Inf. Theory, vol. 68, no. 6, pp. 3744-3766, 2022) disclosed a tail-biting convolutional code based on CRC assistance, exhibiting performance approaching the RCU bound. In 2022, Jacob King in his published paper “CRC-aided list decoding of convolutional and polar codes for short messages in 5G” (ICC 2022-IEEE International Conference on Communications, 2022, pp. 92-97) disclosed that CRC-aided tail-biting convolutional codes have greater potential than polar codes in the short code range.

[0004] However, the above short codes are not suitable for scenarios where the channel quality changes rapidly, i.e., there is no rate compatibility. There are two general techniques for designing rate-compatible codes: puncturing and shortening. In 2022, Seokju Han published a paper titled "Rate-compatible punctured polar codes" (IEEE Commun. Lett., vol. 26, no. 4, pp. 753-757, 2022) that disclosed a rate-compatible polar code constructed using the puncturing technique. In 2023, Xianwen Zhang published a paper titled "Rate-compatible puncturing and shortening of short PAC codes for 6G URLLC" (2023 IEEE 24th International Workshop on Signal Processing Advances in Wireless Communications (SPAWC), 2023, pp. 301-305) that disclosed a rate-compatible polar-adjusted convolutional code. In 2024, Xinyuanmeng Yao published a paper titled "A balanced tree approach to construction of length flexible polar codes" (IEEE Transactions on Communications, vol. 72, no. 2, pp. 665-674, 2024) that disclosed a length-flexible polar code encoding scheme with performance comparable to that of 5G polar codes. Multiplicative repetition is a technique commonly used in constructing rate-compatible short codes. In 2016, Xijin Mu published a paper titled "Multiplicative repetition based superposition transmission of nonbinary codes" (2016 IEEE International Symposium on Information Theory (ISIT), 2016, pp. 3023-3027) that disclosed a superposition transmission scheme based on multiplicative repetition, which outperformed the Markov superposition transmission scheme.Based on this scheme, in 2018, Xue Tan disclosed a partial superposition transmission scheme based on selective multiplicative repetition in the paper "Multiplicative repetition based partial superposition transmission with nonbinary codes" (2018 IEEE 10th International Symposium on Turbo Codes & Iterative Information Processing (ISTC), 2018, pp. 1-5), which further reduces the decoding complexity and delay of the multiplicative repetition superposition transmission scheme. In 2022, Fariba Abbasi disclosed different schemes for constructing polar codes using multiplicative repetition technology in the papers "Hybrid non-binary repeated polar codes" (IEEE Trans. Wireless Commun., vol. 21, no. 9, pp. 7582 7594, 2022) and "Polar coded repetition" (IEEE Transactions on Communications, vol. 70, no. 10, pp. 6399-6409, 2022). However, the performance of the codes constructed by the above schemes still has a certain gap from the finite-length limit in the short code range, and further research is needed to develop new coding schemes to reduce this gap. SUMMARY

[0005] To improve the performance and rate compatibility of tail biting convolutional codes in the short code range, the present application provides a rate-compatible tail biting convolutional code encoding method and device based on selective multiplicative repetition, which uses selective multiplicative repetition coding technology to construct rate-compatible tail biting convolutional codes. Under the condition of equivalent decoding ability and delay, the encoding method proposed by the present application has a lower block error rate at various code rates.

[0006] To achieve the above object, the present application provides the following technical solutions:

[0007] In a first aspect, the present application provides a rate-compatible tail biting convolutional code encoding method based on selective multiplicative repetition, comprising the steps of:

[0008] obtaining an information sequence to be encoded;

[0009] performing CRC encoding on the information sequence using a cyclic redundancy polynomial to obtain a redundancy sequence, the redundancy sequence comprising the information sequence and a CRC redundancy information sequence;

[0010] Periodically inserting the CRC redundant information sequence into the information sequence in units of symbols consisting of a preset number of bits to obtain a new redundant sequence;

[0011] Perform tail-biting convolution coding on the new redundant sequence to obtain a coding sequence;

[0012] Selective multiplicative repetitive coding is performed according to a preset target code rate, the coding sequence and a randomly determined multiplicative coefficient to obtain a selective repetitive coding sequence.

[0013] In a second aspect, the present invention provides a rate-compatible tail-biting convolutional code encoding device based on selective multiplicative repetition, comprising:

[0014] An information sequence acquisition module, which is used to obtain the information sequence to be encoded;

[0015] a CRC encoder, configured to perform CRC encoding on the information sequence using a cyclic redundancy polynomial to obtain a redundant sequence, wherein the redundant sequence includes an information sequence and a CRC redundant information sequence;

[0016] a block-type conventional multiplexer, configured to periodically insert the CRC redundant information sequence into the information sequence in units of symbols consisting of a preset number of bits, to obtain a new redundant sequence;

[0017] a tail-biting convolutional encoder, configured to perform tail-biting convolutional coding on the new redundant sequence to obtain a coded sequence;

[0018] The selective multiplicative repeater is used for performing selective multiplicative repetitive coding according to a preset target code rate, the coding sequence and a randomly determined multiplicative coefficient to obtain a selective repetitive coding sequence.

[0019] In a third aspect, an embodiment of the present invention further provides an electronic device, including a processor and a memory;

[0020] The memory is used to store programs;

[0021] The processor executes the program to implement the method described above.

[0022] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium, wherein the storage medium stores a program, and the program is executed by a processor to implement the method described above.

[0023] In a fifth aspect, the embodiments of the present application further provide a computer program product or computer program, which comprises computer instructions stored in a computer readable storage medium. A processor of a computer device can read the computer instructions from the computer readable storage medium, and the processor executes the computer instructions to enable the computer device to perform the foregoing method.

[0024] Compared with the prior art, the present application has the following beneficial effects:

[0025] 1. The present application has the advantages of simple encoding, flexible structure, easy implementation, strong applicability, etc.

[0026] 2. Compared with the existing encoding scheme, the present application can obtain a lower block error rate. BRIEF DESCRIPTION OF DRAWINGS

[0027] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments will be briefly introduced as follows. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without any creative effort on the basis of these drawings.

[0028] Figure 1 The flow chart of the rate-compatible tail-biting convolutional code encoding method of the embodiments of the present application;

[0029] Figure 2 The block diagram of the rate-compatible tail-biting convolutional code encoding of the embodiments of the present application.

[0030] Figure 3 The detailed encoding block diagram of the block-shaped regular multiplexer module in the encoding block diagram of the embodiments of the present application.

[0031] Figure 4 The detailed encoding block diagram of the selective multiplicative repetition module in the encoding block diagram of the embodiments of the present application.

[0032] Figure 5 The performance diagram of the embodiment 1-1 of the present application.

[0033] Figure 6 The performance diagram of the embodiment 1-2 of the present application.

[0034] Figure 7 The performance diagram of the embodiment 1-3 of the present application. DETAILED DESCRIPTION

[0035] The following will be combined with the accompanying drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0036] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof in the embodiments of the present invention are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0037] Example:

[0038] See also Figures 1 to 7 The embodiment of the present invention provides a rate-compatible tail-biting convolutional code encoding method based on selective multiplicative repetition, which may specifically include the following steps:

[0039] Step 100: Obtain the information sequence to be encoded.

[0040] In this step, set the information sequence in Represents a binary finite field, and the length of the information sequence is k.

[0041] Step 200: Perform CRC encoding on the information sequence using a cyclic redundancy polynomial to obtain a redundant sequence, where the redundant sequence includes an information sequence and a CRC redundant information sequence.

[0042] In this step, set the cyclic redundancy polynomial Performing CRC encoding on the information sequence using a cyclic redundancy polynomial to obtain an intermediate redundant sequence p of length m;

[0043] After adding an intermediate redundant sequence p of length m to the end of the information sequence u, the length is k'=k+ The redundant sequence includes the information sequence and the CRC redundant information sequence, where l i Indicates the length of information selected as a complete symbol, Indicates the number of symbols. i The length of the information is used as a complete information symbol.

[0044] Step 300: Periodically insert the CRC redundant information sequence into the information sequence in units of symbols consisting of a preset number of bits to obtain a new redundant sequence.

[0045] In this step, the information symbols involving CRC redundant information are periodically inserted into the information sequence u in units of symbols consisting of a preset number (l) of bits, and a new redundant sequence is obtained. Each symbol w i The length is denoted as l′ i .

[0046] Step 400: Perform tail-biting convolution coding on the new redundant sequence to obtain a coded sequence. In this step, the new redundant sequence w is subjected to tail-biting convolution coding to obtain a length of Coding sequence Among them, the symbol c i represents w i go through The length of the coded symbol obtained after tail-biting convolutional coding is is the representation of the convolutional code, 1 represents the input length of the convolutional code, w represents the output length after convolution, and v represents the number of registers of the convolutional code generator minus 1. That is, after 1 bit of information is input into the convolutional code encoder with v+1 registers, the output convolutional code length is

[0047] Step 500: performing selective multiplicative repetitive coding according to a preset target bit rate, the coding sequence and a randomly determined multiplicative coefficient to obtain a selective repetitive coding sequence.

[0048] In this step, the step of obtaining the selectively repeated coding sequence may specifically include:

[0049] The preset target bit rate is Indicates the number of symbols output after selective multiplication repetition coding, Indicates the number of symbols before selective multiplication repetition coding, k is the length of the information sequence, n is the length of the selective repetition coding sequence; calculate the number of symbols that need to be multiplicatively repeated Set h to represent the number of symbols involved in CRC redundant information, the sequence of position indexes of symbols involved in CRC redundant information in w is represented by I, and the sequence of the remaining position indexes is represented by Indicates; set the number of times c can be repeated completely [x] means rounding x down.

[0050] All symbols of the coded sequence c are multiplicatively re-encoded H times. In order to achieve the preset target code rate R', additional repetition is required. Symbol, when When , randomly select from the coding sequence c The symbols whose position indexes are in I are selectively multiplicatively repeated; when In addition to selecting all symbols with position indexes in I from the coding sequence c, it is also necessary to randomly select all symbols with position indexes in P from the coding sequence c. symbols are multiplicatively repeated; a selectively repeated coding sequence is obtained Among them, the symbol c′ of the selectively repeated coding sequence c′ i It is based on In the random selection of independent multiplicative coefficients ρ, the symbol c of the coding sequence c i conduct The multiplication operation on .

[0051] Through the method provided in this embodiment, for a k-length information sequence, after generating m-bit CRC redundancy, the selected The symbols composed of bit information are used as units, CRC related symbols are periodically inserted, CRC related symbols are selected to be periodically inserted into the original sequence, and element blocks related to CRC are selected in subsequent operations for selective multiplicative repetition coding.

[0052] For a k-input n-output Block code Where l is the length of the bit information that needs to be combined, for The output length of the convolutional code. The input is length The output is a block of elements c of length n, c'=ρc, where ρ is in The use of such multiplication operations on finite multivariate fields can improve the anti-interference ability of the code.

[0053] The selected l size is any size, the number of l is any number, and the block code is an arbitrary block code, and the symbol composed of each l-bit information is Any symbol in, after the encoder After each The symbol consisting of the longest bit information is Any symbol in The multiplicative coefficient ρ selected in is any element except {0}.

[0054] Example 1-1:

[0055] The setting information sequence u has a length k = 41, the CRC encoder is 10th order, and the generating polynomial is 5D9. The selected segment length l i = 3 target code rate

[0056] The encoding method of the present application comprises the following steps:

[0057] Step one: a length-k information sequence u = (u0, u1, u2, …, uk-1) is given The cyclic redundancy polynomial of the CRC encoder A length-m intermediate redundancy sequence p is generated after that. Wherein the generating sequence composed of (p0, p1, p2, …, pk-1) is (10111101001), expressed as 5D9 in hexadecimal. 10

[0058] Step two: after adding the CRC redundancy at the tail of the information sequence u, a sequence with a length of k' = l1+l2+…+l 17 = 51 is formed, and every l i = 3 information is taken as a complete information symbol to obtain l = {3, 3, …, 3}. The information symbol involving the CRC redundancy information is periodically inserted into the information sequence through a block conventional multiplexer to obtain a new redundancy sequence w = (w1, w2, …, w 17 ), and the length of each symbol w i is recorded as l' i = 3.

[0059] Step three: the new redundancy sequence w is input into a (2, 1, 6) tail biting convolutional encoder to obtain a length-n = 2k' + 1 = 103 code sequence c = (c1, c2, …, c 17 ).

[0060] Step four: determine the required target code rate R', and input the code sequence c into a selective multiplicative repeater. According to the target code rate ( , the number of symbols output after the selective multiplicative repeater), calculate the number of symbols that need to be multiplied The sequence I = {3, 7, 11, 16} is composed of the position indexes of the symbols in w that need to be multiplied, and the sequence P = {0, 1, 2, 4, 5, 6, 8, 9, 10, 12, 13, 14, 15} is composed of the remaining position indexes; That is, the code sequence c can be completely repeated once;

[0061] Step five: first randomly select 17 independent multiplicative coefficients ρ from , and multiply them with 17 symbols in c ​​multiplication operation on c. Then, in order to achieve the target code rate R', additional repetition of 3 symbols is selected All symbols in c with position index in I are selected first, and then 3 symbols in c with position index in P are randomly selected for multiplicative repetition. An independent multiplicative coefficient p is randomly selected from i and multiplied with the candidate symbols c' i = pc i to obtain c' i = (c'1, c'2, … c'k'). 41 The selective multiplicative repetition is completed.

[0062] Figure 5 The performance of the rate-compatible tail-biting convolution code based on selective multiplicative repetition in the present example is given. For comparison of performance, Figure 5 the performances of CA-Polar code and LET-Turbo code under the same code length and code rate conditions are also given. It can be seen from the figure that the rate-compatible tail-biting convolution code based on selective multiplicative repetition proposed in the present embodiment has a lower block error rate, and is much better than the LET-Turbo code in performance, and is about 0.5 dB better than the CA-Polar code.

[0063] Embodiment 1-2

[0064] The information sequence u is set to have a length k = 42, the CRC encoder is of order 10, and the generating polynomial is 71F. The selected segment length l i = 4, and the target code rate

[0065] The encoding method of the present application comprises the following steps:

[0066] Step 1: Given an information sequence u with a length k passes through a cyclic redundancy polynomial of a CRC encoder to generate an intermediate redundancy sequence p with a length m. The generating sequence composed of (p0, p1, p2, … p10) is (11100011111), which is represented in hexadecimal as 71F.

[0067] Step 2: For the sequence with a length k' = l1+l2+…+l 13 = 52 after adding the CRC redundancy at the tail end of the information sequence u, every l i ​​= 4 information as a complete information symbol to obtain l = {4, 4, ..., 4}. It is passed through a block conventional multiplexer, and the information symbols involving CRC redundant information are periodically inserted into the information sequence to obtain a new redundant sequence w = (w1, w2, ..., w 13 ), each symbol w i The length is denoted as l′ i =4.

[0068] Step 3: Pass the new redundant sequence w through the (2, 1, 6) tail-biting convolutional encoder to obtain a length of The coding sequence c=(c1,c2,…,c 13 ).

[0069] Step 4: Determine the target code rate R' and input the coded sequence c into the selective multiplicative repeater. ( represents the number of symbols output after the selective multiplicative repeater), calculate the number of symbols that need to be multiplicatively repeated The position index sequence in w is I = {3, 7, 12}, and the remaining position index sequence is P = {0, 1, 2, 4, 5, 7, 8, 9, 10, 11}; That is, the coding sequence c can be repeated completely;

[0070] Step 5: First, randomly select 13 independent multiplicative coefficients ρ are randomly selected from the 13 symbols in c and are combined with the 13 symbols in c. Repeat the above steps three times. Then, in order to achieve the target bit rate R', you need to select additional repeat symbol. First, select all symbols in c whose position index is within I, and then randomly select 8 symbols in c whose position index is within P for multiplication repetition. In the random selection of independent multiplicative coefficients ρ, and the alternative symbol c i conduct The multiplication operation on gets c′ i =ρc i Finally, the selectively repeated coding sequence c'=(c'1, c'2, ... c') after selective multiplication is obtained. 63 ) to complete the encoding.

[0071] Figure 6 The performance graph of the rate-compatible tail-biting convolutional code based on selective multiplicative repetition in this example is given. In order to analyze the performance impact of choosing different segment lengths l, Figure 6 Also given the choice of different l iThe performance comparison chart of the codes. From the chart, it can be seen that the performance of the code with l = 4 is better than that of the code with l = 1 by about 0.5 dB. It can also be seen that the performance can be increased appropriately by selecting a proper l, but when l is increased to a certain extent, the performance gain is no longer significant.

[0072] Embodiments 1-3:

[0073] The information sequence u has a length k = 40, the CRC encoder is of order 10, and the generating polynomial is 48F. The selected segment length l i = 2

[0074] The encoding method of the present application comprises the following steps:

[0075] Step 1: Given an information sequence u with a length k The cyclic redundancy polynomial of the CRC encoder is A middle redundancy sequence p with a length m is generated. The generating sequence composed of (p0, p1, p2, … p 10 ) is (10010001111), which is expressed in hexadecimal as 48F.

[0076] Step 2: For the sequence with a length k' = l1 + l2 + … + l 25 = 50 after adding the CRC redundancy at the tail of the information sequence u, every l i = 2 information is taken as a complete information symbol to obtain l = {2, 2, …, 2}. The information symbol is periodically inserted into the information sequence through a block-wise conventional multiplexer, and a new redundancy sequence w = (w1, w2, …, w 25 ) is obtained, wherein the length of each symbol w i is denoted as l' i = 2.

[0077] Step 3: The new redundancy sequence w is input into a (2, 1, 6) tail biting convolutional encoder to obtain an encoded sequence c = (c1, c2, …, c 25 ) with a length of .

[0078] Step 4: Determine the required target code rate R', and input the encoded sequence c into a selective multiplicative repeater. According to the target code rate ( , the number of symbols output after the selective multiplicative repeater), the number of symbols that need to be multiplied is calculated The position index sequence in w is I = {9, 19, 29, 39, 49}, and the remaining position index sequence is P = {0, 1, 2, 4, 5, 6, 7, 8, 10, 11, 12, 13, 14, 15, 16, 17, 18, 20, 21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 32, 33, 34, 35, 36, 37, 38, 40, 41, 42, 43, 44, 45, 46, 47, 48}; That is, the coding sequence c can be repeated completely;

[0079] Step 5: First, randomly select Randomly select 25 independent multiplicative coefficients ρ from the 25 symbols in c and perform Repeat the above steps once. Then, in order to achieve the target bit rate R', you need to select additional repeat symbol. First, select all symbols in c whose position index is within I, and then randomly select 5 symbols in c whose position index is within P to repeat multiplication. In the random selection of independent multiplicative coefficients ρ, and the alternative symbol c i conduct The multiplication operation on gets c′ i =ρc i Finally, the selectively repeated coding sequence c'=(c'1, c'2, ... c') after selective multiplication is obtained. 60 ) to complete the encoding.

[0080] Figure 7 The performance graph of the rate-compatible tail-biting convolutional code based on selective multiplicative repetition in this example is given. In order to analyze the impact of selective multiplicative repetition, direct multiplicative repetition and bit repetition on performance, Figure 7 The performance of these three schemes is compared. As can be seen from the figure, selective multiplicative repetition performs better than direct random multiplicative repetition and random bit repetition, and random multiplicative repetition performs better than random bit repetition.

[0081] Example 2

[0082] Based on the same inventive concept, an embodiment of the present invention further provides a rate-compatible tail-biting convolutional code encoding device based on selective multiplicative repetition, comprising:

[0083] An information sequence acquisition module, which is used to obtain the information sequence to be encoded;

[0084] a CRC encoder, configured to perform CRC encoding on the information sequence using a cyclic redundancy polynomial to obtain a redundant sequence, wherein the redundant sequence includes an information sequence and a CRC redundant information sequence;

[0085] a block-type conventional multiplexer, configured to periodically insert the CRC redundant information sequence into the information sequence in units of symbols consisting of a preset number of bits, to obtain a new redundant sequence;

[0086] a tail-biting convolutional encoder, configured to perform tail-biting convolutional coding on the new redundant sequence to obtain a coded sequence;

[0087] The selective multiplicative repeater is used for performing selective multiplicative repetitive coding according to a preset target code rate, the coding sequence and a randomly determined multiplicative coefficient to obtain a selective repetitive coding sequence.

[0088] Since the device is a device corresponding to the rate-compatible tail-biting convolutional code encoding method based on selective multiplicative repetition in an embodiment of the present invention, and the principle of solving the problem by the device is similar to that of the method, the implementation of the device can refer to the implementation process of the above-mentioned method embodiment, and the repeated parts will not be repeated.

[0089] Example 3

[0090] Based on the same inventive concept, an embodiment of the present invention also provides an electronic device, comprising a processor and a memory, wherein the memory stores at least one instruction, at least one program, a code set, or an instruction set, and the at least one instruction, the at least one program, the code set, or the instruction set is loaded and executed by the processor to implement the rate-compatible tail-biting convolutional code encoding method based on selective multiplicative repetition as described above.

[0091] It is understood that the memory may include random access memory (RAM) or read-only memory (ROM). Optionally, the memory includes a non-transitory computer-readable storage medium. The memory may be used to store instructions, programs, codes, code sets, or instruction sets. The memory may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for at least one function, instructions for implementing the various method embodiments described above, etc.; the data storage area may store data created based on the use of the server, etc.

[0092] The processor can include one or more processing cores. The processor connects various parts within the entire server by various interfaces and lines, executes various functions of the server and processes data by running or executing instructions, programs, code sets or instruction sets stored in the memory, and calling data stored in the memory. Optionally, the processor can be implemented in at least one of a hardware form of a digital signal processing (DSP), a field-programmable gate array (FPGA), and a programmable logic array (PLA). The processor can be integrated with one or several combinations of a central processing unit (CPU) and a modem. Among them, the CPU mainly processes operating systems and application programs; the modem is used to process wireless communication. It can be understood that the above-mentioned modem can also not be integrated into the processor, but be implemented by a single chip.

[0093] Since the electronic device is the electronic device corresponding to the selective multiplicative repetition based rate-compatible tail-biting convolutional code encoding method of the embodiments of the present application, and the principle of solving problems of the electronic device is similar to that of the method, the implementation of the electronic device can refer to the implementation process of the above-mentioned method embodiments, and the repeated parts will not be described again.

[0094] Embodiment 4

[0095] Based on the same inventive concept, the embodiments of the present application also provide a computer readable storage medium, wherein the storage medium stores at least one instruction, at least one program, a code set or an instruction set, and the at least one instruction, the at least one program, the code set or the instruction set are loaded and executed by the processor to implement the selective multiplicative repetition based rate-compatible tail-biting convolutional code encoding method.

[0096] Those skilled in the art will appreciate that all or part of the steps in the various methods of the above embodiments can be completed by instructing related hardware through a program. The program can be stored in a computer-readable storage medium, and the storage medium includes a read-only memory (ROM), a random access memory (RAM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), a one-time programmable read-only memory (OTPROM), an electronically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, magnetic disk storage, magnetic tape storage, or any other computer-readable medium capable of carrying or storing data.

[0097] Since the storage medium is the storage medium corresponding to the rate-compatible tail-biting convolutional code encoding method based on selective multiplicative repetition in an embodiment of the present invention, and the principle of solving the problem by the storage medium is similar to that of the method, the implementation of the storage medium can refer to the implementation process of the above-mentioned method embodiment, and the repeated parts will not be repeated.

[0098] Example 5

[0099] In some possible implementations, various aspects of the methods of the embodiments of the present invention may also be implemented in the form of a program product, which includes program code. When the program product is executed on a computer device, the program code is used to cause the computer device to perform the steps of the rate-compatible tail-biting convolutional code encoding method based on selective multiplicative repetition according to various exemplary embodiments of the present application described above in this specification. The executable computer program code or "code" for performing the various embodiments may be written in a high-level programming language such as C, C++, C#, Smalltalk, Java, JavaScript, Visual Basic, Structured Query Language (e.g., Transact-SQL), Perl, or in various other programming languages.

[0100] It should be understood that various parts of the present invention can be implemented using hardware, software, firmware, or a combination thereof. In the above-described embodiments, multiple steps or methods can be implemented using software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented using hardware, as in another embodiment, any one of the following technologies known in the art or a combination thereof can be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application-specific integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0101] In the description of this specification, the reference terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" mean that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification and features of different embodiments or examples without contradiction.

[0102] The above embodiments are intended only to illustrate the technical concepts and features of the present invention. Their purpose is to enable those skilled in the art to understand the contents of the present invention and implement them accordingly. They are not intended to limit the scope of protection of the present invention. Any equivalent changes or modifications made based on the essence of the present invention are intended to be covered by the scope of protection of the present invention.

Claims

1. A rate-compatible tail-biting convolutional coding method based on selective multiplicative repetition, characterized in that: Including steps: Obtaining the information sequence to be encoded; Performing CRC encoding on the information sequence using a cyclic redundancy polynomial to obtain a redundant sequence, wherein the redundant sequence includes an information sequence and a CRC redundant information sequence; Periodically inserting the CRC redundant information sequence into the information sequence in units of symbols consisting of a preset number of bits to obtain a new redundant sequence; Perform tail-biting convolution coding on the new redundant sequence to obtain a coding sequence; According to the preset target code rate, the coding sequence and the randomly determined multiplication coefficient, selective multiplication repetition coding is performed to obtain a selective repetition coding sequence, wherein the preset target code rate is Indicates the number of symbols output after selective multiplication repetition coding, represents the number of symbols before selective multiplication repetition coding, k is the length of the information sequence, and n is the length of the coding sequence; Calculate the number of symbols that need to be repeated multiplicatively Set h to represent the number of symbols involved in CRC redundant information, the sequence of position indexes of symbols involved in CRC redundant information in w is represented by I, and the sequence of the remaining position indexes is represented by Indicates; set the number of times the coding sequence c can be completely repeated The symbol [] means rounding down the parameter within the symbol; All symbols of the coded sequence c are multiplicatively re-encoded H times. In order to achieve the preset target code rate R', additional repetition is required. symbols, when When , randomly select from the coding sequence c The symbols whose position index is in I are selectively multiplicatively repeated; when In addition to selecting all symbols with position indexes in I from the coding sequence c, it is also necessary to randomly select all symbols with position indexes in P from the coding sequence c. The symbols are multiplicatively repeated; Selectively repeated coding sequences Among them, the symbol c' of the selectively repeated coding sequence c' i It is based on In the random selection of independent multiplicative coefficients ρ, the symbol c of the coding sequence c i conduct The multiplication operation on .

2. A rate-compatible tail-biting convolutional code encoding device based on selective multiplicative repetition, characterized in that: include: An information sequence acquirer, which is used to acquire an information sequence to be encoded; a CRC encoder, configured to perform CRC encoding on the information sequence using a cyclic redundancy polynomial to obtain a redundant sequence, wherein the redundant sequence includes an information sequence and a CRC redundant information sequence; a block-type conventional multiplexer, configured to periodically insert the CRC redundant information sequence into the information sequence in units of symbols consisting of a preset number of bits, to obtain a new redundant sequence; a tail-biting convolutional encoder, configured to perform tail-biting convolutional coding on the new redundant sequence to obtain a coded sequence; The selective multiplicative repeater is used to perform selective multiplicative repetitive coding according to a preset target code rate, the coding sequence and a randomly determined multiplicative coefficient to obtain a selective repetitive coding sequence, wherein the preset target code rate is Indicates the number of symbols output after selective multiplication repetition coding, represents the number of symbols before selective multiplication repetition coding, k is the length of the information sequence, and n is the length of the coding sequence; Calculate the number of symbols that need to be repeated multiplicatively Set h to represent the number of symbols involved in CRC redundant information, the sequence of position indexes of symbols involved in CRC redundant information in w is represented by I, and the sequence of the remaining position indexes is represented by Indicates; set the number of times the coding sequence c can be completely repeated The symbol [] means rounding down the parameter within the symbol; All symbols of the coded sequence c are multiplicatively re-encoded H times. In order to achieve the preset target code rate R', additional repetition is required. symbols, when When , randomly select from the coding sequence c The symbols whose position index is in I are selectively multiplicatively repeated; when In addition to selecting all symbols with position indexes in I from the coding sequence c, it is also necessary to randomly select all symbols with position indexes in P from the coding sequence c. The symbols are multiplicatively repeated; Selectively repeated coding sequences Among them, the symbol c' of the selectively repeated coding sequence c' i It is based on In the random selection of independent multiplicative coefficients ρ, the symbol c of the coding sequence c i conduct The multiplication operation on .

3. An electronic device, characterized in that: including a processor and a memory; The memory is used to store programs; The processor executes the program to implement the rate-compatible tail-biting convolutional code encoding method based on selective multiplicative repetition as claimed in claim 1.

4. A computer-readable storage medium, characterized in that The storage medium stores a program, and the program is executed by a processor to implement the rate-compatible tail-biting convolutional code encoding method based on selective multiplicative repetition as claimed in claim 1.

5. A computer program product, characterized in that The computer program product includes computer instructions, which are stored in a computer-readable storage medium. A processor of a computer device can read the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device executes the rate-compatible tail-biting convolutional code encoding method based on selective multiplicative repetition as claimed in claim 1.

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