Motor driver for adjusting power based on shared voltage
By introducing a technology of shared voltage adjustment power in the motor driver, dynamically adjusting the duty cycle of the motor control signal, the problem of motor damage caused by excessive power consumption in traditional motor drivers is solved, and higher reliability and service life are achieved.
Patent Information
- Application Number
- CN202311393413.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-10-20
- Filing Date
- 2023-10-25
- Publication Date
- 2025-04-29
AI Technical Summary
When a traditional motor driver runs the fan motor quickly for a long time, it leads to excessive current and excessive power consumption, resulting in motor damage.
A motor driver based on shared voltage adjustment power is designed, and the duty cycle of the motor control signal is adjusted through circuit components such as shared voltage critical value setting circuit, shared voltage difference calculation circuit, duty cycle determination circuit, etc., to adapt to changes in shared voltage and prevent excessive power consumption.
By dynamically adjusting the duty cycle of the motor control signal, the power consumption of the motor is effectively reduced, the motor is prevented from being damaged due to excessive power consumption, and the motor reliability and service life are improved.
Smart Images

Figure CN119906330A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a motor, and in particular to a motor driver for adjusting power based on a shared voltage. Background Art
[0002] In electronic devices, fans are used to cool processors and other heat-generating components in electronic devices. In order to enable the fan to quickly cool the heat-generating components, in traditional motor drivers, the driver circuit provides a high-duty-cycle upper bridge conduction signal to the upper bridge switch to turn on the upper bridge switch for a long time, allowing more current to flow through the upper bridge switch to the fan motor, so that the fan motor runs quickly.
[0003] However, when a conventional motor driver maintains outputting a high duty cycle signal to drive the fan motor to run rapidly for a long time, a relatively large current will flow through the upper bridge switch and other circuit components in the conventional motor driver to the motor, causing the motor to be damaged due to excessive power consumption. Summary of the invention
[0004] The present invention provides a motor driver for adjusting power based on a shared voltage in view of the deficiencies of the prior art. The motor driver comprises a shared voltage threshold value setting circuit, a shared voltage difference value calculation circuit, a duty cycle determination circuit, a signal generator circuit, a control circuit, a drive circuit and an output stage circuit. The shared voltage threshold value setting circuit is configured to set a voltage threshold value. The shared voltage difference value calculation circuit is connected to the shared voltage threshold value setting circuit. The shared voltage difference value calculation circuit is configured to calculate the difference between a shared voltage and the voltage threshold value received from the shared voltage threshold value setting circuit as a shared voltage adjustment value. The duty cycle determination circuit is connected to the shared voltage difference value calculation circuit. The duty cycle determination circuit is configured to determine a duty cycle adjustment value according to the shared voltage adjustment value received from the shared voltage difference value calculation circuit. The signal generator circuit is connected to the duty cycle determination circuit. The signal generator circuit is configured to adjust a plurality of waveform signals according to the duty cycle adjustment value received from the duty cycle determination circuit and output the adjusted plurality of waveform signals. The control circuit is connected to the signal generator circuit. The control circuit is configured to output a plurality of control signals according to the plurality of waveform signals received from the signal generator circuit. The drive circuit is connected to the control circuit. The drive circuit is configured to output a plurality of drive signals according to the plurality of control signals received from the control circuit. The output stage circuit is coupled to the common voltage and connected to the drive circuit and the motor. The output stage circuit is configured to operate according to the common voltage and the plurality of drive signals received from the drive circuit to drive the motor.
[0005] As described above, the present invention provides a motor driver that adjusts power based on a shared voltage. In the motor driver of the present invention, the duty cycle of the control signal output by the control circuit of the motor is determined and adjusted based on the difference between the shared voltage of the circuit component and the voltage threshold. In particular, when the shared voltage of the circuit component of the motor driver of the present invention is higher than a voltage threshold and the duty cycle of the control signal is not lower than a duty cycle threshold, the duty cycle of the control signal is reduced. In other words, the duty cycle of the signal output by the motor driver of the present invention for controlling the operation of the motor is not a constant value but is modulated with changes in the shared voltage to prevent the motor from being damaged due to excessive power consumption.
[0006] To further understand the features and technical contents of the present invention, please refer to the following detailed description and drawings of the present invention. However, the drawings provided are only for reference and description and are not intended to limit the present invention. BRIEF DESCRIPTION OF THE DRAWINGS
[0007] Figure 1 FIG. 4 is a block diagram of a motor driver for adjusting power based on a shared voltage according to a first embodiment of the present invention.
[0008] Figure 2 FIG. 4 is a block diagram of a motor driver for adjusting power based on a shared voltage according to a second embodiment of the present invention.
[0009] Figure 3 FIG. 4 is a block diagram of a motor driver for adjusting power based on a shared voltage according to a third embodiment of the present invention.
[0010] Figure 4 FIG. 4 is a block diagram of a motor driver for adjusting power based on a shared voltage according to a fourth embodiment of the present invention.
[0011] Figure 5 4 is a block diagram of an output stage circuit of a motor driver for adjusting power based on a shared voltage according to first to fourth embodiments of the present invention.
[0012] Figure 6 Schematic diagram of a curve showing a duty cycle of a motor driver adjusting power based on a shared voltage as a function of a shared voltage reduction according to the first to fourth embodiments of the present invention. DETAILED DESCRIPTION
[0013] The following is an explanation of the embodiments of the present invention through specific embodiments. Those skilled in the art can understand the advantages and effects of the present invention from the contents disclosed in this specification. The present invention can be implemented or applied through other different specific embodiments, and the details in this specification can also be modified and changed in various ways based on different viewpoints and applications without departing from the concept of the present invention. In addition, the drawings of the present invention are only simple schematic illustrations and are not depicted according to actual dimensions. It is stated in advance. The following embodiments will further explain the relevant technical contents of the present invention in detail, but the disclosed contents are not intended to limit the scope of protection of the present invention. In addition, the term "or" used herein may include any one or more combinations of the associated listed items depending on the actual situation.
[0014] See also Figure 1 , Figure 5 and Figure 6 ,in Figure 1 is a block diagram of a motor driver for adjusting power based on a shared voltage according to a first embodiment of the present invention. Figure 5 A block diagram of an output stage circuit of a motor driver for adjusting power based on a shared voltage according to the first to fourth embodiments of the present invention; Figure 6 Schematic diagram of a curve showing a duty cycle of a motor driver adjusting power based on a shared voltage as a function of a shared voltage reduction according to the first to fourth embodiments of the present invention.
[0015] The motor driver of the present invention is used to drive the motor MT. In this article, the motor MT is taken as a three-phase motor, but the present invention is not limited thereto. In practice, the motor MT driven by the motor driver of the present invention can also be a single-phase motor.
[0016] In a first embodiment, the motor driver of the present invention comprises a plurality of circuit components, such as Figure 1 The shared voltage threshold setting circuit 10 , the shared voltage difference calculation circuit 20 , the duty ratio determination circuit 30 , the signal generator circuit 40 , the control circuit 50 , the drive circuit 60 and the output stage circuit 70 are shown.
[0017] The control circuit 50 is connected to the drive circuit 60. The drive circuit 60 is connected to the output stage circuit 70, and the output stage circuit 70 is connected to the motor MT. The output stage circuit 70 may include a plurality of upper bridge switches and a plurality of lower bridge switches, which may be, for example, a plurality of transistors.
[0018] If the motor MT used in the motor driver of the present invention is a three-phase motor, Figure 5As shown, the output stage circuit 70 may include multiple upper bridge switches and multiple lower bridge switches, such as but not limited to a first upper bridge switch HD1, a second upper bridge switch HD2, a third upper bridge switch HD3, a first lower bridge switch LD1, a second lower bridge switch LD2 and a third lower bridge switch LD3.
[0019] The first end of the first upper bridge switch HD1 is coupled to the common voltage VCC. The first end of the first lower bridge switch LD1 is connected to the second end of the first upper bridge switch HD1. The node between the first end of the first lower bridge switch LD1 and the second end of the first upper bridge switch HD1 is connected to the first end of the motor MT (for example, but not limited to the U-phase end of the three-phase motor). The second end of the first lower bridge switch LD1 is grounded.
[0020] The first end of the second upper bridge switch HD2 is coupled to the common voltage VCC. The first end of the second lower bridge switch LD2 is connected to the second end of the second upper bridge switch HD2. The node between the first end of the second lower bridge switch LD2 and the second end of the second upper bridge switch HD2 is connected to the second end of the motor MT (for example, but not limited to the V-phase end of the three-phase motor). The second end of the second lower bridge switch LD2 is grounded.
[0021] The first end of the third upper bridge switch HD3 is coupled to the shared voltage VCC. The first end of the third lower bridge switch LD3 is connected to the second end of the third upper bridge switch HD3. The node between the first end of the third lower bridge switch LD3 and the second end of the third upper bridge switch HD3 is connected to the third end of the motor MT (for example, but not limited to the W phase end of the three-phase motor). The second end of the third lower bridge switch LD3 is grounded.
[0022] The control ends of the first upper bridge switch HD1, the first lower bridge switch LD1, the second upper bridge switch HD2, the second lower bridge switch LD2, the third upper bridge switch HD3 and the third lower bridge switch LD3 are connected to the output end of the driving circuit 60.
[0023] It is worth noting that the motor driver of the present invention includes Figure 1 The shared voltage threshold setting circuit 10, shared voltage difference calculation circuit 20, duty cycle determination circuit 30, and signal generator circuit 40 are used to determine the duty cycle of the control signal output by the control circuit 50 according to a shared voltage VCC coupled to the output stage circuit 70 (the first end of the first upper bridge switch HD1, the first end of the second upper bridge switch HD2, and the first end of the third upper bridge switch HD3), and are described in detail as follows.
[0024] The shared voltage difference calculation circuit 20 is connected to the shared voltage threshold setting circuit 10 and the duty ratio determination circuit 30 . The signal generator circuit 40 is connected to the duty ratio determination circuit 30 and the control circuit 50 .
[0025] The shared voltage threshold setting circuit 10 sets a voltage threshold.
[0026] The shared voltage difference calculation circuit 20 can determine whether a shared voltage VCC coupled to the output stage circuit 70 (the first end of the first upper bridge switch HD1, the first end of the second upper bridge switch HD2, and the first end of the third upper bridge switch HD3) is currently higher than a voltage threshold (for example, but not limited to, Figure 6 13V as shown) to determine whether it is necessary to adjust the duty cycle of the control signal output by the control circuit 50 to the driving circuit 60, thereby determining whether to calculate a shared voltage adjustment value.
[0027] When a shared voltage VCC coupled to the output stage circuit 70 (the first end of the first upper bridge switch HD1, the first end of the second upper bridge switch HD2, and the first end of the third upper bridge switch HD3) is currently higher than a voltage threshold, the shared voltage difference calculation circuit 20 calculates the difference between the shared voltage VCC and a voltage threshold received from the shared voltage threshold setting circuit 10 as a shared voltage adjustment value.
[0028] In the first embodiment of the present invention, the shared voltage difference calculation circuit 20 calculates a shared voltage adjustment value by subtracting a voltage threshold from a current voltage value of a shared voltage VCC coupled to the output stage circuit 70 (the first end of the first upper bridge switch HD1, the first end of the second upper bridge switch HD2, and the first end of the third upper bridge switch HD3).
[0029] The duty ratio determination circuit 30 determines a duty ratio adjustment value according to a shared voltage adjustment value received from the shared voltage difference calculation circuit 20 .
[0030] For example, the duty cycle determining circuit 30 may set a preset curve (eg, Figure 6 The duty cycle determining circuit 30 may multiply a shared voltage adjustment value received from the shared voltage difference calculating circuit 20 by the preset adjustment ratio to calculate a duty cycle adjustment value.
[0031] The duty cycle determination circuit 30 may subtract a calculated duty cycle adjustment value from a current duty cycle to calculate the next duty cycle of the control signal that the control circuit 50 will output to the driving circuit 60 next time. The current duty cycle is the duty cycle that the duty cycle calculation circuit 303 has currently output to the signal generator circuit 40 or the duty cycle of the control signal that the control circuit 50 has currently output to the driving circuit 60.
[0032] The signal generator circuit 40 adjusts the preset waveform signals or the previously output waveform signals according to the next duty cycle (or a duty cycle adjustment value) received from the duty cycle determination circuit 30. The signal generator circuit 40 outputs the adjusted waveform signals.
[0033] The control circuit 50 outputs a plurality of control signals according to the plurality of waveform signals received from the signal generator circuit 40. Specifically, the control circuit 50 may compare a plurality of parameter values (e.g., a plurality of voltage values) of a plurality of waveforms of the plurality of waveform signals received from the signal generator circuit 40 to determine the duty ratios of the plurality of control signals.
[0034] The driving circuit 60 outputs a plurality of driving signals to the output stage circuit 70 (the control ends of the plurality of upper bridge switches and the plurality of lower bridge switches such as the first upper bridge switch HD1, the second upper bridge switch HD2, the third upper bridge switch HD3, the first lower bridge switch LD, the second lower bridge switch LD2 and the third lower bridge switch LD3) according to the plurality of control signals received from the control circuit 50.
[0035] The output stage circuit 70 (the plurality of upper bridge switches and the plurality of lower bridge switches such as the first upper bridge switch HD1, the second upper bridge switch HD2, the third upper bridge switch HD3, the first lower bridge switch LD, the second lower bridge switch LD2 and the third lower bridge switch LD3) can operate according to the shared voltage VCC and the plurality of driving signals received from the driving circuit 60, thereby driving the connected motor MT.
[0036] For example, a plurality of upper switches (e.g., the first upper switch HD1, the second upper switch HD2, and the third upper switch HD3) of the output stage circuit 70 are turned on during the duty cycles of the plurality of driving signals received respectively. In this case, when a common voltage VCC coupled to the first end of the first upper switch HD1, the first end of the second upper switch HD2, and the first end of the third upper switch HD3 of the output stage circuit 70 is currently higher than a voltage threshold, the control circuit 50 reduces the duty cycle of one or more control signals output to the driving circuit 60 according to the plurality of waveform signals received from the signal generator circuit 40. As a result, the motor can be prevented from being damaged due to excessive power consumption.
[0037] If the shared voltage VCC is equal to 12V and the duty cycle of the control signal output by the motor driver is 50%, the equivalent average voltage provided to the motor MT is 12×0.5=6(V). If the shared voltage VCC is equal to 24V and the control signal output by the motor driver is 50%, the equivalent average voltage provided to the motor MT is 24×0.5=12(V), at which time the current flowing through the motor MT increases, causing the motor MT to burn out.
[0038] For example, after the shared voltage VCC is greater than 12V (i.e., the above-mentioned voltage threshold), the duty cycle of the control signal output by the motor driver of the present invention is reduced. In this case, when the shared voltage VCC reaches 24V, the duty cycle of the control signal output by the motor driver of the present invention is reduced to 25%, and the average voltage equivalent to the motor MT is only 24×0.25=6 (V), so the current flowing through the motor MT remains unchanged, and the motor MT will not burn out.
[0039] See also Figure 2 and Figure 5 ,in Figure 2 FIG. 4 is a block diagram of a motor driver for adjusting power based on a shared voltage according to a second embodiment of the present invention.
[0040] The same contents of the second embodiment of the present invention as those of the first embodiment are not described in detail here.
[0041] In the second embodiment, the duty ratio determination circuit (eg Figure 1 The duty cycle determination circuit 30 shown in FIG. Figure 2 The duty cycle adjustment indicating circuit 301 and the duty cycle adjustment judging circuit 302 are shown. If necessary, the duty cycle determining circuit of the motor driver of the present invention can also be as follows: Figure 2 The figure shows that a duty cycle calculation circuit 303 is included.
[0042] The duty cycle adjustment judgment circuit 302 is connected to the shared voltage difference calculation circuit 20 , the duty cycle adjustment indication circuit 301 and the duty cycle calculation circuit 303 . The duty cycle calculation circuit 303 is connected to the signal generator circuit 40 .
[0043] The duty cycle adjustment indicating circuit 301 can be set to a preset adjustment ratio.
[0044] For example, the duty cycle adjustment indication circuit 301 (such as but not limited to a selector circuit) can select one of the reference adjustment ratios as a preset adjustment ratio. Alternatively, the duty cycle adjustment indication circuit 301 can select one of the reference adjustment ratios from a plurality of preset curves (such as Figure 6 One of the plurality of preset curves DV1, DV2, DV3 is selected, and the slope of the selected one is used as a preset adjustment ratio.
[0045] The duty cycle adjustment determination circuit 302 (such as but not limited to a multiplier) may multiply a shared voltage adjustment value received from the shared voltage difference calculation circuit 20 by a preset adjustment ratio received from the duty cycle adjustment indication circuit 301 to calculate a duty cycle adjustment value.
[0046] The duty cycle calculation circuit 303 can adjust a current duty cycle to a specified duty cycle according to a duty cycle adjustment value received from the duty cycle adjustment determination circuit 302. For example, the duty cycle calculation circuit 303 (such as but not limited to a subtractor) subtracts a duty cycle adjustment value from a current duty cycle. The current duty cycle is the duty cycle currently outputted to the signal generator circuit 40 by the duty cycle calculation circuit 303 or the duty cycle of the control signal currently outputted to the driving circuit 60 by the control circuit 50.
[0047] The signal generator circuit 40 determines a plurality of parameter values of a plurality of waveform signals according to a specified duty cycle received from the duty cycle calculation circuit 303 , and further sets the duty cycle of the control signal outputted from the control circuit 50 to the driving circuit 60 .
[0048] See also Figure 3 , which is a block diagram of a motor driver for adjusting power based on a shared voltage according to a third embodiment of the present invention. The same contents as those of the first and second embodiments of the third embodiment of the present invention are not repeated here.
[0049] In the third embodiment, the duty ratio determination circuit (eg Figure 1 The duty cycle determination circuit 30) shown in FIG. 1 also includes the following Figure 3 The duty cycle threshold determination circuit 304 is shown.
[0050] The duty cycle threshold value determination circuit 304 may be connected to the duty cycle calculation circuit 303 .
[0051] The duty cycle threshold value determination circuit 304 sets a duty cycle threshold value, and outputs the determined duty cycle threshold value to the duty cycle calculation circuit 303 .
[0052] For example, the duty cycle threshold determination circuit 304 (such as but not limited to a selector circuit) may select one of the plurality of reference duty cycles as a duty cycle threshold output to the duty cycle calculation circuit 303 .
[0053] The duty cycle calculation circuit 303 can determine whether the current duty cycle is lower than a duty cycle threshold value received from the duty cycle threshold value determination circuit 304 to determine whether to adjust the current duty cycle. The current duty cycle is the duty cycle currently output to the signal generator circuit 40 by the duty cycle calculation circuit 303 or the duty cycle of the control signal currently output to the driving circuit 60 by the control circuit 50.
[0054] When a common voltage VCC coupled to the output stage circuit 70 (the first end of the first upper bridge switch HD1, the first end of the second upper bridge switch HD2, and the first end of the third upper bridge switch HD3) is currently higher than a voltage threshold and a current duty cycle is not lower than a duty cycle threshold (for example but not limited to Figure 5 When the duty cycle of the control signal output to the driving circuit 60 is 10% (as shown in FIG. 1 ), the duty cycle calculation circuit 303 subtracts a duty cycle adjustment value from the duty cycle output to the signal generator circuit 40 , thereby reducing the duty cycle of the control signal output to the driving circuit 60 by the control circuit 50 .
[0055] On the contrary, when the current duty cycle is lower than a duty cycle threshold value (such as but not limited to Figure 6 When the duty ratio calculation circuit 303 is 10% as shown in FIG. 1 , the duty ratio calculation circuit 303 does not reduce the duty ratio output by the duty ratio calculation circuit 303 to the signal generator circuit 40 .
[0056] Additionally or alternatively, the duty cycle calculation circuit 303 determines whether a value obtained by subtracting a duty cycle adjustment value received from the duty cycle adjustment determination circuit 302 from a current duty cycle is lower than a duty cycle threshold value to determine whether to reduce the current duty cycle.
[0057] When a common voltage VCC coupled to the output stage circuit 70 (the first end of the first upper bridge switch HD1, the first end of the second upper bridge switch HD2, and the first end of the third upper bridge switch HD3) is currently higher than a voltage threshold and a value obtained by subtracting a duty cycle adjustment value from a current duty cycle is not lower than a duty cycle threshold (for example, but not limited to Figure 6 When the duty cycle of the control signal output to the driving circuit 60 is 10% (as shown in FIG. 1 ), the duty cycle calculation circuit 303 subtracts a duty cycle adjustment value from the duty cycle output to the signal generator circuit 40 , thereby reducing the duty cycle of the control signal output to the driving circuit 60 by the control circuit 50 .
[0058] On the contrary, when a value obtained by subtracting a duty cycle adjustment value from a current duty cycle is lower than a duty cycle threshold value, the duty cycle calculation circuit 303 does not reduce a current duty cycle or only reduces a current duty cycle to be equal to a duty cycle threshold value.
[0059] See also Figure 4 , which is a block diagram of a motor driver for adjusting power based on a shared voltage according to a fourth embodiment of the present invention. The same contents of the fourth embodiment of the present invention as those of the first to third embodiments are not repeated here.
[0060] In the fourth embodiment, if Figure 4 The signal generator circuit of the motor driver of the present invention (eg Figure 1 The signal generator circuit 40 shown includes a first signal generator 401 , a first signal adjustment circuit 402 , and a second signal generator 403 .
[0061] The first signal adjustment circuit 402 is connected to the duty ratio calculation circuit 303 , the first signal generator 401 , and the control circuit 50 . The second signal generator 403 is connected to the control circuit 50 .
[0062] The first signal generator 401 may output a plurality of first waveform signals, for example but not limited to, the plurality of first waveform signals may include a plurality of sine wave waveforms, a plurality of third harmonic waveforms, or a combination thereof.
[0063] The first signal adjustment circuit 402 may adjust a plurality of reference values of a plurality of first waveform signals received from the first signal generator 401 according to a duty cycle adjustment value received from the duty cycle calculation circuit 303 .
[0064] The control circuit 50 may output a plurality of control signals according to the plurality of first waveform signals adjusted by the first signal adjustment circuit 402 .
[0065] The second signal generator 403 may output a plurality of second waveform signals, for example but not limited to, the plurality of second waveform signals may include a plurality of triangle waveforms, a plurality of sawtooth waveforms, or a combination thereof.
[0066] The control circuit 50 can compare the multiple parameter values (for example, multiple voltage values) of the multiple first waveform signals adjusted by the first signal adjustment circuit 402 with the multiple parameter values (for example, multiple voltage values) of the multiple second waveform signals output by the second signal generator 403 to determine the levels of the multiple control signals output to the driving circuit 60, and further determine the duty cycles of the multiple control signals.
[0067] If the motor MT controlled by the motor driver of the present invention is a three-phase motor, the multiple first waveform signals output by the first signal generator 401 may include three first waveform signals, which are respectively used for the U phase, V phase and W phase of the motor MT, and the multiple second waveform signals output by the second signal generator 403 may include three second waveform signals, which are respectively used for the U phase, V phase and W phase of the motor MT.
[0068] The control circuit 50 compares the multiple parameter values of the first waveform signal and the second waveform signal for the U phase of the motor MT to output a control signal for the U phase of the motor MT. At the same time, the control circuit 50 compares the multiple parameter values of the first waveform signal and the second waveform signal for the V phase of the motor MT to output another control signal for the V phase of the motor MT. At the same time, the control circuit 50 compares the multiple parameter values of the first waveform signal and the second waveform signal for the W phase of the motor MT to output yet another control signal for the W phase of the motor MT.
[0069] In summary, the present invention provides a motor driver that adjusts power based on a shared voltage. In the motor driver of the present invention, the duty cycle of the control signal output by the control circuit of the motor is determined and adjusted based on the difference between the shared voltage of the circuit component and the voltage threshold. In particular, when the shared voltage of the circuit component of the motor driver of the present invention is higher than a voltage threshold and the duty cycle of the control signal is not lower than a duty cycle threshold, the duty cycle of the control signal is reduced to reduce the power of the motor driver of the present invention. In other words, the duty cycle of the signal output by the motor driver of the present invention for controlling the operation of the motor is not a constant value but is modulated with changes in the shared voltage, so as to prevent the motor of the present invention from being damaged due to excessive power consumption.
[0070] The contents disclosed above are only preferred feasible embodiments of the present invention, and are not intended to limit the claims of the present invention. Therefore, all equivalent technical changes made using the description and drawings of the present invention are included in the claims of the present invention.
Claims
1. A motor driver for adjusting power based on a shared voltage, characterized in that: The motor driver for adjusting power based on shared voltage comprises: A shared voltage threshold setting circuit configured to set a voltage threshold; a shared voltage difference calculation circuit connected to the shared voltage threshold setting circuit and configured to calculate a difference between a shared voltage and the voltage threshold received from the shared voltage threshold setting circuit as a shared voltage adjustment value; a duty ratio determination circuit connected to the shared voltage difference calculation circuit and configured to determine a duty ratio adjustment value according to the shared voltage adjustment value received from the shared voltage difference calculation circuit; a signal generator circuit connected to the duty cycle determination circuit, configured to adjust a plurality of waveform signals according to the duty cycle adjustment value received from the duty cycle determination circuit, and output the adjusted plurality of waveform signals; a control circuit connected to the signal generator circuit and configured to output a plurality of control signals according to the plurality of waveform signals received from the signal generator circuit; a driving circuit connected to the control circuit and configured to output a plurality of driving signals according to the plurality of control signals received from the control circuit; as well as The output stage circuit is coupled to the common voltage and connected to the driving circuit and a motor, and is configured to operate according to the common voltage and the plurality of driving signals received from the driving circuit to drive the motor.
2. The motor driver according to claim 1, characterized in that: The shared voltage difference calculation circuit subtracts the voltage threshold from the shared voltage coupled to the output stage circuit to calculate the shared voltage adjustment value.
3. The motor driver according to claim 1, characterized in that: The shared voltage difference calculation circuit determines whether the shared voltage coupled to the output stage circuit is currently higher than the voltage threshold to determine whether to calculate the shared voltage adjustment value.
4. The motor driver according to claim 3, characterized in that: When the shared voltage coupled to the output stage circuit is higher than the voltage threshold, the shared voltage difference calculation circuit calculates the shared voltage adjustment value, and the control circuit reduces the duty cycle of each of the control signals output to the driving circuit.
5. The motor driver for adjusting power based on shared voltage according to claim 1, characterized in that: The duty ratio determination circuit multiplies the shared voltage adjustment value by a preset adjustment ratio to calculate the duty ratio adjustment value.
6. The motor driver according to claim 5, characterized in that: The duty ratio determination circuit sets a slope of a preset curve in which the duty ratio decreases as the common voltage increases as the preset adjustment ratio.
7. The motor driver according to claim 5, characterized in that: The duty cycle determination circuit includes a multiplier. The multiplier multiplies the shared voltage adjustment value by the preset adjustment ratio to calculate the duty cycle adjustment value.
8. The motor driver for adjusting power based on shared voltage according to claim 1, characterized in that: The duty cycle determination circuit comprises: A duty cycle adjustment indication circuit configured to set a preset adjustment ratio; as well as The duty cycle adjustment judgment circuit is connected to the duty cycle adjustment indication circuit and the shared voltage difference calculation circuit, and is configured to multiply the shared voltage adjustment value received from the shared voltage difference calculation circuit by the preset adjustment ratio received from the duty cycle adjustment indication circuit to calculate the duty cycle adjustment value.
9. The motor driver according to claim 8, characterized in that: The duty cycle determination circuit further comprises: The duty cycle calculation circuit is connected to the duty cycle adjustment judgment circuit and the signal generator circuit, and is configured to adjust a current duty cycle to a specified duty cycle according to the duty cycle adjustment value received from the duty cycle adjustment judgment circuit. The signal generator circuit determines multiple parameter values of the multiple waveform signals according to the specified duty cycle received from the duty cycle calculation circuit.
10. The motor driver according to claim 9, characterized in that: The motor driver for adjusting power based on shared voltage further comprises: The duty cycle critical value determination circuit is connected to the duty cycle calculation circuit and is configured to set a duty cycle critical value. The duty cycle calculation circuit determines whether the current duty cycle is lower than the duty cycle critical value received from the duty cycle critical value determination circuit to determine whether to adjust the current duty cycle.
11. The motor driver for adjusting power based on shared voltage according to claim 10, characterized in that: When the shared voltage is higher than the voltage threshold and the current duty cycle is not lower than the duty cycle threshold, the duty cycle calculation circuit reduces the current duty cycle; When the current duty cycle is lower than the duty cycle threshold value, the duty cycle calculation circuit does not reduce the current duty cycle.
12. The motor driver according to claim 9, characterized in that: The duty cycle calculation circuit subtracts the duty cycle adjustment value from the current duty cycle. The duty cycle calculation circuit determines whether the value obtained by subtracting the duty cycle adjustment value from the current duty cycle is lower than the duty cycle threshold value to determine whether to reduce the current duty cycle.
13. The motor driver according to claim 12, characterized in that: When the shared voltage is higher than the voltage threshold and the duty cycle adjusted value is not lower than the duty cycle threshold, the duty cycle calculation circuit reduces the current duty cycle; When the shared voltage is higher than the voltage threshold and the value obtained by subtracting the duty cycle adjustment value from the current duty cycle is lower than the duty cycle threshold, the duty cycle calculation circuit does not reduce the current duty cycle or only reduces the current duty cycle to be equal to the duty cycle threshold.
14. The motor driver for adjusting power based on shared voltage according to claim 1, characterized in that: The control circuit compares a plurality of parameter values of a plurality of waveforms of the plurality of waveform signals received from the signal generator circuit to determine duty ratios of the plurality of control signals.
15. The motor driver for adjusting power based on shared voltage according to claim 1, characterized in that: The output stage circuit comprises: A first upper bridge switch, wherein a first end of the first upper bridge switch is coupled to the shared voltage; a first lower bridge switch, wherein a first end of the first lower bridge switch is connected to a second end of the first upper bridge switch, a node between the first end of the first lower bridge switch and the second end of the first upper bridge switch is connected to a first end of the motor, and a second end of the first lower bridge switch is grounded; A second upper bridge switch, wherein a first end of the second upper bridge switch is coupled to the shared voltage; as well as a second lower bridge switch, wherein a first end of the second lower bridge switch is connected to a second end of the second upper bridge switch, a node between the first end of the second lower bridge switch and the second end of the second upper bridge switch is connected to a second end of the motor, and the second end of the second lower bridge switch is grounded; The control end of the first upper bridge switch, the control end of the first lower bridge switch, the control end of the second upper bridge switch and the control end of the second lower bridge switch are connected to the output end of the driving circuit.
16. The motor driver for adjusting power based on shared voltage according to claim 15, characterized in that: The output stage circuit further comprises: A third upper bridge switch, a first end of the third upper bridge switch is coupled to the shared voltage; and a third lower bridge switch, wherein a first end of the third lower bridge switch is connected to a second end of the third upper bridge switch, a node between the first end of the third lower bridge switch and the second end of the third upper bridge switch is connected to a third end of the motor, and a second end of the third lower bridge switch is grounded; The control end of the third upper bridge switch and the control end of the third lower bridge switch are connected to the output end of the driving circuit.
17. The motor driver for adjusting power based on shared voltage according to claim 16, characterized in that: The shared voltage difference calculation circuit subtracts the voltage threshold from the shared voltage coupled to the first end of the first upper bridge switch, the first end of the second upper bridge switch, and the first end of the third upper bridge switch to calculate the shared voltage adjustment value.
18. The motor driver for adjusting power based on shared voltage according to claim 1, characterized in that: The signal generator circuit comprises: A first signal generator configured to output a plurality of first waveform signals; as well as a first signal adjustment circuit connected to the first signal generator, the duty cycle determination circuit and the control circuit, and configured to adjust the plurality of first waveform signals received from the first signal generator according to the duty cycle adjustment value received from the duty cycle determination circuit; The control circuit outputs the plurality of control signals according to the plurality of first waveform signals adjusted by the first signal adjustment circuit.
19. The motor driver for adjusting power based on shared voltage according to claim 18, characterized in that: The signal generator circuit further comprises: A second signal generator, connected to the control circuit and configured to output a plurality of second waveform signals; The control circuit compares the parameter values of the first waveform signals adjusted by the first signal adjustment circuit with the parameter values of the second waveform signals to determine the duty ratios of the control signals.
20. The motor driver according to claim 19, characterized in that: The multiple waveform signals include the multiple first waveform signals and the multiple second waveform signals, the multiple first waveform signals include multiple sine waveforms, multiple third harmonic waveforms or a combination thereof, and the multiple second waveform signals include multiple triangle waveforms, multiple sawtooth waveforms or a combination thereof.