Low-noise amplification chip and radio frequency front-end module

Abstract

The invention discloses a low-noise amplification chip and a radio frequency front-end module. The low-noise amplification chip comprises a bare chip, a first amplification module, a second amplification module, a third amplification module and a fourth amplification module, wherein the first amplification module, the second amplification module, the third amplification module and the fourth amplification module are arranged on the bare chip and sequentially arranged in the first direction. The first amplification module and the third amplification module are configured to receive a radio frequency signal of a first communication frequency band; one of the first amplification module and the third amplification module is configured to transmit a master reception signal, and the other is configured to transmit a diversity reception signal. The second amplification module and the fourth amplification module are configured to receive a radio frequency signal of a second communication frequency band; one of the second amplification module and the fourth amplification module is configured to transmit a master reception signal, and the other is configured to transmit a diversity reception signal. The isolation degree of the low-noise amplification chip can be improved, and then the overall performance and the working reliability of the low-noise amplification chip are guaranteed.

Description

Technical Field

[0001] This application relates to the field of radio frequency technology, and more specifically, to a low-noise amplification chip and a radio frequency front-end module. Background Art

[0002] Currently, radio frequency front-end modules have been widely used in fields such as wireless communication, Internet of Things, and smart home. They can process radio frequency signals (for example, power amplification, filtering, etc.) to complete the tasks of receiving and transmitting radio frequency signals.

[0003] In existing radio frequency front-end modules, a low-noise amplification chip is an important component. It can be used to amplify the power of radio frequency signals received by an antenna and reduce noise interference. However, existing low-noise amplification chips have the problem of poor isolation performance. Summary of the Invention

[0004] Embodiments of this application provide a low-noise amplification chip and a radio frequency front-end module.

[0005] According to a first aspect of this application, embodiments of this application provide a low-noise amplification chip. The low-noise amplification chip includes a bare die and a plurality of amplification modules disposed on the bare die. The plurality of amplification modules include a first amplification module, a second amplification module, a third amplification module, and a fourth amplification module arranged in sequence along a first direction. Both the first amplification module and the third amplification module are configured to receive radio frequency signals in a first communication band; wherein, one of the first amplification module and the third amplification module is configured to transmit a primary receive signal, and the other is configured to transmit a diversity receive signal. Both the second amplification module and the fourth amplification module are configured to receive radio frequency signals in a second communication band; wherein, the first communication band and the second communication band are different; one of the second amplification module and the fourth amplification module is configured to transmit a primary receive signal, and the other is configured to transmit a diversity receive signal.

[0006] Embodiments of this application provide a low-noise amplification chip. The first amplification module, the second amplification module, the third amplification module, and the fourth amplification module included in the low-noise amplification chip are sequentially arranged on the bare die along the first direction. Among them, both the first amplification module and the third amplification module are configured to receive radio frequency signals in a first communication band, and one of the first amplification module and the third amplification module is configured to transmit a Primary Receive (PRX) signal, and the other is configured to transmit a Diversity Receive (DRX) signal.

[0007] Therefore, when the first amplification module and the third amplification module simultaneously receive radio frequency signals in the first communication band, since the second amplification module is arranged between the first amplification module and the third amplification module, the presence of the second amplification module can increase the interval distance between the first amplification module and the third amplification module, thereby avoiding signal leakage and mutual interference between the two radio frequency signals in the first communication band, improving the isolation of the low-noise amplification chip, and further ensuring the overall performance and working reliability of the low-noise amplification chip.

[0008] Further, both the second amplification module and the fourth amplification module are configured to receive radio frequency signals in the second communication band, and one of the second amplification module and the fourth amplification module is configured to transmit a Primary Receive (PRX) signal, and the other is configured to transmit a Diversity Receive (DRX) signal. Specifically, the first communication band and the second communication band are different. For example, the first communication band may be the N77 band, and the second communication band may be the N79 band.

[0009] Therefore, when the second amplification module and the fourth amplification module simultaneously receive radio frequency signals in the second communication band, since the third amplification module is arranged between the second amplification module and the fourth amplification module, the presence of the third amplification module can increase the interval distance between the second amplification module and the fourth amplification module, thereby avoiding signal leakage and mutual interference between the two radio frequency signals in the second communication band, improving the isolation of the low-noise amplification chip, and further ensuring the overall performance and working reliability of the low-noise amplification chip.

[0010] In summary, the low-noise amplification chip in the present application has a high isolation when transmitting radio frequency signals in the first communication band and the second communication band, which can ensure the transmission quality of the radio frequency signals.

[0011] According to the second aspect of the present application, an embodiment of the present application further provides a low-noise amplification chip, which includes a bare die and a plurality of amplification modules arranged on the bare die. The plurality of amplification modules include a fifth amplification module, a sixth amplification module, a seventh amplification module, and an eighth amplification module arranged in sequence along a first direction. Both the fifth amplification module and the eighth amplification module are configured to receive radio frequency signals in the first communication band; wherein, one of the fifth amplification module and the eighth amplification module is configured to transmit a primary receive signal, and the other is configured to transmit a diversity receive signal. Both the sixth amplification module and the seventh amplification module are configured to receive radio frequency signals in the second communication band; wherein, the first communication band and the second communication band are different; one of the sixth amplification module and the seventh amplification module is configured to transmit a primary receive signal, and the other is configured to transmit a diversity receive signal.

[0012] An embodiment of the present application provides a low-noise amplification chip. The fifth amplification module, the sixth amplification module, the seventh amplification module, and the eighth amplification module included in the low-noise amplification chip are sequentially arranged on the bare die along a first direction. Among them, both the fifth amplification module and the eighth amplification module are configured to receive radio frequency signals in a first communication band, and one of the fifth amplification module and the eighth amplification module is configured to transmit a primary receive (PRX) signal, and the other is configured to transmit a diversity receive (DRX) signal.

[0013] Therefore, when the fifth amplification module and the eighth amplification module simultaneously receive radio frequency signals in the first communication band, since the sixth amplification module and the seventh amplification module are arranged between the fifth amplification module and the eighth amplification module, the presence of the sixth amplification module and the seventh amplification module can increase the spacing distance between the fifth amplification module and the eighth amplification module, thereby avoiding signal leakage and mutual interference between the two radio frequency signals in the first communication band, improving the isolation degree of the low-noise amplification chip, and further ensuring the overall performance and working reliability of the low-noise amplification chip.

[0014] According to the third aspect of the present application, an embodiment of the present application further provides a radio frequency front-end module, which includes the above-mentioned low-noise amplification chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required for description in the embodiments. Obviously, the following drawings are only some embodiments of the present application. For those skilled in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0016] Figure 1 It is a schematic structural diagram of the radio frequency front-end module provided by the embodiment of the present application.

[0017] Figure 2 is Figure 1 A schematic structural diagram of the low-noise amplification chip in the radio frequency front-end module shown.

[0018] Figure 3 is Figure 1 Another schematic structural diagram of the low-noise amplification chip in the radio frequency front-end module shown.

[0019] Figure 4 is Figure 2 A schematic circuit structure diagram of the amplification module in the low-noise amplification chip shown.

[0020] Figure 5 isFigure 2 Schematic diagram of the structure of the amplification module in the low-noise amplification chip shown

[0021] Figure 6 is Figure 2 Schematic diagram of the structures of the first amplification module, the second amplification module, and the first switch module in the low-noise amplification chip shown

[0022] Figure 7 is Figure 2 Schematic diagram of the structures of the third amplification module, the fourth amplification module, and the second switch module in the low-noise amplification chip shown

[0023] Figure 8 is Figure 1 Another schematic diagram of the structure of the low-noise amplification chip in the radio frequency front-end module shown

[0024] Figure 9 is Figure 1 Yet another schematic diagram of the structure of the low-noise amplification chip in the radio frequency front-end module shown Detailed implementation manners

[0025] In order to enable those skilled in the art of the present technology to better understand the solutions of this application, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of this application. Obviously, the described embodiments are only a part of the embodiments of this application, rather than all the embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative efforts fall within the scope of protection of this application

[0026] Please refer to Figure 1 , the embodiments of this application provide a low-noise amplification chip 100 and a radio frequency front-end module 200 configured with the low-noise amplification chip 100. Among them, the radio frequency front-end module 200 is an element that integrates two or more discrete devices such as radio frequency switches, low-noise amplifiers, filters, duplexers, and power amplifiers into an independent module, thereby improving the integration and hardware performance and miniaturizing the volume

[0027] Specifically, the radio frequency front-end module 200 can be applied in electronic devices (such as 4G and 5G communication devices such as smart phones, tablet computers, and smart watches) to realize the reception and transmission of radio frequency signals. In addition, with the development of 5G technology, the requirements for the performance of the radio frequency front-end module 200 are getting higher and higher. The technical solutions provided in this application can be applied to 5G radio frequency front-end modules to improve the communication performance of 5G communication devices

[0028] In some possible embodiments, the radio frequency front-end module 200 may include a substrate (not shown in the figure), and the low-noise amplification chip 100 may be fixedly connected to the substrate by an inverted bonding process or a wire bonding process. This embodiment does not make specific limitations in this regard.

[0029] Please refer to Figure 2 , the low-noise amplification chip 100 may include a bare die 10 and a plurality of amplification modules 20 disposed on the bare die 10. Among them, the plurality of amplification modules 20 may include a first amplification module 201, a second amplification module 202, a third amplification module 203, and a fourth amplification module 204 arranged in sequence along the first direction X. Specifically, the bare die 10 refers to an electronic chip in which the chip device is directly exposed without packaging, finished modules, and connectors, and is used to fix and support the components (such as capacitors, inductors, etc.) included in the low-noise amplification chip 100. Specifically, the bare die 10 may be made of materials such as silicon, gallium arsenide, and silicon carbide to ensure that the bare die 10 has good thermal stability, mechanical strength, and dimensional stability. Exemplarily, the bare die 10 may be generally rectangular, and the first direction X may be the length direction of the bare die 10, or may also be the width direction of the bare die 10.

[0030] In this embodiment, both the first amplification module 201 and the third amplification module 203 are configured to receive radio frequency signals in the first communication band. Among them, one of the first amplification module 201 and the third amplification module 203 is configured to transmit a primary receive (PRX) signal, and the other is configured to transmit a diversity receive (DRX) signal.

[0031] Therefore, when the first amplification module 201 and the third amplification module 203 simultaneously receive radio frequency signals in the first communication band, since the second amplification module 202 is disposed between the first amplification module 201 and the third amplification module 203, the presence of the second amplification module 202 can increase the spacing distance between the first amplification module 201 and the third amplification module 203, thereby avoiding signal leakage and mutual interference of the two radio frequency signals in the first communication band, so as to improve the isolation degree of the low-noise amplification chip 100, and further ensure the overall performance and working reliability of the low-noise amplification chip 100.

[0032] In this embodiment, both the second amplification module 202 and the fourth amplification module 204 are configured to receive radio frequency signals in the second communication band. Among them, one of the second amplification module 202 and the fourth amplification module 204 is configured to transmit a primary receive (PRX) signal, and the other is configured to transmit a diversity receive (DRX) signal.

[0033] Therefore, when the second amplification module 202 and the fourth amplification module 204 simultaneously receive radio frequency signals in the second communication band, since the third amplification module 203 is provided between the second amplification module 202 and the fourth amplification module 204, the presence of the third amplification module 203 can increase the interval distance between the second amplification module 202 and the fourth amplification module 204, thereby avoiding signal leakage and mutual interference between the two radio frequency signals in the second communication band, so as to improve the isolation of the low-noise amplification chip 100, and further ensure the overall performance and working reliability of the low-noise amplification chip 100.

[0034] In summary, the low-noise amplification chip 100 in the present application has a high isolation when transmitting radio frequency signals in the first communication band and the second communication band, which can ensure the transmission quality of the radio frequency signals.

[0035] In this embodiment, the first communication band and the second communication band are different. In some possible embodiments, the first communication band is one of the N77 band and the N79 band, and the second communication band is the other of the N77 band and the N79 band. For example, the first communication band can be the N77 band, and the second communication band can be the N79 band; or, the first communication band can be the N79 band, and the second communication band can be the N77 band. Of course, in some other possible embodiments, the first communication band and the second communication band can also be other communication bands, such as the N41 band, the N78 band, etc., and this embodiment does not make specific limitations thereto.

[0036] It should be noted here that in some other possible embodiments, the plurality of amplification modules 20 may further include other amplification modules, that is, the number of the amplification modules 20 may be greater than 4. For example, the plurality of amplification modules 20 may include a fifth amplification module and a sixth amplification module (not shown in the figure), and both the fifth amplification module and the sixth amplification module are configured to receive radio frequency signals in the third communication band. Among them, one of the fifth amplification module and the sixth amplification module is configured to transmit a Primary Receive (PRX) signal, and the other is configured to transmit a Diversity Receive (DRX) signal, and the third communication band, the first communication band, and the second communication band are different from each other.

[0037] Specifically, at least one other amplification module 20 may be provided between the fifth amplification module and the sixth amplification module to increase the interval distance between the fifth amplification module and the sixth amplification module, thereby avoiding signal leakage and mutual interference between the two radio frequency signals in the third communication band. The specific number of the amplification modules 20 is not limited in this embodiment.

[0038] In some possible embodiments, both the first amplification module 201 and the second amplification module 202 are configured to transmit a primary receive (PRX) signal, and both the third amplification module 203 and the fourth amplification module 204 are configured to transmit a diversity receive (DRX) signal. In some other possible embodiments, both the first amplification module 201 and the second amplification module 202 are configured to transmit a diversity receive (DRX) signal, and both the third amplification module 203 and the fourth amplification module 204 are configured to transmit a primary receive (PRX) signal.

[0039] Therefore, two amplification modules 20 on the same side of the specified axis K adopt the same signal reception technology (for example, both are PRX, or both are DRX) to reduce the control difficulty of the amplification modules 20 and improve the layout rationality of the bare die 10. Among them, the specified axis K is located between the second amplification module 202 and the third amplification module 203. Specifically, the specified axis K can be the central axis of the bare die 10, or other axes on the bare die 10 that deviate from the central axis and do not coincide with the central axis.

[0040] In this embodiment, the extending direction of the specified axis K is the second direction Y, and the second direction Y intersects with the first direction X. In some possible embodiments, the second direction Y is perpendicular to the first direction X. For example, the first direction X can be the length direction of the bare die 10, and the second direction Y can be the width direction of the bare die 10; or, the first direction X can be the width direction of the bare die 10, and the second direction Y can be the length direction of the bare die 10. In some other possible embodiments, the included angle between the second direction Y and the first direction X can be greater than or equal to 80 degrees and less than 90 degrees. For example, the included angle between the two can be 80 degrees, 85 degrees, 88 degrees, etc. This embodiment does not make specific limitations in this regard.

[0041] Please refer to Figure 3 , the low-noise amplification chip 100 may further include a control module 30 disposed on the bare die 10. The control module 30 is disposed between the second amplification module 202 and the third amplification module 203 and may be located on the specified axis K. That is, the first amplification module 201, the second amplification module 202, the control module 30, the third amplification module 203, and the fourth amplification module 204 are sequentially disposed in the first direction X. Among them, the control module 30 is electrically connected to the first amplification module 201, the second amplification module 202, the third amplification module 203, and the fourth amplification module 204 respectively. The control module 30 is used to control the first amplification module 201, the second amplification module 202, the third amplification module 203, and the fourth amplification module 204 respectively. For example, adjusting the gain of the amplification module 20, adjusting the bias voltage of the amplification module 20, etc. Specifically, the control module 30 may be a control chip.

[0042] In one aspect, a control module 30 is provided in the low-noise amplification chip 100. The control module 30 can coordinately control each amplification module 20 to ensure the normal operation of each amplification module 20 under different working conditions, thereby improving the working stability and overall integration of the low-noise amplification chip 100. In another aspect, the control module 30 is arranged between the second amplification module 202 and the third amplification module 203, which can further increase the spacing between the first amplification module 201 and the third amplification module 203, and further increase the spacing between the second amplification module 202 and the fourth amplification module 204, further improving the signal isolation of the low-noise amplification chip 100 when transmitting radio frequency signals in the first communication band and the second communication band, so as to ensure the transmission quality of the radio frequency signals.

[0043] The following introduces the specific implementation of the amplification module 20.

[0044] Please refer to Figure 4 and Figure 5 , the amplification module 20 may include an input node 21, an amplification unit 23, a matching unit 25, and an output node 27. Among them, the input node 21 and the output node 27 may be external connection nodes of the low-noise amplification chip 100 respectively. Specifically, the radio frequency signal to be power-amplified is input to the corresponding amplification module 20 via the input node 21. The amplification unit 23 in the amplification module 20 amplifies the power of the radio frequency signal, and the matching unit 25 performs impedance matching on the radio frequency signal. This radio frequency signal is then output to other external components via the output node 27. In Figure 5 In the illustrated embodiment, the amplification unit 23 and the matching unit 25 are sequentially connected between the input node 21 and the output node 27, and are sequentially arranged on the bare die 10 in the second direction Y. In this embodiment, the amplification unit 23 and the matching unit 25 are arranged on the bare die 10 along the second direction Y, which can save the layout space of the bare die 10 and make the overall layout of the low-noise amplification chip 100 more compact and reasonable.

[0045] In some possible embodiments, the multiple amplification units 23 corresponding to the multiple amplification modules 20 adopt the same component layout architecture. Here, the "same component layout architecture" means that the spatial arrangement of the components included in the multiple amplification units 23 on the bare die 10 is the same. That is to say, the multiple amplification units 23 are arranged in a "cloning form", which can minimize the problem of inconsistent performance of the multiple amplification modules 20 caused by frequency band interleaving configuration (mismatch), so as to improve the transmission quality of radio frequency signals.

[0046] In Figure 5In the illustrated embodiment, the amplification unit 23 may include an amplifier 230 and a DC-blocking capacitor 232. Among them, the amplifier 230 is used to amplify the power of the radio frequency signal. The DC-blocking capacitor 232 is connected between the input node 21 and the input terminal 2301 of the amplifier 230, and the matching unit 25 is connected between the output terminal 2303 of the amplifier 230 and the output node 27. Among them, the DC-blocking capacitor 232 is used to block the DC component in the radio frequency signal to improve the transmission quality of the radio frequency signal.

[0047] Specifically, the DC-blocking capacitor 232 may be a stacked capacitor. In some possible embodiments, the bare die 10 may include a plurality of metal layers (not shown in the figure), and the DC-blocking capacitor 232 and the input node 21 may be disposed on different metal layers. In Figure 5 the illustrated embodiment, the projection of the input node 21 in the thickness direction of the bare die 10 coincides with the DC-blocking capacitor 232 to save the layout space of the bare die 10.

[0048] In Figure 5 the illustrated embodiment, the amplification module 20 may further include a first ground node 22 for grounding. The amplification unit 23 may further include a ground inductor 234 connected between the first ground node 22 and the ground terminal 2305 of the amplifier 230, which is used to limit the current value of the branch where the amplifier 230 is located when it is turned on to protect the working safety of the amplifier 230. Specifically, the ground inductor 234 is wound on the bare die 10 in the form of a metal trace, which can reduce the hardware cost of the ground inductor 234.

[0049] Specifically, the input node 21, the first ground node 22, and the ground inductor 234 are arranged in sequence in the first direction X. Specifically, the first ground node 22 is spaced between the input node 21 and the ground inductor 234, which can play a role in signal isolation to avoid signal coupling and crosstalk, so as to ensure the smooth transmission of the radio frequency signal. In addition, arranging the first ground node 22 between the input node 21 and the ground inductor 234 can also make the overall layout of the bare die 10 more compact and reasonable.

[0050] In Figure 5 the illustrated embodiment, the amplification unit 23 may further include a connection trace 236, a first switch S1, and a second switch S2. Among them, one end of the connection trace 236 is connected to the ground terminal 2305 of the amplifier 230, and the other end of the connection trace 236 is connected to one end of the ground inductor 234. That is to say, the ground terminal 2305 of the amplifier 230 is connected to one end of the ground inductor 234 through the connection trace 236. Specifically, the connection trace 236 can be equivalent to Figure 4The inductor L1 in it. Therefore, in this embodiment, a connecting trace 236 is adopted to realize the equivalent of the inductor, which can save the layout space of the bare die 10, making the overall layout of the bare die 10 more compact and reasonable.

[0051] In Figure 5 In the embodiment shown, one end of the first switch S1 is connected to the common end of the connecting trace 236 and the grounded inductor 234, and the other end of the first switch S1 is connected to the first grounding node 22. One end of the second switch S2 is connected to the other end of the grounded inductor 234, and the other end of the second switch S2 is connected to the first grounding node 22. Specifically, the first switch S1 and the second switch S2 can be arranged in the gap between the first grounding node 22 and the grounded inductor 234 to save the layout space of the bare die 10. In addition, the first switch S1 and the second switch S2 in this embodiment are connected to the same grounding node (i.e., the first grounding node 22), making the overall layout of the amplification module 20 more compact and reasonable.

[0052] In some possible embodiments, the first switch S1 and the second switch S2 can be a bipolar junction transistor (BJT), a heterojunction bipolar transistor (HBT), a field effect transistor (FET), etc. This embodiment does not limit the specific implementation manners of the first switch S1 and the second switch S2.

[0053] In some possible embodiments, the control module 30 is electrically connected to the first switch S1 and the second switch S2 respectively. The control module 30 is used to adjust the amplification gain of the amplifier 230 by adjusting the opening and closing states of the first switch S1 and the second switch S2, so as to enrich the application scenarios of the amplification module 20. Specifically, when the first switch S1 is closed and the second switch S2 is open, the amplification gain of the amplifier 230 can be a first gain value. When the first switch S1 is open and the second switch S2 is closed, the amplification gain of the amplifier 230 is a second gain value. Wherein, the second gain value is less than the first gain value. Specifically, the first gain value and the second gain value can be calculated and determined by the R & D personnel based on the relevant hardware parameters of the amplification module 20, and this embodiment does not make specific limitations.

[0054] In some possible embodiments, the amplifier 230 adopts a cascode circuit architecture, which can achieve higher output impedance and gain by cascading two transistors, and effectively suppress noise and interference.

[0055] Please refer to again Figure 4, the amplifier 230 may include a first field-effect transistor Q1 and a second field-effect transistor Q2. Among them, the gate of the first field-effect transistor Q1 is the input terminal 2301 of the amplifier 230, the source of the first field-effect transistor Q1 is the ground terminal 2305 of the amplifier 230, the drain of the first field-effect transistor Q1 is connected to the source of the second field-effect transistor Q2, and the drain of the second field-effect transistor Q2 is the output terminal 2303 of the amplifier 230. Specifically, the first field-effect transistor Q1 and the second field-effect transistor Q2 may be Metal-OXide-Semiconductor Field-Effect Transistor (MOSFET), Junction Field-Effect Transistor (JFET), etc.

[0056] In Figure 5 the illustrated embodiment, the amplification unit 23 may further include a bias sub-unit 238. The bias sub-unit 238 is respectively connected to the gates of the first field-effect transistor Q1 and the second field-effect transistor Q2, and is used to provide a bias voltage. Among them, the bias voltage can be used to adjust the operating point of the amplifier 230, for example, the quiescent operating point. Specifically, the bias sub-unit 238 may be electrically connected to the control module 30, and the control module 30 may dynamically adjust the bias voltage according to the actual performance requirements of the amplification module 20. Exemplarily, the bias sub-unit 238 may be a charge pump, and the specific implementation manner of the bias sub-unit 238 is not limited in this embodiment.

[0057] In Figure 5 the illustrated embodiment, the amplification module 20 may further include a second ground node 24 for grounding. The amplification unit 23 may further include a ground capacitor 239 connected between the second ground node 24 and the gate of the second field-effect transistor Q2, which is used to filter out the noise signal in the bias voltage to improve the operating stability of the amplifier 230.

[0058] Specifically, the ground capacitor 239 may be a stacked capacitor. In some possible embodiments, the bare die 10 may include multiple metal layers (not shown in the figure), and the ground capacitor 239 and the second ground node 24 may be disposed on different metal layers. In Figure 5 the illustrated embodiment, the projection of the second ground node 24 in the thickness direction of the bare die 10 coincides with the ground capacitor 239 to save the layout space of the bare die 10.

[0059] In Figure 5In the illustrated embodiment, the ground capacitance 239, the amplifier 230, and the bias sub-unit 238 are sequentially arranged in the first direction X to save the layout space of the bare die 10. In addition, the input node 21, the second ground node 24, and the matching unit 25 are sequentially arranged in the second direction Y. Specifically, the second ground node 24 is spaced between the input node 21 and the matching unit 25, which can play a role in signal isolation to avoid signal coupling crosstalk and ensure the smooth transmission of the radio frequency signal.

[0060] In some possible embodiments, the matching unit 25 may include a matching inductor 252, an attenuation sub-unit 254, and a power supply sub-unit 256. Among them, the power supply sub-unit 256 is used to provide the supply voltage VDD to ensure the normal operation of the amplification module 20. Specifically, the supply voltage VDD may be 3.4V, 3.8V, 4.2V, etc. Exemplarily, the power supply sub-unit 256 may be a Low-Dropout Regulator (LDO).

[0061] The matching inductor 252 is connected between the output terminal of the amplification unit 23 (i.e., the output terminal 2303 of the amplifier 230) and the power supply sub-unit 256. On the one hand, the matching inductor 252 can limit the current value in the branch where the amplifier 230 is conducting to protect the working safety of the amplifier 230; on the other hand, the matching inductor 252 and the matching capacitor 2541 in the attenuation sub-unit 254 can jointly form an LC matching circuit to achieve impedance matching of the radio frequency signal. Specifically, the matching inductor 252 is wound on the bare die 10 in the form of a metal trace, which can reduce the hardware cost of the matching inductor 252.

[0062] One end of the attenuation sub-unit 254 is connected to the common terminal of the matching inductor 252 and the amplification unit 23, and the other end of the attenuation sub-unit 254 is connected to the output node 27. In Figure 5 the illustrated embodiment, the matching inductor 252 and the attenuation sub-unit 254 are sequentially arranged in the first direction X. The amplification unit 23, the matching inductor 252, and the power supply sub-unit 256 are sequentially arranged in the second direction Y to make the overall layout of the matching unit 25 more compact and reasonable.

[0063] In Figure 4In the illustrated embodiment, the attenuator subunit 254 may include a matching capacitor 2541 and an attenuator 2543. One end of the matching capacitor 2541 is connected to the common end of the matching inductor 252 and the amplifying unit 23, the other end of the matching capacitor 2541 is connected to one end of the attenuator 2543, and the other end of the attenuator 2543 is connected to the output node 27. The attenuator 2543 is used to reduce the amplitude of the radio frequency signal to prevent signal overload. Specifically, the attenuator 2543 may be a variable attenuator, a fixed attenuator, etc., and the specific implementation manner of the attenuator 2543 is not limited in this embodiment.

[0064] In some possible embodiments, the other end of the attenuator 2543 may be directly connected to the output node 27. In some other possible embodiments, the other end of the attenuator 2543 (i.e., the output end 2501 of the matching unit 25) may be connected to the output node 27 through a switch module, and the switch module is electrically connected to the control module 30. The control module 30 may also be used to control whether the plurality of amplifying modules 20 output corresponding radio frequency signals.

[0065] Please refer to Figure 6 , the first amplifying module 201 and the second amplifying module 202 are respectively located on opposite sides of the first axis K1, and the extending direction of the first axis K1 is the second direction Y. Specifically, both the first amplifying module 201 and the second amplifying module 202 may include a matching unit 25 and an output node 27. The low-noise amplifying chip 100 may further include a first switch module 32 disposed on the bare die 10, and the first switch module 32 is located on the first axis K1.

[0066] Specifically, the first switch module 32 is connected between the output end 2501 of the matching unit 25 of the first amplifying module 201, the output end 2501 of the matching unit 25 of the second amplifying module 202, the output node 27 of the first amplifying module 201, and the output node 27 of the second amplifying module 202, and is used to conduct the signal branch between the output end 2501 of one of the matching units 25 and one of the output nodes 27. Exemplarily, the first switch module 32 may be a double-pole double-throw switch.

[0067] In Figure 6 the illustrated embodiment, the matching inductor 252 of the first amplifying module 201 is disposed on the side of the attenuator subunit 254 of the first amplifying module 201 away from the first axis K1, and the matching inductor 252 of the second amplifying module 202 is disposed on the side of the attenuator subunit 254 of the second amplifying module 202 away from the first axis K1, so that there are two attenuator subunits 254 spaced between the matching inductor 252 of the first amplifying module 201 and the matching inductor 252 of the second amplifying module 202, to improve the isolation between the two matching inductors 252 and reduce the occurrence of signal coupling crosstalk.

[0068] In addition, the attenuation sub-units 254 of the first amplification module 201 and the attenuation sub-units 254 of the second amplification module 202 are both arranged "adjacent" to the first axis K1. Therefore, when the first switch module 32 is arranged on the first axis K1, the signal path length between the attenuation sub-unit 254 of the first amplification module 201 and the first switch module 32 can be shortened, and the signal path length between the attenuation sub-unit 254 of the second amplification module 202 and the first switch module 32 can be shortened. While reducing the transmission loss of the radio frequency signal, the balanced symmetry of the layout of the first amplification module 201 and the second amplification module 202 is ensured, and the performance difference between the first amplification module 201 and the second amplification module 202 caused by the frequency band interleaving configuration (mismatch) is reduced, so as to improve the transmission quality of the radio frequency signal.

[0069] Furthermore, the power supply sub-units 256 of the first amplification module 201, the first switch module 32, and the power supply sub-units 256 of the second amplification module 202 are arranged in sequence in the first direction X. That is to say, the first switch module 32 is arranged at intervals between the two power supply sub-units 256 corresponding to the first amplification module 201 and the second amplification module 202, which can save the layout space of the bare die 10, so that the overall layout of the bare die 10 is more compact and reasonable.

[0070] Please refer to Figure 7 , the third amplification module 203 and the fourth amplification module 204 are respectively located on opposite sides of the second axis K2, and the extending direction of the second axis K2 is the second direction Y. Specifically, the third amplification module 203 and the fourth amplification module 204 may both include a matching unit 25 and an output node 27. The low-noise amplification chip 100 may further include a second switch module 34 arranged on the bare die 10, and the second switch module 34 is located on the second axis K2.

[0071] Specifically, the second switch module 34 is connected between the output terminal 2501 of the matching unit 25 of the third amplification module 203, the output terminal 2501 of the matching unit 25 of the fourth amplification module 204, the output node 27 of the third amplification module 203, and the output node 27 of the fourth amplification module 204, and is used to conduct the signal branch between the output terminal 2501 of one of the matching units 25 and one of the output nodes 27. Exemplarily, the second switch module 34 may be a double-pole double-throw switch.

[0072] In Figure 7In the illustrated embodiment, the matching inductor 252 of the third amplification module 203 is disposed on a side of the attenuation subunit 254 of the third amplification module 203 away from the second axis K2, and the matching inductor 252 of the fourth amplification module 204 is disposed on a side of the attenuation subunit 254 of the fourth amplification module 204 away from the second axis K2, such that two attenuation subunits 254 are disposed at intervals between the matching inductor 252 of the third amplification module 203 and the matching inductor 252 of the fourth amplification module 204, so as to improve the isolation degree between the two matching inductors 252 and reduce the occurrence of signal coupling crosstalk.

[0073] In addition, the attenuation subunit 254 of the third amplification module 203 and the attenuation subunit 254 of the fourth amplification module 204 are both disposed "adjacent" to the second axis K2. Therefore, in the case where the second switching module 34 is disposed on the second axis K2, the signal path length between the attenuation subunit 254 of the third amplification module 203 and the second switching module 34 can be shortened, and the signal path length between the attenuation subunit 254 of the fourth amplification module 204 and the second switching module 34 can be shortened. While reducing the transmission loss of the radio frequency signal, the balanced symmetry of the layout of the third amplification module 203 and the fourth amplification module 204 is ensured, and the performance difference between the third amplification module 203 and the fourth amplification module 204 due to the frequency band interleaving configuration (mismatch) is reduced, so as to improve the transmission quality of the radio frequency signal.

[0074] Further, the power supply subunit 256 of the third amplification module 203, the second switching module 34, and the power supply subunit 256 of the fourth amplification module 204 are sequentially disposed in the first direction X. That is to say, the second switching module 34 is disposed at intervals between the two power supply subunits 256 corresponding to the third amplification module 203 and the fourth amplification module 204, which can save the layout space of the bare die 10, so that the overall layout of the bare die 10 is more compact and reasonable.

[0075] Please combine Figure 2 、 Figure 6 and Figure 7 , in some possible embodiments, at least some of the components included in the first amplification module 201 and at least some of the components included in the fourth amplification module 204 are axially symmetric about a specified axis K, so as to increase the reliability of the low-noise amplification chip 100 during the manufacturing and packaging processes. Similarly, at least some of the components included in the second amplification module 202 and at least some of the components included in the third amplification module 203 are axially symmetric about the specified axis K, so as to increase the reliability of the low-noise amplification chip 100 during the manufacturing and packaging processes.

[0076] Specifically, at least some components may include at least one of an input node 21, an output node 27, an amplifier 230, capacitors (such as a DC-blocking capacitor 232, a ground capacitor 239, etc.), inductors (such as a ground inductor 234, a matching inductor 252, etc.), and switches (a first switch S1, a second switch S2, etc.).

[0077] It should be noted here that the first amplification module 201, the second amplification module 202, the third amplification module 203, and the fourth amplification module 204 in this embodiment may all adopt the layout architecture as shown in Figure 5 Of course, some of the amplification modules 20 among the first amplification module 201, the second amplification module 202, the third amplification module 203, and the fourth amplification module 204 may adopt the layout architecture as shown in Figure 5 This embodiment does not make specific limitations on this.

[0078] An embodiment of the present application provides a low-noise amplification chip 100, which includes a bare die 10 and a plurality of amplification modules 20 disposed on the bare die 10. The plurality of amplification modules 20 include a first amplification module 201, a second amplification module 202, a third amplification module 203, and a fourth amplification module 204 arranged in sequence along the first direction X. Both the first amplification module 201 and the third amplification module 203 are configured to receive radio frequency signals in the first communication band; wherein, one of the first amplification module 201 and the third amplification module 203 is configured to transmit a main set reception signal, and the other is configured to transmit a diversity reception signal. Both the second amplification module 202 and the fourth amplification module 204 are configured to receive radio frequency signals in the second communication band; wherein, the first communication band and the second communication band are different; one of the second amplification module 202 and the fourth amplification module 204 is configured to transmit a main set reception signal, and the other is configured to transmit a diversity reception signal.

[0079] Due to the presence of the second amplification module 202, the distance between the first amplification module 201 and the third amplification module 203 can be increased, thereby avoiding signal leakage and mutual interference between the two radio frequency signals in the first communication band, so as to improve the isolation of the low-noise amplification chip 100. Similarly, due to the presence of the third amplification module 203, the distance between the second amplification module 202 and the fourth amplification module 204 can be increased, thereby avoiding signal leakage and mutual interference between the two radio frequency signals in the second communication band, so as to improve the isolation of the low-noise amplification chip 100.

[0080] Therefore, the low-noise amplification chip 100 in the embodiment of the present application has a high isolation when transmitting radio frequency signals in the first communication band and the second communication band, which can ensure the transmission quality of the radio frequency signals.

[0081] Please refer to Figure 8 Figure 8 , the low-noise amplification chip 100 may include a bare die 10 and a plurality of amplification modules 20 disposed on the bare die 10. Among them, the plurality of amplification modules 20 may include a fifth amplification module 205, a sixth amplification module 206, a seventh amplification module 207, and an eighth amplification module 208 sequentially arranged along the first direction X. Specifically, the relevant introduction about the bare die 10 and the first direction X may refer to the specific description in the above embodiments, and will not be elaborated here.

[0082] In this embodiment, both the fifth amplification module 205 and the eighth amplification module 208 are configured to receive radio frequency signals in the first communication band. Among them, one of the fifth amplification module 205 and the eighth amplification module 208 is configured to transmit a Primary Receive (PRX) signal, and the other is configured to transmit a Diversity Receive (DRX) signal.

[0083] Therefore, when the fifth amplification module 205 and the eighth amplification module 208 simultaneously receive radio frequency signals in the first communication band, since the sixth amplification module 206 and the seventh amplification module 207 are disposed between the fifth amplification module 205 and the eighth amplification module 208, the presence of the sixth amplification module 206 and the seventh amplification module 207 can increase the interval distance between the fifth amplification module 205 and the eighth amplification module 208, thereby avoiding signal leakage and mutual interference of the two radio frequency signals in the first communication band, so as to improve the isolation degree of the low-noise amplification chip 100, and further ensure the overall performance and working reliability of the low-noise amplification chip 100.

[0084] In this embodiment, both the sixth amplification module 206 and the seventh amplification module 207 are configured to receive radio frequency signals in the second communication band. Among them, one of the sixth amplification module 206 and the seventh amplification module 207 is configured to transmit a Primary Receive (PRX) signal, and the other is configured to transmit a Diversity Receive (DRX) signal.

[0085] In this embodiment, the first communication band and the second communication band are different. For example, the first communication band is one of the N77 band and the N79 band, and the second communication band is the other of the N77 band and the N79 band. Specifically, the relevant introduction about the first communication band and the second communication band may refer to the specific description in the above embodiments, and will not be elaborated here.

[0086] It is not difficult to find here that in the case where the low-noise amplification chip 100 needs to receive radio frequency signals in two different communication frequency bands, if the isolation requirement for one communication frequency band is higher than that for the other communication frequency band, the fifth amplification module 205 and the eighth amplification module 208 can be configured for the communication frequency band with a higher isolation requirement, and the sixth amplification module 206 and the seventh amplification module 207 can be configured for the communication frequency band with a lower isolation requirement, so as to ensure the overall performance and working reliability of the low-noise amplification chip 100.

[0087] In some possible embodiments, both the fifth amplification module 205 and the sixth amplification module 206 are configured to transmit a primary receive (PRX) signal, and both the seventh amplification module 207 and the eighth amplification module 208 are configured to transmit a diversity receive (DRX) signal. In some other possible embodiments, both the fifth amplification module 205 and the sixth amplification module 206 are configured to transmit a diversity receive (DRX) signal, and both the seventh amplification module 207 and the eighth amplification module 208 are configured to transmit a primary receive (PRX) signal.

[0088] Therefore, two amplification modules 20 on the same side of the specified axis K adopt the same signal reception technology (for example, both are PRX, or both are DRX), so as to reduce the control difficulty of the amplification module 20 and improve the layout rationality of the bare die 10. Among them, the specified axis K is located between the sixth amplification module 206 and the seventh amplification module 207. Specifically, the specified axis K can be the central axis of the bare die 10, or can be other axes on the bare die 10 that deviate from the central axis and do not coincide with the central axis. Specifically, the extending direction of the specified axis K is the second direction Y. For the relevant introduction about the second direction Y, reference can be made to the specific description in the above embodiments, which will not be elaborated here.

[0089] Please refer to Figure 9 , the low-noise amplification chip 100 may further include a control module 30 disposed on the bare die 10. The control module 30 is disposed between the sixth amplification module 206 and the seventh amplification module 207 and may be located on the specified axis K. That is to say, the fifth amplification module 205, the sixth amplification module 206, the control module 30, the seventh amplification module 207, and the eighth amplification module 208 are sequentially disposed in the first direction X. Among them, the control module 30 is electrically connected to the fifth amplification module 205, the sixth amplification module 206, the seventh amplification module 207, and the eighth amplification module 208 respectively. The control module 30 is used to control the fifth amplification module 205, the sixth amplification module 206, the seventh amplification module 207, and the eighth amplification module 208 respectively. For example, adjusting the gain of the amplification module 20, adjusting the bias voltage of the amplification module 20, and so on. Specifically, the control module 30 may be a control chip.

[0090] In one aspect, a control module 30 is provided in the low-noise amplification chip 100. The control module 30 can coordinately control each amplification module 20 to ensure the normal operation of each amplification module 20 under different working conditions, thereby improving the working stability and overall integration of the low-noise amplification chip 100. In another aspect, the control module 30 is disposed between the sixth amplification module 206 and the seventh amplification module 207, which can further increase the spacing distance between the fifth amplification module 205 and the eighth amplification module 208, as well as the spacing distance between the sixth amplification module 206 and the seventh amplification module, further improving the signal isolation of the low-noise amplification chip 100 when transmitting radio frequency signals in the first communication band and the second communication band, so as to ensure the transmission quality of the radio frequency signals.

[0091] Specifically, the implementation manners of the fifth amplification module 205, the sixth amplification module 206, the seventh amplification module 207, and the eighth amplification module 208 can refer to the relevant descriptions of the amplification module 20 in the above embodiments. Without conflict, the fifth amplification module 205, the sixth amplification module 206, the seventh amplification module 207, and the eighth amplification module 208 can respectively adopt the relevant features of the first amplification module 201, the second amplification module 202, the third amplification module 203, and the fourth amplification module 204 in the above embodiments. For the sake of brevity, this specification will not elaborate herein.

[0092] In some possible embodiments, at least some of the components included in the fifth amplification module 205 and at least some of the components included in the eighth amplification module 208 are axisymmetric with respect to a specified axis K, so as to increase the reliability of the low-noise amplification chip 100 during manufacturing and packaging. Similarly, at least some of the components included in the sixth amplification module 206 and at least some of the components included in the seventh amplification module 207 are axisymmetric with respect to the specified axis K, so as to increase the reliability of the low-noise amplification chip 100 during manufacturing and packaging.

[0093] Specifically, at least some of the components may include at least one of an input node 21, an output node 27, an amplifier 230, capacitors (such as a DC-blocking capacitor 232, a ground capacitor 239, etc.), inductors (such as a ground inductor 234, a matching inductor 252, etc.), and switches (a first switch S1, a second switch S2, etc.).

[0094] In some possible embodiments, the fifth amplification module 205 and the sixth amplification module 206 are respectively located on opposite sides of the first axis K1, and the extending direction of the first axis K1 is the second direction Y. Specifically, both the fifth amplification module 205 and the sixth amplification module 206 may include a matching unit 25 and an output node 27. The low-noise amplification chip 100 may further include a third switch module (not shown in the figure) disposed on the bare die 10, and the third switch module is located on the first axis K1.

[0095] Specifically, the third switch module is connected between the output terminal 2501 of the matching unit 25 of the fifth amplification module 205, the output terminal 2501 of the matching unit 25 of the sixth amplification module 206, the output node 27 of the fifth amplification module 205, and the output node 27 of the sixth amplification module 206, and is used to conduct the signal branch between the output terminal 2501 of one of the matching units 25 and one of the output nodes 27. Without conflict, the third switch module may adopt the relevant features of the first switch module 32 in the above embodiments. For the sake of brevity, this specification will not repeat them here.

[0096] In some possible embodiments, the seventh amplification module 207 and the eighth amplification module 208 are respectively located on opposite sides of the second axis K2, and the extending direction of the second axis K2 is the second direction Y. Specifically, both the seventh amplification module 207 and the eighth amplification module 208 may include a matching unit 25 and an output node 27. The low-noise amplification chip 100 may further include a fourth switch module (not shown in the figure) disposed on the bare die 10, and the fourth switch module is located on the second axis K2.

[0097] Specifically, the fourth switch module is connected between the output terminal 2501 of the matching unit 25 of the seventh amplification module 207, the output terminal 2501 of the matching unit 25 of the eighth amplification module 208, the output node 27 of the seventh amplification module 207, and the output node 27 of the eighth amplification module 208, and is used to conduct the signal branch between the output terminal 2501 of one of the matching units 25 and one of the output nodes 27. Without conflict, the fourth switch module may adopt the relevant features of the second switch module 34 in the above embodiments. For the sake of brevity, this specification will not repeat them here.

[0098] An embodiment of the present application provides a low-noise amplification chip 100. The low-noise amplification chip 100 includes a bare die 10 and a plurality of amplification modules 20 disposed on the bare die 10. The plurality of amplification modules 20 includes a fifth amplification module 205, a sixth amplification module 206, a seventh amplification module 207, and an eighth amplification module 208 sequentially arranged along a first direction X. Both the fifth amplification module 205 and the eighth amplification module 208 are configured to receive radio frequency signals in a first communication band; wherein, one of the fifth amplification module 205 and the eighth amplification module 208 is configured to transmit a main set reception signal, and the other is configured to transmit a diversity reception signal. Both the sixth amplification module 206 and the seventh amplification module 207 are configured to receive radio frequency signals in a second communication band; wherein, the first communication band and the second communication band are different; one of the sixth amplification module 206 and the seventh amplification module 207 is configured to transmit a main set reception signal, and the other is configured to transmit a diversity reception signal.

[0099] Due to the presence of the sixth amplification module 206 and the seventh amplification module 207, the interval distance between the fifth amplification module 205 and the eighth amplification module 208 can be increased, thereby avoiding signal leakage and mutual interference between the two radio frequency signals in the first communication band, so as to improve the isolation of the low-noise amplification chip 100.

[0100] Therefore, the low-noise amplification chip 100 in the embodiment of the present application has a high isolation when transmitting radio frequency signals in the first communication band, which can ensure the transmission quality of the radio frequency signals.

[0101] In the description of the present application, when certain terms are used to refer to specific components in the specification and claims. Those skilled in the art should understand that hardware manufacturers may use different nouns to refer to the same component. The specification and claims do not use the difference in name as a way to distinguish components, but use the difference in function of components as the criterion for distinction. As mentioned throughout the specification and claims, "including" is an open-ended term and should be interpreted as "including but not limited to"; "substantially" means that those skilled in the art can solve technical problems within a certain error range and basically achieve the technical effect.

[0102] In the description of the present application, it should be understood that the terms "upper", "lower", "front", "rear", "left", "right", "inside", etc. indicating the orientation or position relationship are based on the orientation or position relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation to the present application.

[0103] In this application, unless otherwise clearly specified or defined, terms such as "installed", "connected", "linked", "fixed", etc. shall be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or an indirect connection through an intermediate medium, or the communication inside two components, or just a surface contact. For those of ordinary skill in the art, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0104] In the description of this specification, the descriptions with reference to terms such as "one embodiment", "some embodiments", "examples", "specific examples", or "some examples", etc. mean that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of this application. In this specification, the schematic expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples. In addition, without contradiction, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples.

[0105] In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the quantity of the indicated technical features. Thus, the features defined with "first" and "second" can explicitly or implicitly include at least one of the features. In the description of this application, the meaning of "a plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0106] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application and are not intended to limit them; although this application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements for some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the various embodiments of this application.

Claims

1. A low noise amplifier chip, characterized in that: It comprises a bare core and a plurality of amplifying modules arranged on the bare core, wherein the plurality of amplifying modules comprise a first amplifying module, a second amplifying module, a third amplifying module and a fourth amplifying module arranged in sequence along a first direction; The first amplification module and the third amplification module are both configured to receive radio frequency signals in a first communication frequency band; wherein one of the first amplification module and the third amplification module is configured to transmit a main set of received signals, and the other is configured to transmit a diversity received signal; The second amplification module and the fourth amplification module are both configured to receive radio frequency signals in a second communication frequency band; wherein the first communication frequency band and the second communication frequency band are different; one of the second amplification module and the fourth amplification module is configured to transmit a main set reception signal, and the other is configured to transmit a diversity reception signal.

2. The low noise amplifier chip according to claim 1, characterized in that: The first amplification module and the second amplification module are both configured to transmit a main set reception signal, and the third amplification module and the fourth amplification module are both configured to transmit a diversity reception signal; or The first amplification module and the second amplification module are both configured to transmit diversity reception signals, and the third amplification module and the fourth amplification module are both configured to transmit main set reception signals.

3. The low noise amplifier chip according to claim 1, characterized in that: The first communication frequency band is one of the N77 frequency band and the N79 frequency band, and the second communication frequency band is the other of the N77 frequency band and the N79 frequency band.

4. The low noise amplifier chip according to claim 1, characterized in that: At least some of the components included in the first amplification module and at least some of the components included in the fourth amplification module are axially symmetric about a designated axis; the extension direction of the designated axis is a second direction, and the second direction intersects the first direction; or / and At least some of the components included in the second amplifying module and at least some of the components included in the third amplifying module are axially symmetric about a designated axis; the extending direction of the designated axis is a second direction, and the second direction intersects the first direction; Wherein, at least some of the components include at least one of an input node, an output node, an amplifier, a capacitor, an inductor and a switch.

5. The low noise amplifier chip according to any one of claims 1 to 4, characterized in that: The low-noise amplifier chip further includes a control module disposed on the bare core, wherein the control module is disposed between the second amplifier module and the third amplifier module; The control module is electrically connected to the first amplifying module, the second amplifying module, the third amplifying module and the fourth amplifying module respectively.

6. The low noise amplifier chip according to any one of claims 1 to 4, characterized in that: The amplification module includes an input node, an amplification unit, a matching unit and an output node. The amplification unit and the matching unit are sequentially connected between the input node and the output node, and are sequentially arranged on the bare core in a second direction, and the second direction intersects with the first direction.

7. The low noise amplifier chip according to claim 6, characterized in that: The multiple amplifying units corresponding to the multiple amplifying modules adopt the same component layout architecture.

8. The low noise amplifier chip according to claim 6, characterized in that: The amplifying unit includes an amplifier and a DC blocking capacitor, wherein the DC blocking capacitor is connected between the input node and an input end of the amplifier, and the matching unit is connected between an output end of the amplifier and the output node.

9. The low noise amplifier chip according to claim 8, characterized in that: The amplifying module further includes a first grounding node, and the amplifying unit further includes a grounding inductor, wherein the grounding inductor is connected between the first grounding node and a ground terminal of the amplifier; The input node, the first grounding node and the grounding inductor are arranged in sequence in the first direction.

10. The low noise amplifier chip according to claim 9, characterized in that: The amplifying unit further includes a connecting wire, a first switch and a second switch; one end of the connecting wire is connected to the ground terminal of the amplifier, and the other end of the connecting wire is connected to one end of the ground inductor; One end of the first switch is connected to the common end of the connecting line and the grounding inductor, and the other end of the first switch is connected to the first grounding node; one end of the second switch is connected to the other end of the grounding inductor, and the other end of the second switch is connected to the first grounding node.

11. The low noise amplifier chip according to claim 8, characterized in that: The amplifier comprises a first field effect transistor and a second field effect transistor, wherein the gate of the first field effect transistor is the input terminal of the amplifier, the source of the first field effect transistor is the ground terminal of the amplifier, the drain of the first field effect transistor is connected to the source of the second field effect transistor, and the drain of the second field effect transistor is the output terminal of the amplifier; The amplifying unit further includes a biasing subunit, which is respectively connected to the gate of the first field effect transistor and the gate of the second field effect transistor to provide a bias voltage.

12. The low noise amplifier chip according to claim 11, characterized in that: The amplification module further includes a second grounding node, and the amplification unit further includes a grounding capacitor, wherein the grounding capacitor is connected between the second grounding node and the gate of the second field effect transistor; The grounding capacitor, the amplifier and the bias subunit are arranged in sequence in the first direction; the input node, the second grounding node and the matching unit are arranged in sequence in the second direction.

13. The low noise amplifier chip according to claim 6, characterized in that: The matching unit includes a matching inductor, an attenuation subunit and a power supply subunit, and the power supply subunit is used to provide a power supply voltage; The matching inductor is connected between the output end of the amplifying unit and the power supply subunit, one end of the attenuation subunit is connected to the common end of the matching inductor and the amplifying unit, and the other end of the attenuation subunit is connected to the output node; The matching inductor and the attenuation subunit are arranged in sequence in the first direction; the amplification unit, the matching inductor and the power supply subunit are arranged in sequence in the second direction.

14. The low noise amplifier chip according to claim 13, characterized in that: The attenuation subunit includes a matching capacitor and an attenuator, one end of the matching capacitor is connected to a common end connected to the matching inductor and the amplification unit, and the other end of the matching capacitor is connected to one end of the attenuator; The other end of the attenuator is connected to the output node.

15. The low noise amplifier chip according to any one of claims 1 to 4, characterized in that: The first amplifying module and the second amplifying module are respectively located on opposite sides of a first axis, the extension direction of the first axis is a second direction, and the second direction intersects the first direction; the first amplifying module and the second amplifying module both include a matching unit and an output node; the low-noise amplifying chip further includes a first switch module disposed on the bare core, and the first switch module is located on the first axis; The first switch module is connected between the output end of the matching unit of the first amplifying module, the output end of the matching unit of the second amplifying module, the output node of the first amplifying module and the output node of the second amplifying module, and is used to conduct a signal branch between the output end of one of the matching units and one of the output nodes.

16. The low noise amplifier chip according to any one of claims 1 to 4, characterized in that: The third amplifying module and the fourth amplifying module are respectively located on opposite sides of a second axis, the extension direction of the second axis is a second direction, and the second direction intersects the first direction; the third amplifying module and the fourth amplifying module each include a matching unit and an output node; the low-noise amplifying chip further includes a second switch module disposed on the bare core, and the second switch module is located on the second axis; The second switch module is connected between the output end of the matching unit of the third amplifying module, the output end of the matching unit of the fourth amplifying module, the output node of the third amplifying module and the output node of the fourth amplifying module, and is used to conduct a signal branch between the output end of one of the matching units and one of the output nodes.

17. A low noise amplifier chip, characterized in that: It comprises a bare core and a plurality of amplifying modules arranged on the bare core, wherein the plurality of amplifying modules comprise a fifth amplifying module, a sixth amplifying module, a seventh amplifying module and an eighth amplifying module arranged in sequence along a first direction; The fifth amplification module and the eighth amplification module are both configured to receive radio frequency signals in the first communication frequency band; wherein one of the fifth amplification module and the eighth amplification module is configured to transmit a main set of received signals, and the other is configured to transmit a diversity received signal; The sixth amplification module and the seventh amplification module are both configured to receive radio frequency signals of a second communication frequency band; wherein the first communication frequency band and the second communication frequency band are different; one of the sixth amplification module and the seventh amplification module is configured to transmit a main set reception signal, and the other is configured to transmit a diversity reception signal.

18. The low noise amplifier chip according to claim 17, characterized in that: The fifth amplification module and the sixth amplification module are both configured to transmit a main set reception signal, and the seventh amplification module and the eighth amplification module are both configured to transmit a diversity reception signal; or The fifth amplification module and the sixth amplification module are both configured to transmit diversity reception signals, and the seventh amplification module and the eighth amplification module are both configured to transmit main set reception signals.

19. The low noise amplifier chip according to claim 17, characterized in that: The first communication frequency band is one of the N77 frequency band and the N79 frequency band, and the second communication frequency band is the other of the N77 frequency band and the N79 frequency band.

20. The low noise amplifier chip according to claim 17, characterized in that: At least some of the components included in the fifth amplification module and at least some of the components included in the eighth amplification module are axially symmetric about a designated axis; the extension direction of the designated axis is a second direction, and the second direction intersects the first direction; or / and At least some of the components included in the sixth amplification module and at least some of the components included in the seventh amplification module are axially symmetric about a designated axis; the extension direction of the designated axis is a second direction, and the second direction intersects the first direction; Wherein, at least some of the components include at least one of an input node, an output node, an amplifier, a capacitor, an inductor and a switch.

21. The low noise amplifier chip according to any one of claims 17 to 20, characterized in that: The low-noise amplifier chip further includes a control module disposed on the bare core, wherein the control module is disposed between the sixth amplifier module and the seventh amplifier module; The control module is electrically connected to the fifth amplification module, the sixth amplification module, the seventh amplification module and the eighth amplification module respectively.

22. A radio frequency front-end module, characterized in that: include: A low noise amplifier chip as claimed in any one of claims 1 to 21.

Images