Notebook computer and operation method thereof

Abstract

The invention discloses a notebook computer and an operation method thereof. The notebook computer comprises a platform path controller (PCH), an embedded controller (EC), a data line, a clock signal line and an interrupt signal line. The platform path controller comprises a first internal integrated circuit controller (I2C controller) and a general purpose input / output pin controller (GPIO controller). The embedded controller comprises a second internal integrated circuit controller. The data wire is connected to the first internal integration circuit controller and the second internal integration circuit controller. The clock signal wire is connected to the first internal integration circuit controller and the second internal integration circuit controller. The interrupt signal wire is connected to the universal input / output pin controller and the second internal integrated circuit controller.

Description

Technical Field

[0001] This disclosure relates to an electronic device and an operation method thereof, and more particularly to a notebook computer and an operation method thereof. Background Art

[0002] A notebook computer needs to communicate from an application unit to an embedded controller (EC). Conventionally, Windows Management Instrumentation (WMI) is used to accomplish this task. However, designing a new WMI method to meet the requests of the application unit requires a great deal of work among the application unit (AP) / Basic Input Output System (BIOS) / embedded controller (EC). Even for a small change, most cases still require more than one month to develop. Developers are trying to find a better and simpler architecture for software developers and firmware developers to implement the functions they need.

[0003] Another situation is regarding the problem of system management interrupt (SMI). Windows Management Instrumentation (WMI) usually needs to utilize the system management interrupt (SMI) to perform tasks. However, the system management interrupt (SMI) has security and reliability issues. To improve the security and reliability issues, a new system architecture is highly needed to assist the communication between the application unit and the embedded controller (EC). Summary of the Invention

[0004] This disclosure relates to a notebook computer and an operation method thereof. By changing the system architecture, the embedded controller (EC) is declared as an I2C Human Interface Device (I2C HID), thereby providing a communication method without Windows Management Instrumentation (WMI). In this way, the development time of application tasks can be accelerated, and the security and reliability issues can also be improved.

[0005] According to one aspect of the present disclosure, a notebook computer is provided. The notebook computer includes a platform controller hub (PCH), an embedded controller (EC), a data trace, a clock signal trace, and an interrupt signal trace. The platform controller hub includes a first inter-integrated circuit controller (I2C controller) and a general purpose input / output controller (GPIO controller). The embedded controller includes a second inter-integrated circuit controller. The data trace is connected between the first inter-integrated circuit controller and the second inter-integrated circuit controller. The clock signal trace is connected between the first inter-integrated circuit controller and the second inter-integrated circuit controller. The interrupt signal trace is connected between the general purpose input / output controller and the second inter-integrated circuit controller.

[0006] According to another aspect of the present disclosure, a method for operating a notebook computer is provided. The method for operating a notebook computer includes the following steps. An Advanced Configuration and Power Interface (ACPI) declares an embedded controller (EC) as an I2C Human Interface Device (I2C HID). The embedded controller defines a communication method between the embedded controller and an operating system side.

[0007] To have a better understanding of the above and other aspects of the present disclosure, specific embodiments are given below and are described in detail in conjunction with the accompanying drawings as follows: Description of the Drawings

[0008] Figure 1 Illustrates the communication method between the embedded controller (EC) of a notebook computer and an application unit according to an embodiment of the present disclosure.

[0009] Figure 2 Illustrates a block diagram of a notebook computer according to an embodiment of the present disclosure.

[0010] Figure 3 Illustrates a block diagram of a notebook computer according to another embodiment of the present disclosure.

[0011] Figure 4 Illustrates an example of the communication method between the embedded controller and the operating system side according to an embodiment of the present disclosure.

[0012] Figure 5 The example illustrates the communication method between the embedded controller and the operating system side of another embodiment of the present disclosure.

[0013] Figure 6 The flowchart showing the operation method of a notebook computer according to an embodiment of the present disclosure is illustrated.

[0014] Description of reference numerals

[0015] 100, 100’: Notebook computer

[0016] 110: System on chip (SoC)

[0017] 110P: Platform controller hub (PCH)

[0018] 110U: Processor

[0019] 111: First inter-integrated circuit controller (I2C controller)

[0020] 112: General purpose input / output controller (GPIO controller)

[0021] 113: Enhanced Serial Peripheral Interface (eSPI)

[0022] 120: Embedded controller (EC)

[0023] 121: Second inter-integrated circuit controller

[0024] 122: Enhanced Serial Peripheral Interface (eSPI)

[0025] 130: Application unit

[0026] 140: Advanced Configuration and Power Interface (ACPI)

[0027] 150: HID Class Driver unit (HID Class Driver)

[0028] AL: Warning trace

[0029] API: Application Programming Interface

[0030] CL, CL’: Clock signal trace

[0031] CS: Selection signal trace

[0032] DA: Data trace

[0033] FRP: Feature report

[0034] FW: Firmware side

[0035] IRP: Input report

[0036] IT: Interrupt signal trace

[0037] IO: Input / output signal trace

[0038] ORP: Output report

[0039] OS: Operating system side

[0040] RS: Reset signal trace

[0041] S110, S120: Steps Detailed implementation manners

[0042] The technical terms in this specification refer to the customary terms in this technical field. If this specification explains or defines some terms, the explanations of these terms shall be subject to the explanations or definitions in this specification. Each embodiment of this disclosure has one or more technical features. On the premise of possible implementation, those with ordinary knowledge in this technical field can selectively implement some or all of the technical features in any embodiment, or selectively combine some or all of the technical features in these embodiments.

[0043] Please refer to Figure 1, which illustrates the communication method between the embedded controller (EC) 120 and the application unit 130 of the notebook computer 100 according to an embodiment of the present disclosure. The application unit 130 is, for example, a storage device that stores program code. In this embodiment, the Advanced Configuration and Power Interface (ACPI) 140 declares the embedded controller 120 as an I2C Human Interface Device (I2C HID). The Advanced Configuration and Power Interface (ACPI) is an open standard that the operating system can use to identify and configure computer hardware components, perform power management (e.g., put unused hardware components into a sleep state), automatic configuration (e.g., plug and play and hot plug), and status monitoring. A Human Interface Device (HID) is an electronic device used by humans to receive user input and provide output to the user.

[0044] The embedded controller 120 on the firmware side FW can communicate directly with the application unit 130 on the operating system side OS without using the Windows Management Instrumentation (WMI) to complete the communication between the two, and it will not cause many operational problems due to the system management interrupt (SMI). In this way, it can accelerate the development time of application tasks and also improve the issues of security and reliability.

[0045] Please refer to Figure 2 , which illustrates a block diagram of the notebook computer 100 according to an embodiment of the present disclosure. The notebook computer 100 includes at least a platform controller hub (PCH) 110P and the above-mentioned embedded controller 120. The platform controller hub 110P includes a first Inter-Integrated Circuit Controller (I2C controller) 111, a General Purpose Input / Output controller (GPIO controller) 112, and an Enhanced Serial Peripheral Interface (eSPI) 113. The embedded controller 120 includes a second Inter-Integrated Circuit Controller 121 and an Enhanced Serial Peripheral Interface (eSPI) 122. In Figure 2In an embodiment, a processor 110U and a platform path controller 110P are integrated, for example, in a system on chip (SoC) 110. The processor 110U is, for example, a Central Processing Unit (CPU) and / or a Graphic Processing Unit (GPU).

[0046] As Figure 2 shown, the laptop 100 further includes a data trace DA, a clock signal trace CL, an interrupt signal trace IT, an input / output signal trace IO, a clock signal trace CL', a selection signal trace CS, a warning trace AL, and a reset signal trace RS. The data trace DA, the clock signal trace CL, the interrupt signal trace IT, the input / output signal trace IO, the clock signal trace CL', the selection signal trace CS, the warning trace AL, and the reset signal trace RS are, for example, traces on a circuit board, and these traces are connected between packaged chips. The data trace DA is connected to a first internal integrated circuit controller 111 and a second internal integrated circuit controller 121. The clock signal trace CL is connected to the first internal integrated circuit controller 111 and the second internal integrated circuit controller 121. The interrupt signal trace IT is connected to a general purpose input / output pin controller 112 and the second internal integrated circuit controller 121. The input / output signal trace IO, the clock signal trace CL', the selection signal trace CS, the warning trace AL, and the reset signal trace RS are connected between an enhanced serial peripheral interface (eSPI) 113 and an enhanced serial peripheral interface (eSPI) 122.

[0047] In the present disclosure, the data trace DA, the clock signal trace CL, and the interrupt signal trace IT are specifically added between the platform path controller 110P and the embedded controller 120 so that the embedded controller 120 can implement the operation mode of an I2C human interface device (I2C HID).

[0048] Please refer to Figure 3 , which shows a block diagram of a laptop 100' according to another embodiment of the present disclosure. In Figure 3 the embodiment, the processor 110U and the platform path controller 110P are two independent chips. The architectures of the platform path controller 110P and the embedded controller 120 are the same as those in Figure 2 , and will not be repeated here.

[0049] In the present disclosure, the embedded controller 120 is an I2C human-machine interface device. Data can be transmitted between the embedded controller (EC) 120 and the platform path controller (PCH) 110P through the data trace DA, the clock signal trace CL, and the interrupt signal trace IT. The ways in which the data trace DA, the clock signal trace CL, and the interrupt signal trace IT transmit data include the following Figure 4 and Figure 5 two ways.

[0050] Please refer to Figure 4 , which exemplarily illustrates the communication method between the embedded controller 120 and the operating system side OS according to an embodiment of the present disclosure. As Figure 4 shown, the embedded controller 120 and the operating system side OS communicate with an input report (IRP) and an output report (ORP). The input report IRP is used to upload data to the HID Class Driver unit 150, and the HID Class Driver unit 150 communicates with the application unit 130 through the application programming interface API. The output report ORP is used to download data to the embedded controller 120. The input report IRP and the output report ORP have a one-way communication mode. Since the embedded controller 120 is declared as an I2C human-machine interface device, the embedded controller 120 on the firmware side FW can directly communicate with the HID Class Driver unit 150 on the operating system side OS through the input report IRP and the output report ORP, without using Windows Management Instrumentation (WMI) to complete the communication between the two, and without causing many operational problems to the system management interrupt (SMI).

[0051] Please refer to Figure 5 , which exemplarily illustrates the communication method between the embedded controller 120 and the operating system side OS according to another embodiment of the present disclosure. As Figure 5As shown, the embedded controller 120 communicates with the operating system side OS through a feature report (FRP). The embedded controller 120 can use the feature report FRP to upload data to the HID Class Driver unit 150, and the HID Class Driver unit 150 communicates with the application unit 130 through the application programming interface (API). The HID Class Driver unit can use the feature report FRP to download data to the embedded controller 120. The feature report FRP has a two-way communication mode. Since the embedded controller 120 is declared as an I2C human interface device, the embedded controller 120 on the firmware side FW can directly communicate with the HID Class Driver unit 150 on the operating system side OS through the input report (IRP) and output report (ORP), without using Windows Management Instrumentation (WMI) to complete the communication between the two, and it will not cause many operational problems due to the system management interrupt (SMI).

[0052] Please refer to Figure 6 , which shows a flowchart of the operation method of the notebook computers 100, 100' according to an embodiment of the present disclosure. In the present disclosure, the operation method of the notebook computers 100, 100' includes steps S110 and S120. In step S110, the Advanced Configuration and Power Interface (ACPI) 140 declares the embedded controller (EC) 120 as an I2C human interface device (I2C HID). At the same time, it is also necessary to configure data traces DA, clock signal traces CL, and interrupt signal traces IT between the platform path controller (PCH) 110P and the declared embedded controller (EC) 120 on the hardware side.

[0053] Next, in step S120, the embedded controller 120 defines the communication method between the embedded controller 120 and the operating system side OS. For example, the communication method between the embedded controller 120 and the operating system side OS can use the input report IRP and output report ORP as described above Figure 4 for communication. Alternatively, the communication method between the embedded controller 120 and the operating system side OS can use the feature report FRP as described above Figure 5 for communication.

[0054] According to the various embodiments above, in the laptop computers 100, 100' and their operation methods, by changing the system architecture, the embedded controller (EC) 120 is declared as an I2C human interface device (I2C HID), thereby providing a communication method without the Windows Management Instrumentation (WMI). After the embedded controller 120 is declared as an I2C human interface device, the expansion design can be easily carried out. The lead time and R & D resources for development and design are saved, and it is easier to identify outsourced resources. In the case of a communication method without the Windows Management Instrumentation (WMI), application tasks can be executed in a more robust, secure, and system load-reduced manner (with a significant reduction in the number of processor pauses).

[0055] The above disclosure provides different features for implementing some embodiments or examples of the present disclosure. Specific examples of the components and configurations described above (such as the numerical values or names mentioned) are used to simplify / illustrate some embodiments of the present disclosure. Of course, these components and configurations are only examples and are not intended to be restrictive. In addition, some embodiments of the present disclosure may repeat reference numerals and / or letters in various examples. This repetition is for the purpose of simplicity and clarity, and does not itself indicate the relationship between the various embodiments and / or configurations discussed.

[0056] In summary, although the present disclosure has been disclosed as above with embodiments, it is not intended to limit the present disclosure. Those of ordinary skill in the art to which the present disclosure pertains can make various changes and modifications without departing from the spirit and scope of the present disclosure. Therefore, the protection scope of the present disclosure shall be subject to that defined by the appended claims.

Claims

1. A laptop computer, characterized in that, Comprising: A platform path controller, comprising: A first integrated circuit controller; and A general-purpose input / output pin controller; An embedded controller, comprising: A second integrated circuit controller; A data trace, connected to the first integrated circuit controller and the second integrated circuit controller; a clock signal trace, connected to the first integrated circuit controller and the second integrated circuit controller; and An interrupt signal trace, connected to the general-purpose input / output pin controller and the second integrated circuit controller.

2. The laptop computer according to claim 1, characterized in that, Further comprising: A processor, which is integrated with the platform path controller on a system-on-chip.

3. The laptop computer according to claim 1, characterized in that, The embedded controller communicates with an operating system end through a feature report.

4. The laptop according to claim 3, characterized in that, The feature report has a two-way communication mode.

5. The laptop computer according to claim 1, characterized in that, The embedded controller communicates with an operating system end through an input report and an output report.

6. The laptop computer according to claim 5, characterized in that, The input report and the output report have a one-way communication mode.

7. The laptop computer according to claim 1, wherein, An advanced configuration and power interface declares the embedded controller as an I2C human-machine interface device.

8. A method for operating a laptop computer, characterized in that, Comprising: An advanced configuration and power interface declares an embedded controller as an I2C human-machine interface device; And The embedded controller defines a communication method between the embedded controller and an operating system end.

9. The operating method of the laptop computer according to claim 8, wherein, The embedded controller defines that the embedded controller communicates with the operating system end by using a feature report.

10. The operating method of the notebook computer according to claim 9, characterized in that, The feature report has a two-way communication mode.

11. The operating method of the laptop computer according to claim 8, characterized in that, The embedded controller defines that the embedded controller communicates with the operating system end by using an input report and an output report.

12. The operating method of the notebook computer according to claim 11, wherein The input report and the output report have a one-way communication mode.

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