A QC-LDPC code check matrix construction method, device, medium and product

Abstract

This application discloses a method, device, medium, and product for constructing a check matrix for QC-LDPC codes, relating to the field of channel coding technology. The method comprises: first, generating an initial check matrix without four loops; second, based on pre-decoding, screening target columns that are prone to decoding oscillation, eliminating the non-zero entries with the largest number of six loops to generate an intermediate check matrix; and finally, optimizing the six-loop distribution of the intermediate matrix column by column to generate a target check matrix with mixed column weights. This application addresses the decoding error floor problem caused by short loops (four loops, six loops) in high-rate, long-codeword QC-LDPC codes. By dynamically optimizing the check matrix structure through a three-step construction method, the method significantly reduces the number of harmful short loops in the check matrix, improving decoding performance, and reducing error floor.

Description

Technical Field

[0001] The present application relates to the field of channel coding technology, and in particular to a method, device, medium and product for constructing a QC-LDPC code check matrix. Background Art

[0002] Quasi-cyclic low-density parity-check (QC-LDPC) codes are widely used in 5G communications, satellite communications, and storage systems due to their regular cyclic structure, low coding complexity, and performance close to the Shannon limit. However, in high-bitrate, long codeword scenarios, short cycles in the parity check matrix (especially four- and six-cycle cycles) can form trap sets, causing iterative decoding algorithms to fall into local optima and induce error flooring. Existing technologies typically eliminate four-cycle cycles through algebraic construction or random search, but struggle to optimize six-cycle cycles under high bitrate constraints and lack the ability to dynamically locate trap sets, limiting decoding performance.

[0003] Therefore, there is an urgent need for a high-rate QC-LDPC code parity check matrix construction method that can effectively eliminate harmful short cycles while maintaining a high code rate and optimize the matrix structure to reduce the impact of trap sets. Summary of the Invention

[0004] The present application provides a QC-LDPC code check matrix construction method, device, medium and product to solve the problem of difficulty in accurately locating short ring residues and trap sets in high code rate scenarios in existing solutions.

[0005] The present application provides a method for constructing a QC-LDPC code check matrix, the method comprising:

[0006] Generate an initial check matrix; the initial check matrix does not have a four-ring structure;

[0007] Pre-decode the initial parity check matrix, filter out the target columns whose oscillation frequency exceeds the preset threshold during the decoding process, and eliminate the non-zero items with the largest number of six rings in the target columns to generate an intermediate parity check matrix;

[0008] Eliminate the non-zero items with the largest number of six-rings in the intermediate check matrix column by column to generate the target check matrix.

[0009] The present application also provides an electronic device, comprising: a memory for storing a computer program; and a processor for implementing the steps of any of the above-mentioned QC-LDPC code check matrix construction methods when executing the computer program.

[0010] The present application also provides a computer-readable storage medium, which stores a computer program, wherein when the computer program is executed by a processor, the steps of any of the above-mentioned QC-LDPC code check matrix construction methods are implemented.

[0011] The present application also provides a computer program product, including a computer program, which implements the steps of any of the above-mentioned QC-LDPC code check matrix construction methods when executed by a processor.

[0012] This application proposes a three-step, progressive construction method to systematically optimize the performance of the parity check matrix for QC-LDPC codes. An initial parity check matrix is generated without a four-loop structure, directly avoiding the local decoding traps caused by four-loops, reducing error flooring during iterative decoding, and improving error correction reliability in the initial stage. This initial parity check matrix construction fundamentally avoids the interference of four-loops on decoding stability, providing a high-reliability foundation for subsequent optimization. Pre-decoding screens target columns and eliminates the non-zero entries with the highest number of six-loops. Through simulated decoding, problematic columns prone to actual oscillation are identified. High concentrations of harmful six-loops in the target columns are targeted and optimized for local error correction. This method accurately locates critical columns prone to instability in actual decoding, avoiding the resource waste caused by blind global optimization in traditional methods. By eliminating the non-zero entries with the highest number of six-loops in the target columns (e.g., by setting the corresponding cyclic permutation matrix to zero or adjusting the shift value), the local six-loop density is significantly reduced, generating an intermediate parity check matrix. This operation retains most of the error correction capability of the original matrix while gradually weakening the impact of local traps, ensuring a smooth transition to the final optimization. Eliminate the six-ring non-zero items of the intermediate check matrix column by column, systematically reduce the total number of global six rings, and avoid the residual six rings from forming a cascade trap set, thereby comprehensively improving the decoding convergence performance of the target check matrix and reducing the bit error rate in high signal-to-noise ratio areas. The target check matrix finally generated has both the characteristics of no four rings and low six-ring density, significantly suppressing the error flattening phenomenon while maintaining the coding efficiency of the quasi-cyclic structure. This application uses a three-step progressive optimization. In the first stage, the foundation of decoding stability is laid by eliminating four rings. In the second stage, precise optimization is achieved through pre-decoding dynamic positioning and local six-ring reduction. In the final stage, the residual six rings are completely eliminated through global column-by-column cleaning. This method systematically solves the trap set problem caused by short rings in high code rate scenarios, avoids the defects of incomplete elimination of short rings and unbalanced optimization of resource allocation in traditional solutions, while maintaining the low complexity characteristics of matrix construction and coding, providing high-reliability and low-bit-error-rate coding support for high-speed communication systems. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0014] Figure 1 A schematic diagram of a method flow for constructing a QC-LDPC code check matrix provided in an embodiment of the present application;

[0015] Figure 2 A schematic diagram of a method flow for constructing a high-rate long codeword QC-LDPC code check matrix provided in an embodiment of the present application;

[0016] Figure 3 A schematic diagram of the format of the initial check matrix H1 provided in an embodiment of the present application;

[0017] Figure 4 A flow chart of a method for performing secondary column duplication elimination on an intermediate check matrix provided in an embodiment of the present application;

[0018] Figure 5 Schematic diagram of the total number of six rings of the three check matrices provided in the embodiments of the present application;

[0019] Figure 6 Schematic diagram of performance test results of three check matrices provided in the embodiments of the present application;

[0020] Figure 7 Schematic diagram of decoding simulation results of three parity check matrices provided in the embodiments of the present application;

[0021] Figure 8 1 is a schematic diagram of the structure of a QC-LDPC code check matrix construction device provided in an embodiment of the present application;

[0022] Figure 9 It is a structural diagram of a computer device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0023] The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0024] It should be noted that, in the description of this application, the terms "comprises," "includes," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. The terms "first," "second," etc., in this application are used to distinguish similar objects, and are not used to describe a particular order or sequence.

[0025] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0026] In conjunction with the specific application environment architecture or specific hardware architecture on which the execution of the QC-LDPC code check matrix construction method depends, the specific application environment architecture or specific hardware architecture is described here.

[0027] Quasi-cyclic low-density parity-check (QC-LDPC) codes, with their regular cyclic structure, near-Shannon limit performance, and efficient hardware implementation, have become a core coding scheme for 5G communications, satellite communications, and storage systems. However, in high-bitrate, long-codeword scenarios, short cycles in the parity check matrix (such as four or six cycles) can form traps, causing iterative decoding algorithms to become trapped in local optima and trigger an error floor. Existing techniques typically eliminate the four-cycle structure through algebraic construction or random search methods, but this struggles to optimize the six cycles under high bit rate constraints and lacks the ability to dynamically locate the traps. Furthermore, traditional methods often employ single-column redesign, failing to balance error correction capability and complexity across different regions. This results in limited decoding performance in high signal-to-noise ratio regions, making it difficult to meet the stringent low bit error rate requirements of high-speed communication systems.

[0028] Among existing QC-LDPC code construction schemes, progressive edge growth (PEG) and random methods are widely used to generate sparse check matrices. However, these methods often use static rules to eliminate short cycles, making them difficult to adapt to dynamic channel conditions. For example, some schemes avoid short cycles by using fixed shift values or constraint formulas, but this sacrifices the randomness of the matrix and reduces error correction potential. Other schemes, while incorporating decoding feedback mechanisms, lack targeted optimization for harmful short cycles, leading to resource waste and performance bottlenecks. Especially in high-bitrate scenarios, the conflict between the sparsity requirement of the check matrix and the elimination of short cycles is further exacerbated, making it difficult for existing technologies to systematically eliminate trap sets while maintaining high bit rates.

[0029] Therefore, there is an urgent need for a high-rate QC-LDPC code parity check matrix construction method that can dynamically locate and optimize dense six-ring areas while eliminating four rings, while also balancing error correction capabilities across different areas through differentiated design. This method combines data-driven decoding simulation with a global column-by-column optimization strategy to significantly reduce the error floor and adapt to high performance requirements in noisy environments, thereby providing a highly reliable, low-complexity coding solution for high-speed communication systems.

[0030] Therefore, an embodiment of the present application provides a method for constructing a QC-LDPC code check matrix, and the method is described in detail in conjunction with the execution flow of the method for constructing a QC-LDPC code check matrix.

[0031] First, the terms involved in this application are introduced.

[0032] LDPC (Low Density Parity Check Code); QC-LDPC (Quasi-cyclic LDPC); PEG (Progressive Edge-Growth); AWGN (Additive White Gaussian Noise); LLR (Log Likelihood Ratio); RLMS (Row Layered Normalized Min-Sum).

[0033] The embodiment of the present application provides a method for constructing a QC-LDPC code check matrix. The specific process of the method is as follows: Figure 1 As shown, the specific steps include the following steps.

[0034] S101: Generate an initial check matrix.

[0035] Specifically, in step S101, the initial parity check matrix is the base matrix of a quasi-cyclic low-density parity check (QC-LDPC) code, consisting of a cyclic permutation matrix and an all-zero matrix. Its structure follows the quasi-cyclic property, generating submatrix blocks through cyclic shifts, facilitating hardware encoding and decoding. This base matrix is typically generated using algebraic construction methods (e.g., based on finite fields) or random methods to ensure that the matrix is sparse and meets code rate requirements.

[0036] The initial parity check matrix does not have a four-cycle structure. A four-cycle is a closed loop formed by four variable nodes and four check nodes in the parity check matrix. For example, a rectangular structure consisting of four non-zero elements constitutes a four-cycle.

[0037] S102 , pre-decoding the initial check matrix, screening out target columns whose oscillation frequency exceeds a preset threshold during the decoding process, and eliminating non-zero items with the largest number of six rings in the target columns to generate an intermediate check matrix.

[0038] Specifically, in step S102, pre-decoding simulates the actual decoding process before formal decoding. By injecting errors and performing iterative decoding, the decoding behavior of each column in the matrix is observed. This is used to identify "problem columns" that are prone to decoding oscillation and provide data support for optimization.

[0039] Oscillation frequency refers to the number of times soft information (such as log-likelihood ratios) in a variable node flips during iterative decoding. For example, if the LLR value of a column flips sign five times in 10 iterations, its oscillation frequency is 50%.

[0040] The preset threshold is a pre-set critical value for oscillation frequency (e.g., 30%). If a column's oscillation frequency exceeds this value, it is marked as a "target column" for optimization. The target column is calculated by counting the oscillation frequencies of all columns and selecting the columns with the highest values for optimization.

[0041] A six-cycle is a closed loop formed by six variable nodes and six check nodes. Its presence degrades decoding performance, but the impact is less severe than a four-cycle. For each nonzero entry in the target column, the number of six-cycles it participates in is counted. The nonzero entry with the largest contribution is selected, and its corresponding cyclic permutation matrix is set to zero or replaced with a shift value.

[0042] By eliminating the six-ring non-zero items in the target column, an optimized intermediate matrix is obtained, whose local six-ring density is significantly reduced.

[0043] S103 , eliminating non-zero entries with the largest number of six-rings in the intermediate check matrix column by column to generate a target check matrix.

[0044] Specifically, in step S103, column-by-column elimination involves counting the number of six-rings involved in all non-zero entries in each column of the intermediate matrix. The non-zero entries with the largest number of six-rings in each column are selected for elimination (e.g., by setting them to zero or adjusting their shift values). This systematically reduces the total number of six-rings globally to prevent any remaining six-rings from forming a cascading trap set.

[0045] The final target parity check matrix has no four-ring structure (guaranteed by step S101); the local and global six-ring density is greatly reduced (achieved by steps S102 and S103); and a mixed column weight design (some columns are reduced, while others retain the original column weight) is used to balance error correction capability and complexity.

[0046] The QC-LDPC code parity check matrix construction method provided in this application systematically optimizes the performance of the QC-LDPC code parity check matrix through a three-step progressive construction method. An initial parity check matrix without a four-loop structure is generated, directly avoiding the local decoding traps caused by four-loops, reducing error flooring during iterative decoding, and improving error correction reliability in the initial stage. This initial parity check matrix construction fundamentally avoids the interference of four-loops on decoding stability, providing a high-reliability foundation for subsequent optimization. Pre-decoding screens target columns and eliminates the non-zero entries with the largest number of six-loops. Through simulated decoding, problematic columns prone to actual oscillation are identified. High concentrations of harmful six-loops in the target columns are targeted and eliminated, optimizing local error correction capabilities. This method accurately locates critical columns prone to instability in actual decoding, avoiding the resource waste caused by blind global optimization in traditional methods. By eliminating the non-zero entries with the largest number of six-loops in the target column (for example, by setting the corresponding cyclic permutation matrix to zero or adjusting the shift value), the local six-loop density is significantly reduced, generating an intermediate parity check matrix. This operation, while retaining most of the error correction capabilities of the original matrix, gradually weakens the impact of local trap sets, providing a smooth transition for the final optimization. Eliminating the six-ring non-zero items of the intermediate check matrix column by column, systematically reducing the total number of global six rings, and avoiding the formation of cascaded trap sets by residual six rings, thereby comprehensively improving the decoding convergence performance of the target check matrix and reducing the bit error rate in high signal-to-noise ratio areas. The target check matrix finally generated has both the characteristics of no four rings and low six-ring density, significantly suppressing the error flattening phenomenon, while maintaining the coding efficiency of the quasi-cyclic structure. This application uses a three-step progressive optimization. In the first stage, the foundation of decoding stability is laid by eliminating four rings. In the second stage, precise optimization is achieved through pre-decoding dynamic positioning and local six-ring reduction. In the final stage, the residual six rings are completely eliminated through global column-by-column cleaning. This method systematically solves the trap set problem caused by short rings in high-code rate scenarios, avoids the defects of incomplete elimination of short rings and unbalanced optimization of resource allocation in traditional solutions, while maintaining the low complexity characteristics of matrix construction and coding, providing high-reliability and low-bit-error-rate coding support for high-speed communication systems.

[0047] In an optional embodiment, generating an initial check matrix includes: generating an initial index matrix of a QC-LDPC code based on a progressive edge growth algorithm or a random method; determining a four-ring structure in the initial index matrix using a four-ring detection formula, and adjusting a shift value of a cyclic permutation matrix in the initial index matrix to eliminate the four-ring, thereby obtaining an index matrix; replacing each non-zero element in the index matrix with a cyclic permutation matrix, and replacing zero elements in the index matrix with an all-zero matrix; the shift value of the cyclic permutation matrix is determined by the values of the non-zero elements in the index matrix; and combining all replaced cyclic permutation matrices and all-zero matrices to obtain an initial check matrix.

[0048] The four-loop detection formula proactively detects and eliminates four-loop structures, directly avoiding the local decoding traps caused by four-loops, preventing iterative decoding from falling into a "deadlock" state, and improving the reliability of the initial parity check matrix. Simultaneously, the numbers in the index matrix are replaced with a cyclic permutation matrix or an all-zero matrix to preserve the quasi-cyclic nature of QC-LDPC codes, ensuring that the encoding process can be efficiently implemented using shift registers, reducing hardware implementation complexity.

[0049] In an optional embodiment, an initial index matrix of a QC-LDPC code is generated based on a progressive edge growing algorithm or a random method, including: generating a seed matrix based on a progressive edge growing algorithm or a random method; the seed matrix is a reversible lower triangular matrix, and the diagonal elements of the seed matrix are generated by randomly adding shift values of a cyclic permutation matrix; the shift values of the cyclic permutation matrix are randomly added to the non-diagonal positions of the seed matrix, and the generation of four rings and six rings is avoided through a four-ring detection formula and a six-ring detection formula to generate an initial index matrix.

[0050] The reversibility of the lower triangular seed matrix lays the foundation for the subsequent generation of an approximate lower triangular check matrix, ensuring that check bits can be quickly generated through linear operations during encoding, avoiding complex matrix inversion operations. Randomly adding shift values to off-diagonal positions not only ensures the random sparsity of the matrix (improving error correction capabilities) but also constrains its structure through the detection formula, avoiding the risk of short cycles introduced by randomness.

[0051] In an optional embodiment, the initial check matrix is pre-decoded to screen out target columns whose oscillation frequency exceeds a preset threshold during the decoding process, including: using a layered normalized minimum sum algorithm to simulate decoding the initial check matrix; during the simulated decoding process, injecting a preset number of random errors into the encoded codeword sequence, and counting the number of oscillations of each bit position in the iterative decoding; and based on a comparison result of the number of oscillations with a preset threshold, screening out target columns whose decoding oscillation frequency exceeds the threshold.

[0052] By injecting random errors to simulate actual channel noise and combining iterative decoding with the layered normalized minimum sum algorithm, we accurately reproduce decoding oscillations, ensuring that the selected target columns are highly correlated with the actual decoding bottleneck. We use the number of oscillations as a quantitative indicator to pinpoint problematic columns, avoiding resource waste caused by subjective assumptions or global traversals.

[0053] In addition, when pre-decoding and screening target columns, multiple preset types of error patterns are injected into the encoded codeword sequence, including single-bit independent errors, double-bit continuous errors, and multi-bit randomly distributed errors, and the oscillation frequency of each column under each error pattern is counted; a weight coefficient is assigned to each error type according to the channel characteristics, and the comprehensive oscillation frequency value of each column is calculated. The target columns whose comprehensive values exceed the preset threshold are selected as optimization objects.

[0054] Specifically, when counting the oscillation frequency, the following steps may be further included:

[0055] Single-bit independent errors, double-bit consecutive errors, and multi-bit randomly distributed errors are injected into the encoded codeword sequence in sequence; the oscillation frequency of each column under each error type is counted separately; according to the noise characteristics of the target channel, a preset weight coefficient is assigned to single-bit independent errors, double-bit consecutive errors, and multi-bit randomly distributed errors; based on the weight coefficient, the comprehensive oscillation frequency value of each column is weightedly calculated; and the target column whose comprehensive oscillation frequency value exceeds the preset threshold is screened.

[0056] In an optional implementation, the non-zero item with the largest number of six-rings in the target column is eliminated to generate an intermediate check matrix, including: for each non-zero item in the target column, counting the number of six-rings in which each non-zero item participates; and replacing the cyclic permutation matrix corresponding to the non-zero item with the largest number of six-rings with an all-zero matrix or a new cyclic shift value to obtain the intermediate check matrix.

[0057] For high-oscillation columns identified during pre-decoding, the non-zero entries with the highest six-ring density are prioritized for elimination, directly reducing their contribution to the trap set and avoiding the loss of error correction capability caused by a "one-size-fits-all" optimization approach. By locally eliminating these columns and generating an intermediate matrix, the number of six-rings is gradually reduced while retaining most of the original matrix's error correction capability, providing a smooth transition to global optimization.

[0058] In an optional embodiment, the non-zero item with the largest number of six-rings in the intermediate check matrix is eliminated column by column to generate a target check matrix, including: constructing a six-ring distribution matrix with the same dimension as the intermediate check matrix, counting the number of six-rings involved by each non-zero item; for each column of the intermediate check matrix, selecting the non-zero item with the largest value in the six-ring distribution matrix for elimination; and repeating the elimination operation until a preset six-ring elimination target is reached to obtain the target check matrix.

[0059] By using the six-ring distribution matrix to comprehensively calculate the six-ring participation of each non-zero item, the maximum contributing item is eliminated column by column, ensuring comprehensive and thorough six-ring elimination and preventing residual six-rings from forming cascading traps. The algorithm terminates with the preset six-ring elimination target, flexibly adapting to different code length and bit rate requirements, balancing optimization depth and computational complexity.

[0060] In an optional embodiment, after generating the target check matrix, the method further includes: dividing the blocks in the target check matrix whose column weight is lower than a preset threshold into independent data blocks, and independently generating an outer code check bit for each data block; combining the outer code check bit with the encoding result of the target check matrix to obtain a cascaded coding output.

[0061] Because low-column-weight blocks have fewer connected check nodes and weaker fault tolerance, they are independently encoded using outer codes (such as BCH codes). This creates a dual protection mechanism of "LDPC global error correction + outer code local reinforcement," significantly reducing the bit error rate in critical areas. By adding outer code check bits only to low-column-weight blocks, the redundant overhead of full matrix cascading is avoided, maintaining the high bit rate advantage.

[0062] In an optional implementation, the outer code is a BCH code, and the code length of the outer code is determined by the data length of the block whose column weight is lower than a preset column weight threshold.

[0063] The strong error correction capabilities of BCH codes (such as single-bit error correction) precisely match the fault tolerance requirements of low-column-weight blocks, ensuring that resource investment is proportional to performance improvement. The BCH code length is adjusted based on the data length of low-column-weight blocks to avoid wasted check bits or insufficient coverage caused by fixed code lengths.

[0064] In an optional embodiment, the method further includes: in the decoding stage, using a layered normalized minimum sum algorithm for iterative decoding, and extracting the judgment results of blocks with column weights lower than a preset threshold after each layer of decoding; combining the judgment results with corresponding outer code check bits and inputting them into an outer code decoder for error correction; if the outer code decoder detects a correctable error, adjusting the confidence information of the corresponding bit according to the outer code decoding result; the adjustment includes setting the log-likelihood ratio of the corresponding bit to a maximum value or a minimum value; after updating the confidence information, continuing to perform the next layer of iterative decoding; when the preset conditions are met, it indicates that the decoding is successful.

[0065] The outer code decoding results are directly fed back into the confidence information. By forcing LLR extremes (e.g., +7 / -7), local convergence deadlocks in iterative decoding are broken, accelerating the propagation of correct information. This reduces invalid iterations caused by repeated oscillations in low-column weight blocks, shortens decoding convergence time, and improves real-time performance.

[0066] In one optional implementation, decoding success is indicated when preset conditions are met, including when the product of the target parity check matrix and the decision result is a zero vector or when a preset maximum number of iterations is reached. If decoding fails, the confidence information is reinitialized and the decoding process restarted. This ensures absolute reliability of the output codeword while limiting the maximum number of iterations to prevent infinite loops under poor channel conditions, balancing decoding performance with computing resource consumption.

[0067] In an optional embodiment, the column weight of the initial check matrix is a first preset column weight; the first preset column weight is determined by the target code rate and channel conditions; and in the construction process of the initial check matrix, the column weight of each column is equal to the first preset column weight; the column weight of the intermediate check matrix is a mixed structure of the first preset column weight and the second preset column weight; the second preset column weight is obtained by eliminating the non-zero items of the target column in the initial check matrix; the column weight of the target check matrix is a mixed structure of the first preset column weight, the second preset column weight and the third preset column weight; the third preset column weight is obtained by eliminating the non-zero items of the intermediate check matrix column by column; the distribution ratio of the mixed structure is determined based on the target code rate and channel noise conditions.

[0068] High-column weight areas (such as column weight 5) enhance error correction capabilities, while low-column weight areas (such as column weight 3) reduce connectivity and complexity. This differentiated design balances performance and resources. The mixing ratio is dynamically adjusted based on the target bit rate and channel noise (for example, increasing the high-column weight ratio in high-noise situations), expanding the solution's applicable scenarios.

[0069] In an optional embodiment, the four-ring detection formula is:

[0070] ;

[0071] Where i k 、j k 、i k+1 and j k+1 are the row and column positions of the non-zero entries in the matrix, and L is the submatrix dimension;

[0072] The six-ring test formula is:

[0073] ;

[0074] Where i k 、j k 、i k+1 、j k+1 、i k+2 and j k+2 are the row and column positions of the non-zero entries in the matrix, L is the submatrix dimension, and P is the shift value of the submatrix other than the all-zero submatrix.

[0075] In summary, the QC-LDPC code check matrix construction method provided in the embodiment of the present application comprehensively optimizes the check matrix performance of the QC-LDPC code through the synergistic effect of progressive technical features. First, the initial index matrix is generated based on progressive edge growth or random method, and the four-ring structure is eliminated through the four-ring detection formula and expanded to a cyclic permutation matrix combination, ensuring that the initial check matrix has both the four-ring-free characteristic and quasi-cyclic regularity, laying the foundation for efficient coding and stable decoding; secondly, by simulating decoding and injecting random errors through the layered normalized minimum sum algorithm, the high-oscillation target column is screened out, and the non-zero items with the largest number of six-rings are targeted to generate an intermediate check matrix, achieving precise weakening of the local trap set while retaining the error correction capability of the original matrix; further constructing the six-ring distribution matrix, eliminating the residual six-rings of the intermediate matrix column by column to generate the target check matrix, systematically reducing the global six-ring density, and avoiding the long-term drag on the decoding performance of the cascaded trap set. On this basis, BCH check bits are independently generated for low-column-weight blocks in the target matrix and concatenated for encoding. The dynamic error correction capability of the outer code is used to strengthen vulnerable areas. Combined with the forced correction of LLR extreme values fed back by the outer code during the decoding process, this breaks the iterative deadlock and accelerates convergence. Ultimately, through hybrid column weight design and dynamic ratio adjustment, the error correction strength of high-column-weight areas and the complexity of low-column-weight areas are balanced to adapt to the needs of multi-code rate and multi-noise scenarios. From four-ring elimination, six-ring optimization to outer code cascade protection, the progressive technical features form a "construction-optimization-reinforcement" full-link solution, significantly suppressing error flattening and improving decoding efficiency and reliability. At the same time, through structural flexibility and dynamic adaptation mechanisms, it meets the stringent performance requirements of high-rate LDPC codes in high-speed communication systems.

[0076] Based on the QC-LDPC code check matrix construction method provided in the above embodiment, a specific example will be used to explain it in detail below.

[0077] As a special class of codewords with sparse parity check matrices, low-density parity-check (LDPC) codes have attracted the attention of numerous researchers due to their theoretical performance approaching the Shannon limit and their high information transfer rate. Quasi-cyclic low-density parity-check (QC-LDPC) codes, a key subclass of LDPC codes, exhibit numerous advantages due to their unique algebraic structure and cyclic properties. QC-LDPC codes have a regular parity check matrix structure, which enables efficient encoding and decoding, reducing hardware complexity. They play a vital role in high-speed communication systems and storage industries, such as optical communications, satellite communications, and 5G communications.

[0078] However, the presence of trap sets in LDPC codes leads to error flooring during decoding, hindering further improvements in decoding performance. During LDPC code decoding, trap sets are a unique codeword structure that can cause iterative decoding algorithms to become trapped in local optima, preventing them from converging to the correct codeword. Consequently, even when the difference between the received and transmitted signals is minimal, errors can occur due to the influence of trap sets. This hinders further application in areas requiring low bit error rates, such as storage and deep space communications. Therefore, effective solutions are urgently needed to overcome this problem.

[0079] Short cycles are one of the main causes of trapping sets. Therefore, the method proposed in this embodiment focuses on reducing short cycles in the parity check matrix and optimizing its distribution. Therefore, based on the parity check matrix construction method of the QC-LDPC code described in the above embodiment, this embodiment also provides a method for constructing a parity check matrix for high-rate long-codeword QC-LDPC codes. For the parity check matrix constructed by this method, this embodiment also proposes a decoding method adapted to this type of matrix.

[0080] The construction process of the high-rate long codeword QC-LDPC code check matrix includes the determination of the dimension of the index matrix, code rate, and submatrix dimension of the initial QC-LDPC check matrix; the construction of the index matrix H1; the use of the H1 matrix for hierarchical normalized minimum sum method for decoding, screening out the position of the target number of oscillation points in the index matrix; setting the elimination interval, optimizing the columns for the positions of the oscillation points in the interval, counting the number of six-rings corresponding to each non-zero item at the position, eliminating the shift value with the largest number of six-rings in the target column to obtain the corresponding H2 matrix; constructing the frequency matrix of each non-zero element corresponding to H2 in the six-rings, setting the elimination interval, and sequentially eliminating the position of the column with the largest number of six-rings in each column in the target interval to obtain the final check matrix H3. The column weight of the H3 matrix is a mixed matrix of 3, 4 and 5.

[0081] The submatrix of a QC-LDPC code parity check matrix is an all-zero matrix, the identity matrix, or a shifted matrix formed by cyclically shifting the identity matrix to the right by a fixed value. These are typically represented by the numbers "-1," "0," and positive integers between 0 and q-1, respectively, where q is the submatrix dimension.

[0082] In this embodiment, the quadratic elimination method is used to construct the final check matrix. The specific construction process is as follows: Figure 2 As shown, the following steps are included.

[0083] In order to facilitate fast coding, the format of matrix H1 is as follows Figure 3 As shown, Figure 3In [1], A, B, C, D, E, and T represent different positions in a parity check matrix, and n, m, and g represent the code width and code length of the parity check matrix. The format of the T matrix is a reversible lower triangular matrix, meaning that all elements above the upper right corner of the matrix are zero, and all elements on the main diagonal are nonzero. The specific method for constructing the parity check matrix H1 is as follows.

[0084] First, determine the dimensions of the initial check matrix m×n, the dimensions of the T matrix g×g, the maximum column weight of the T matrix column_weight_T, and the column weight of the H1 matrix is 5. And the submatrix dimension p×p. Generate the T matrix using a random method or other method, first randomly add shift values on the diagonal of the T matrix. When adding shift values at other positions in the T matrix, randomly select row and column positions to add random shift values. Each time a shift value is added, the four-ring detection formula and the six-ring detection formula of the above embodiment are used to determine the four-ring and six-ring. If the detection formula is satisfied, the added shift value is randomly modified. Until there are no six-rings and four-rings in the constructed T matrix, and the maximum column weight constraint of the T matrix is met.

[0085] Next, using the T matrix as the seed matrix, according to the actual position of each cyclic permutation matrix in the T matrix in the H1 matrix and the shift value of the cyclic permutation matrix in the T matrix, a matrix construction method such as the PEG method or the random method is used to construct the target matrix H1, and the position of the cyclic permutation matrix in the H1 matrix is determined. When adding the shift factors of other matrices in the H1 matrix except the T matrix, each time a shift factor is added, the four-ring verification is performed using the above four-ring detection formula. If the above four-ring detection formula is satisfied, the added shift value is randomly modified until all the cyclic permutation matrices are added. At this time, the construction of the H1 matrix is completed, and the column weight of all columns of the H1 matrix is 5.

[0086] Although the parity check matrix H1 generated through the above steps does not contain quadruples, due to the matrix's high code rate, adding shift factors cannot guarantee that the resulting parity check matrix will not contain hexaruples. In fact, when the column weight is 5, each cyclic permutation matrix in the generated parity check matrix H1 will appear simultaneously on multiple hexaruples. The presence of short cycles in the matrix is a major cause of trap sets, but not all short cycles are harmful. The presence of cycles themselves can also have certain benefits. Appropriate cycles can improve the minimum Hamming distance of the code, enhance information flow, and thus further improve code performance.

[0087] In order to select "harmful" short loops, this embodiment uses a layered normalized minimum sum method for pre-decoding to quickly screen out the locations of points where oscillation occurs during the decoding process.

[0088] The process of layered normalization minimum and pre-decoding statistical oscillation point is as follows:

[0089] Set the maximum number of iterations, the number of oscillation points, and the number of codewords generated; generate an initial codeword sequence 1 of a random binary 01 sequence, and a sequence 2 of the number of oscillations at each point, where sequence 2 is initialized to 0; use the H matrix to encode the initial codeword according to the encoding calculation method of the RU format matrix to obtain an encoded codeword sequence 3; perform random flipping of fixed bits on the encoded codeword and inject a fixed number of errors to obtain a codeword sequence 4; perform BPSK modulation on the flipped codeword sequence 4, generally adjusting 0 to "1" and modulating 1 to "-1" to obtain a modulated codeword sequence 5; initialize the modulated codeword sequence 5 to the LLR information of the corresponding position, where when the modulated value is 1, the corresponding LLR information is initialized to 7, and when the modulated value is -1, the corresponding LLR information is initialized to -7, recorded as LQ, and Lr is initialized to 0;

[0090] Calculate Lq = LQ – Lr for the corresponding position; calculate the cumulative product of all Lq signs in that row, sign_all. After taking the absolute value of each Lq in that row, select the minimum and second-minimum values, as well as the column index of the minimum value. If the column positions are different, the minimum value is selected; if the column positions are the same, the second-minimum value is selected. Update Lr at each position: Lr = sign_all × the current position's sign × (minimum value / second-minimum value) × α, where α is a normalization factor between 0.5 and 1.

[0091] Calculate LQ = Lr + Lq; when LQ is greater than 0, record that position as 1, and when LQ is less than 0, record that position as 0, and obtain the codeword sequence 6 after judgment. Since the sign of LQ represents whether the final judgment result is 0 or 1, for each position of LQ, if the sign of LQ flips between two adjacent iterations, the judgment result will also flip, which means that an oscillation has occurred at that position, and the number of oscillations of LQ at that position is increased by 1.

[0092] Calculate H·cT; where c is the codeword sequence 6. If the result is 0, the verification passes. If H·cT ≠ 0, the verification fails, and the next layer of data is iterated, repeatedly calculating Lq and LQ at the corresponding position until the decoding is successful or the maximum number of iterations is reached. At this time, the oscillation point position that reaches the target number of oscillations is recorded, and the next random binary 01 sequence is generated. The above oscillation point counting process is repeated until the target number of codewords is reached.

[0093] By injecting different numbers of fixed errors, we count the oscillation points where these errors occur, and the locations with the highest frequency of oscillation under different initial errors. We then set an elimination interval (avoiding the check bit interval) and select the column positions in the index matrix corresponding to these oscillation points. We count the number of six-rings corresponding to each non-zero entry at that position, and eliminate the shift value with the largest number of six-rings in the target column to obtain the corresponding H2 matrix.

[0094] The H2 matrix is a mixed matrix with column weights of 4 and 5. Although the elimination of certain non-zero items reduces the number of six-rings in the check matrix, there are still a certain number of six-rings. In order to further reduce the probability of decoding failure when errors occur when the H2 column weight is high and improve the performance of the matrix in the waterfall area, the H2 matrix is subjected to secondary column weight elimination in this embodiment. The specific process is as follows: Figure 4 As shown, the following steps are included:

[0095] Step 1: Determine the column elimination index and the total number of columns in the H2 matrix in a random or sequential manner.

[0096] Step 2: Construct a H2' matrix of the same dimensions as the H2 matrix as the six-ring distribution matrix of the H2 matrix. Initialize the values in the H2' matrix to all 0s. Starting with the first non-zero entry in the first column of the check matrix H2, use the above six-ring detection formula to perform six-ring statistics for each non-zero entry in each column. Fill the corresponding row and column position in the H2' matrix with the number of times each non-zero entry appears in the six-ring.

[0097] Step 3. Initialize the first row of the selected column to the initial maximum value and the row index row_idx where the maximum value is located. Compare row by row within the column and select the maximum value in the H2' matrix. This value corresponds to the point with the largest number of six-rings in the H2 matrix. Record the row and column position of the maximum value and set the shift value corresponding to that position in the H2 matrix to "-1." This means replacing the unit matrix or unit cyclic matrix at that position with an all-zero matrix, resulting in the H2'' matrix.

[0098] Step 4. Select the next column and continue to initialize the values in the H2' matrix to all 0s. Replace the H2 matrix in step 1 with the H2'' matrix. Repeat step 2 and then step 3 until the total number and index of the column with the shifted value eliminated reach the set value, and obtain the H3 matrix.

[0099] Because some columns are eliminated during the secondary elimination phase when the oscillation point is eliminated, the final H3 matrix contains some columns with a column weight of 3. The H3 matrix is a mixed matrix with column weights of 3, 4, and 5. The number of short loops in H3 is further reduced compared to H2. Simulations in subsequent embodiments show that the decoding performance of this matrix is further enhanced. This is because the probability of decoding failure is reduced when errors occur at high column weights.

[0100] In order to further reduce the error floor of the decoding process and improve the decoding performance when errors occur at positions with a column weight of 3, this embodiment further provides a BCH cascade coding method adapted to this type of matrix.

[0101] During the encoding phase, the initial information is LDPC-encoded using the RU encoding method, and then the BCH code is used to additionally encode the positions with a column weight of 3 for secondary protection. The BCH check bit information generated by the column weight of 3 is in the BCH decoder and is not sent to the LDPC decoder during the decoding process. The length of the BCH code is just enough to protect the block information with a column weight of 3 so that errors of less than 1 bit can be corrected.

[0102] In the decoding stage, the decoding method of the LDPC code also adopts the layered normalized minimum sum algorithm. The specific steps are as follows.

[0103] Set the maximum number of iterations and the maximum / minimum value of the LLR information, perform BPSK modulation on the LDPC codeword to be decoded, adjust 0 to "1", and modulate 1 to "-1" to obtain the modulated codeword sequence a; initialize the LLR information of the corresponding position according to the modulated codeword sequence a, where when the modulated value is 1, the corresponding LLR information is initialized to 7, and when the modulated value is -1, the corresponding LLR information is initialized to -7, recorded as LQ, and Lr is initialized to 0;

[0104] Calculate Lq = LQ – Lr for the corresponding position; calculate the cumulative product of all Lq signs in that row, sign_all. After taking the absolute value of each Lq in that row, select the minimum and second-minimum values, as well as the column index of the minimum value. If the column positions are different, the minimum value is selected; if the column positions are the same, the second-minimum value is selected. Update Lr at each position: Lr = sign_all × the current position's sign × (minimum value / second-minimum value) × α, where α is a normalization factor between 0.5 and 1.

[0105] Calculate LQ = Lr + Lq; judge the codeword. When LQ is greater than 0, record the position as 1; when LQ is less than 0, record the position as 0, and obtain the judged codeword sequence c; send the interval with a column weight of 3 in the judged codeword sequence c to the BCH decoder and combine it with the corresponding BCH check bit to start the BCH decoding process.

[0106] If the BCH decoder can detect errors below 1 bit, the maximum and minimum values of LQ are set according to the positive and negative signs of all LQ values in the current BCH protection interval.

[0107] A second decision is made on the entire codeword. When LQ is greater than 0, the position is marked as 1; when LQ is less than 0, the position is marked as 0, resulting in the final codeword sequence c. H·cT is calculated. If the result is 0, the verification passes. If H·cT ≠ 0, the verification fails, and the next layer of data is iterated. The above steps are repeated until the final decoding is successful or the maximum number of iterations is reached.

[0108] For example, a specific matrix example is used for illustration.

[0109] According to the method in this embodiment, a matrix suitable for 29×287 is constructed, wherein the submatrix dimension is 128, the corresponding LDPC code length is 36736, and the corresponding LDPC code rate is 0.89895.

[0110] First, the dimension of the T matrix is determined to be 25×25, and the lower triangular T matrix is constructed. Then, on this basis, the PEG method is further used to construct a check matrix H1 with a column weight of all 5 and a structure that conforms to the matrix structure of the RU algorithm. The initial error injection bits are set to 280, 275 and 270, and the maximum number of iterations is set to 10 times. According to the pre-error correction method described in this application, 76 columns of oscillation points are screened out, and the non-zero items corresponding to the largest six rings of the columns where the oscillation points are located are eliminated to obtain the matrix H2. On this basis, the first 150 columns of the matrix are further selected and the columns are eliminated according to the method described in this application. Finally, the matrix H3 is obtained. The number of columns of the matrix H3 with column weights of 3, 4, and 5 are 62, 102, and 123, respectively.

[0111] There are no four-rings in the H1, H2 and H3 matrices corresponding to the constructed 29×287 matrix. The total number of six-rings in these three matrices is counted, and the statistical results of the total number of six-rings are as follows: Figure 5 As shown, the number of six-rings in H3 is only one-sixth of that in the initial H1 matrix. This indicates that the three-step matrix construction method can significantly reduce the total number of six-rings in the matrix. This has positive implications for eliminating traps in the matrix.

[0112] The performance of the three constructed matrices was further tested. The decoding algorithm was the layered normalized minimum sum decoding algorithm. The performance test results are shown in the figure below. Figure 6 As shown, the performance of the matrix in the waterfall region is further improved.

[0113] The final constructed H3 matrix was decoded according to the decoding algorithm in this application. During the encoding process, since there are 128 bits of data in each area with a column weight of 3, the length of the BCH code is 144. Its decoding performance is as follows Figure 7 As shown, it can be seen that the decoding performance is greatly enhanced.

[0114] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method.

[0115] The embodiment of the present application also provides a QC-LDPC code check matrix construction device, the structure of which is as follows: Figure 8 Shown, including:

[0116] Initial generation module 801, used to generate an initial check matrix; the initial check matrix does not have a four-ring structure;

[0117] The intermediate generation module 802 is used to pre-decode the initial parity check matrix, filter out the target columns whose oscillation frequency exceeds a preset threshold during the decoding process, and eliminate the non-zero items with the largest number of six rings in the target columns to generate an intermediate parity check matrix;

[0118] The target generation module 803 is configured to eliminate the non-zero items with the largest number of six-rings in the intermediate parity check matrix column by column to generate a target parity check matrix.

[0119] For the description of the features in the embodiment corresponding to the QC-LDPC code check matrix construction device, please refer to the relevant description of the embodiment corresponding to the QC-LDPC code check matrix construction method, and no further details will be given here.

[0120] The embodiment of the present application also provides an electronic device, such as Figure 9 As shown, it includes a memory 14 and a processor 20. The memory 10 stores a computer program, and the processor 20 is configured to run the computer program to execute the steps in any of the above-mentioned QC-LDPC code check matrix construction method embodiments.

[0121] An embodiment of the present application further provides a computer-readable storage medium, which stores a computer program, wherein the computer program is configured to execute the steps of any of the above-mentioned QC-LDPC code check matrix construction method embodiments when running.

[0122] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk, or an optical disk.

[0123] An embodiment of the present application further provides a computer program product, which includes a computer program. When the computer program is executed by a processor, the steps in any of the above-mentioned QC-LDPC code check matrix construction method embodiments are implemented.

[0124] An embodiment of the present application further provides another computer program product, including a non-volatile computer-readable storage medium, wherein the non-volatile computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of any of the above-mentioned QC-LDPC code check matrix construction method embodiments are implemented.

[0125] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the components and steps of each example according to their functions. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0126] The above is a detailed introduction to the QC-LDPC code check matrix construction method, device, equipment, storage medium and program product provided by this application. Specific examples are used herein to illustrate the principles and implementation methods of this application. The description of the above embodiments is only used to help understand the method and core ideas of this application. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of this application, several improvements and modifications can be made to this application, and these improvements and modifications also fall within the scope of protection of the claims of this application.

Claims

1. A method for constructing a QC-LDPC code check matrix, characterized in that: The method comprises: generating an initial check matrix; wherein the initial check matrix does not have a four-ring structure; Pre-decoding the initial parity check matrix, screening out target columns whose oscillation frequency exceeds a preset threshold during the decoding process, and eliminating non-zero entries with the largest number of six rings in the target columns to generate an intermediate parity check matrix; Eliminating the non-zero items with the largest number of six-rings in the intermediate check matrix column by column to generate a target check matrix; The generating of the initial check matrix comprises: Generate the initial index matrix of the QC-LDPC code based on the progressive edge growing algorithm or random method; Determining a four-ring structure in an initial index matrix using a four-ring detection formula, and adjusting a shift value of a cyclic permutation matrix in the initial index matrix to eliminate the four-ring structure, thereby obtaining an index matrix; Replacing each non-zero element in the index matrix with a cyclic permutation matrix, and replacing zero elements in the index matrix with an all-zero matrix; the shift value of the cyclic permutation matrix is determined by the value of the non-zero elements in the index matrix; Combine all replaced cyclic permutation matrices and all-zero matrices to obtain the initial check matrix; The initial index matrix of the QC-LDPC code is generated based on the progressive edge growing algorithm or the random method, including: Generate a seed matrix based on a progressive edge growing algorithm or a random method; the seed matrix is a reversible lower triangular matrix, and the diagonal elements of the seed matrix are generated by randomly adding shift values of a cyclic permutation matrix; The shift values of the cyclic permutation matrix are randomly added to the non-diagonal positions of the seed matrix, and the generation of four rings and six rings is avoided by using the four-ring detection formula and the six-ring detection formula to generate an initial index matrix.

2. The method according to claim 1, characterized in that The pre-decoding of the initial parity check matrix to select target columns whose oscillation frequency exceeds a preset threshold during the decoding process includes: The initial parity check matrix is simulated and decoded using the layered normalized minimum sum algorithm. During the simulation decoding process, a preset number of random errors are injected into the encoded codeword sequence, and the number of oscillations of each bit position in the iterative decoding is counted; According to the comparison result of the oscillation times and the preset threshold, the target columns whose decoding oscillation frequency exceeds the threshold are screened out.

3. The method according to claim 2, characterized in that Eliminating the non-zero item with the largest number of six rings in the target column to generate an intermediate check matrix includes: For each non-zero item in the target column, count the number of six-rings in which each non-zero item participates; The cyclic permutation matrix corresponding to the largest number of non-zero entries in the six rings is replaced with an all-zero matrix or a new cyclic shift value to obtain an intermediate check matrix.

4. The method according to claim 3, characterized in that Eliminating the non-zero items with the largest number of six-rings in the intermediate check matrix column by column to generate a target check matrix includes: Construct a six-ring distribution matrix with the same dimension as the intermediate check matrix, and count the number of six-rings involved in each non-zero entry; For each column of the intermediate check matrix, select the non-zero item with the largest value in the six-ring distribution matrix for elimination; The subtraction operation is repeated until the preset six-ring elimination target is reached to obtain the target check matrix.

5. The method according to claim 4, characterized in that After generating the target check matrix, the method further includes: Divide the blocks in the target parity check matrix whose column weight is lower than a preset threshold into independent data blocks, and independently generate an outer code parity bit for each data block; The outer code check bits are combined with the encoding result of the target check matrix to obtain a concatenated encoding output.

6. The method according to claim 5, characterized in that The outer code is a BCH code, and the code length of the outer code is determined by the data length of the block whose column weight is lower than a preset column weight threshold.

7. The method according to claim 6, characterized in that The method further comprises: In the decoding stage, a layered normalized minimum sum algorithm is used for iterative decoding, and after each layer of decoding, the judgment results of the blocks with column weights below the preset threshold are extracted; Combining the judgment result with the corresponding outer code check bit and inputting the result into the outer code decoder for error correction; If the outer code decoder detects a correctable error, the confidence information of the corresponding bit is adjusted according to the outer code decoding result; the adjustment includes setting the log-likelihood ratio of the corresponding bit to a maximum value or a minimum value; After updating the confidence information, continue to perform the next layer of iterative decoding; When the preset conditions are met, it indicates that the decoding is successful.

8. The method according to claim 7, characterized in that When the preset conditions are met, it indicates that the decoding is successful, including: When the product of the target check matrix and the decision result is a zero vector or reaches the preset maximum number of iterations, it indicates that the decoding is successful; If the decoding fails, the confidence information is reinitialized and the decoding process is restarted.

9. The method according to claim 8, characterized in that The column weight of the initial check matrix is a first preset column weight; the first preset column weight is determined by a target bit rate and a channel condition; and in the process of constructing the initial check matrix, the column weight of each column is equal to the first preset column weight; The column weight of the intermediate check matrix is a mixed structure of a first preset column weight and a second preset column weight; The second preset column weight is obtained by eliminating non-zero items of the target column in the initial check matrix; The column weight of the target check matrix is a mixed structure of the first preset column weight, the second preset column weight and the third preset column weight; The third preset column weight is obtained by eliminating non-zero items of the intermediate check matrix column by column; The distribution ratio of the hybrid structure is determined based on a target bit rate and a channel noise condition.

10. The method according to any one of claims 1 to 9, characterized in that: The four-ring detection formula is: ； Where i k 、j k 、i k+1 and j k+1 are the row and column positions of the non-zero entries in the matrix, and L is the submatrix dimension; The six-ring detection formula is: ； Where i k 、j k 、i k+1 、j k+1 、i k+2 and j k+2 are the row and column positions of the non-zero entries in the matrix, L is the submatrix dimension, and P is the shift value of the submatrix other than the all-zero submatrix.

11. An electronic device, characterized in that: include: memory for storing computer programs; A processor, configured to implement the steps of the QC-LDPC code check matrix construction method according to any one of claims 1 to 10 when executing the computer program.

12. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, wherein when the computer program is executed by a processor, the steps of the QC-LDPC code check matrix construction method according to any one of claims 1 to 10 are implemented.

13. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the QC-LDPC code check matrix construction method according to any one of claims 1 to 10 are implemented.

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