Bonded wafer manufacturing method

Abstract

The invention provides a manufacturing method of a bonded wafer. The manufacturing method comprises the following steps: presetting an oxidation temperature of a device wafer according to an interstitial oxygen concentration of the device wafer; then executing an oxidation process according to a preset oxidation temperature of the device wafer so as to form an oxide layer on the surface of the device wafer, and longitudinally diffusing interstitial silicon atoms on the surface of the device wafer; and bonding the device wafer and the support wafer to form a bonded wafer, wherein the oxide layer is located between the device wafer and the support wafer. The device wafer has the interstitial oxygen concentration in a given range, and the oxidation temperature of the device wafer is preset according to the interstitial oxygen concentration of the device wafer in the process of executing the oxidation process, so that interstitial silicon atoms on the surface of the device wafer can be longitudinally diffused in the process of executing the oxidation process; therefore, the compound can be compounded with vacancies in crystal lattices of the device wafer, so that nucleation points of interstitial oxygen in the device wafer in the oxidation process are reduced or eliminated, and oxygen precipitates are reduced or avoided in the manufacturing process of the bonded wafer.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuit technology, and particularly relates to a method for manufacturing a bonded wafer. Background Art

[0002] Silicon on insulator (SOI) technology has currently become one of the mainstream products in most fields of electronic materials. With the reduction of device feature size, the influence of crystal defects in the top silicon layer of SOI on device performance is increasing. During the manufacturing process of the oxide layer of SOI, there is an oxygen precipitation phenomenon, that is, during high-temperature treatment or multi-step heat treatment, when the oxygen content in the silicon substrate of SOI exceeds its solubility, oxygen atoms precipitate and aggregate to form oxygen precipitates. Oxygen precipitates are likely to introduce defects during the manufacturing process of SOI, such as dislocations, stacking faults, etc. These defects will affect the electrical performance of SOI devices, such as increasing leakage current, reducing breakdown voltage, etc. Currently, the method to solve oxygen precipitates is to use an epitaxial process during the manufacturing process of SOI to form the top silicon layer in SOI, avoiding the appearance of oxygen precipitates in the top silicon layer. However, using an epitaxial process to form SOI will increase additional processes and the cost is relatively high. Summary of the Invention

[0003] The purpose of the present invention is to provide a method for manufacturing a bonded wafer to reduce or avoid the appearance of oxygen precipitates during the manufacturing process of the bonded wafer.

[0004] To achieve the above purpose, the present invention provides a method for manufacturing a bonded wafer, including:

[0005] Providing a support wafer and a device wafer, wherein the device wafer has an interstitial oxygen concentration within a given range;

[0006] Presetting the oxidation temperature of the device wafer according to the interstitial oxygen concentration in the device wafer;

[0007] Performing an oxidation process according to the preset oxidation temperature of the device wafer to form an oxide layer on the surface of the device wafer, and enabling the interstitial silicon atoms on the surface of the device wafer to diffuse longitudinally to form an oxygen-free precipitation region between the device wafer and the oxide layer;

[0008] Bonding the device wafer and the support wafer to form a bonded wafer, and the oxide layer is located between the device wafer and the support wafer.

[0009] Optionally, in the method for manufacturing the bonded wafer, the interstitial oxygen concentration of the device wafer is greater than or equal to 8 new ppma and less than or equal to 12 new ppma.

[0010] Optionally, in the method for manufacturing the bonded wafer, the oxidation temperature of the device wafer is preset according to the following relational expression:

[0011] [850 °C + (Oi - 8) * 25] ≤ T ≤ [950 °C + (Oi - 8) * 25]; where T represents the preset oxidation temperature of the device wafer, and Oi represents the interstitial oxygen concentration of the device wafer.

[0012] Optionally, in the method for manufacturing the bonded wafer, after the bonded wafer is formed, the method for manufacturing the bonded wafer further includes:

[0013] Performing a strengthening heat treatment on the bonded wafer.

[0014] Optionally, in the method for manufacturing the bonded wafer, the bonded wafer is subjected to a strengthening heat treatment by a wet oxidation process.

[0015] Optionally, in the method for manufacturing the bonded wafer, the temperature of the strengthening heat treatment is 1050 °C to 1150 °C.

[0016] Optionally, in the method for manufacturing the bonded wafer, the time of the strengthening heat treatment is 0.5 h to 1.5 h.

[0017] Optionally, in the method for manufacturing the bonded wafer, after the bonded wafer is subjected to a strengthening heat treatment, the method for manufacturing the bonded wafer further includes:

[0018] Performing a chemical mechanical polishing process on the surface of the device wafer away from the oxide layer.

[0019] Optionally, in the method for manufacturing the bonded wafer, after performing the chemical mechanical polishing process, the method for manufacturing the bonded wafer further includes performing a cleaning process on the bonded wafer.

[0020] In the method for manufacturing a bonded wafer provided by the present invention, first, the oxidation temperature of the device wafer is preset according to the interstitial oxygen concentration of the device wafer; then, an oxidation process is performed according to the preset oxidation temperature of the device wafer to form an oxide layer on the surface of the device wafer, and the interstitial silicon atoms on the surface of the device wafer are longitudinally diffused to form an oxygen-free precipitation region between the device wafer and the oxide layer; the device wafer and the support wafer are bonded to form a bonded wafer, and the oxide layer is located between the device wafer and the support wafer. Since the device wafer has an interstitial oxygen concentration within a given range, and during the oxidation process, the oxidation temperature of the device wafer is preset according to the interstitial oxygen concentration of the device wafer, during the oxidation process, the interstitial silicon atoms on the surface of the device wafer can be longitudinally diffused and combined with the vacancies in the lattice of the device wafer, reducing or eliminating the nucleation points of the interstitial oxygen in the device wafer during the oxidation process, that is, forming an oxygen-free precipitation region, thereby reducing or avoiding the occurrence of oxygen precipitates during the manufacturing process of the bonded wafer. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figures 1 to 3 is a schematic diagram of the principle of the formation process of oxygen precipitates;

[0022] Figure 4 is a schematic flowchart of the method for manufacturing a bonded wafer provided by an embodiment of the present invention;

[0023] Figure 5 is a schematic structural diagram of the device wafer according to an embodiment of the present invention;

[0024] Figures 6 to 7 is a schematic diagram of the principle when an oxygen-free precipitation region is formed in the method for manufacturing a bonded wafer provided by an embodiment of the present invention;

[0025] Figure 8 is a schematic diagram of the fitting relationship between the oxidation temperature and the interstitial oxygen concentration in the method for manufacturing a bonded wafer provided by an embodiment of the present invention;

[0026] Figure 9 and Figure 10 is a schematic structural diagram formed in the method for manufacturing a bonded wafer provided by an embodiment of the present invention;

[0027] Figures 11 to 19 is a schematic diagram of the results of the device wafer at different oxidation process temperatures in the method for manufacturing a bonded wafer provided by an embodiment of the present invention;

[0028] Among them, the reference numerals are explained as follows:

[0029] 10 - wafer; 10a - vacancy; 10b - interstitial oxygen; 10c - oxygen precipitation nucleus; 10d - oxygen precipitate; 11 - silicon atom;

[0030] 100 - device wafer; 100a - vacancy; 100b - interstitial oxygen; 100c - oxygen precipitation nucleus; 100d - oxygen precipitate; 100e - interstitial silicon atom; 100f - silicon atom; 101 - oxygen - free precipitation region; 110 - oxide layer; 200 - support wafer. Detailed implementation manners

[0031] The following further elaborates on the manufacturing method of the bonded wafer proposed by the present invention in conjunction with the accompanying drawings and specific embodiments. According to the following description, the advantages and features of the present invention will be clearer. It should be noted that the accompanying drawings are all in very simplified forms and use non - precise scales, only for conveniently and clearly assisting in explaining the purpose of the embodiments of the present invention.

[0032] The inventors' research found that during the manufacturing process of bonded wafers, after the wafers are subjected to high - temperature treatment or multiple heat - treatment steps, the oxygen atoms inside the wafers will precipitate and aggregate to form oxygen precipitates. These oxygen precipitates are usually neutral, mainly composed of SiOx, and their volume is about 2.25 times that of silicon atoms. The morphology of the oxygen precipitates can be spherical, rod - shaped, sheet - shaped, etc., and the specific morphology depends on factors such as the impurity concentration in single - crystal silicon, the heat - treatment temperature, and time. Defects such as dislocations and stacking faults may be introduced during the formation of oxygen precipitates, and these defects will affect the electrical performance of SOI devices, such as increasing leakage current and reducing breakdown voltage. Especially when the oxygen precipitates are located in the sensitive areas of the device, the impact may be more significant.

[0033] Figures 1 to 3 is a schematic diagram of the principle of the formation process of oxygen precipitates. As Figure 1 and Figure 2 shown, the inventors further found that the generation of oxygen precipitates 10d in thermal processes (such as oxidation processes) mainly depends on the number of vacancies 10a in the lattice of the wafer 10 and interstitial oxygen 10b. The vacancies 10a in the wafer 10 determine whether a core for the generation of oxygen precipitates 10d will be formed, and the number of interstitial oxygen 10b in the wafer 10 determines the size of the oxygen precipitates 10d generated during the thermal process. During the nucleation process of oxygen precipitates 10d, the vacancies 10a and interstitial oxygen 10b interact to form oxygen precipitation nuclei 10c. Therefore, in thermal processes, the generation of oxygen precipitates 10d can be inhibited by reducing the oxygen content (or the number of interstitial oxygen) in the wafer 10 and eliminating the vacancies 10a in the wafer 10, thereby reducing or avoiding the phenomenon of oxygen precipitates during the manufacturing process of bonded wafers.

[0034] The inventors conducted experimental research on the influence of different oxidation conditions on the elimination of nucleation points of oxygen precipitates and obtained a large amount of experimental data. The experimental data shows that as Figure 3As described above, silicon atoms 11 and oxygen precipitates 10d exist on the surface of the wafer 10. When the number or volume of the oxygen precipitates 10d is excessive, it will become the source of slip dislocations, thereby inducing a large number of dislocation defects, thus increasing the generation of slip lines. Further, when the interstitial oxygen concentration in the wafer 10 is less than or equal to 8 newppma, slip lines will be generated due to the too low hardness of the wafer, while when the interstitial oxygen concentration in the device wafer is greater than 8 new ppma, a certain amount of BMD (Bulk micro defect) will be generated, resulting in the generation of oxygen precipitates 10d in the wafer 10.

[0035] Specifically, as shown in Table 1, five groups of wafers are provided, each group including seven wafers. The interstitial oxygen concentration in the wafers of the same group is the same, and the interstitial oxygen concentration in the wafers of different groups is different. Among them, the interstitial oxygen concentration in each group of wafers is 8 newppma, 10 new ppma, 12 new ppma, 14 new ppma, and 16 new ppma respectively. Then, the oxidation process is performed on the wafers in the five groups. The temperatures of the oxidation process for the wafers in the same group are 800 °C, 850 °C, 900 °C, 950 °C, 1000 °C, 1050 °C, and 1100 °C respectively.

[0036] Table 1 Comparison table of whether slip lines will appear on wafers with different interstitial oxygen concentrations at different oxidation process temperatures

[0037]

[0038]

[0039] It can be seen from Table 1 that when the temperature of the oxidation process of the wafer is greater than or equal to 1100 °C, slip lines will appear on the wafer surface. When the interstitial oxygen concentration of the wafer is equal to 8 newppma and the temperature of the oxidation process is greater than or equal to 1000 °C, and when the interstitial oxygen concentration of the wafer is equal to 10 newppma and the temperature of the oxidation process is greater than or equal to 1050 °C, slip lines will also appear on the wafer surface, that is, oxygen precipitates exist.

[0040] It has been found through research that after the oxidation process is performed, the reason for the absence of slip lines on the wafer surface is that there is an oxygen-free precipitation area (BMD) near the wafer surface close to the oxide layer. The formation of this area is due to the relatively rich silicon atoms on the wafer surface. During the oxidation process, the interstitial silicon atoms on the wafer surface will undergo longitudinal diffusion, that is, from the wafer surface to the inside of the wafer, and thus combine with the vacancies in the lattice inside the wafer. After the silicon atoms combine with the vacancies inside the wafer, the nucleation points for forming oxygen precipitates can be eliminated. After the nucleation points are eliminated, oxygen precipitates cannot be formed, that is, oxygen precipitates will not be formed at the positions without nucleation points, thus avoiding the formation of slip lines on the wafer surface.

[0041] Based on this, the core idea of the present invention is to provide a method for manufacturing a bonded wafer. First, preset the oxidation temperature of the device wafer according to the interstitial oxygen concentration of the device wafer; then perform an oxidation process according to the preset oxidation temperature of the device wafer to form an oxide layer on the surface of the device wafer and cause the interstitial silicon atoms on the surface of the device wafer to diffuse longitudinally; bond the device wafer and the support wafer to form a bonded wafer, and the oxide layer is located between the device wafer and the support wafer. Since the device wafer has an interstitial oxygen concentration within a given range, and during the oxidation process, the oxidation temperature of the device wafer is preset according to the interstitial oxygen concentration of the device wafer, thus during the oxidation process, the interstitial silicon atoms on the surface of the device wafer can be diffused longitudinally to form an oxygen-free precipitation region between the device wafer and the oxide layer, which can then combine with the vacancies in the lattice of the device wafer, thereby reducing or eliminating the nucleation points of the interstitial oxygen in the device wafer during the oxidation process, that is, forming an oxygen-free precipitation region, and further reducing or avoiding the occurrence of oxygen precipitates during the manufacturing process of the bonded wafer.

[0042] Figure 4 is a schematic flow chart of the method for manufacturing a bonded wafer provided by an embodiment of the present invention. As Figure 4 shown, the method for manufacturing the bonded wafer includes:

[0043] Step S1: Provide a support wafer and a device wafer, the device wafer includes silicon atoms and the device wafer has an interstitial oxygen concentration within a given range;

[0044] Step S2: Preset the oxidation temperature of the device wafer according to the interstitial oxygen concentration of the device wafer;

[0045] Step S3: Perform an oxidation process according to the preset oxidation temperature of the device wafer to form an oxide layer on the surface of the device wafer and cause the interstitial silicon atoms on the surface of the device wafer to diffuse longitudinally to form an oxygen-free precipitation region between the device wafer and the oxide layer;

[0046] Step S4: Bond the device wafer and the support wafer to form a bonded wafer, and the oxide layer is located between the device wafer and the support wafer.

[0047] Figures 5 to 7 is a schematic structural diagram formed in the method for manufacturing a bonded wafer provided by an embodiment of the present invention. The following will describe the method for manufacturing the bonded wafer provided in this embodiment in more detail in conjunction with the attached Figures 5 to 7 drawings.

[0048] First, as Figure 5As shown, step S1 is performed to provide a device wafer 100 and a support wafer, and the device wafer 100 has an interstitial oxygen concentration within a given range. Among them, the material of the device wafer 100 and the material of the support wafer are both silicon.

[0049] In this embodiment, the interstitial oxygen concentration of the device wafer 100 is greater than or equal to 8 new ppma and less than or equal to 12 new ppma, that is, the given range of the interstitial oxygen concentration of the device wafer 100 is greater than or equal to 8 new ppma and less than or equal to 12 new ppma. For example, 9 new ppma, 10 new ppma, or 11 new ppma.

[0050] If the interstitial oxygen concentration of the device wafer 100 is too low, slip lines will be generated due to the too low hardness of the device wafer 100. Therefore, the interstitial oxygen concentration of the device wafer 100 in this embodiment is greater than or equal to 8 new ppma and less than or equal to 12 new ppma.

[0051] Next, step S2 is performed to preset the oxidation temperature of the device wafer 100 according to the interstitial oxygen concentration of the device wafer 100. Specifically, the oxidation temperature of the device wafer 100 is 850 °C to 1050 °C, such as 900 °C or 1000 °C.

[0052] In this embodiment, the oxidation temperature of the device wafer 100 is preset according to the interstitial oxygen concentration of the device wafer 100. As Figure 6 and Figure 7 shown, the wafer 100 has silicon atoms 100f, and interstitial silicon atoms 100e are on the wafer surface. Subsequently, the depth of the longitudinal diffusion of the interstitial silicon atoms 100e in the device wafer 100 can be controlled in the oxidation process, and then the depth of the region of the oxygen-free precipitate region (BMD) 101 in the device wafer 100 can be controlled, that is, the longitudinal diffusion of the interstitial silicon atoms 100e on the surface of the device wafer 100. The diffused interstitial silicon atoms 100e recombine with the vacancies 100a in the lattice of the device wafer 100 (the movement direction of the interstitial silicon atoms 100e is as shown by the arrow in Figure 6 ), thereby eliminating the vacancies 100a, thus forming an oxygen-free precipitate region (BMD) 101, and further reducing or eliminating the nucleation points of the interstitial oxygen in the device wafer 100 during the oxidation process.

[0053] Furthermore, different oxidation process temperatures and the interstitial oxygen concentration in the device wafer 100 will both affect the diffusion of silicon atoms in the device wafer 100, thereby affecting the depth of the oxygen-free precipitate region 101. It has been found through research that the depth of the oxygen-free precipitate region 101 must be at least greater than 1 micron to avoid the occurrence of oxygen precipitates during the bonding wafer manufacturing process.

[0054] Table 3 Depth of the oxygen-free precipitation region (μm)

[0055]

[0056] Combining the above Table 3, it can be seen that at different oxidation process temperatures, the depths of the oxygen-free precipitation regions 101 in different device wafers 100 are also different. For example, when the oxidation process temperature is 850 °C and the interstitial oxygen concentration in the device wafer 100 is 8 new ppma, the depth of the oxygen-free precipitation region 101 in the device wafer 100 is 1 μm.

[0057] Table 4 Relationship between oxidation temperature and interstitial oxygen concentration

[0058]

[0059] Please refer to Table 4 and combine Figure 8 As shown, "0" in Table 4 indicates unacceptable, and "1" indicates acceptable. For example, when the interstitial oxygen concentration is 8 ppma and the temperature is 850 °C, the depth of the oxygen-free precipitation region is unacceptable (or the oxygen precipitates in the bonded wafer are unacceptable). When the interstitial oxygen concentration is 8 ppma and the temperature is 850 °C, the depth of the oxygen-free precipitation region is acceptable, thereby reducing or avoiding the occurrence of oxygen precipitates during the manufacturing process of the bonded wafer. Based on this, the relationship between the oxidation temperature and the interstitial oxygen concentration of the wafer is fitted.

[0060] Specifically, the relationship between the oxidation temperature and the interstitial oxygen concentration of the wafer is as follows, that is, the oxidation temperature of the device wafer 100 is preset according to the following relationship to ensure that the depth of the oxygen-free precipitation region in the device wafer 100 is greater than or equal to 1 μm. The relationship is as follows:

[0061] [850 °C + (Oi - 8) * 25] ≤ T ≤ [950 °C + (Oi - 8) * 25];

[0062] Wherein, T represents the preset oxidation temperature of the device wafer 100, and Oi represents the interstitial oxygen concentration of the device wafer 100.

[0063] Next, as Figure 7 and Figure 8 shown, step S3 is executed. An oxidation process is performed according to the preset oxidation temperature of the device wafer 100 to form an oxide layer 110 on the surface of the device wafer 100, and the interstitial silicon atoms on the surface of the device wafer 100 are longitudinally diffused to form an oxygen-free precipitation region 101 between the device wafer 100 and the oxide layer 110.

[0064] Specifically, as Figure 7As shown, during the execution of the oxidation process, the formation of oxygen precipitates 100d mainly depends on the vacancies in the lattice and the number of interstitial oxygen 100b in the device wafer 100. The vacancies in the lattice determine whether a core for the growth of oxygen precipitates 100d can be formed, and the number of interstitial oxygen 100b determines the size of the oxygen precipitates 100d generated by the oxidation process. Based on this, in this embodiment, since the device wafer 100 has a given range of interstitial oxygen concentration, and during the execution of the oxidation process, the oxidation temperature of the device wafer 100 is preset according to the interstitial oxygen concentration of the device wafer 100. Thus, during the execution of the oxidation process, the interstitial silicon atoms 100e on the surface of the device wafer 100 can be longitudinally diffused, so that they can recombine with the vacancies in the lattice of the device wafer 100, and a region without oxygen precipitation 101 is formed in the device wafer 100, and the depth of the region without oxygen precipitation 101 in the device wafer 100 is greater than or equal to 1 μm, thereby reducing or eliminating the nucleation points of the interstitial oxygen 100b in the device wafer 100 during the oxidation process (i.e., reducing the formation of oxygen precipitation nuclei 100c), and further reducing or avoiding the occurrence of oxygen precipitates 100d during the manufacturing process of the bonded wafer.

[0065] In this embodiment, the thickness of the oxide layer 110 can be 150 nm to 200 nm.

[0066] Next, step S4 is executed to bond the device wafer 100 and the support wafer 200 to form a bonded wafer, and the oxide layer 110 is located between the device wafer 100 and the support wafer 200. Among them, after bonding, the support wafer 200 serves as the substrate layer of the bonded wafer, the device wafer 100 serves as the top silicon layer of the bonded wafer, and the oxide layer 110 between the device wafer 100 and the support wafer 200 serves as the buried insulating oxide layer of the bonded wafer.

[0067] In this embodiment, after forming the bonded wafer, the manufacturing method of the bonded wafer further includes performing a strengthening heat treatment on the bonded wafer to make the bonding surface between the support wafer 200 and the device wafer 100 more firm. Among them, the temperature of the strengthening heat treatment is 1050 °C to 1150 °C, such as 1100 °C, and the time of the strengthening heat treatment can be 0.5 h to 1.5 h, such as 1 h.

[0068] In a further solution, after performing the strengthening heat treatment, it further includes performing a chemical mechanical polishing process on the surface of the device wafer 100 (i.e., the top silicon layer) away from the oxide layer 110 to thin the thickness of the device wafer 100.

[0069] Further, after performing the chemical mechanical polishing process, a cleaning process is performed on the bonded wafer.

[0070] Figures 11 to 19It is a schematic diagram of the results of a device wafer at different oxidation process temperatures in the method for manufacturing a bonded wafer provided by an embodiment of the present invention. The following provides comparative examples of the device wafer at different oxidation process temperatures to further illustrate the method for manufacturing the bonded wafer provided by this embodiment.

[0071] In the comparative example, three support wafers and three device wafers are provided. Each of the device wafers has silicon atoms and a given range of interstitial oxygen concentration, and the interstitial oxygen concentration of each device wafer is the same; then, an oxidation process is performed on each of the device wafers. The oxidation process temperatures of the three device wafers are 800 °C, 900 °C, and 1000 °C respectively. Through the oxidation process on each device wafer; then, an oxidation process is performed according to the preset oxidation temperature of the device wafer to form an oxide layer on the surface of the device wafer and cause the interstitial silicon atoms on the surface of the device wafer to diffuse longitudinally; then, each device wafer and each support wafer are bonded to form a bonded wafer, and the oxide layer is located between the device wafer and the support wafer; after that, the bonded wafer is successively subjected to strengthening heat treatment and chemical mechanical polishing.

[0072] Comparative Example 1, please refer to Figure 11 , Figure 11 is a scanning schematic diagram of the device wafer after chemical mechanical polishing. The interstitial oxygen concentration of the device wafer is 9 new ppma, and the oxidation process temperature is 800 °C. Figure 12 is the surface particle distribution diagram of the device wafer before HF aqueous solution cleaning. Figure 13 is the surface particle distribution diagram of the device wafer after HF aqueous solution (hydrofluoric acid) cleaning. Comparing Figure 12 and Figure 13 it can be seen that the particle distribution on the surface of the device wafer increases significantly, that is, there are oxygen precipitates in the device wafer.

[0073] Comparative Example 2, please refer to Figure 14 , Figure 14 is a scanning schematic diagram of the device wafer after chemical mechanical polishing in this embodiment. The interstitial oxygen concentration of the device wafer is 9 new ppma, and the oxidation process temperature is 900 °C, that is, the oxidation temperature of the device wafer and the interstitial oxygen concentration in the device wafer satisfy the relational expression provided by this embodiment: [850 °C + (Oi - 8) * 25] ≤ T ≤ [950 °C + (Oi - 8) * 25]; where T represents the preset oxidation temperature of the device wafer 100, and Oi represents the interstitial oxygen concentration of the device wafer 100.

[0074] Figure 15 is the surface particle distribution diagram of the device wafer before HF aqueous solution cleaning. Figure 16 is the surface particle distribution diagram of the device wafer after HF aqueous solution cleaning. ComparingFigure 15 and Figure 16 It can be seen that the particle distribution on the surface of the device wafer has not increased significantly, that is, there are fewer oxygen-free precipitates or oxygen precipitates in the device wafer.

[0075] For Comparative Example 3, please refer to Figure 17 , Figure 17 is a scanning schematic diagram of the device wafer after chemical mechanical polishing in this embodiment. The interstitial oxygen concentration of the device wafer is 9 new ppma, and the oxidation process temperature is 1000 °C. Figure 18 is the surface particle distribution map of the device wafer before HF aqueous solution cleaning. Figure 19 is the surface particle distribution map of the device wafer after HF aqueous solution cleaning. Comparing Figure 18 and Figure 19 it can be seen that the particle distribution on the surface of the device wafer has not increased significantly, but there are slip lines 110 on the surface of the device wafer (as Figure 17 shown).

[0076] Combining the above comparative examples, it can be seen that the bonded wafer (Comparative Example 2) formed by using the manufacturing method of the bonded wafer provided in this embodiment can reduce or avoid the occurrence of oxygen precipitates during the manufacturing process of the bonded wafer.

[0077] In summary, in the manufacturing method of the bonded wafer provided in the embodiment of the present invention, first, the oxidation temperature of the device wafer is preset according to the interstitial oxygen concentration of the device wafer; then, the oxidation process is performed according to the preset oxidation temperature of the device wafer to form an oxide layer on the surface of the device wafer and longitudinally diffuse the interstitial silicon atoms on the surface of the device wafer; the device wafer and the support wafer are bonded to form a bonded wafer, and the oxide layer is located between the device wafer and the support wafer. Since the device wafer has an interstitial oxygen concentration within a given range, and during the oxidation process, the oxidation temperature of the device wafer is preset according to the interstitial oxygen concentration of the device wafer, thus during the oxidation process, the interstitial silicon atoms on the surface of the device wafer can be longitudinally diffused, thereby recombining with the vacancies in the lattice of the device wafer, thus reducing or eliminating the nucleation points of the interstitial oxygen in the device wafer during the oxidation process, and further reducing or avoiding the occurrence of oxygen precipitates during the manufacturing process of the bonded wafer.

[0078] The above description is only a description of the preferred embodiments of the present invention, and does not limit the scope of the present invention in any way. Any changes and modifications made by those of ordinary skill in the art of the present invention based on the above disclosure shall fall within the protection scope of the claims.

Claims

1. A method for manufacturing a bonded wafer, characterized in that, Including: Providing a support wafer and a device wafer, wherein the device wafer has an interstitial oxygen concentration within a given range; Presetting the oxidation temperature of the device wafer according to the interstitial oxygen concentration in the device wafer; Performing an oxidation process according to the preset oxidation temperature of the device wafer to form an oxide layer on the surface of the device wafer, and enabling the interstitial silicon atoms on the surface of the device wafer to diffuse longitudinally to form an oxygen-free precipitation region between the device wafer and the oxide layer; Bonding the device wafer and the support wafer to form a bonded wafer, with the oxide layer located between the device wafer and the support wafer.

2. The manufacturing method of the bonded wafer according to claim 1, characterized in that, The interstitial oxygen concentration within the given range of the device wafer is greater than or equal to 8 new ppma and less than or equal to 12 new ppma.

3. The manufacturing method of the bonded wafer according to claim 1, wherein, Presetting the oxidation temperature of the device wafer according to the following relationship: [850 °C + (Oi - 8) * 25] ≤ T ≤ [950 °C + (Oi - 8) * 25]; Wherein, T represents the preset oxidation temperature of the device wafer, and Oi represents the interstitial oxygen concentration within the given range of the device wafer.

4. The manufacturing method of the bonded wafer according to claim 1, characterized in that, After forming the bonded wafer, the manufacturing method of the bonded wafer further includes: Performing a strengthening heat treatment on the bonded wafer.

5. The manufacturing method of the bonded wafer according to claim 4, characterized in that, Performing a strengthening heat treatment on the bonded wafer through a wet oxidation process.

6. The manufacturing method of the bonded wafer according to claim 4, wherein The temperature of the strengthening heat treatment is 1050 °C to 1150 °C.

7. The manufacturing method of the bonded wafer according to claim 4, wherein, The time of the strengthening heat treatment is 0.5 h to 1.5 h.

8. The manufacturing method of the bonded wafer according to claim 4, characterized in that, After performing the strengthening heat treatment on the bonded wafer, the manufacturing method of the bonded wafer further includes: Performing a chemical mechanical polishing process on the surface of the device wafer away from the oxide layer.

9. The manufacturing method of the bonded wafer according to claim 8, characterized in that, After performing the chemical mechanical polishing process, the manufacturing method of the bonded wafer further includes performing a cleaning process on the bonded wafer.

Images