Three-phase four-wire parallel inverter system circulating current suppression method based on 3D-SVPWM (Three Dimensional Space Vector Pulse Width Modulation) modulation

By adopting the 3D-SVPWM modulation strategy in the three-phase four-bridge arm parallel inverter system, the zero-sequence duty cycle difference is changed, and the output voltage quality reduction and loss increase caused by zero-sequence circulation is solved, and the system efficiency and reliability are improved.

CN120262938APending Publication Date: 2025-07-04FUZHOU UNIV
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Patent Information

Application Number
CN202510470746.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-04-15
Publication Date
2025-07-04

AI Technical Summary

Technical Problem

In three-phase, four-bridge arm parallel inverter systems, zero-sequence circulation leads to a decrease in output voltage quality, increase loss and shorten device life. Existing methods such as adding isolation transformers or current limiting inductors lead to increased system volume and cost, and limited suppression effects.

Method used

The 3D-SVPWM modulation method is adopted to adjust the zero-sequence duty cycle difference of the two inverters and adjust the zero-sequence voltage difference to suppress the zero-sequence circulation. The system includes a parallel inverter circuit module, a 3D-SVPWM modulation module and a closed-loop control module.

Benefits of technology

Effectively suppress zero-sequence circulation, reduce system losses, improve efficiency and reliability, extend operating life, and simplify the calculation process.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The invention provides a three-phase four-wire parallel inverter system circulating current suppression method based on 3D-SVPWM (three-dimensional space vector pulse width modulation), and the method comprises the steps: changing a zero-sequence voltage difference through changing a difference value of zero-sequence duty ratios of two inverters through a 3D-SVPWM strategy, thereby suppressing the zero-sequence circulating current in the parallel inverter system, and achieving the purpose of suppressing the circulating current in the parallel inverter system. The parallel inverter system comprises a parallel inverter circuit module, a 3D-SVPWM modulation module and a closed-loop control module. According to the method, zero-sequence circulating current suppression of the three-phase four-leg parallel inverter system can be realized, the steps are simple, the system loss can be reduced, the efficiency and reliability of the parallel four-leg inverter system can be improved, the service life of the parallel four-leg inverter system can be prolonged, and a relatively good zero-sequence current suppression effect can be achieved.
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Description

Technical Field

[0001] The present invention relates to the field of power electronics technology, in particular to a method for suppressing circulating current in a three-phase four-wire shunt inverter system based on 3D-SVPWM modulation. Background Art

[0002] In a photovoltaic microgrid, three-phase four-leg inverters have been widely used due to their advantages such as low cost, small size, and the ability to handle unbalanced loads. In addition, due to the need for grid capacity, a three-phase four-leg shunt inverter system is often adopted at present to improve the reliability of the power generation system and increase its expandability. However, in practical applications, due to differences in the control methods of each inverter, different line impedance parameters, or inconsistent PWM modulation algorithms of the shunt converters, there are differences in the amplitude and phase of the output voltages of the shunt inverters, resulting in a relatively high circulating current inside the shunt inverters. This causes the quality of the output voltage of the photovoltaic microgrid to deteriorate, generates losses, reduces the system operating efficiency, increases the heating of each device in the system, shortens the device life, and seriously threatens the normal operation of the system. Therefore, it is very necessary to study the strategy for suppressing circulating current in the shunt system.

[0003] In order to suppress the zero-sequence circulating current in the shunt inverter system, some scholars have proposed adding isolation transformers at the output ends of each inverter, thereby forming an open circuit for the circulating current between the inverters, which suppresses the circulating current between the inverters at the source. This method has the characteristics of simplicity and strong practicality. However, this method also has the problem that the transformer operates in the low-frequency band, resulting in an overly large and heavy volume and an increased cost. At the same time, it is also affected by leakage magnetic losses and eddy current losses, resulting in a reduced output efficiency and the energy density of the system. In addition, a new space vector modulation method has been proposed in the literature. For a shunt converter system with a common-mode inductor or a single-phase inductor as a filter, the space vector modulation method is used to reduce the magnitude of the zero-sequence circulating current and the amplitude of the common-mode voltage in the shunt system. In order to increase the impedance of the zero-sequence circulating current path, some scholars use the method of adding an external current-limiting inductor and a coupling inductor to suppress the circulating current. However, the introduction of the current-limiting inductor will also cause the volume of the inverter to become larger and affect the accuracy of the output voltage of the inverter. Although the coupling inductor can improve the voltage regulation accuracy of the inverter and play a role in suppressing high-frequency circulating current components, its effect on suppressing low-frequency circulating current is poor.

[0004] The present invention proposes a solution to the above problems. Summary of the Invention

[0005] The present invention proposes a method for suppressing circulating current in a three-phase four-wire shunt inverter system based on 3D-SVPWM modulation, which can achieve suppression of zero-sequence circulating current in a three-phase four-leg shunt inverter system. Moreover, the steps are simple, which can reduce system losses, improve the efficiency, reliability and service life of the shunt four-leg inverter system, and has a good zero-sequence current suppression effect.

[0006] The present invention adopts the following technical solutions.

[0007] A method for suppressing circulating current in a three-phase four-wire shunt inverter system based on 3D-SVPWM modulation. The method uses a 3D-SVPWM modulation strategy to change the difference in the zero-sequence duty ratios of two inverters, thereby changing the zero-sequence voltage difference, so as to suppress the zero-sequence circulating current existing in the shunt inverter system. The shunt inverter system includes a shunt inverter circuit module, a 3D-SVPWM modulation module, and a closed-loop control module.

[0008] The method includes the following steps.

[0009] Step 1: Sample the three-phase load voltage and inductor current from the three-phase circuit, and extract the sequence components therefrom. Subsequently, after abc / dq transformation, it enters the voltage-current double closed-loop control circuit.

[0010] Step 2: Perform inverse coordinate transformation to synthesize the alternating quantities of each sequence component, thereby generating a reference voltage.

[0011] Step 3: Input the reference voltage into the 3D-SVPWM modulation modules of the two inverters respectively. After generating their respective PWM signals, input them into the two inverters respectively for closed-loop control.

[0012] Step 4: Set the zero-sequence circulating current reference value of the inverter to zero, and input it together with the actual zero-sequence circulating current into the PI controller to obtain an adjustment factor k, and input it into the 3D-SVPWM modulation module adopted by one of the inverters to improve its modulation strategy.

[0013] The shunt inverter system is a three-phase four-leg shunt inverter system, which adopts an improved 3D-SVPWM modulation strategy based on the abc coordinate system. Through direct calculation based on the abc coordinate system, the modulation strategy steps are simplified, and the modulation strategy of one of the two shunt inverters is improved. An adjustment factor is added to the improved 3D-SVPWM modulation strategy to change the difference in the zero-sequence duty ratios between the two inverters in the shunt inverter system, so as to suppress the zero-sequence circulating current existing in the shunt system.

[0014] In a three-phase four-leg parallel inverter system, two inverters are connected in parallel on the AC side and the DC side, sharing the same DC voltage source. The AC side is connected in parallel to supply power to the load after passing through an LC output filter. The circuit structure of the three-phase four-leg parallel inverter system introduces a fourth leg and provides a controllable path for the neutral point voltage to be able to adapt to the operating conditions of unbalanced loads and work in the scenario of single-phase load access.

[0015] In the suppression method, the three-phase load voltage and inductor current are extracted from the three-phase circuit, and the sequence components are extracted using the principle of the symmetrical component method. After improving the zero-sequence component, the dq transformation of each sequence component is performed. Then, the sequence components in the dq coordinate system are respectively adjusted by PI using voltage-current double closed-loop control to achieve the goal of adjusting the positive-sequence component to the set value and the negative-sequence and zero-sequence components to zero. Finally, the sequence components after PI adjustment are inversely transformed from the dq coordinate system to the abc coordinate system to obtain the corresponding AC quantities, and these AC quantities are synthesized to obtain the three-phase command voltages required for three-dimensional space vector modulation. The three-phase command voltages are input into the 3D-SVPWM module. After generating their respective PWM signals, they are input into the two inverters, thus completing the closed-loop control.

[0016] In step one, the two inverters of the three-phase four-leg parallel inverter system share a DC voltage source and are respectively connected to the three-phase load through LC output filters.

[0017] The LC filter is used to attenuate and avoid high-frequency switching fluctuations of the output current and voltage of the parallel system. A single-phase load is connected from phase A to the neutral line after the two inverters are connected in parallel to expand its application range. The output voltage of each inverter is obtained from the following relationship:

[0018]

[0019] where V dc is the DC voltage, d kx is the duty cycle of the upper switch in the phase leg k (k = a, b, c, and n) of inverter x (x = 1 and 2).

[0020] According to Kirchhoff's law:

[0021]

[0022] i dc = d a1 i fa1 + d b1 i fb1 + d c1 i fc1 + d n1 i fn1 Formula 3;

[0023] Among them, L f is the line filter inductor, and i fa , i fb , i fc , i fn are the inductor currents of each phase respectively, and V ac , V bc , V cc represent the voltages of the filter capacitors of each phase respectively, and i dc is the DC side current;

[0024] Convert the abc coordinates to the dq coordinates for calculation, and the following can be obtained:

[0025]

[0026] Among them, i fd , i fq are the values of the inductor current on the d-axis and q-axis after the dq transformation. Similarly, V fd , V fq and d d , d q are the values of the output voltage and duty cycle on the d-axis and q-axis respectively.

[0027] In step 2, when the inverters are connected in parallel through a common DC power supply and the same three-phase load, a zero-sequence voltage difference is generated between the inverters. At the same time, the topology of the parallel system provides a current path for the zero-sequence circulating current, and there is the following relationship for the zero-sequence circulating current generated between each phase of these inverters;

[0028]

[0029] i z = i z1 = -i z2 Equation 7;

[0030] Among them, i z1 , i z2 represent the zero-sequence circulating currents of the first inverter and the second inverter.

[0031] The zero-sequence duty cycle of the four-leg inverter is defined as the sum of the duty cycles of all phases of the inverter, and the relationship is as follows:

[0032]

[0033] According to the previous formula, the following relationship can be obtained:

[0034]

[0035]

[0036] Among them, Vzsv1 and V zsv2 represent the zero-sequence voltages of inverter 1 and inverter 2 respectively, and ΔV zsv(s) represents the difference between the zero-sequence voltages of the two inverters;

[0037] The above relationship shows that the difference between the zero-sequence voltages of the two inverters is the main factor involved in generating zero-sequence circulating current, which is usually the result of filter inductor mismatch, unbalanced output current sharing, unequal switching devices, etc.; if the zero-sequence duty cycles d z1 and d z2 , that is, the zero-sequence voltages of the two parallel inverters are the same, no zero-sequence circulating current will be generated; that is, when the zero-sequence voltage difference is controlled and set to zero, the zero-sequence circulating current can be suppressed.

[0038] In Equation 6, the magnitudes of the zero-sequence circulating currents of the two inverters are equal and the signs are opposite. If the zero-sequence circulating current of one of the inverters is controlled, the zero-sequence circulating current of the entire system will also be controlled, that is, only by changing the modulation strategy of one inverter can the zero-sequence circulating current in the entire system be suppressed.

[0039] In step three, the three-phase four-leg inverter has a total of four legs and 16 switching states, corresponding to 16 voltage vectors. When S = 1, the upper switch of the inverter is turned on and the lower switch is turned off; when S = 0, the upper switch is turned off and the lower switch is turned on;

[0040] To simplify the calculation process, the leg voltages corresponding to these 16 voltage vectors are normalized. The DC bus voltage U dc is represented by 1, and Table 1 can be obtained. In the table, S a S b S c S f are the switching states corresponding to the four legs in the three-phase four-leg inverter. "1" represents that the upper switch is turned on and the lower switch is turned off, and "0" represents that the lower switch is turned on and the upper switch is turned off. U af U bf U cf represent the voltage between legs, where V1 and V 16 are two zero-voltage vectors, and the remaining 14 are non-zero voltage vectors;

[0041] Table 1 Output voltage vectors in the abc coordinate system

[0042]

[0043] According to Table 1, Figure 2 the space voltage vectors in the abc coordinate system shown can be obtained. As Figure 2As shown, the 16 voltage vectors divide it into 24 tetrahedrons. It is necessary to determine which tetrahedron the reference voltage vector is located in, so as to determine which three non-zero voltage vectors the reference voltage vector is synthesized by. Then, through calculation, the action time of each vector is determined. Finally, by combining them in a certain order, the 3D-SVPWM strategy in the abc coordinate system can be realized. According to the voltage vectors, the space in the abc coordinate system is divided into 24 tetrahedrons. First, determine which tetrahedron the reference voltage vector is located in, determine which three non-zero voltage vectors the reference voltage vector is synthesized by, then through calculation, determine the action time of each vector, and then combine them in a certain order to obtain the 3D-SVPWM strategy in the abc coordinate system;

[0044] It includes the following steps;

[0045] Step 1: Determination of the reference voltage position; First, six k values and a pointer function RP need to be defined, as shown in Equations 12 and 13,

[0046]

[0047] where U x_ref (x = a, b, c) are the three-phase reference voltages, the values of k1 to k6 are 0 or 1. During the calculation process, substitute the obtained k values into the pointer function RP. There are 24 RP values in total, and each RP value corresponds to one of the 24 tetrahedrons; Determine the RP value through the reference voltage, that is, determine which voltage vectors the reference voltage is synthesized by;

[0048] According to the derivation results, there are cases where the three-phase voltages are all greater than zero or all less than zero in the tetrahedron. However, in practical applications, this situation does not exist. Therefore, the corresponding tetrahedron should be regarded as an invalid tetrahedron; After analysis and derivation, remove the cases where U af 、U bf 、U cf are all greater than or less than zero at the same time. The corresponding invalid RP values are: 1, 8, 9, 16, 17, 24, 41, 48, 49, 56, 57, 64; So finally, only the voltage vectors in the tetrahedrons corresponding to the 12 RP values of 5, 7, 13, 14, 19, 23, 42, 46, 51, 52, 58, 60 participate in the voltage synthesis;

[0049] Step 2: Calculation of the voltage vector action time After the above-mentioned synthetic voltage vectors are determined, it is necessary to calculate the action time of each vector. In tetrahedron 23, the specific calculation steps are as follows:

[0050]

[0051] In the above formula, V 3a 、V 3b 、V 3cis the projection of voltage vector V3 on the a, b, and c axes. T1, T2, and T3 are the action times corresponding to the three vectors respectively, and U a_ref , U b_ref , U c_ref are the three-phase reference voltages. In tetrahedron 23, as can be seen from the previous table, the projections of V3 on the a, b, and c axes are (0, 1, 0), V4 is (0, 1, 1), and V 12 is (-1, 0, 0). From this, the final duty cycle in this tetrahedron can be obtained.

[0052] At the end of modulation, it is necessary to determine the action sequence of the voltage vectors. The vector action sequence needs to follow the following two principles: the action time and position of each switching vector are symmetric about the midpoint of the cycle; the switching sequence of adjacent switching vectors should be selected to change the switching state as little as possible.

[0053] In step four, theoretically, the change in the zero-vector duty cycle will not affect the control purpose and output quality of the parallel system, including the output current, voltage, and input DC bus voltage. Therefore, the difference in the zero-sequence voltage can be adjusted by adjusting the action time of the zero vector. By setting the difference in the zero-sequence duty cycle equal to zero, the zero-sequence circulating current can be eliminated. According to the generation reason of the zero-sequence circulating current, the original 3D-SVPWM modulation strategy is improved by introducing an adjustment factor k in each switching cycle, thereby changing the zero-sequence duty cycle and further making the zero-sequence voltage difference zero, achieving the effect of suppressing the zero-sequence circulating current.

[0054] In the improved 3D-SVPWM modulation strategy, since the adjustment factor is added to the zero vector, the zero-sequence duty cycle becomes:

[0055] d′ zx = d′ ax + d′ bx + d′ cx + d′ nx

[0056] = d 1x + 2d 2x + 3d 3x + 2d 0x - 8k

[0057] = -d 1x + d 3x + 2 - 8k Formula 18;

[0058] Then the difference in the zero-sequence duty cycle can be expressed as:

[0059] Δd zx = d′ z2 - d′ z1

[0060] = d 11 - d12 +d 32 -d 31 -8k Formula 19;

[0061] Figure 3 To adjust the distribution of the state vectors and their duty cycles in each switching period of the 3D - SVPWM modulation strategy before and after (taking the tetrahedron where RP equals 5 as an example). As shown in the figure, by introducing the adjustment variable k, the zero - sequence duty cycle in each switching period is adjusted to eliminate the difference in the zero - sequence duty cycles between inverter 1 and inverter 2, where the action times of the two zero vectors V1 and V 16 become (T0 / 2 - 2kT S ) and (T0 / 2 + 2kT S ), respectively, and then the zero - vector duty cycles d 0x become (d 0x / 2 - 2k) and (d 0x / 2 + 2k), respectively.

[0062] In step four, after changing the zero - sequence duty cycle,

[0063] the expression of the zero - sequence circulating current changes to:

[0064]

[0065] For simplicity of calculation, let:

[0066] Δ 12 = d 11 -d 12 +d 32 -d 31 Formula 21;

[0067] Then the zero - sequence circulating current is simplified to:

[0068]

[0069] From the above formula, it can be seen that by changing the value of the adjustment factor, the difference in the zero - sequence duty cycle can be adjusted, and then the value of the zero - sequence circulating current can be changed. Therefore, adding the adjustment factor can effectively suppress the zero - sequence circulating current in the system.

[0070] The present invention can achieve the suppression of the zero - sequence circulating current in a three - phase four - leg parallel inverter system, and the steps are simple, which can reduce the system loss, improve the efficiency, reliability and service life of the parallel four - leg inverter system, and has a good zero - sequence current suppression effect.

[0071] The present invention has the following beneficial effects compared with the prior art:

[0072] 1. The three-phase four-leg inverter adopted in the proposed solution of the present invention adds a fourth leg compared with the three-leg inverter, thereby providing a path to regulate the unbalanced current, enabling the unbalanced current to flow between the neutral point and each phase load, adjusting the neutral point potential in a timely manner, and being applicable to the access scenario of single-phase loads. In addition, the circuit structure is simple, with a high DC voltage utilization rate, and can be widely applied to various actual scenarios, including new energy power generation, distributed power access, and complex load environments.

[0073] 2. The proposed solution of the present invention adopts a 3D-SVPWM modulation strategy based on the abc coordinate system, which can simplify the traditional modulation strategy, eliminate complex coordinate transformations, make the calculation more concise, and facilitate digital implementation.

[0074] 3. On the basis of improving the 3D-SVPWM strategy method, the present invention adds an adjustment factor to the zero vector duty ratio, changes the difference in the zero-sequence vector duty ratio and zero-sequence voltage between the two inverters, and further suppresses the zero-sequence circulating current. Compared with existing research, this method does not require additional device assistance, improves the output current quality while suppressing the circulating current, reduces harmonics, and improves the efficiency, reliability, and service life of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0075] The present invention will be further described in detail below with reference to the drawings and specific embodiments:

[0076] FIG Figure 1 is a schematic diagram of the topology structure of the three-phase four-leg parallel inverter in Embodiment 1 of the present invention;

[0077] FIG Figure 2 is a schematic diagram of the three-dimensional space voltage vector in the abc coordinate system in Embodiment 2 of the present invention;

[0078] FIG Figure 3 is a schematic diagram of the switching sequence of the switching tubes before and after adjustment in Embodiment 2 of the present invention;

[0079] FIG Figure 4 is a schematic diagram of the system control strategy block in Embodiment 3 of the present invention;

[0080] FIG Figure 5 is a schematic diagram of the simulation waveform in Embodiment 4 of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0081] As shown in the figure, a method for suppressing the circulating current in a three-phase four-wire parallel inverter system based on 3D-SVPWM modulation. The method suppresses the zero-sequence circulating current existing in the parallel inverter system by changing the difference in the zero-sequence duty ratio of two inverters through the 3D-SVPWM modulation strategy, thereby changing the zero-sequence voltage difference. The parallel inverter system includes a parallel inverter circuit module, a 3D-SVPWM modulation module, and a closed-loop control module.

[0082] The method includes the following steps:

[0083] Step 1: Sample the three-phase load voltage and inductor current from the three-phase circuit, extract the sequence components from them. Subsequently, after abc / dq transformation, enter the voltage-current double closed-loop control circuit;

[0084] Step 2: Perform inverse coordinate transformation to synthesize the alternating quantities of each sequence component, thereby generating the reference voltage;

[0085] Step 3: Input the reference voltage into the 3D-SVPWM modulation modules of the two inverters respectively. After generating their respective PWM signals, input them into the two inverters respectively for closed-loop control;

[0086] Step 4: Set the zero-sequence circulating current reference value of the inverter to zero, and input it together with the actual zero-sequence circulating current into the PI controller to obtain the adjustment factor k, and input it into the 3D-SVPWM modulation module adopted by one of the inverters to improve its modulation strategy.

[0087] The parallel inverter system is a three-phase four-leg parallel inverter system, adopting an improved 3D-SVPWM modulation strategy based on the abc coordinate system. By directly calculating based on the abc coordinate system, the modulation strategy steps are simplified, the modulation strategy of one of the two parallel inverters is improved, an adjustment factor is added to the improved 3D-SVPWM modulation strategy, the difference in the zero-sequence duty ratio between the two inverters in the parallel inverter system is changed, and the zero-sequence circulating current existing in the parallel system is suppressed.

[0088] In the three-phase four-leg parallel inverter system, the AC sides and DC sides of the two inverters are connected in parallel, sharing the same DC voltage source. The AC sides are connected in parallel to supply power to the load after passing through the LC output filter. The circuit structure of the three-phase four-leg parallel inverter system introduces a fourth leg and provides a controllable path to the neutral point voltage, so as to be able to adapt to the operating conditions of unbalanced loads and can work in the scenario of single-phase load access.

[0089] In the suppression method, the three-phase load voltage and inductor current are extracted from the three-phase circuit, and the sequence components are extracted using the principle of the symmetrical component method. After improving the zero-sequence component, the dq transformation of each sequence component is performed. Then, the sequence components in the dq coordinate system are respectively adjusted by PI using a double closed-loop control of voltage and current to achieve the goal of adjusting the positive-sequence component to a set value and the negative-sequence and zero-sequence components to zero. Finally, the sequence components after PI adjustment are subjected to an inverse transformation from the dq coordinate system to the abc coordinate system to obtain the corresponding alternating quantities, and these alternating quantities are synthesized to obtain the three-phase command voltages required for three-dimensional space vector modulation. The three-phase command voltages are input into the 3D-SVPWM module. After generating their respective PWM signals, they are input into two inverters, thus completing the closed-loop control.

[0090] In step one, the two inverters of the three-phase four-leg parallel inverter system share a common DC voltage source and are respectively connected to the three-phase load through LC output filters.

[0091] The LC filter is used to attenuate and avoid high-frequency switching fluctuations of the output current and voltage of the parallel system. After the two inverters are connected in parallel, a single-phase load is connected to the neutral line at phase A to expand its application range. The output voltage of each inverter is obtained from the following relationship:

[0092]

[0093] where V dc is the DC voltage, d kx is the duty cycle of the upper switch in the phase leg k (k = a, b, c, and n) of inverter x (x = 1 and 2). According to Kirchhoff's law:

[0094]

[0095] i dc = d a1 i fa1 + d b1 i fb1 + d c1 i fc1 + d n1 i fn1 Formula 3;

[0096] where, L f is the line filter inductor, i fa , i fb , i fc , i fn are the inductor currents of each phase respectively, V ac , V bc , V cc respectively represent the voltages of the filter capacitors of each phase, and i dc is the DC side current;

[0097] Convert the abc coordinates to dq coordinates for calculation, and the following can be obtained:

[0098]

[0099] Among them, i fd , i fq are the values of the inductor current in the d-axis and q-axis after the dq transformation. Similarly, V fd , V fq and d d , d q are the values of the output voltage and duty cycle in the d-axis and q-axis respectively.

[0100] In step two, when the inverters are connected in parallel through a common DC power supply and the same three-phase load, a difference in zero-sequence voltage is generated between the inverters. At the same time, the topology of the parallel system provides a circulation path for the zero-sequence circulating current, and there is the following relationship for the zero-sequence circulating current generated between the phases of these inverters;

[0101]

[0102] i z = i z1 = -i z2 Equation 7;

[0103] Among them, i z1 , i z2 represent the zero-sequence circulating currents of the first inverter and the second inverter.

[0104] The zero-sequence duty cycle of the four-leg inverter is defined as the sum of the duty cycles of all phases of the inverter, and the relationship is as follows:

[0105]

[0106] According to the previous formula, the following relationship can be obtained:

[0107]

[0108] Among them, V zsv1 and V zsv2 represent the zero-sequence voltages of inverter 1 and inverter 2 respectively, and ΔV zsv(s) represents the difference in zero-sequence voltages between the two inverters;

[0109] The above relationship shows that the difference in zero-sequence voltages between the two inverters is the main factor involved in generating the zero-sequence circulating current, which is usually the result of filter inductor mismatch, unbalanced output current sharing, unequal switching devices, etc.; if the zero-sequence duty cycle d z1 and d z2, that is, the zero-sequence voltages of two parallel inverters are the same, so zero-sequence circulating current will not be generated; that is, when the zero-sequence voltage difference is controlled and set to zero, zero-sequence circulating current can be suppressed.

[0110] In Equation 6, the magnitudes of the zero-sequence circulating currents of the two inverters are equal and the signs are opposite. If the zero-sequence circulating current of one of the inverters is controlled, the zero-sequence circulating current of the entire system will also be controlled. That is, only by changing the modulation strategy of one inverter can the zero-sequence circulating current in the entire system be suppressed.

[0111] In Step 3, the three-phase four-leg inverter has a total of four legs and 16 switching states, corresponding to 16 voltage vectors. When S = 1, the upper switch of the inverter is turned on and the lower switch is turned off; when S = 0, the upper switch is turned off and the lower switch is turned on.

[0112] To simplify the calculation process, the leg voltages corresponding to these 16 voltage vectors are normalized. The DC bus voltage U dc is represented by 1, and Table 1 can be obtained. In the table, S a S b S c S f are the switching states corresponding to the four legs in the three-phase four-leg inverter. "1" represents that the upper switch is turned on and the lower switch is turned off, and "0" represents that the lower switch is turned on and the upper switch is turned off. U af U bf U cf represents the voltage between legs, where V1 and V 16 are two zero-voltage vectors, and the remaining 14 are non-zero voltage vectors;

[0113] Table 1 Output voltage vectors in the abc coordinate system

[0114]

[0115] According to Table 1, Figure 2 the space voltage vectors in the abc coordinate system shown can be obtained. As Figure 2 shown, the 16 voltage vectors divide it into 24 tetrahedrons. It is necessary to determine which tetrahedron the reference voltage vector is located in, so as to determine which three non-zero voltage vectors the reference voltage vector is synthesized by. Then, through calculation, the action time of each vector is determined. Finally, by combining them in a certain order, the 3D-SVPWM strategy in the abc coordinate system can be realized; according to the voltage vectors, the space in the abc coordinate system is divided into 24 tetrahedrons. First, determine which tetrahedron the reference voltage vector is located in, determine which three non-zero voltage vectors the reference voltage vector is synthesized by, then through calculation, determine the action time of each vector, and then combine them in a certain order to obtain the 3D-SVPWM strategy in the abc coordinate system;

[0116] It includes the following steps;

[0117] Step 1. Determination of the reference voltage position: First, six k values and a pointer function RP need to be defined, as shown in Equations 12 and 13.

[0118]

[0119] where U x_ref (x = a, b, c) are the three-phase reference voltages, and the values of k1 to k6 are 0 or 1. During the calculation process, substitute the obtained k values into the pointer function RP. There are 24 RP values in total, and each RP value corresponds to one of the 24 tetrahedrons. Determine the RP value through the reference voltage, that is, determine which voltage vectors the reference voltage is synthesized from.

[0120] According to the derivation results, there are cases where the three-phase voltages are simultaneously greater than zero or simultaneously less than zero in the tetrahedron. However, in practical applications, such a situation does not exist. Therefore, the corresponding tetrahedron should be regarded as an invalid tetrahedron. After analysis and derivation, remove the cases where U af 、U bf 、U cf are simultaneously greater than or less than zero. The corresponding invalid RP values are: 1, 8, 9, 16, 17, 24, 41, 48, 49, 56, 57, 64. So finally, only the voltage vectors in the tetrahedrons corresponding to the 12 RP values of 5, 7, 13, 14, 19, 23, 42, 46, 51, 52, 58, 60 participate in the voltage synthesis.

[0121] Step 2. Calculation of the voltage vector action time: After determining the synthesized voltage vector as above, it is necessary to calculate the action time of each vector. In tetrahedron 23, the specific calculation steps are as follows:

[0122]

[0123] In the above formula, V 3a 、V 3b 、V 3c are the projections of the voltage vector V3 on the a, b, and c axes. T1, T2, and T3 are the action times corresponding to the three vectors respectively. U a_ref 、U b_ref 、U c_ref are the three-phase reference voltages. In tetrahedron 23, as can be seen from the previous table, the projections of V3 on the a, b, and c axes are (0, 1, 0), V4 is (0, 1, 1), and V 12 is (-1, 0, 0). Thus, the final duty cycle in this tetrahedron can be obtained.

[0124] Finally, during modulation, it is necessary to determine the action order of the voltage vectors. The action order of the vectors needs to follow the following two principles: The action time and position of each switching vector are symmetric about the midpoint of the cycle; The switching order of adjacent switching vectors should be selected to minimize the change of the switching state.

[0125] In Step 4, theoretically, the change in the duty ratio of the zero vector does not affect the control purpose and output quality of the parallel system, including the output current, voltage, and input DC bus voltage. Therefore, the difference in the zero-sequence voltage can be adjusted by adjusting the action time of the zero vector. By setting the difference in the zero-sequence duty ratio equal to zero, the zero-sequence circulating current can be eliminated. According to the cause of the zero-sequence circulating current, the original 3D-SVPWM modulation strategy is improved by introducing an adjustment factor k in each switching period, thereby changing the zero-sequence duty ratio and making the zero-sequence voltage difference zero, achieving the effect of suppressing the zero-sequence circulating current.

[0126] In the improved 3D-SVPWM modulation strategy, since the adjustment factor is added to the zero vector, the zero-sequence duty ratio becomes:

[0127] d′ zx =d′ ax +d′ bx +d′ cx +d′ nx

[0128] =d 1x +2d 2x +3d 3x +2d 0x -8k

[0129] =-d 1x +d 3x +2 - 8k Formula 18;

[0130] Then the difference in the zero-sequence duty ratio can be expressed as:

[0131] Δd zx =d′ z2 -d′ z1

[0132] =d 11 -d 12 +d 32 -d 31 -8k Formula 19;

[0133] Figure 3 For the distribution of the state vectors and their duty ratios in each switching period of the 3D-SVPWM modulation strategy before and after adjustment (taking the tetrahedron where RP equals 5 as an example). As shown in the figure, by introducing the adjustment variable k to adjust the zero-sequence duty ratio in each switching period, the difference in the zero-sequence duty ratio between Inverter 1 and Inverter 2 is eliminated, where the action times of the two zero vectors V1 and V 16 become (T0 / 2 - 2kT S ) and (T0 / 2 + 2kT S ), respectively, and then the zero-vector duty ratio d0x become (d 0x / 2 - 2k) and (d 0x / 2 + 2k) respectively.

[0134] In step 4, after changing the zero-sequence duty cycle,

[0135] the expression of the zero-sequence circulating current changes to:

[0136]

[0137] For simplicity of calculation, let:

[0138] Δ 12 = d 11 - d 12 + d 32 - d 31 Formula 21;

[0139] Then the zero-sequence circulating current is simplified to:

[0140]

[0141] From the above formula, it can be seen that by changing the value of the adjustment factor, the difference of the zero-sequence duty cycle can be adjusted, and then the value of the zero-sequence circulating current can be changed. Therefore, adding the adjustment factor can effectively suppress the zero-sequence circulating current in the system.

[0142] Embodiment:

[0143] Please refer to Figure 4 , this example is for a photovoltaic microgrid, and provides a circulating current suppression strategy for a three-phase four-wire shunt inverter system based on 3D-SVPWM modulation. The overall structure of the system includes three parts: a shunt inverter circuit module, a 3D-SVPWM modulation module, and a closed-loop control module. The shunt inverter circuit module places two inverters in parallel and shares a DC voltage source. Each inverter is connected to the same three-phase load via its own LC filter. At the same time, a single-phase load is connected from phase A to the neutral line after parallel connection. The 3D-SVPWM modulation module refers to using a three-dimensional space vector modulation method based on the abc coordinate system, and adding an adjustment factor k in each switching cycle of the modulation strategy of a certain inverter, so as to change the zero-sequence voltage difference between the two inverters, which is the core link of this control method. The closed-loop control module collects the three-phase load voltage and inductor current from the three-phase circuit, extracts their sequence components and performs abc / dq transformation. The transformed signals enter the voltage-current double closed-loop control circuit, and then synthesize the sequence components through inverse coordinate transformation to generate a reference voltage. This reference voltage is respectively sent to the 3D-SVPWM modulation modules of the two inverters, and after generating their respective PWM signals, they are input into the two inverters to achieve closed-loop control.

[0144] In this example, by adding a regulation factor to the improved 3D-SVPWM modulation strategy, the difference in the zero-sequence duty ratios of the two inverters is changed, and then the zero-sequence voltage difference is changed, thereby suppressing the zero-sequence circulating current. The overall structure of the system includes three parts: a parallel inverter circuit module, a 3D-SVPWM modulation module, and a closed-loop control module. The implementation mechanism of the whole system is as follows: First, sample the three-phase load voltage and inductor current from the three-phase circuit, and extract the sequence components from them. Subsequently, after the abc / dq transformation, it enters the voltage-current double closed-loop control circuit, and then performs the inverse coordinate transformation to synthesize the AC quantities of each sequence component, thereby generating the reference voltage. This reference voltage is respectively input into the 3D-SVPWM modulation modules of the two inverters. After generating their respective PWM signals, they are respectively input into the two inverters, thereby completing the closed-loop control. In addition, the zero-sequence circulating current reference value of the inverter is set to zero, and it is input into the PI controller together with the actual zero-sequence circulating current to obtain the regulation factor k, which is input into the 3D-SVPWM modulation module adopted by one of the inverters to improve its modulation strategy.

[0145] This example is verified by simulation. The specific simulation method is as follows:

[0146] In this simulation, the second inverter adopts the improved 3D-SVPWM modulation strategy. In addition, in order to simulate the actual operation of the parallel inverter system, the PWM input signal of the second inverter is artificially delayed by 1% of the switching period, so as to cause circulating current in the parallel inverters.

[0147] The simulation results are as Figure 5 shown. Figures (a) and (b) in the figure respectively represent the zero-sequence circulating current curves of the system before and after improvement. It can be seen from the figure that the zero-sequence circulating current is significantly suppressed. Figure 5 Figure (c) shows the waveform of the three-phase load voltage, and this waveform is complete and without distortion.

Claims

1. A method for suppressing circulating current in a three-phase four-wire shunt inverter system based on 3D-SVPWM modulation, characterized in that: The method suppresses the zero-sequence circulating current existing in the parallel inverter system by means of a 3D-SVPWM modulation strategy. By changing the difference in the zero-sequence duty ratios of the two inverters, the zero-sequence voltage difference is changed, thereby suppressing the zero-sequence circulating current. The parallel inverter system includes a parallel inverter circuit module, a 3D-SVPWM modulation module, and a closed-loop control module.

2. The method for suppressing circulating current in a three-phase four-wire shunt inverter system based on 3D-SVPWM modulation according to claim 1, wherein: The method includes the following steps. Step 1: Sample the three-phase load voltage and inductor current from the three-phase circuit, and extract the sequence components therefrom. After abc / dq transformation, they enter the voltage-current double closed-loop control circuit. Step 2: Perform inverse coordinate transformation to synthesize the alternating quantities of each sequence component, thereby generating the reference voltage. Step 3: Input the reference voltage into the 3D-SVPWM modulation modules of the two inverters respectively. After generating their respective PWM signals, input them into the two inverters respectively for closed-loop control. Step 4: Set the zero-sequence circulating current reference value of the inverter to zero, and input it together with the actual zero-sequence circulating current into the PI controller to obtain the adjustment factor k, and input it into the 3D-SVPWM modulation module adopted by one of the inverters to improve its modulation strategy.

3. The method for suppressing the circulating current of a three-phase four-wire shunt inverter system based on 3D-SVPWM modulation according to claim 2, wherein: The parallel inverter system is a three-phase four-leg parallel inverter system, which adopts an improved 3D-SVPWM modulation strategy based on the abc coordinate system. By direct calculation based on the abc coordinate system, the modulation strategy steps are simplified, and the modulation strategy of one of the two parallel inverters is improved. An adjustment factor is added to the improved 3D-SVPWM modulation strategy to change the difference in the zero-sequence duty ratios between the two inverters in the parallel inverter system, thereby suppressing the zero-sequence circulating current existing in the parallel system.

4. The method for suppressing circulating current in a three-phase four-wire shunt inverter system based on 3D-SVPWM modulation according to claim 3, characterized in that: In the three-phase four-leg parallel inverter system, the AC sides and DC sides of the two inverters are connected in parallel, sharing the same DC voltage source. The AC sides are connected in parallel to supply power to the load after passing through the LC output filter. The circuit structure of the three-phase four-leg parallel inverter system introduces a fourth leg and provides a controllable path for the neutral point voltage.

5. The method for suppressing circulating current in a three-phase four-wire shunt inverter system based on 3D-SVPWM modulation according to claim 4, characterized in that: In the suppression method, the three-phase load voltage and inductor current are extracted from the three-phase circuit, and the sequence components are extracted by using the principle of the symmetrical component method. After improving the zero-sequence component, the dq transformation of each sequence component is performed. Then, the sequence components in the dq coordinate system are respectively subjected to PI regulation by using the voltage-current double closed-loop control to achieve the goal of adjusting the positive-sequence component to the set value and adjusting the negative-sequence and zero-sequence components to zero. Finally, the sequence components after PI regulation are subjected to inverse transformation from the dq coordinate system to the abc coordinate system to obtain the corresponding alternating quantities, and these alternating quantities are synthesized to obtain the three-phase command voltages required for three-dimensional space vector modulation. The three-phase command voltages are input into the 3D-SVPWM module, and after generating their respective PWM signals, they are input into the two inverters, thereby completing the closed-loop control.

6. The method for suppressing the circulating current of a three-phase four-wire shunt inverter system based on 3D-SVPWM modulation according to claim 4, wherein: In Step 1, the two inverters of the three-phase four-leg parallel inverter system share the same DC voltage source and are respectively connected to the three-phase load through the LC output filter. The LC filter is used to attenuate and avoid high-frequency switching fluctuations of the output current and voltage of the parallel system; after two inverters are connected in parallel, a single-phase load is connected from phase A to the neutral line to expand its application range; the output voltage of each inverter is obtained from the following relationship: where V dc is the DC voltage, and d kx is the duty ratio of the upper switch in phase leg k (k = a, b, c, and n) of inverter x (x = 1 and 2). According to Kirchhoff's law: i dc = d a1 i fa1 + d b1 i fb1 + d c1 i fc1 + d n1 i fn1 Formula 3; Among them, L f is the line filter inductor, and i fa , i fb , i fc , i fn are the inductor currents of each phase respectively, and V ac , V bc , V cc represent the voltages of the filter capacitors of each phase respectively, and i dc is the DC side current; The abc coordinates are converted to the dq coordinates for calculation, and thus: Among them, i fd and i fq are the values of the inductor current on the d-axis and q-axis after dq transformation. Similarly, V fd and V fq and d d and d q are the values of the output voltage and duty cycle on the d-axis and q-axis respectively.

7. The method for suppressing the circulating current of a three-phase four-wire shunt inverter system based on 3D-SVPWM modulation according to claim 6, wherein: In step 2, when the inverters are connected in parallel through a common DC power supply and the same three-phase load, a difference in zero-sequence voltage is generated between the inverters. At the same time, the topology of the parallel system provides a current path for the zero-sequence circulating current, and the zero-sequence circulating current generated between the phases of these inverters has the following relationship; i z = i z1 = -i z2 Formula 7; Among them, i z1 and i z2 represent the zero-sequence circulating currents of the first inverter and the second inverter, respectively. The zero-sequence duty cycle of the four-leg inverter is defined as the sum of the duty cycles of all phases of the inverter, and the relationship is as follows: According to the previous formula, the following relationship is obtained: Among them, V zsv1 and V zsv2 represent the zero-sequence voltages of inverter 1 and inverter 2 respectively, and ΔV zsv(s) represents the difference between the zero-sequence voltages of the two inverters; If the zero-sequence duty cycle d z1 and d z2 , that is, the zero-sequence voltages of two parallel inverters are the same, no zero-sequence circulating current will be generated; that is, when the zero-sequence voltage difference is controlled and set to zero, the zero-sequence circulating current can be suppressed. In formula 6, the magnitudes of the zero-sequence circulating currents of the two inverters are equal and opposite in sign. If the zero-sequence circulating current of one of the inverters is controlled, the zero-sequence circulating current of the entire system will also be controlled, that is, only by changing the modulation strategy of one inverter can the zero-sequence circulating current in the entire system be suppressed.

8. The method for suppressing circulating current in a three-phase four-wire shunt inverter system based on 3D-SVPWM modulation according to claim 7, wherein: In step 3, the three-phase four-leg inverter has a total of four legs and 16 switching states, corresponding to 16 voltage vectors. When S = 1, the upper switch of the inverter is turned on and the lower switch is turned off. When S = 0, the upper switch is turned off and the lower switch is turned on; To simplify the calculation process, the arm voltages corresponding to these 16 voltage vectors are normalized, and the DC bus voltage U dc is represented by 1. Let S a S b S c S f be the switching states corresponding to the four arms of the three-phase four-arm inverter. "1" represents that the upper switch is on and the lower switch is off, and "0" represents that the lower switch is on and the upper switch is off. U af U bf U cf represents the voltage between arms, where V1 and V 16 are two zero voltage vectors, and the remaining 14 are non-zero voltage vectors; According to the voltage vectors, the space in the abc coordinate system is divided into 24 tetrahedrons. First, it is determined which tetrahedron the reference voltage vector is located in, and it is determined which three non-zero voltage vectors the reference voltage vector is synthesized from. Then, after calculation, the action time of each vector is determined, and then combined in a certain order to obtain the 3D-SVPWM strategy in the abc coordinate system; It includes the following steps; Step 1: Determination of the reference voltage position; First, six k values and a pointer function RP need to be defined, as shown in equations 12 and 13, Where U x_ref (x = a, b, c) are three-phase reference voltages, and the values of k1 to k6 are 0 or 1. During the calculation process, the obtained k values are substituted into the pointer function RP, and there are 24 RP values in total. Each RP value corresponds to one of the 24 tetrahedrons; the RP value is determined by the reference voltage, that is, it is determined which voltage vectors the reference voltage is synthesized from; According to the derivation result, there is a situation where the three-phase voltages are simultaneously greater than zero or simultaneously less than zero in the tetrahedron. Since this situation does not exist in actual applications, the corresponding tetrahedron should be regarded as an invalid tetrahedron; After analysis and derivation, U is removed af , U bf , U cf In the case where they are all greater than or less than zero at the same time, the corresponding invalid RP values are: 1, 8, 9, 16, 17, 24, 41, 48, 49, 56, 57, 64; so finally only the voltage vectors in the tetrahedron corresponding to the 12 RP values of 5, 7, 13, 14, 19, 23, 42, 46, 51, 52, 58, 60 participate in the voltage synthesis; Step 2: Calculation of the action time of the voltage vector After the above-mentioned synthetic voltage vector is determined, the action time of each vector needs to be calculated. In tetrahedron 23, the specific calculation steps are as follows: In the above formula, V 3a , V 3b , V 3c are the projections of the voltage vector V3 on the a, b, and c axes. T1, T2, and T3 are the action times corresponding to the three vectors respectively. U a_ref , U b_ref , U c_ref are the three-phase reference voltages. In tetrahedron 23, as can be seen from the previous table, the projections of V3 on the a, b, and c axes are (0, 1, 0), V4 is (0, 1, 1), and V 12 is (-1, 0, 0). From this, the final duty cycle in this tetrahedron can be obtained; At the end of modulation, it is necessary to determine the action order of the voltage vectors. The action order of the vectors needs to follow the following two principles: the action time and position of each switching vector are symmetric about the midpoint of the cycle; the switching order of adjacent switching vectors should be selected to minimize the change in the switching state.

9. The method for suppressing circulating current in a three-phase four-wire shunt inverter system based on 3D-SVPWM modulation according to claim 7, wherein: In step 4, the difference in the zero-sequence voltage is adjusted by adjusting the action time of the zero vector. By setting the difference in the zero-sequence duty cycle to zero, the zero-sequence circulating current can be eliminated. An adjustment factor k is introduced in each switching cycle, thereby changing the zero-sequence duty cycle, and further making the zero-sequence voltage difference zero, achieving the effect of suppressing the zero-sequence circulating current; In the improved 3D-SVPWM modulation strategy, since the adjustment factor is added to the zero vector, the zero-sequence duty cycle becomes: d′ zx = d′ ax + d′ bx + d′ cx + d′ nx = d 1x + 2d 2x + 3d 3x + 2d 0x - 8k =-d 1x +d 3x +2 - 8k Formula 18; Then the difference in the zero-sequence duty cycle can be expressed as: Δd zx = d' z2 - d' z1 = d 11 -d 12 +d 32 -d 31 -8k Formula 19; By introducing a modulation variable k to modulate the zero-sequence duty ratio in each switching period to eliminate the difference in the zero-sequence duty ratio between the first inverter and the second inverter, where the action times of the two zero vectors V1 and V 16 become (T0 / 2 - 2kT S ) and (T0 / 2 + 2kT S ), respectively. Furthermore, the zero-sequence duty ratios d 0x become (d 0x / 2 - 2k) and (d 0x / 2 + 2k), respectively.

10. The method for suppressing circulating current of a three-phase four-wire shunt inverter system based on 3D-SVPWM modulation according to claim 9, characterized in that: In step 4, after changing the zero-sequence duty cycle, The expression of the zero-sequence circulating current changes to: For simplicity of calculation, let: Δ 12 = d 11 - d 12 + d 32 - d 31 Formula 21; Then the zero-sequence circulating current is simplified to: From the above formula, it can be seen that changing the value of the adjustment factor can adjust the difference in the zero-sequence duty ratio, and further change the value of the zero-sequence circulating current. That is, the zero-sequence circulating current in the system can be effectively suppressed by adding the adjustment factor.

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