Communication method and device, equipment and storage medium
By using the 16*32 base matrix in the LDPC code to determine the check matrix, and using the positional relationship of the base matrix elements, the problem of insufficient LDPC code decoding performance is solved, achieving higher data transmission reliability and reduced processing complexity.
Patent Information
- Application Number
- CN202410042932.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-01-10
- Publication Date
- 2025-07-11
AI Technical Summary
How to further improve the decoding performance of low-density parity check code (LDPC code) to improve the transmission reliability of wireless transmission systems.
By determining the check matrix based on the 16*32 base matrix, using the positional relationship of the first element in the base matrix, the processing complexity is reduced and encoding flexibility is improved. The specific method includes supporting the correlation of the base matrix with different code lengths, the element of the 17th column in the base matrix is set to zero or non-zero elements, and x is an integer greater than 1 and less than 16.
It improves the decoding performance of LDPC code, reduces the processing complexity of the system, and improves the data transmission reliability of the wireless transmission system.
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Figure CN120301560A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of communication technology, and in particular to a communication method, apparatus, device and storage medium. Background Art
[0002] The Institute of Electrical and Electronics Engineers (IEEE) 802.11n / ac / ax / be and other wireless local area network (WLAN) transmission standards mainly focus on improving user experience in large bandwidth (such as 60 GHz) scenarios, including improving average user throughput and energy efficiency of battery-powered devices. Large bandwidth scenarios need to support high-speed and reliable transmission of data, video and other services on limited frequency and power resources, so highly reliable and efficient channel coding solutions are required.
[0003] In the field of channel coding, concatenated codes (such as Turbo codes) and low-density parity-check (LDPC) codes are the two most mature and widely used channel coding methods, both of which have performance close to the Shannon limit. Compared with concatenated codes, LDPC codes have the following advantages: good bit error performance can be obtained without deep interleaving; better frame error rate performance; greatly reduced error floor; decoding is not based on grids; supports parallel decoding, and has a small decoding delay. Therefore, LDPC codes have become the standard channel coding scheme for low-frequency short-range WLAN communication systems such as IEEE 802.11n / ac / ax.
[0004] How to further improve the decoding performance of LDPC codes needs to be solved urgently. Summary of the invention
[0005] The embodiments of the present application provide a communication method, apparatus, device and storage medium to improve the decoding performance of LDPC codes and thereby improve the transmission reliability of wireless transmission systems.
[0006] In a first aspect, the present application provides a communication method. The execution subject of the method may be a first communication device, and the first communication device may include a Wi-Fi device, or a chip or functional module placed in the Wi-Fi device.
[0007] Exemplarily, the method includes: a first communication device determines a parity-check matrix corresponding to a target code length based on a 16*32 base matrix, and sends first information encoded based on the parity-check matrix. Among them, the first base matrix supporting the first code length is associated with the second base matrix supporting the second code length. For example, the position of the cyclic shift matrix represented by the first element of the first base matrix is the same as the position of the cyclic shift matrix represented by the first element of the second base matrix. For a communication device to determine the parity-check matrix, the processing complexity is reduced, and thus the data transmission reliability of the system is improved.
[0008] Further, in the embodiment of the present application, in the parity-check matrix determined based on the 16*32 base matrix, the first element in the 17th column is zero, and the xth element and the 16th element in the 17th column are the same non-zero element, where x is an integer greater than 1 and less than 16, which improves the flexibility of encoding.
[0009] In a second aspect, the present application provides a communication method. The execution subject of this method may be a second communication device, and the second communication device may include a Wi-Fi device, or a chip or functional module placed in the Wi-Fi device, etc.
[0010] Exemplarily, the method includes: a second communication device receives first information, the first information is encoded based on a parity-check matrix of a target code length, and determines the parity-check matrix based on a 16*32 base matrix. The base matrix includes a plurality of first elements, the first element corresponds to a cyclic shift matrix, the position of the first element in the first base matrix is the same as the position of the first element in the second base matrix, the first base matrix is used to determine the parity-check matrix corresponding to the first code length, the second base matrix is used to determine the parity-check matrix corresponding to the second code length, the target code length includes the first code length or the second code length, the first element in the 17th column of the base matrix is zero, and the xth element and the 16th element in the 17th column of the base matrix are the same non-zero element, where x is an integer greater than 1 and less than 16.
[0011] Combined with the first aspect or the second aspect, in a possible implementation manner, the base matrix can be expressed as:
[0012]
[0013] Wherein, a indicates that there is a z*z cyclic shift identity matrix at the corresponding element position, z is an expansion factor, and - indicates a all-zero matrix.
[0014] In the above two examples of the first element positions, the row weight and column weight of the base matrix are different. When the row weight and column weight are different, the decoding complexity is different. Therefore, in this implementation manner, the above two possible base matrices are proposed for different decoding complexities.
[0015] Combined with the first aspect or the second aspect, in a possible implementation, z is 10, and the base matrix can be expressed as:
[0016]
[0017] Or
[0018]
[0019] Combined with the first aspect or the second aspect, in a possible implementation, z is 20, and the base matrix can be expressed as:
[0020]
[0021] Or
[0022]
[0023] Combined with the first aspect or the second aspect, in a possible implementation, z is 40, and the base matrix can be expressed as:
[0024] Or
[0025]
[0026] Combined with the first aspect or the second aspect, in a possible implementation, z is 60, and the base matrix can be expressed as:
[0027] Combined with the first aspect or the second aspect, in a possible implementation, z is 80, and the base matrix can be expressed as:
[0028] Or
[0029]
[0030] In a third aspect, an embodiment of the present application provides a first communication device for performing the method in the first aspect or any possible implementation. The first communication device includes a module for performing the method in the first aspect or any possible implementation.
[0031] In a fourth aspect, an embodiment of the present application provides a second communication device for performing the method in the second aspect or any possible implementation. The second communication device includes a module for performing the method in the second aspect or any possible implementation.
[0032] Fifth aspect, an embodiment of the present application provides a first communication device, which includes a processor for executing the method shown in the above first aspect or any possible implementation. The processor is used to execute a program stored in a memory, and when the program is executed, the method shown in the above first aspect or any possible implementation is executed.
[0033] In a possible implementation, the memory is located outside the above first communication device.
[0034] In a possible implementation, the memory is located inside the above first communication device.
[0035] In an embodiment of the present application, the processor and the memory may also be integrated into one device, that is, the processor and the memory may also be integrated together. Exemplarily, the first communication device may be a chip.
[0036] In a possible implementation, the first communication device further includes a transceiver, which is used to receive information or send information.
[0037] Sixth aspect, an embodiment of the present application provides a second communication device, which includes a processor for executing the method shown in the above second aspect or any possible implementation. The processor is used to execute a program stored in a memory, and when the program is executed, the method shown in the above second aspect or any possible implementation is executed.
[0038] In a possible implementation, the memory is located outside the above second communication device.
[0039] In a possible implementation, the memory is located inside the above second communication device.
[0040] In an embodiment of the present application, the processor and the memory may also be integrated into one device, that is, the processor and the memory may also be integrated together. Exemplarily, the second communication device may be a chip.
[0041] In a possible implementation, the second communication device further includes a transceiver, which is used to receive information or send information.
[0042] Seventh aspect, an embodiment of the present application provides a first communication device, which includes a logic circuit and an interface, and the logic circuit and the interface are coupled; the interface is used for inputting and / or outputting information, and the logic circuit is used to execute the method described in the first aspect or any possible implementation.
[0043] In an eighth aspect, an embodiment of the present application provides a second communication device, which includes a logic circuit and an interface, and the logic circuit is coupled to the interface; the interface is used for inputting and / or outputting information, and the logic circuit is used to execute the method described in the second aspect or any possible implementation manner.
[0044] In a ninth aspect, an embodiment of the present application provides a computer-readable storage medium, which is used for storing a computer program. When it runs on a computer, the method described in any one of the above first aspect to second aspect or any possible implementation manner is executed.
[0045] In a tenth aspect, an embodiment of the present application provides a computer program product. When it runs on a computer, the method described in any one of the above first aspect to second aspect or any possible implementation manner is executed.
[0046] In an eleventh aspect, an embodiment of the present application provides a computer program. When the computer program runs on a computer, the method described in any one of the above first aspect to second aspect or any possible implementation manner is executed.
[0047] In a twelfth aspect, an embodiment of the present application provides a communication system, which includes a first communication device and / or a second communication device. The first communication device is used to execute the method described in the above first aspect or any possible implementation manner of the first aspect, and the second communication device is used to execute the method described in the above second aspect or any possible implementation manner of the second aspect.
[0048] For the content in the above second aspect to twelfth aspect and each possible implementation manner, the beneficial effects can refer to the beneficial effects brought by the above first aspect and each possible implementation manner of the first aspect, and will not be elaborated here. Description of the Drawings
[0049] Figure 1a is a schematic diagram of a matrix prototype of a reference check matrix provided by an embodiment of the present application;
[0050] Figure 1b is a schematic diagram of a CPM provided by an embodiment of the present application;
[0051] Figure 2a is a schematic diagram of the architecture of a communication system provided by an embodiment of the present application;
[0052] Figure 2b is a schematic diagram of the architecture of a communication system provided by an embodiment of the present application;
[0053] Figure 2c is a schematic diagram of the architecture of a communication system provided by an embodiment of the present application;
[0054] Figure 3 Schematic diagram of the interaction process of a communication method provided by an embodiment of the present application;
[0055] Figure 4 Partial schematic diagram of a shortening operation in LDPC coding provided by an embodiment of the present application;
[0056] Figure 5a Schematic diagram of the position of the base matrix elements provided by an embodiment of the present application;
[0057] Figure 5b Another schematic diagram of the position of the base matrix elements provided by an embodiment of the present application;
[0058] Figure 6a Schematic diagram of a parity-check matrix provided by an embodiment of the present application;
[0059] Figure 6b Schematic diagram of a factor graph provided by an embodiment of the present application;
[0060] Figure 7a Schematic diagram of a decoding performance provided by an embodiment of the present application;
[0061] Figure 7b Schematic diagram of a decoding performance provided by an embodiment of the present application;
[0062] Figure 7c Schematic diagram of a decoding performance provided by an embodiment of the present application;
[0063] Figure 7d Schematic diagram of a decoding performance provided by an embodiment of the present application;
[0064] Figure 8a Schematic diagram of a decoding performance provided by an embodiment of the present application;
[0065] Figure 8b Schematic diagram of a decoding performance provided by an embodiment of the present application;
[0066] Figure 8c Schematic diagram of a decoding performance provided by an embodiment of the present application;
[0067] Figure 9a Schematic diagram of the performance comparison of a parity-check matrix provided by an embodiment of the present application;
[0068] Figure 9b Schematic diagram of the performance comparison of a parity-check matrix provided by an embodiment of the present application;
[0069] Figure 9c Schematic diagram of the performance comparison of a parity-check matrix provided by an embodiment of the present application;
[0070] Figure 9d It is a schematic diagram for comparing the performance of a parity-check matrix provided by an embodiment of the present application;
[0071] Figure 10 It is a schematic structural diagram of a communication device provided by an embodiment of the present application;
[0072] Figure 11 It is a schematic structural diagram of a communication device provided by an embodiment of the present application;
[0073] Figure 12 It is a schematic structural diagram of a communication device provided by an embodiment of the present application. Detailed implementation manners
[0074] To facilitate the understanding of the technical solution of the present application, the present application will be further described below with reference to the accompanying drawings.
[0075] Terms such as "first" and "second" in the specification, claims and drawings of the present application are only used to distinguish different objects, rather than to describe a specific order. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device, etc. that includes a series of steps or units is not limited to the listed steps or units, but optionally further includes steps or units not listed, or optionally further includes other steps or units inherent to these processes, methods, products or devices, etc.
[0076] The mention of "embodiment" in this article means that the specific features, structures or characteristics described in connection with the embodiment can be included in at least one embodiment of the present application. The appearance of this phrase in various positions in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art can explicitly and implicitly understand that the embodiments described herein can be combined with other embodiments.
[0077] In this application, "at least one (item)" means one or more, "multiple" means two or more, "at least two (items)" means two, three or more, and "and / or" is used to describe the relationship between associated objects, indicating that there can be three relationships. For example, "A and / or B" can mean: only A exists, only B exists, and both A and B exist at the same time. Here, A and B can be singular or plural. "Or" means that there can be two relationships, such as only A exists and only B exists; when A and B are not mutually exclusive, it can also mean three relationships, such as only A exists, only B exists, and both A and B exist at the same time. The character " / " generally means that the objects before and after are in an "or" relationship. "At least one (one) of the following" or its similar expression means any combination of these items. For example, at least one (one) of a, b, or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c".
[0078] The LDPC code adopted in the IEEE802.11ac / ax standard is a quasi-cyclic (QC) LDPC (QC-LDPC) code. The QC-LDPC code is a type of widely used structured LDPC code. Due to the unique structure of its parity-check matrix, it can be implemented using a simple feedback shift register during encoding, and can better solve the encoding complexity problem of LDPC codes.
[0079] Currently, a total of 12 LDPC code parity-check matrices are adopted in the standard. Among them, there are three types of code lengths N: N = 648, or N = 1296, or N = 1944. Each code length can support 4 different coding rates: 1 / 2, 2 / 3, 3 / 4, 5 / 6. The matrix prototypes of the parity-check matrices under each code length and coding rate are different. Among the matrix prototypes of the 12 parity-check matrices with different code lengths and coding rates, the parity-check bit part (the matrix corresponding to the parity-check bits shown below, or the parity-check square matrix) has the same structure. Exemplarily, the selection of the coding rate can be determined by the modulation and coding scheme (MCS) adaptively selected by the current transmission system according to the link. Thus, the communication device in the traditional WLAN can select a parity-check matrix from the 12 parity-check matrices according to the given code length and coding rate. The above-mentioned same structure can be understood as Figure 1a the element in the first row and first column of the parity-check bit part in the matrix prototypes of different parity-check matrices is 1, and the element in the last row and first column is 1.
[0080] Figure 1a Shows the matrix prototype of the LDPC code parity-check matrix with code length N = 1944 and different coding rates. Figure 1a The "-" in it represents the all-zero matrix of Z*Z, Figure 1aThe "0" in it represents the identity matrix of Z*Z. Figure 1a The non-zero elements in it represent the circulant permutation matrix (CPM) of the identity matrix of Z*Z. For example, if the CPM is represented by P i i represents the cyclic shift value, or the number of bits by which the identity matrix is cyclically shifted to the right, or the CPM coefficient, or the elements greater than or equal to 0 in the matrix prototype of the parity-check matrix, etc. The specific name of i is not limited in the embodiments of this application. i is a non-negative integer, such as 0≤i≤Z-1. When i = 0, the CPM can be understood as an identity matrix of Z*Z, or a CPM with a cyclic shift value of 0. Exemplarily, Z = N / 24. The aforementioned "24" can be the same as the number of columns of the matrix prototype of the parity-check matrix in the IEEE 802.11ac / ax standard. For IEEE 801.11ac / ax, regardless of whether the code length N = 648, or N = 1296, or N = 1944, the number of columns of the matrix prototype of the parity-check matrix is 24 columns.
[0081] Exemplarily, taking Figure 1a the element "1" (i.e., i = 1) in it as an example, this element 1 can be expanded into a CPM of 81*81 (1944 / 24 = 81). This CPM can be obtained by cyclically shifting the identity matrix to the right by 1 bit, as shown below:
[0082]
[0083] Exemplarily, taking a 4*4 CPM as an example, Figure 1b it shows the CPM when i = 0, the CPM when i = 1, the CPM when i = 2, and the CPM when i = 3 respectively. Figure 1b The CPM shown is only an example. The CPMs of other identity matrices of Z*Z in the embodiments of this application can be obtained with reference to the principle shown in Figure 1a or as shown in 1b to obtain the final P i , which will not be elaborated here.
[0084] As described above, in order to improve the transmission reliability of wireless transmission systems, LDPC codes have been widely used in the WLAN standard. The new IEEE802.15ab standard can introduce new LDPC coding techniques compared to the IEEE802.15.az standard to further enhance the data transmission reliability of the system. For example, in a UWB system, there may be transmissions of short, medium, and long packets simultaneously, such as 20, 100, and 1500 bytes. If the LDPC codes of IEEE802.11n are reused in the UWB system, three different LDPC parity-check matrices need to be introduced for a certain code rate (such as the 1 / 2 code rate) to implement LDPC codes of three code lengths (such as 648, 1296, and 1944 bits). However, implementing three parity-check matrices simultaneously will result in a relatively high complexity of the system channel coding module, which cannot meet the high requirements of the LDPC channel coding in the next-generation UWB transmission for low power consumption, low latency, and low implementation complexity of the encoder and decoder.
[0085] In view of this, the embodiments of the present application provide a new LDCP code that can support different code lengths. In the embodiments of the present application, the first base matrix supporting the first code length is associated with the second base matrix supporting the second code length. For example, the positions of the cyclic shift matrices represented by the "0" or non-zero elements in the first base matrix are the same as those in the second base matrix. This reduces the processing complexity for a communication device to determine the parity-check matrix, thereby enhancing the data transmission reliability of the system.
[0086] Furthermore, in the embodiments of the present application, in the parity-check matrix determined based on the 16*32 base matrix, the first element in the 17th column is zero, and the xth element and the 16th element in the 17th column are the same non-zero element, where x is an integer greater than 1 and less than 16, which improves the coding flexibility.
[0087] In the embodiments of the present application, each of the matrices shown below may be referred to as a prototype of a parity-check matrix, or a matrix prototype of a parity-check matrix (matrix prototypes of the parity-matrices), or a matrix prototype for a codeword block length N (matrix prototypes for codeword block length N), or a mother matrix, or a base matrix, etc. The specific names of the matrices involved in the embodiments of the present application are not limited in the embodiments of the present application. Generally speaking, a matrix including elements 0 and 1 expanded based on Z and a cyclic shift value i is called a parity-check matrix. Therefore, each of the matrices shown below may also be referred to as a matrix before CPM expansion, etc. Each of the matrices shown in the following Example 1 or Example 2 may be referred to as a base matrix of a parity-check matrix, and a matrix expanded based on the elements in each of the matrices shown in Example 1 or Example 2 may be referred to as a parity-check matrix. For the specific method of expansion, reference may be made to the relevant description regarding Figure 1a and for the specific content of the expanded parity-check matrix, the embodiments of the present application will not list them one by one.
[0088] The code length in the embodiments of the present application may also be referred to as a codeword block length (a codeword block length), etc. The specific names of the code length are not limited in the embodiments of the present application. Z in the embodiments of the present application may be referred to as a subblock size or an expansion factor or a lift factor (lift factor), etc. The specific names of Z are not limited in the embodiments of the present application. For ease of description, in the following, an example will be given with Z being referred to as the expansion factor.
[0089] Generally speaking, Z = N / 24. However, with the progress of the standard, the subsequent method for calculating Z may also change, and the embodiments of the present application do not limit this. For ease of understanding, therefore, in the embodiments of the present application, different letter parameters are used to represent different meanings. For example, N represents the code length, Z represents the expansion factor, R represents the code rate, K represents the number of information bits, E represents the number of parity bits, etc. However, each of the letter parameters shown in the embodiments of the present application is only an example and should not be construed as a limitation on the embodiments of the present application.
[0090] The following introduces the communication system involved in the embodiments of the present application.
[0091] The technical solutions provided by the embodiments of this application can be applied to wireless local area network (WLAN) systems, such as Wi-Fi. For example, the methods provided by the embodiments of this application can be applicable to the Institute of Electrical and Electronics Engineers (IEEE) 802.11 series of protocols, such as the 802.11be protocol, the 802.11bn protocol, or the next-generation protocol of the 802.11bn protocol, etc., which will not be listed one by one. The technical solutions provided by the embodiments of this application can also be applied to wireless personal area networks (WPANs) based on millimeter wave (MMW) and ultra-wideband (UWB) technologies. For example, the methods provided by the embodiments of this application can be applicable to the IEEE 802.15 series of protocols, such as the 802.15.4a protocol, the 802.15.4z protocol, or the 802.15.4ab protocol, or a future generation of UWB WPAN protocols, etc., which will not be listed one by one. The technical solutions provided by the embodiments of this application can also be applied to the following communication systems. For example, it can be an Internet of Things (IoT) system, vehicle-to-everything (V2X, where X can represent anything), device-to-device (D2D), narrow band Internet of Things (NB-IoT) system, Long-Term Evolution (LTE) system, fifth-generation (5G) communication system, and new communication systems emerging in future communication development, etc. For example, the V2X can include vehicle-to-vehicle (V2V), vehicle-to-infrastructure (V2I), vehicle-to-pedestrian (V2P), or vehicle-to-network (V2N) communication, etc.
[0092] The WLAN system can provide high-speed and low-latency transmission. With the continuous evolution of WLAN application scenarios, the WLAN system will be applied to more scenarios or industries. For example, it will be applied to the Internet of Things industry, the vehicle-to-everything industry, the banking industry, enterprise offices, stadiums, exhibition halls, concert halls, hotel rooms, dormitories, wards, classrooms, shopping malls, squares, streets, production workshops, and warehouses, etc. Of course, the devices that support WLAN communication or sensing (such as access points or stations) can be sensor nodes in a smart city (such as smart water meters, smart electricity meters, smart air detection nodes), smart devices in a smart home (such as smart cameras, projectors, displays, televisions, speakers, refrigerators, washing machines, etc.), nodes in the Internet of Things, entertainment terminals (such as wearable devices like augmented reality (AR), virtual reality (VR), etc.), smart devices in smart offices (such as printers, projectors, loudspeakers, speakers, etc.), vehicle-to-everything devices in the vehicle-to-everything network, infrastructure in daily life scenarios (such as vending machines, self-guided navigation desks in shopping malls, self-checkout devices, self-ordering machines, etc.), and devices in large sports and music venues, etc.
[0093] The UWB technology has the advantages of low system complexity, low transmitted signal power spectral density, being insensitive to channel fading, low interceptability, and high positioning accuracy, and is particularly suitable for high-speed wireless access in dense multipath scenarios such as indoors. The method provided in this application can be implemented by a communication device in a wireless communication system. The communication device can be a device involved in the UWB system. For example, the communication device can include, but is not limited to, a communication server, a router, a switch, a bridge, a computer, a mobile phone, etc. that support the UWB technology. For another example, the communication device can include a user equipment (UE), and the user equipment can include various handheld devices, vehicle-mounted devices (such as cars or components installed on cars, etc.), wearable devices, Internet of Things (IoT) devices, computing devices, or other processing devices connected to a wireless modem, etc., which will not be listed one by one here. For another example, the communication device can include a central control point, such as a personal area network (PAN) or a PAN coordinator, etc. The PAN coordinator or PAN can be a mobile phone, a vehicle-mounted device, an anchor, a tag, or a smart home, etc. For another example, the communication device can include a chip, and the chip can be set in a communication server, a router, a switch, or a terminal device, etc., which will not be listed one by one here.
[0094] In a possible implementation, the method provided by the embodiments of the present application can be implemented by a communication device in a communication system. For example, the communication device can be an access point (AP) or a station (STA).
[0095] An AP is a device with wireless communication capabilities, supporting communication or sensing using the WLAN protocol, and having the function of communicating or sensing with other devices in the WLAN network (such as non-access point stations (non-AP STAs) or other access points). Of course, it can also have the function of communicating or sensing with other devices. Alternatively, the access point is equivalent to a bridge connecting a wired network and a wireless network, and its main role is to connect various wireless network clients together and then connect the wireless network to the Ethernet. In a WLAN system, the access point can be referred to as an access point station (AP STA). The device with wireless communication capabilities can be a whole-device, or can also be a chip, a processing system, or a functional module installed in the whole-device. The device installed with these chips or processing systems or functional modules can, under the control of the chip or processing system or functional module, implement the methods and functions of the embodiments of the present application. The AP in the embodiments of the present application is a device that provides services for non-AP STAs and can support 802.11 series protocols or subsequent protocols, etc. For example, the access point can be an access point for a terminal (such as a mobile phone) to enter a wired (or wireless) network, mainly deployed in homes, buildings, and campuses, with a typical coverage radius of dozens of meters to hundreds of meters. Of course, it can also be deployed outdoors. Another example is that the AP can be a communication entity such as a communication server, a router, a switch, or a bridge; the AP can include various forms of macro base stations, micro base stations, relay stations, etc. Of course, the AP can also be a chip, a processing system, or a module in the above various forms of devices to implement the methods and functions of the embodiments of the present application.
[0096] STA is a device with wireless communication capabilities, supporting communication or sensing using the WLAN protocol, and having the ability to communicate or sense with other non-AP STAs or access points in the WLAN network. In a WLAN system, a station can be referred to as a non-access point station (non-AP STA). For example, STA is any user communication device that allows a user to communicate or sense with an AP and then communicate with the WLAN. This device with wireless communication capabilities can be a complete device, or it can be a chip, processing system, or functional module installed in a complete device. The device installed with these chips, processing systems, or functional modules can, under the control of the chip, processing system, or functional module, implement the methods and functions of the embodiments of the present application. For example, STA can be a wireless communication chip, wireless sensor, or wireless communication terminal, etc., and can also be referred to as a user. For another example, STA can be a mobile phone supporting Wi-Fi communication function, a tablet computer supporting Wi-Fi communication function, a set-top box supporting Wi-Fi communication function, a smart TV supporting Wi-Fi communication function, a smart wearable device supporting Wi-Fi communication function, a vehicle-mounted communication device supporting Wi-Fi communication function, and a computer supporting Wi-Fi communication function, etc. Of course, STA can also be a chip, processing system, or module in the above various forms of devices to implement the methods and functions of the embodiments of the present application.
[0097] Exemplarily, the communication system to which the method provided by the embodiments of the present application can be applied can include an access point and a station. For example, the embodiments of the present application can be applicable to scenarios of communication or sensing between an AP and an STA, between an AP and an AP, or between an STA and an STA in a WLAN. The embodiments of the present application do not limit this. Optionally, an AP can communicate or sense with a single STA, or, an AP can communicate or sense with multiple STAs simultaneously. Specifically, the communication or sensing between an AP and multiple STAs can be further divided into a downlink transmission where the AP sends signals to multiple STAs simultaneously, and an uplink transmission where multiple STAs send signals to the AP. Among them, between an AP and an STA, between an AP and an AP, and between an STA and an STA, the WLAN communication protocol can be supported. This communication protocol can include protocols of the IEEE 802.11 series. For example, it can be applicable to the 802.11bn protocol, and of course, it is also applicable to protocols after 802.11bn.
[0098] Figure 2a It is a schematic diagram of the architecture of a communication system provided by the embodiments of the present application. This communication system can include one or more APs and one or more STAs. Figure 2aTwo access points, such as AP1 and AP2, and three stations, such as STA1, STA2, and STA3, are shown. As an example, the method provided by the embodiments of the present application can be applicable to data communication or sensing between one AP and one or more STAs, such as Figure 2a the communication between AP1 and STA1 as shown, and also such as Figure 2b the communication between the AP and the STA as shown, and also such as Figure 2a the communication between AP1 and STA1, STA2 as shown, and also such as Figure 2c the communication between the AP and STA1, STA2, STA3 as shown. As another example, the method provided by the embodiments of the present application can be applicable to the communication between APs, such as Figure 2a the communication between AP1 and AP2 as shown. As yet another example, the method provided by the embodiments of the present application can be applicable to the communication between STAs, such as Figure 2a the communication between STA2 and STA3 as shown.
[0099] Figures 2a to 2c Taking the STA as a mobile phone and the AP as a router as an example does not mean to limit the types of APs and STAs in the embodiments of the present application. At the same time, Figures 2a to 2c the number of APs and STAs shown is only an example. In specific implementations, the number of such APs or STAs can be more or less, and the embodiments of the present application do not make any limitations in this regard.
[0100] From the different perspectives of the transmitted signal and the received signal, the first communication device shown below can be understood as the communication device that transmits the signal, and the second communication device can be understood as the communication device that receives the signal. Alternatively, the first communication device can also be referred to as the transmitter, and the second communication device can also be referred to as the receiver. In the embodiments of the present application, the signal can be a signal obtained by processing the encoded sequence. From the perspective of different devices, as an example, the first communication device and the second communication device can be Wi-Fi chips or functional modules or processing systems, etc., provided in different Wi-Fi devices. As another example, the first communication device can be an AP, and the second communication device can be a non-AP STA. As yet another example, both the first communication device and the second communication device can be non-AP STAs or both can be APs. As yet another example, the first communication device can be a non-AP STA, and the second communication device can be an AP. As yet another example, at least one of the first communication device and the second communication device can be a multi-link device (MLD), etc., and the embodiments of the present application will not list them one by one. Exemplarily, a multi-link device (MLD) refers to a device that simultaneously has multiple stations (such as an AP or a non-AP STA), each working on a different frequency band or channel. A multi-link device includes multiple subordinate stations, and the subordinate stations can be physical stations or logical stations. Each station can work on a link or a frequency band or a channel, etc. The above-mentioned subordinate stations can be APs or non-AP STAs. A multi-link device (such as a non-AP MLD or an AP MLD) can be a communication device with wireless communication functions. The communication device can be a complete device, or can also be a chip or a processing system or a module installed in the complete device. The device installed with these chips or processing systems or modules can, under the control of these chips or processing systems or modules, implement the methods and functions of the embodiments of the present application. A multi-link device can follow the 802.11 series of protocols to implement wireless communication, so as to achieve communication with other devices. The other devices shown here can be multi-link devices or can also not be multi-link devices. The frequency bands on which the multi-link device works can include but are not limited to: sub 1GHz, 2.4GHz, 5GHz, 6GHz, etc., and will not be listed one by one here.
[0101] The embodiments of the present application describe the methods provided in the embodiments of the present application from both sides of the first communication device and the second communication device. However, during the process of transmitting the signal between the first communication device and the second communication device, the signal can also be forwarded by other devices, such as by a forwarding device to forward the signal between the first communication device and the second communication device. The embodiments of the present application do not limit other devices other than the first communication device and the second communication device.
[0102] The communication method provided by the embodiments of the present application will be described below with reference to the accompanying drawings.
[0103] Figure 3 It is a schematic diagram of the interaction process of a communication method provided by the embodiments of the present application. Combining Figure 3 , the method 300 includes at least some of the steps from S310 to S340 as follows:
[0104] S310, the first communication device obtains an information bit sequence.
[0105] The information bit sequence may be a bit sequence containing information volume. For example, the length of the information bit sequence is N2, or the number of bits of the information bit sequence is N2. N2 is a positive integer. Among the N2 bits, there may be K information bits or K data bits or K payload bits. K is a positive integer. N2 may be an integer greater than or equal to K. For example, when N2 is greater than K, the information bit sequence may further include (N2 - K) 0s. The relevant description of the "0" shown here can refer to the description of the shortening operation below, which will not be elaborated here. Figure 4 in the description of the shortening operation below, which will not be elaborated here.
[0106] The value of the aforementioned N2 may be related to the code length and code rate. If the length of the encoded sequence in step 302 below is N1, then N2 = N1 * R, where R is the encoding code rate of the information bit sequence. The N1 shown here may also be referred to as the code length corresponding to the parity-check matrix.
[0107] In a possible implementation, Figure 3 the method shown may further include:
[0108] The first communication device obtains the code length N1. Optionally, the code length N1 may be 320, 640, 1280, 1920, 2560 bits, etc.
[0109] In a possible implementation, Figure 3 the method shown may further include:
[0110] The first communication device obtains the code rate R.
[0111] In a WLAN system, different code lengths and code rates may correspond to different check matrices. Therefore, before the first communication device performs LDPC encoding, the code rate R may also be obtained. After obtaining the code rate R, the first communication device may select a check matrix based on the code rate R and the code length N1. The code rate R may be determined based on the MCS selected by link adaptiveness. For example, the code rate R may be determined based on the current channel information. The specific method for determining the code rate R is not limited in the embodiments of the present application. As an example, the MCS may be issued by the AP. As another example, the MCS may be determined by the first communication device, etc. For example, the first communication device sends the MCS to the second communication device, the second communication device receives the MCS, and obtains the code rate R based on the MCS. For another example, the second communication device sends the MCS to the first communication device, the first communication device receives the MCS, and obtains the code rate R based on the MCS. The specific interaction process of the MCS is not limited in the embodiments of the present application.
[0112] Exemplarily, the code rate R may be preset, such as agreed upon by a protocol or stored in the first communication device; or the code rate R may be preconfigured, such as issued by an AP; or the code rate R may be a basic code rate. For example, in a UWB system, the basic code rate is 1 / 2, and other code rates may be obtained by shortening or puncturing.
[0113] Exemplarily, R can be any of the following: 1 / 2, 2 / 3, 3 / 4, 5 / 6. Of course, with the development of standards, the value of R can also have other values, which is not limited in the embodiments of the present application.
[0114] S320, the first communication device performs LDPC encoding on the information bit sequence based on the check matrix to obtain first information.
[0115] Among them, the check matrix is determined based on a 16*32 base matrix. The base matrix includes multiple first elements, and the first elements correspond to the cyclic shift matrix of z*z, that is, the elements in the base matrix whose element values are zero or non-zero. The base matrix also includes multiple second elements, and the second elements do not correspond to the cyclic shift matrix, or the second elements represent the full zero matrix of z*z, where z is a positive integer. This application does not limit the expression of the second element. For example, the second element can be expressed by "-", "0" or other symbols or numerical values. Since the second element represents the full zero matrix of z*z, the second elements at different positions in the base matrix can have the same expression, for example, each second element in the base matrix can be expressed as "-".
[0116] As mentioned above, even if the code rates are the same, the base matrices corresponding to the parity check matrices of different code lengths are different, including the positions and values of the first elements in the base matrices. In the embodiments of the present application, when the base matrix is used to determine the parity check matrix corresponding to different code lengths, the position of the first element in the base matrix remains unchanged. For example, the first base matrix is used to determine the parity check matrix of the first code length, and the second base matrix is used to determine the parity check matrix of the second code length. The element positions of the first elements in the first base matrix and the second base matrix are the same. For example, the positions of the first elements in the first base matrix and the second base matrix can refer to the following Example 1, or for another example, the positions of the first elements in the first base matrix and the second base matrix can refer to the following Example 2. The dimensions z of the cyclic shift matrices corresponding to the first elements at the same positions in the first base matrix and the second base matrix are different. Or rather, the first base matrix is extended based on the z1*z1 cyclic shift matrix to obtain the parity check matrix of the first code length, and the second base matrix is extended based on the z2*z2 cyclic shift matrix to obtain the parity check matrix of the second code length, where z1 and z2 are unequal positive integers. Optionally, the values of the first elements at the same positions in the first base matrix and the second base matrix can be different or the same. For example, the first code length can be 320 bits in the following text, and the second code length can be 640 bits in the following text.
[0117] Exemplarily, in order to improve the coding flexibility, in the embodiments of the present application, the first element in the 17th column of the base matrix is zero, and the xth element and the 16th element in the 17th column of the base matrix are the same non-zero element, where x is an integer greater than 1 and less than 16.
[0118] The following uses two examples to illustrate the positions of the first element and the second element in the base matrix. Among them, a indicates that there is a z*z cyclic shift identity matrix at the corresponding element position, that is, a indicates the position of the first element in the base matrix. Here, a should not be understood as the value of the element. The values of the first elements represented by a can be the same or different; "-" indicates a all-zero matrix, that is, "-" represents the second element, and "-" can be replaced by "-1" or other representation forms.
[0119] Example 1
[0120]
[0121] Example 2
[0122]
[0123] For the base matrices of the parity check matrices shown in the above Example 1 and Example 2, the corresponding R can be equal to 1 / 2. At the same time, the R corresponding to the parity check matrix is also equal to 1 / 2.
[0124] Among them, the first X columns of the base matrix correspond to information bits, so it can be called the square matrix corresponding to the information bits, or the information square matrix. X = 32 * R. When R is equal to 1 / 2, the X columns are the left 16 * 16 part of the base matrix; the last Y columns of the base matrix correspond to parity bits, so it can be called the square matrix corresponding to the parity bits, or the parity square matrix. Y = 32 * (1 - R). When R is equal to 1 / 2, the Y columns are the right 16 * 16 part of the base matrix.
[0125] In the above Example 1 and Example 2, the row weight of at least one row of the base matrix is different, and the column weight of at least one column is different. Among them, the row weight refers to the number of elements corresponding to the non-all-zero matrix in the row of the base matrix, and the column weight refers to the number of elements corresponding to the non-weight-zero matrix in the column of the base matrix. When the base matrix has different row weights and / or different column weights, the decoding complexity is different. Among them, the decoding complexity can be related to the average variable node degree η, so the decoding complexity can be represented by η. η in Example 1 is smaller than that in Example 2. Optionally, η corresponding to Example 1 is 3.1, and η corresponding to Example 2 is 3.47.
[0126] The position of the first element in the base matrix in the above Example 1 can also be referred to Figure 5a in the first column of: the mother matrix. Among them, "0, 3, 7, 11, 15, 16, 17" means that the elements in the 0th, 3rd, 7th, 11th, 15th, 16th, and 17th columns of the 0th row of the mother matrix are the first element, and "0, 3, 6, 11, 16, 17, 18" means that the elements in the 0th, 3rd, 6th, 11th, 16th, 17th, and 18th columns of the 1st row of the mother matrix are the first element...
[0127] The position of the first element in the base matrix in the above Example 2 can also be referred to Figure 5b in the first column of: the mother matrix. Among them, "0, 3, 4, 9, 15, 16, 17" means that the elements in the 0th, 3rd, 4th, 9th, 15th, 16th, and 17th columns of the 0th row of the mother matrix are the first element, and "1, 2, 4, 8, 16, 17, 18" means that the elements in the 1st, 2nd, 4th, 8th, 16th, 17th, and 18th columns of the 1st row of the mother matrix are the first element...
[0128] In the above Example 1, in order to expand to obtain the parity-check matrices corresponding to different code lengths, the value of the expansion factor z is different, and the cyclic shift value (that is, the value of the first element) in the base matrix also has differences. Below, taking the expansion factors z = 10, z = 20, z = 40, z = 60, and z = 80 as examples respectively, the base matrix is exemplarily described.
[0129] In Implementation 1 of the above Example 1, when the expansion factor z is 10, the base matrix can be expanded into a parity-check matrix corresponding to N1 = 320 bits through the expansion factor. Exemplarily, the base matrix can be expressed as:
[0130]
[0131] In Implementation 1 of the above Example 1, the base matrix can also be referred to Figure 5a for the representation method of the 6th column (N1 = 320, z = 10). Among them, "3, 8, 9, 0, 5, 0, 0" indicates that the values of the first elements in the 0th row of the mother matrix are 3, 8, 9, 0, 5, 0, 0 in sequence; "4, 1, 5, 8, 2, 0, 0" indicates that the values of the first elements in the 1st row of the mother matrix are 4, 1, 5, 8, 2, 0, 0 in sequence...
[0132] Any first element in the above Implementation 1, such as element i (i is the value corresponding to the element), can be expanded into a CPM, and this CPM is obtained by circularly shifting the identity matrix to the right by i bits. For example, element 0 in Implementation 1 can be expanded into a 10*10 identity matrix, and for an element i greater than 0 (such as i > 0), a 10*10 CPM can be obtained based on circularly shifting the identity matrix to the right by i bits. The base matrix shown in Implementation 1 includes 16 rows and 32 columns. Thus, the parity-check matrix expanded based on the expansion factor z can include 16*10 rows and 32*10 columns. The relevant description about the expansion factor z here also applies to other implementations of Example 1 below, with the only difference being the value of z, which will not be elaborated again for the sake of brevity.
[0133] In Implementation 2 of the above Example 1, when the expansion factor z is 20, the base matrix can be expanded into a parity-check matrix corresponding to N1 = 640 bits through the expansion factor. Exemplarily, the base matrix can be expressed as:
[0134]
[0135] In Implementation 2 of the above Example 1, the base matrix can also be referred to Figure 5a for the representation method of the 5th column (N1 = 640, z = 20). Among them, "17, 8, 15, 17, 11, 0, 0" indicates that the values of the first elements in the 0th row of the mother matrix are 17, 8, 15, 17, 11, 0, 0 in sequence; "5, 11, 14, 10, 14, 0, 0" indicates that the values of the first elements in the 1st row of the mother matrix are 5, 11, 14, 10, 14, 0, 0 in sequence...
[0136] In Implementation 3 of the above Example 1, when the expansion factor z is 40, the base matrix can be expanded into a parity-check matrix corresponding to N1 = 1280 bits through the expansion factor. Exemplarily, the base matrix can be expressed as:
[0137]
[0138] In implementation method 3 of the above Example 1, the base matrix can also refer to Figure 5a the representation method of the 4th column (N1 = 1280, z = 40) in []. Among them, "27, 13, 33, 33, 0, 0, 0" indicates that the values of the first elements in the 0th row of the mother matrix are 27, 13, 33, 33, 0, 0, 0 in sequence; "26, 4, 7, 36, 27, 0, 0" indicates that the values of the first elements in the 1st row of the mother matrix are 26, 4, 7, 36, 27, 0, 0 in sequence...
[0139] In implementation method 4 of the above Example 1, when the expansion factor z is 60, through the expansion factor, the base matrix can be expanded into a parity-check matrix corresponding to N1 of 1920 bits. Exemplarily, the base matrix can be expressed as:
[0140]
[0141] In implementation method 4 of the above Example 1, the base matrix can also refer to Figure 5a the representation method of the 3rd column (N1 = 1920, z = 60) in []. Among them, "3, 43, 17, 49, 54, 0, 0" indicates that the values of the first elements in the 0th row of the mother matrix are 3, 43, 17, 49, 54, 0, 0 in sequence; "10, 39, 19, 32, 22, 0, 0" indicates that the values of the first elements in the 1st row of the mother matrix are 10, 39, 19, 32, 22, 0, 0 in sequence...
[0142] In implementation method 5 of the above Example 1, when the expansion factor z is 80, through the expansion factor, the base matrix can be expanded into a parity-check matrix corresponding to N1 of 2560 bits. Exemplarily, the base matrix can be expressed as:
[0143]
[0144] In implementation method 5 of the above Example 1, the base matrix can also refer to Figure 5a the representation method of the 2nd column (N1 = 2560, z = 80) in []. Among them, "56, 16, 36, 45, 17, 0, 0" indicates that the values of the first elements in the 0th row of the mother matrix are 56, 16, 36, 45, 17, 0, 0 in sequence; "75, 70, 54, 14, 15, 0, 0" indicates that the values of the first elements in the 1st row of the mother matrix are 75, 70, 54, 14, 15, 0, 0 in sequence...
[0145] Similar to the above Example 1, in Example 2, when the value of the expansion factor z is different, there are also differences in the cyclic shift values (i.e., the values of the first elements) in the base matrix. Below, taking the expansion factors z = 10, z = 20, z = 40, z = 60, and z = 80 as examples respectively, the base matrix will be exemplarily described.
[0146] In Implementation 1 of the above Example 2, when the expansion factor z is 10, through the expansion factor, the base matrix can be expanded into a parity-check matrix corresponding to N1 of 320 bits. Exemplarily, the base matrix can be expressed as:
[0147]
[0148] In Implementation 1 of the above Example 2, the base matrix can also refer to Figure 5b the representation method of column 6 (N1 = 320, z = 10) in. Among them, "2, 7, 6, 4, 6, 0, 0" indicates that the values of the first elements in the 0th row of the mother matrix are 2, 7, 6, 4, 6, 0, 0 in sequence; "5, 3, 7, 8, 2, 0, 0" indicates that the values of the first elements in the 1st row of the mother matrix are 5, 3, 7, 8, 2, 0, 0 in sequence...
[0149] In Implementation 2 of the above Example 2, when the expansion factor z is 20, through the expansion factor, the base matrix can be expanded into a parity-check matrix corresponding to N1 of 640 bits. Exemplarily, the base matrix can be expressed as:
[0150]
[0151] In Implementation 2 of the above Example 2, the base matrix can also refer to Figure 5b the representation method of column 5 (N1 = 640, z = 20) in. Among them, "5, 15, 4, 15, 10, 0, 0" indicates that the values of the first elements in the 0th row of the mother matrix are 5, 15, 4, 15, 10, 0, 0 in sequence; "5, 13, 9, 19, 2, 0, 0" indicates that the values of the first elements in the 1st row of the mother matrix are 5, 13, 9, 19, 2, 0, 0 in sequence...
[0152] In Implementation 3 of the above Example 2, when the expansion factor z is 40, through the expansion factor, the base matrix can be expanded into a parity-check matrix corresponding to N1 of 1280 bits. Exemplarily, the base matrix can be expressed as:
[0153]
[0154] In Implementation 3 of the above Example 2, the base matrix can also refer to Figure 5bThe representation of the 4th column (N1 = 1280, z = 40) in []. Among them, "22, 6, 17, 29, 2, 0, 0" indicates that the values of the first elements in the 0th row of the mother matrix are 22, 6, 17, 29, 2, 0, 0 in sequence; "27, 34, 2, 7, 13, 0, 0" indicates that the values of the first elements in the 1st row of the mother matrix are 27, 34, 2, 7, 13, 0, 0 in sequence...
[0155] In the implementation method 4 of the above Example 2, when the expansion factor z is 60, through the expansion factor, the base matrix can be expanded into a parity-check matrix corresponding to N1 of 1920 bits. Exemplarily, the base matrix can be expressed as:
[0156]
[0157] In the implementation method 4 of the above Example 2, the base matrix can also be referred to Figure 5b The representation of the 3rd column (N1 = 1920, z = 60) in []. Among them, "35, 34, 28, 0, 15, 0, 0" indicates that the values of the first elements in the 0th row of the mother matrix are 35, 34, 28, 0, 15, 0, 0 in sequence; "5, 30, 44, 19, 43, 0, 0" indicates that the values of the first elements in the 1st row of the mother matrix are 5, 30, 44, 19, 43, 0, 0 in sequence...
[0158] In the implementation method 5 of the above Example 2, when the expansion factor z is 80, through the expansion factor, the base matrix can be expanded into a parity-check matrix corresponding to N1 of 2560 bits. Exemplarily, the base matrix can be expressed as:
[0159]
[0160] In the implementation method 5 of the above Example 2, the base matrix can also be referred to Figure 5b The representation of the 2nd column (N1 = 2560, z = 80) in []. Among them, "67, 10, 55, 5, 55, 0, 0" indicates that the values of the first elements in the 0th row of the mother matrix are 67, 10, 55, 5, 55, 0, 0 in sequence; "28, 22, 11, 41, 59, 0, 0" indicates that the values of the first elements in the 1st row of the mother matrix are 28, 22, 11, 41, 59, 0, 0 in sequence...
[0161] In each possible implementation method of the above Example 2, the relevant description of the expansion factor z can refer to the description in Example 1, which will not be elaborated here.
[0162] In each possible implementation of the above Example 1 and Example 2, the base matrix of the parity-check matrix shown is only an example and does not impose any limitation on this application. Moreover, in any of the above implementations, the value of z is only an example, and the value of z can also be greater than the value in the above example. For example, in Implementation 5 of the above Example 2, z can also be greater than 80, and correspondingly, N1 corresponding to the base matrix of the parity-check matrix is equal to 32*z.
[0163] In the above S320, the first communication device can perform LDPC encoding through an encoding module (such as an LDPC encoding module) to obtain an encoded sequence, and output the encoded sequence from the encoding module. The length of the encoded sequence can be the aforementioned N1. The encoded sequence can include K information bits and E parity bits. Alternatively, the encoded sequence can be composed of an information bit sequence and a parity bit sequence. The length of the information bit sequence can be N2, and the length of the parity bit sequence can be E. N1 = N2 + E. The value of E is related to N1 and R. For example, if N1 = 320 and R = 1 / 2, then E = 160.
[0164] In a possible implementation, after the first communication device outputs the encoded sequence, it can also perform a shortening operation. The following is an example.
[0165] Generally speaking, the information bit sequence needs to be placed in an integer number of orthogonal frequency division multiplexing (OFDM) symbols after encoding, and at the same time, the encoded sequence also needs to be exactly placed in an integer number of LDPC codewords. Therefore, before the first communication device performs LDPC encoding, the first communication device also needs to first determine the minimum number of OFDM symbols N required for this transmission SYM , and then based on N SYM and the current coding and modulation scheme (such as the modulation order indicated by MCS, etc.) to calculate the total number of encoded bits N that can be stored in all OFDM symbols TCB = N CBPS * N SYM , where N CBPS is the number of encoded bits that can be stored in each OFDM symbol. Then, the first communication device can calculate the LDPC code length used in the current transmission (i.e., the code length shown in the embodiments of this application) and the required number of codewords N based on the above results CWExemplarily, when there are not enough information bits (such as the case where K is less than 1944 in Examples 1 to 3 below) to fill the information bit part in the LDPC codeword, the first communication device may perform a shortening operation before LDPC encoding (which may also be referred to as generating parity bits). The shortening operation refers to filling a certain number of 0s in the information bit part before generating parity bits through LDPC encoding, and then deleting these 0s after encoding to generate parity bits. Figure 4 is a partial schematic diagram of the shortening operation in LDPC encoding provided by an embodiment of this application. As Figure 4 shown, step 401 indicates that the first communication device may obtain the payload bits to be encoded (such as the K information bits shown in the embodiment of this application). Step 402 indicates that the first communication device may calculate the LDPC code length and the number of codewords, Figure 4 exemplarily shows three LDPC codewords. The length (i.e., the code length) of each LDPC codeword can be equal to the code length. Step 403 indicates that the first communication device may perform a shortening operation on the information bits, Figure 4 showing a codeword including payload bits and shortening zero bits. Step 404 indicates that the first communication device may generate parity bits using the payload bits and the shortening bits, Figure 4 showing a codeword including payload bits, shortening zero bits, and parity bits. Step 405 indicates that the first communication device discards these shortening bits, Figure 4 showing a codeword including data bits and parity bits. The above descriptions regarding the shortening operation and the like are only examples. For the relevant descriptions regarding the shortening operation and the like, reference may also be made to relevant standards or protocols, etc. The embodiments of this application do not make any limitations in this regard.
[0166] The first information in S320 above may be the encoded sequence, or rather, the first information is a signal that can be transmitted through the channel obtained by processing based on the encoded sequence. Exemplarily, the first communication device may also perform at least one of the following processes on the encoded sequence: stream parsing, constellation mapping, LDPC subcarrier mapping, stream cyclic shift, space and frequency mapping, inverse discrete Fourier transform (IDFT), inserting a cyclic prefix, and windowing (insert GI and window).
[0167] Exemplarily, the first communication device may also perform rate matching on the encoded sequence. The rate matching method includes puncturing, repetition, and shortening. For example, the first communication device may puncture the parity bits in the encoded sequence to obtain a higher code rate or a shorter code length, etc. For other processing of the encoded sequence by the first communication device, reference may also be made to relevant standards or protocols, etc., which are not limited in the embodiments of the present application.
[0168] S330, the first communication device sends the first information to the second communication device. Correspondingly, the second communication device receives the first information sent by the first communication device.
[0169] Exemplarily, after receiving the first information, the second communication device may perform corresponding processing on the first information to obtain the information to be decoded. For example, when the second communication device receives the first information, it may perform at least one of the following processes: removing the cyclic prefix, discrete Fourier transform (DFT), spatial and frequency demapping, deinterleaving, and demodulating the constellation. For the corresponding processing before the second communication device obtains the information to be decoded, reference may also be made to relevant standards or protocols, etc., which are not limited in the embodiments of the present application. The length of the information to be decoded may be N1.
[0170] S340, the second communication device performs LDPC decoding on the information to be decoded based on the parity-check matrix to obtain the information bit sequence.
[0171] Exemplarily, the decoding methods that the second communication device may adopt include but are not limited to hard decision decoding methods, soft decision decoding methods, or hybrid decoding methods. The specific process of decoding is not described in detail in the embodiments of the present application.
[0172] Exemplarily, the second communication device may also use a similar Figure 4 method to determine the code length N1, etc. For the relevant description of how the second communication device obtains the code length N1 and the code rate R, reference may be made to the above description of the first communication device, which is not described in detail here.
[0173] For the method by which the first communication device obtains N1 and R, and the method by which the second communication device obtains N1 and R, reference may be made to relevant standards or protocols, etc., which are not limited in the embodiments of the present application.
[0174] In the embodiments of the present application, the above S310 and S320 may be implemented by an encoding module, and the above step 340 may be implemented by a decoding module. In a specific implementation, Figure 3The method shown above can also be split into an encoding method or a decoding method. For example, the first communication device may include an encoding module, and the second communication device may include a decoding module. Optionally, in addition to the above-mentioned encoding module, the first communication device may further include an acquisition module, which can be used to acquire the code length, code rate, etc. Optionally, the first communication device may further include a shortening module or a chunking module, etc. Optionally, in addition to the decoding module, the second communication device may further include an acquisition module, which can be used to acquire the information to be decoded.
[0175] In the embodiments of the present application, the first base matrix supporting the first code length is associated with the second base matrix supporting the second code length. For example, the positions of the cyclic shift matrices represented by the first elements of the first base matrix are the same as the positions of the cyclic shift matrices represented by the first elements of the second base matrix. For a communication device to determine a parity-check matrix, the processing complexity is reduced, thereby improving the data transmission reliability of the system.
[0176] Furthermore, in the embodiments of the present application, in the parity-check matrix determined based on the 16*32 base matrix, the first element in the 17th column is zero, and the xth element and the 16th element in the 17th column are the same non-zero elements, where x is an integer greater than 1 and less than 16, which improves the flexibility of encoding.
[0177] The following introduces the method for determining the parity-check matrix involved in the embodiments of the present application.
[0178] The method for determining the parity-check matrix shown in the embodiments of the present application is only an example. In specific implementations, the determination method shown below can be defined by a standard. Or, in specific implementations, the communication parties can save the base matrix of the parity-check matrix, or save the cyclic shift value, or save the position of the first element, etc.
[0179] The first communication device can determine the parity-check matrix corresponding to the target code length based on the 16*32 base matrix. The 16*32 base matrix can refer to the descriptions in any of the implementation manners in the foregoing Example 1 and Example 2. In some embodiments, the first communication device can select a base matrix based on the target code length. For example, when the code length is 320 bits, it can select the base matrix in Implementation Manner 1 of Example 1 or the base matrix in Implementation Manner 1 of Example 2. Another example is that when the code length is 640 bits, it can select the base matrix in Implementation Manner 1 of Example 1 or the base matrix in Implementation Manner 2 of Example 2, and so on. In other embodiments, the first communication device can obtain the position information of the first element in the base matrix and determine the values of the first elements (i.e., the cyclic shift values) in the base matrix according to the target code length. For example, when the target code length is 320 bits, in the above Example 1, the first communication device can obtain the information in the Figure 5a first column and the sixth column to determine the base matrix.
[0180] Furthermore, the first communication device expands the base matrix to obtain the parity-check matrices of LDPC codes with different code lengths. The process of obtaining the parity-check matrix from the base matrix has been described above and will not be elaborated here for the sake of brevity.
[0181] The method for the second communication device to determine the parity-check matrix is similar to that of the first communication device and will not be elaborated here for the sake of brevity.
[0182] The above method for determining the parity-check matrix can be for a certain code rate, such as a code rate of 1 / 2. The first communication device can perform rate matching on the encoded sequence through processing operations such as puncturing, repetition, shortening, etc. to obtain encoded sequences with other code rates.
[0183] The parity-check matrix of the LDPC code can also be represented by a factor graph (Tanner graph). The factor graph and the parity-check matrix are in one-to-one correspondence. The factor graph consists of two types of nodes. The first type of node is a variable node, representing information bits, and the second type of node is a parity-check node, representing parity-check constraint relationships. Each parity-check node represents a parity-check constraint relationship. Figure 6a is the parity-check matrix H of the LDPC code. Figure 6a In, {Vi} represents the set of variable nodes, and {Cj} represents the set of parity-check nodes. i = 1, 2, …, 8. j = 1, 2, 3, 4. Each row of the parity-check matrix H corresponds to a parity-check equation, and each column corresponds to an information bit. Figure 6a In, there are 8 variable nodes and 4 parity-check nodes. If an information bit is included in the corresponding parity-check equation, a connection is used to connect the involved variable node and parity-check node to obtain the factor graph. Figure 6b is the factor graph of the parity-check matrix H of the LDPC code. Other descriptions of the factor graph can refer to relevant standards or protocols, etc., and the embodiments of the present application do not limit this.
[0184] In the embodiments of the present application, the parity-check matrix is designed according to the quasi-regular check degree, that is, the weights of all rows of the base matrix (i.e., the number of non-zero terms in the row) have only two values: d and d + 1. For example, in Example 1, the row weights of rows 0 to 2 are 7, and the row weights of rows 3 to 15 are 6; in Example 2, the row weights of rows 0 to 14 are 7, and the row weight of row 15 is 6. This characteristic of the base matrix can improve the efficiency of processing parity-check nodes in the LDPC decoding process, avoid resource waste, and further minimize the maximum degree of the parity-check nodes (i.e., the above d + 1) to reduce resource waste.
[0185] In order to balance the performance, decoding convergence speed, decoding complexity and other factors of the LDPC code, the LDPC code (or the check matrix) in this application can be effectively applied to transmission systems such as UWB that have high requirements on delay and decoding convergence speed. In the embodiment of the present application, by adjusting the control variables: the average variable node degree (η), the slope (slope) and the stability factor (stabilityfactor), some or all parameters are adjusted to obtain the base matrix, such as determining the position of the first element in the base matrix and the value of the first element.
[0186] The decoding complexity is associated with the variable node degree η. In some embodiments, the decoding complexity can be represented by the variable node degree η. The decoding complexity can also be associated with the average number of iterations, such as the iterative decoding complexity can be represented by the average number of iterations n. it The product of the decoding complexity is expressed as C∝η·n it .
[0187] Combine the following Figures 7a to 7d The influence of the base matrix on the decoding performance when different control variables are used is exemplified.
[0188] See also Figure 7a , taking the code length of 320 bits and 8 decoding iterations as an example, Figure 7a The first column in represents the slope, and the first row of column labels describes the average column weight of the check matrix. Figure 7a Each entry in the table represents the slope (row) and mean column weight (column) of the response to reach 10 -2 The SNR difference (or SNR loss value) between the signal-noise ratio (SNR) required for the frame error rate (FER) and the corresponding channel capacity SNR. The lower the SNR loss value, the better the performance of the corresponding LDPC code. The last row: the grand total represents the small SNR loss value under different average column weights. Figure 8a With decoding complexity as the horizontal axis and SNR loss value as the vertical axis, Figure 7a The table data shown is presented.
[0189] Figure 7b and Figure 7a Similar, but different Figure 7b The code length of the check matrix in the table shown is 640 bits. Figure 8b With decoding complexity as the horizontal axis and SNR loss value as the vertical axis, Figure 7b The table data shown is presented. Figure 7c and Figure 7a Similar, but different Figure 7c The code length of the check matrix in the table shown is 1280 bits.Figure 8c With the decoding complexity as the abscissa and the SNR loss value as the ordinate, Figure 7c the tabular data shown is represented. Figure 7d Similar to Figure 7a , the difference is that Figure 7d in the table shown, the code length of the parity-check matrix is 2560 bits.
[0190] Refer to Figures 7a to 7d and Figures 8a to 8c . In order to achieve a balance between performance and decoding complexity in the embodiments of the present application, the parity-check matrices achieved at decoding complexity η = 3.1 and decoding complexity η = 3.47 are selected as the parity-check matrices of the embodiments of the present application.
[0191] The following introduces the simulation results of the parity-check matrix provided by the embodiments of the present application.
[0192] The following respectively gives the performance comparison between the parity-check matrix of the above LDPC code and the reference parity-check matrix. Among them, the reference parity-check matrix can be the parity-check matrix of the LDPC code with a classless WiFi coding structure. Figures 9a to 9d In, the abscissa represents SNR, with the unit of dB, and the ordinate represents FER. Figures 9a to 9d The serial numbers 1 to 8 in are set for the convenience of distinguishing different curves and should not be construed as a limitation on the embodiments of the present application.
[0193] Figure 9a What is shown is the FER performance comparison between the parity-check matrix provided by the embodiments of the present application, such as the parity-check matrix with decoding complexity η = 3.47 and dual diagonal (DD), and the parity-check matrix of the non-class WiFi coding with the same code length (such as eta = 3.5 and without dual diagonal), where eta refers to the complexity and is represented by the average column weight of the code parity-check matrix. As Figure 9a the FER performance comparison between the parity-check matrix DD 320, 3.47 and the parity-check matrix C320, eta = 3.5 of the 320-bit code length in; the FER performance comparison between the parity-check matrix DD 640, 3.47 and the parity-check matrix C640, eta = 3.5 of the 640-bit code length; the FER performance comparison between the parity-check matrix DD 1280, 3.47 and the parity-check matrix C1280, eta = 3.5 of the 1280-bit code length; the FER performance comparison between the parity-check matrix DD 2560, 3.47 and the parity-check matrix C2560, eta = 3.5 of the 2560-bit code length. R = 1 / 2. Among them, C320, C640, C1280, and C2560 are all parity-check matrices without dual diagonal.
[0194] Figure 9bShown is the comparison of the FER performance between the parity-check matrix provided by the embodiment of the present application under 25 decoding iterations, such as the parity-check matrix with a decoding complexity of η = 3.47 (DD), and the parity-check matrix of a non-WiFi-like code with the same code length (eta = 3.5).
[0195] Figure 9c Shown is the comparison of the FER performance between the parity-check matrix provided by the embodiment of the present application under 8 decoding iterations, such as the parity-check matrix with a decoding complexity of η = 3.09 (DD), and the parity-check matrix of a non-WiFi-like code with the same code length (eta = 3.2).
[0196] Figure 9d Shown is the comparison of the FER performance between the parity-check matrix provided by the embodiment of the present application under 25 decoding iterations, such as the parity-check matrix with a decoding complexity of η = 3.09 (DD), and the parity-check matrix of a non-WiFi-like code with the same code length (eta = 3.2).
[0197] From Figures 9a to 9d It can be seen that the parity-check matrix obtained by expanding the base matrix with the same first element position in the embodiment of the present application has excellent decoding performance and achieves a good balance between decoding performance and decoding complexity.
[0198] The communication device provided by the embodiment of the present application will be described below.
[0199] The present application divides the communication device into functional modules according to the above method embodiment. For example, each functional module can be corresponding to each function, or two or more functions can be integrated into one processing module. The above integrated module can be implemented in the form of hardware or in the form of a software functional module. It should be noted that the division of modules in the present application is illustrative, only a logical function division, and there may be other division methods in actual implementation. The following will be combined with Figures 10 to 10 Describe the communication device of the embodiment of the present application in detail.
[0200] Figure 10 It is a schematic structural diagram of a communication device 500 provided by the embodiment of the present application, as Figure 10 shown. The communication device includes a processing module 510 and a transceiver module 520. The transceiver module 520 can implement corresponding communication functions, and the processing module 510 is used to implement corresponding processing functions. For example, the transceiver module 520 can also be called an interface, a communication interface, or a communication module, etc.
[0201] In some embodiments of the present application, the communication device can be used to perform the actions executed by the first communication device in the above method embodiments. At this time, the first communication device can be the Wi-Fi device itself, or a chip or functional module that can be configured in the device, etc. The transceiver module 520 is used to perform the operations related to the transceiver of the first communication device in the above method embodiments, and the processing module 510 is used to perform the operations related to the processing of the first communication device in the above method embodiments.
[0202] Exemplarily, the processing module 510 can be used to determine a parity-check matrix corresponding to a target code length based on a 16×32 base matrix. The base matrix includes a plurality of first elements. The first element corresponds to a cyclic shift matrix. The position of the first element in the first base matrix is the same as the position of the first element in the second base matrix. The first base matrix is used to determine a parity-check matrix corresponding to a first code length, and the second base matrix is used to determine a parity-check matrix corresponding to a second code length. The target code length includes the first code length or the second code length. The first element in the 17th column of the base matrix is zero, and the xth element and the 16th element in the 17th column of the base matrix are the same non-zero element; the transceiver module 520 can be used to send a first piece of information, and the first piece of information is encoded based on the parity-check matrix.
[0203] Exemplarily, the processing module 510 can also be used to perform LDPC encoding on an information bit sequence, and perform other processing on the encoded sequence to obtain a first piece of information; the transceiver module 520 can also be used to send or output a signal after other processing.
[0204] Exemplarily, the processing module 510 can include an encoding module. For example, the processing module 510 can also include an acquisition module, a shortening module, or a block module, etc. Exemplarily, the processing module 510 can also include at least one of the following modules: a constellation mapping module, a stream cyclic shift module, a space and frequency mapping module, an IDFT module, an inserting cyclic prefix and windowing module. Exemplarily, the transceiver module 520 can include a radio frequency module, an antenna module, etc. Exemplarily, the transceiver module 502 can include a pin module, etc.
[0205] Multiplexing Figure 10 In some other embodiments of the present application, the communication device 500 can be used to perform the actions executed by the second communication device in the above method embodiments. At this time, the communication device can be the Wi-Fi device itself, or a chip or functional module that can be configured in the device, etc. The transceiver module 520 is used to perform the operations related to the transceiver of the second communication device in the above method embodiments, and the processing module 510 is used to perform the operations related to the processing of the second communication device in the above method embodiments.
[0206] Exemplarily, the transceiver module 520 can be used to receive a first piece of information, which is encoded based on a parity-check matrix of a target code length; the processing module 510 can be used to determine the parity-check matrix based on a 16*32 base matrix, the base matrix includes a plurality of first elements, the first elements correspond to cyclic shift matrices, the positions of the first elements in the first base matrix are the same as the positions of the first elements in the second base matrix, the first base matrix is used to determine the parity-check matrix corresponding to the first code length, the second base matrix is used to determine the parity-check matrix corresponding to the second code length, the target code length includes the first code length or the second code length, the first element in the 17th column of the base matrix is zero, and the xth element and the 16th element in the 17th column of the base matrix are the same non-zero elements.
[0207] Exemplarily, the transceiver module 520 can also be used to input information to be decoded; the processing module 510 can also perform LDPC decoding on the information to be decoded based on the parity-check matrix to obtain an information bit sequence.
[0208] Exemplarily, the processing module 510 may include a decoding module. For example, the processing module 510 may also include an acquisition module, etc. Exemplarily, the processing module 510 may further include at least one of the following components: a cyclic prefix removal module, a DFT module, an interleaving module, a demodulation module, a descrambling module. Exemplarily, the transceiver module 520 may include a radio frequency module, an antenna module, etc. Exemplarily, the transceiver module 520 may include a pin module, etc.
[0209] Optionally, in each of the above embodiments, the communication device may further include a storage module, which can be used to store instructions and / or data, and the processing unit 510 can read the instructions and / or data in the storage module to enable the communication device to implement the foregoing method embodiments.
[0210] The specific descriptions of the transceiver module and the processing module shown in each of the above embodiments are only examples. For the specific functions or steps performed by the transceiver module and the processing module, reference can be made to the foregoing method embodiments, which will not be elaborated here.
[0211] The communication device of the embodiments of the present application is introduced above. The following introduces the possible product forms of the communication device. Any product form that has the functions of the foregoing Figure 10 communication device falls within the protection scope of the embodiments of the present application. The following introduction is only for example, and does not limit the product forms of the communication device of the embodiments of the present application to this.
[0212] In a possible implementation Figure 10In the communication device shown, the processing module 510 may be one or more processors, and the transceiver module 520 may be a transceiver. Alternatively, the transceiver module 520 may also be a transmitting module and a receiving module. The transmitting module may be a transmitter, and the receiving module may be a receiver. The transmitting module and the receiving module are integrated into one device, such as a transceiver. In the embodiments of the present application, the processor and the transceiver may be coupled, etc. The embodiments of the present application do not limit the connection manner between the processor and the transceiver. During the process of executing the above method, the process of sending information in the above method may be the process of outputting the above information by the processor. When outputting the above information, the processor outputs the above information to the transceiver for transmission by the transceiver. After the above information is output by the processor, other processing may be required before it reaches the transceiver. Similarly, the process of receiving information in the above method may be the process of the processor receiving the input above information. When the processor receives the input information, the transceiver receives the above information and inputs it to the processor. Further, after the transceiver receives the above information, the above information may need to be processed otherwise before being input to the processor.
[0213] As Figure 11 shown, the communication device 600 includes one or more processors 620 and a transceiver 610.
[0214] In some embodiments of the present application, the communication device may be used to execute the steps, methods, or functions performed by the above first communication device or network management server. For example, the processor 620 may be used to execute the functions or steps implemented by the processing module 510 as Figure 10 shown, and the transceiver 610 may be used to execute the functions or steps implemented by the transceiver module 520 as Figure 10 shown. For the specific descriptions of the processor 620 and the transceiver 610, reference may be made to Figure 10 or the method embodiments shown above, which will not be elaborated here.
[0215] In other embodiments of the present application, the communication device is used to execute the steps, methods, or functions performed by the above second communication device or terminal device. For example, the processor 620 may be used to execute the functions or steps implemented by the processing module 510 as Figure 10 shown, and the transceiver 610 may be used to execute the functions or steps implemented by the transceiver module 520 as Figure 10 shown. For the specific descriptions of the processor 620 and the transceiver 610, reference may be made to Figure 10 or the method embodiments shown above, which will not be elaborated here.
[0216] In Figure 11In each implementation of the communication device shown, the transceiver may include a receiver and a transmitter. The receiver is used to perform the receiving function (or operation), and the transmitter is used to perform the transmitting function (or operation). And the transceiver is used to communicate with other devices / apparatuses via a transmission medium.
[0217] Optionally, the communication device 600 may further include one or more memories 630 for storing program instructions and / or data. The memory 630 is coupled to the processor 620. The coupling in the embodiments of the present application is an indirect coupling or communication connection between communication devices, units or modules, which may be electrical, mechanical or other forms for information interaction between communication devices, units or modules. The processor 620 may cooperate with the memory 630. The processor 620 may execute the program instructions stored in the memory 630. Optionally, at least one of the above one or more memories may be included in the processor.
[0218] In the embodiments of the present application, the specific connection medium between the transceiver 610, the processor 620 and the memory 630 is not limited. In the embodiments of the present application Figure 11 it is shown that the memory 630, the processor 620 and the transceiver 610 are connected via a bus 640. The bus is represented by a thick line in Figure 11 The connection manners between other components are only schematically illustrated and are not to be taken as limiting. The bus may be divided into an address bus, a data bus, a control bus, etc. For the sake of simplicity of representation, Figure 11 only one thick line is used to represent it in
[0219] In the embodiments of the present application, the processor may be a general-purpose processor, a digital signal processor, an application specific integrated circuit, a field programmable gate array or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc., which can implement or execute the various methods, steps and logic block diagrams disclosed in the embodiments of the present application. The general-purpose processor may be a microprocessor or any conventional processor, etc. The steps of the method disclosed in combination with the embodiments of the present application may be directly embodied as being executed by a hardware processor, or executed by a combination of hardware and software modules in the processor, etc.
[0220] In the embodiments of the present application, the memory may include, but is not limited to, non-volatile memories such as hard disk drives (HDDs) or solid-state drives (SSDs), random access memories (RAMs), erasable programmable read-only memories (EPROMs), read-only memories (ROMs), or compact disc read-only memories (CD-ROMs), etc. The memory is any storage medium that can be used to carry or store program code in the form of instructions or data structures and can be read and / or written by a computer (such as the communication device shown in the present application), but is not limited thereto. The memory in the embodiments of the present application may also be a circuit or any other device capable of implementing a storage function, for storing program instructions and / or data.
[0221] The processor 620 is mainly used to process communication protocols and communication data, control the entire communication device, execute software programs, and process the data of software programs. The memory 630 is mainly used to store software programs and data. The transceiver 610 may include a control circuit and an antenna. The control circuit is mainly used for the conversion between baseband signals and radio frequency signals and the processing of radio frequency signals. The antenna is mainly used to transmit and receive radio frequency signals in the form of electromagnetic waves. Input / output devices, such as touchscreens, display screens, keyboards, etc., are mainly used to receive data input by users and output data to users.
[0222] After the communication device is powered on, the processor 620 can read the software program in the memory 630, interpret and execute the instructions of the software program, and process the data of the software program. When data needs to be wirelessly transmitted, the processor 620 performs baseband processing on the data to be transmitted and then outputs a baseband signal to the radio frequency circuit. The radio frequency circuit performs radio frequency processing on the baseband signal and then transmits the radio frequency signal outward in the form of electromagnetic waves through the antenna. When data is sent to the communication device, the radio frequency circuit receives the radio frequency signal through the antenna, converts the radio frequency signal into a baseband signal, and outputs the baseband signal to the processor 620. The processor 620 converts the baseband signal into data and processes the data.
[0223] In another implementation, the radio frequency circuit and the antenna may be provided independently of the processor performing baseband processing. For example, in a distributed scenario, the radio frequency circuit and the antenna may be independent of the communication device and arranged in a remote manner.
[0224] The communication device shown in the embodiments of the present application may also have more than Figure 11More components and the like are not limited in the embodiments of the present application. The methods executed by the processor and transceiver shown above are only examples, and for the specific steps executed by the processor and transceiver, reference may be made to the methods described above.
[0225] In another possible implementation, Figure 10 In the communication device shown, the processing module 510 may be one or more logic circuits, and the transceiver module 520 may be an input / output interface, or also referred to as a communication interface, or an interface circuit, or an interface, etc. Or the transceiver module 520 may also be a sending module and a receiving module. The sending module may be an output interface, and the receiving module may be an input interface. The sending module and the receiving module are integrated into one module, such as an input / output interface. As Figure 12 shown, Figure 12 The communication device 700 shown includes a logic circuit 710 and an interface 720. That is, the above-mentioned processing module 510 may be implemented by the logic circuit 710, and the transceiver module 520 may be implemented by the interface 720. Among them, the logic circuit 710 may be a chip, a processing circuit, an integrated circuit, or a system on chip (SoC) chip, etc., and the interface 720 may be a communication interface, an input / output interface, a pin, etc. Exemplarily, Figure 12 is shown with the above-mentioned communication device 700 as an example of a chip. The chip includes a logic circuit 710 and an interface 720.
[0226] In the embodiments of the present application, the logic circuit and the interface may also be coupled to each other. For the specific connection manner between the logic circuit and the interface, the embodiments of the present application do not make a limitation. Exemplarily, the logic circuit 710 may be used to execute the functions or steps implemented by the processing module 510 as shown in Figure 10 shown, and the interface 720 may be used to execute the functions or steps implemented by the transceiver module 520 as shown in Figure 10 shown. For the specific description of the logic circuit 710 and the interface 720, reference may be made to Figure 10 or the method embodiments shown above, which will not be elaborated here.
[0227] The communication device shown in the embodiments of the present application may implement the method provided in the embodiments of the present application in the form of hardware, or may also implement the method provided in the embodiments of the present application in the form of software, etc. The embodiments of the present application do not make a limitation on this.
[0228] The embodiments of the present application also provide a communication system, which includes a first communication device and a second communication device. The first communication device and the second communication device may be used to execute the methods in any of the foregoing embodiments.
[0229] In addition, the present application also provides a computer program for implementing the operations and / or processes performed by each communication device in the method provided by the present application.
[0230] The present application also provides a computer-readable storage medium storing computer code, which, when run on a computer, causes the computer to perform the operations and / or processes performed by each communication device in the method provided by the present application.
[0231] The present application also provides a computer program product including computer code or a computer program, which, when run on a computer, causes the operations and / or processes performed by each in the method provided by the present application to be executed.
[0232] In several embodiments provided by the present application, it should be understood that the disclosed system, communication device, and method can be implemented in other ways. For example, the communication device embodiments described above are merely illustrative. For example, the division of the modules is only a logical function division, and there can be other division methods in actual implementation. For example, multiple modules or components can be combined or integrated into another system, or some features can be ignored or not executed. Additionally, the displayed or discussed couplings or direct couplings or communication connections to each other can be indirect couplings or communication connections through some interfaces, communication devices, or modules, and can also be electrical, mechanical, or other forms of connection.
[0233] The modules described as separate components may or may not be physically separated, and the components displayed as modules may or may not be physical modules, that is, they can be located in one place or distributed to multiple network modules. Some or all of the modules can be selected according to actual needs to achieve the technical effects of the solution provided by the embodiments of the present application.
[0234] Furthermore, in each embodiment of the present application, the functional modules can be integrated in a processing module, or each module can exist physically alone, or two or more modules can be integrated in one module. The above-mentioned integrated modules can be implemented in the form of hardware or in the form of software functional modules.
[0235] When the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of this application, in essence, or the part that makes a contribution to the prior art, or all or part of this technical solution can be embodied in the form of a software product. This computer software product is stored in a readable storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of this application. The aforementioned readable storage medium includes: various media that can store program codes, such as USB flash drives, mobile hard disks, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical discs.
[0236] As described above, the foregoing are only specific implementation manners of this application, but the protection scope of this application is not limited thereto. Any person skilled in the art within the technical scope disclosed by this application can easily think of changes or substitutions, which should all be covered by the protection scope of this application. Therefore, the protection scope of this application shall be subject to the protection scope of the claims.
Claims
1. A communication method, characterized in that, Comprising: Determining a parity-check matrix corresponding to a target code length based on a 16*32 base matrix, where the base matrix includes a plurality of first elements, the first elements correspond to cyclic shift matrices, the position of a first element in a first base matrix is the same as the position of the first element in a second base matrix, the first base matrix is used to determine a parity-check matrix corresponding to a first code length, the second base matrix is used to determine a parity-check matrix corresponding to a second code length, the target code length includes the first code length or the second code length, the first element in the 17th column of the base matrix is zero, the xth element and the 16th element in the 17th column of the base matrix are the same non-zero elements, and x is an integer greater than 1 and less than 16; Sending a first piece of information, where the first piece of information is encoded based on the parity-check matrix.
2. The method according to claim 1, characterized in that, The base matrix can be expressed as: Or , Wherein, The a indicates that there is a z*z cyclic shift identity matrix at the corresponding element position, z is an expansion factor, and the - indicates a all-zero matrix.
3. The method according to claim 1 or 2, characterized in that, When z is 10, the base matrix can be expressed as: Or 4. The method according to claim 1 or 2, characterized in that, When z is 20, the base matrix can be expressed as: Or 5. The method according to claim 1 or 2, characterized in that, When z is 40, the base matrix can be expressed as: Or 6. The method according to claim 1 or 2, characterized in that, When z is 60, the base matrix can be expressed as: Or 7. The method according to claim 1 or 2, characterized in that, When z is 80, the base matrix can be expressed as: Or 8. A communication method, characterized in that, Comprising: Receiving a first piece of information, where the first piece of information is encoded based on a parity-check matrix of a target code length; Determining the parity-check matrix based on a 16*32 base matrix, where the base matrix includes a plurality of first elements, the first elements correspond to cyclic shift matrices, the position of a first element in a first base matrix is the same as the position of the first element in a second base matrix, the first base matrix is used to determine a parity-check matrix corresponding to a first code length, the second base matrix is used to determine a parity-check matrix corresponding to a second code length, the target code length includes the first code length or the second code length, the first element in the 17th column of the base matrix is zero, the xth element and the 16th element in the 17th column of the base matrix are the same non-zero elements, and x is an integer greater than 1 and less than 16.
9. The method according to claim 8, wherein The base matrix can be expressed as: Or , Wherein, The a indicates that there is a z*z cyclic shift identity matrix at the corresponding element position, z is an expansion factor, and the - indicates a all-zero matrix.
10. The method according to claim 8 or 9, characterized in that, When z is 10, the base matrix can be expressed as: Or 11. The method according to claim 8 or 9, characterized in that, When z is 20, the base matrix can be expressed as: Or 12. The method according to claim 8 or 9, characterized in that When z is 40, the base matrix can be expressed as: Or 13. The method according to claim 8 or 9, characterized in that, When z is 60, the base matrix can be expressed as: Or 14. The method according to claim 8 or 9, characterized in that, When z is 80, the base matrix can be expressed as: Or 15. A communication device, characterized in that, Comprising a module for executing the method according to any one of claims 1 to 7, or a module for executing the method according to any one of claims 8 to 14.
16. A communication device, characterized in that, Comprising a processor, where the processor is used to execute the method according to any one of claims 1 to 14.
17. A communication device, characterized in that, Comprising a logic circuit and an interface, and the logic circuit and the interface are coupled; The interface is used to input and / or output information, and the logic circuit is used to execute the method according to any one of claims 1 to 14.
18. A computer-readable storage medium, characterized in that, The computer-readable storage medium is used to store a computer program, and when the computer program is executed, the method according to any one of claims 1 to 14 is executed.
19. A computer program product, characterized in that, When the computer program product is executed, the method according to any one of claims 1 to 14 is executed.
20. A communication system, characterized in that, The communication system includes a first communication device and a second communication device. The first communication device is used to execute the method according to any one of claims 1 to 7, and the second communication device is used to execute the method according to any one of claims 8 to 14.
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Communication method, apparatus, device, and storage medium
WO2025148847A1