Method, device and equipment for testing response time of wireless communication equipment

The method improves wireless communication device response time testing by dynamically compensating for hardware delays and environmental interference, ensuring precise and reliable measurements across various scenarios.

CN120321681APending Publication Date: 2025-07-15武汉万曦智能科技有限公司
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Patent Information

Application Number
CN202510595744.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-05-09
Publication Date
2025-07-15

AI Technical Summary

Technical Problem

The existing wireless communication equipment response time testing methods have problems such as low accuracy, weak anti-interference ability and poor scenario adaptability, which cannot accurately reflect hardware processing delays and environmental interference, resulting in significant deviations from the actual scenarios.

Method used

By sending and receiving test signals, and combining dynamic compensation corrections of hardware delay, propagation delay, software reference delay and clock synchronization delay, a multi-dimensional compensation model is established, and dynamic hardware delay calibration, multipath propagation delay modeling, protocol stack delay decomposition, dual-mode clock synchronization and anti-interference joint triggering mechanisms are adopted to obtain high-precision target response time.

Benefits of technology

It realizes high-precision response time measurement in complex environments, supports the research and development and certification of high-real-time wireless communication equipment, improves the accuracy, reliability and flexibility of the test system, adapts to different communication protocols and complex channel environments, and promotes the intelligent and adaptive development of industry standards.

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Abstract

The invention discloses a test method, device and equipment for response time of wireless communication equipment, and relates to the technical field of wireless communication. The method comprises the following steps: sending a test signal to a to-be-tested wireless communication device in a preset sending mode, and recording a sending moment when the test signal is sent; receiving a response signal returned by the to-be-tested wireless communication equipment based on the test signal, and recording a receiving moment of receiving the response signal; obtaining initial response time according to the sending time and the receiving time; and determining compensation correction time, and performing compensation correction on the initial response time based on the compensation correction time to obtain target response time. The target response time obtained at the moment is obtained through dynamic hardware delay calibration, multipath propagation delay modeling, protocol stack delay decomposition, dual-mode clock synchronization and an anti-interference combined triggering mechanism, and the defects of a traditional testing method in the aspects of precision, reliability and scene adaptability are overcome. And a guarantee is provided for research, development and authentication of high-real-time wireless communication equipment.
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Description

Technical Field

[0001] Embodiments of the present application relate to the field of wireless communication technologies, and in particular, to a method, apparatus, and device for testing the response time of a wireless communication device. Background Art

[0002] With the rapid development of technologies such as the Internet of Things (IoT), industrial automation, 5G / 6G communication, and vehicle-to-everything (V2X), the real-time requirements for wireless communication devices have become increasingly stringent. As a core indicator for measuring device performance, the response time directly affects system reliability, user experience, and security. For example, in the control of industrial robotic arms, a microsecond-level delay deviation may lead to inaccurate motion trajectories; in vehicle-to-everything, errors in signal response delays may trigger misjudgments in collision warning systems.

[0003] Currently, in the prior art, the response time is mainly obtained through software simulation methods and hardware loop testing methods. However, software simulation methods (such as NS-3, OPNET) rely on protocol stack simulation, ignoring hardware processing delays (such as radio frequency front-end modulation, ADC / DAC conversion) and real-channel interference, resulting in a significant deviation between theoretical results and actual measurements; while the hardware loop testing method can capture physical layer delays, but multipath fading and burst noise in an open test environment are likely to cause signal mis-triggering or packet loss, with low efficiency and unable to ensure stability. Therefore, there is an urgent need for a high-precision and high anti-interference response time testing method to meet the key technical requirements of device research and development, certification, and optimization. Summary of the Invention

[0004] The purpose of the present application is to at least solve one of the above technical defects.

[0005] On the one hand, embodiments of the present application provide a method for testing the response time of a wireless communication device, the method including:

[0006] Sending a test signal to the wireless communication device to be tested through a preset sending method, and recording the sending moment of the sent test signal;

[0007] Receiving a response signal returned by the wireless communication device to be tested based on the test signal, and recording the receiving moment of the received response signal;

[0008] Obtaining an initial response time according to the sending moment and the receiving moment;

[0009] Determining a compensation and correction time, and compensating and correcting the initial response time based on the compensation and correction time to obtain a target response time.

[0010] Optionally, the compensation and correction time includes at least one of a hardware delay time, a propagation delay time, a software reference delay, and a clock synchronization delay;

[0011] Compensate and correct the initial response time based on the compensation correction time to obtain the target response time, including:

[0012] Sum the compensation correction time and the initial response time to obtain the target response time.

[0013] Optionally, determine the hardware delay time through the following method:

[0014] Obtain the real-time temperature based on the temperature sensors deployed at the key nodes of the radio frequency link;

[0015] Obtain the clock frequency deviation based on the frequency monitoring circuits deployed at the key nodes of the radio frequency link;

[0016] Establish a temperature dynamic compensation model according to the real-time temperature and the clock frequency deviation;

[0017] Determine the hardware delay time according to the temperature dynamic compensation model.

[0018] Optionally, the temperature dynamic compensation model is expressed by the following formula:

[0019] t1(T,Δf)=t0*(1+α(T-T0)+βΔf)

[0020] Where, t1 is the hardware delay time, t0 is the calibration value, T is the real-time temperature, Δf is the clock frequency deviation, T0 is the temperature standard value, α is the temperature coefficient, and β is the frequency drift coefficient.

[0021] Optionally, determine the propagation delay time through the following method:

[0022] Send a broadband detection signal through a vector network analyzer or software-defined radio and capture the channel impulse response;

[0023] According to the channel impulse response, determine the additional delay corresponding to each path, and determine the additional delay corresponding to the strongest reflection path from the additional delays corresponding to each path;

[0024] Obtain the antenna spacing corresponding to the transmission of the test signal, and determine the propagation delay time according to the antenna spacing, the additional delay corresponding to the strongest reflection path, and the speed of light.

[0025] Optionally, the software reference delay includes at least one of the delay components corresponding to the physical layer, the MAC layer, the network layer, and the application layer.

[0026] Optionally, determine the clock synchronization delay through the following method:

[0027] Determine the delay time corresponding to the PTP clock mode and the delay time corresponding to the GPS clock mode;

[0028] Obtain the weights corresponding to the PTP clock mode and the GPS clock mode respectively;

[0029] According to the weights of the PTP clock mode and the GPS clock mode, perform weighted processing on the delay time corresponding to the PTP clock mode and the delay time corresponding to the GPS clock mode to obtain the clock synchronization delay.

[0030] Optionally, the frame header of the test signal includes a check field, and the reception time of the received response signal is recorded, including:

[0031] Parse the response signal to obtain the field to be checked and the serial number;

[0032] Compare the field to be checked with the check field. If the field to be checked is consistent with the check field and the serial number is a consecutive serial number, record the reception time of the received response signal.

[0033] On the other hand, an embodiment of the present application provides a test device for the response time of a wireless communication device, including:

[0034] A transmission time acquisition module, configured to send a test signal to the wireless communication device to be tested through a preset transmission method and record the transmission time of the sent test signal;

[0035] A reception time acquisition module, configured to receive the response signal returned by the wireless communication device to be tested based on the test signal and record the reception time of the received response signal;

[0036] A response time determination module, configured to obtain an initial response time according to the transmission time and the reception time;

[0037] A response time correction module, configured to determine a compensation correction time and perform compensation correction on the initial response time based on the compensation correction time to obtain a target response time.

[0038] Optionally, the compensation correction time includes at least one of a hardware delay time, a propagation delay time, a software reference delay, and a clock synchronization delay;

[0039] When the response time correction module performs compensation correction on the initial response time based on the compensation correction time to obtain the target response time, it is specifically configured to:

[0040] Sum the compensation correction time and the initial response time to obtain the target response time.

[0041] Optionally, the hardware delay time is determined by the following method:

[0042] Obtain the real-time temperature based on the temperature sensor deployed at the key node of the radio frequency link;

[0043] Obtain the clock frequency deviation based on the frequency monitoring circuit deployed at the key nodes of the RF link;

[0044] Establish a temperature dynamic compensation model according to the real-time temperature and the clock frequency deviation;

[0045] Determine the hardware delay time according to the temperature dynamic compensation model.

[0046] Optionally, the temperature dynamic compensation model is expressed by the following formula:

[0047] t1(T,Δf)=t0*(1+α(T-T0)+βΔf)

[0048] Where, t1 is the hardware delay time, t0 is the calibration value, T is the real-time temperature, Δf is the clock frequency deviation, T0 is the temperature standard value, α is the temperature coefficient, and β is the frequency drift coefficient.

[0049] Optionally, the propagation delay time is determined by the following method:

[0050] Send a broadband detection signal through a vector network analyzer or software-defined radio, and capture the channel impulse response;

[0051] According to the channel impulse response, determine the additional delay corresponding to each path, and determine the additional delay corresponding to the strongest reflection path from the additional delays corresponding to each path;

[0052] Obtain the antenna spacing corresponding to the transmission of the test signal, and determine the propagation delay time according to the antenna spacing, the additional delay corresponding to the strongest reflection path, and the speed of light.

[0053] Optionally, the software reference delay includes at least one of the delay components corresponding to the physical layer, the MAC layer, the network layer, and the application layer.

[0054] Optionally, the clock synchronization delay is determined by the following method:

[0055] Determine the delay time corresponding to the PTP clock mode and the delay time corresponding to the GPS clock mode;

[0056] Obtain the respective weights corresponding to the PTP clock mode and the GPS clock mode;

[0057] According to the weight of the PTP clock mode and the weight of the GPS clock mode, perform weighted processing on the delay time corresponding to the PTP clock mode and the delay time corresponding to the GPS clock mode to obtain the clock synchronization delay.

[0058] Optionally, the frame header of the test signal includes a check field. When the receiving time acquisition module records the receiving time of the received response signal, it is specifically used for:

[0059] Parse the response signal to obtain the field to be verified and the serial number;

[0060] Compare the field to be verified with the verification field. If the field to be verified is consistent with the verification field and the serial number is a consecutive serial number, record the reception time of the received response signal.

[0061] In another aspect, an embodiment of the present application provides an electronic device, including: a processor and a memory. The memory is configured to store machine-readable instructions, and when the instructions are executed by the processor, the processor executes any one of the methods for testing the response time of a wireless communication device.

[0062] In still another aspect, an embodiment of the present application provides an electronic device, including a processor and a memory:

[0063] The memory is configured to store machine-readable instructions, and when the instructions are executed by the processor, the processor executes any one of the methods for testing the response time of a wireless communication device.

[0064] The beneficial effects brought by the technical solutions provided by the embodiments of the present application at least include:

[0065] In the embodiments of the present application, when determining the response time of a wireless communication device, based on the transmission time of the test signal and the reception time of the received response signal, an initial response time is obtained, and then the initial response time is compensated and corrected based on the compensation correction time to obtain the final target response time. The target response time obtained at this time is obtained through dynamic hardware delay calibration, multipath propagation delay modeling, protocol stack delay decomposition, dual-mode clock synchronization, and anti-interference joint triggering mechanism, which solves the defects of traditional test methods in terms of accuracy, reliability, and scenario adaptability, provides a full-stack technical guarantee for the research and development and certification of high-real-time wireless communication devices, and promotes the large-scale implementation in industries such as industry and intelligent transportation.

[0066] In the embodiments of the present application, the delay time is decomposed into the physical layer, MAC layer, network layer, and application layer, which can accurately locate the delay bottleneck and can also guide the independent modeling of protocol stack development to avoid errors caused by a unified compensation value.

[0067] In the embodiments of the present application, through dynamic hardware delay calibration, the influence of hardware delay by factors such as temperature, power supply voltage, and device aging can be eliminated, the test accuracy can be improved, complex scenario adaptation can be supported, the test flexibility can be enhanced, enabling the wireless communication device test system to achieve a leapfrog upgrade in terms of accuracy, efficiency, and reliability, providing key technical support for high-real-time applications, and at the same time promoting the evolution of industry test standards towards intelligence and adaptability.

[0068] In the embodiments of the present application, by modeling multipath components (i.e., extracting the strongest reflection path in the channel impulse response), the propagation delay error can be effectively reduced, the test accuracy in complex environments can be improved, and at the same time, the test requirements of mobile devices such as vehicles and drones can be supported, avoiding the error accumulation caused by static models, accurately evaluating the beamforming and handover time delays, and optimizing the network performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0069] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the accompanying drawings required for the description of the embodiments. Obviously, the accompanying drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0070] Figure 1 It is a schematic flowchart of a method for testing the response time of a wireless communication device provided by an embodiment of the present application;

[0071] Figure 2 It is a schematic structural diagram of a device for testing the response time of a wireless communication device provided by an embodiment of the present application;

[0072] Figure 3 It is a schematic structural diagram of an electronic device provided by an embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0073] The following details the embodiments of the present application. The examples of the embodiments are shown in the accompanying drawings, where the same or similar reference numerals represent the same or similar elements or elements with the same or similar functions from beginning to end. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application and should not be construed as a limitation of the present invention.

[0074] Those skilled in the art of the present technology can understand that unless specifically stated otherwise, the singular forms "a", "an", "the" and "said" used herein may also include the plural forms. It should be further understood that the term "including" used in the description of the present application means the presence of the described features, integers, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or their groups. It should be understood that when we say that an element is "connected" or "coupled" to another element, it can be directly connected or coupled to other elements, or there may also be intermediate elements. In addition, the "connection" or "coupling" used herein may include wireless connection or wireless coupling. The phrase "and / or" used herein includes all or any unit and all combinations of one or more related listed items.

[0075] To make the objectives, technical solutions, and advantages of this application more clear, the following will further describe the implementation manners of this application in detail with reference to the accompanying drawings.

[0076] With the rapid development of wireless communication technologies, application scenarios such as the Internet of Things (IoT), industrial automation, and 5G / 6G have increasingly stringent requirements for device real-time performance. As one of the core metrics for measuring the performance of wireless communication devices, response time directly affects the overall system latency, network throughput, and user experience. Therefore, developing high-precision and highly reliable response time testing methods has become a key technical requirement in device research and development, certification, and optimization.

[0077] Currently, the commonly used wireless device response time testing methods in the industry mainly include the following two categories:

[0078] 1. Simulation testing based on software protocol stacks: By using software simulation tools (such as NS-3, OPNET) to simulate the device communication process and estimate the theoretical response time. However, such methods cannot truly reflect actual factors such as hardware processing delays, radio frequency link transmission fluctuations, and environmental interference, resulting in significant deviations between the test results and the real scenario.

[0079] 2. Simple hardware loop testing: By directly connecting the sending and receiving devices to form a physical loop and using an oscilloscope or logic analyzer to measure the signal round-trip time. Although this method can partially reflect hardware delays, it has the following defects:

[0080] Insufficient clock synchronization accuracy: The clocks of the test device and the device under test (DUT) are not strictly synchronized, introducing timestamp recording errors;

[0081] Lack of systematic delay compensation: Ignoring signal propagation delays, device internal processing delays (such as ADC / DAC conversion, protocol stack parsing), and the inherent delays of test instruments, resulting in measured values containing non-target errors;

[0082] Weak anti-interference ability: Electromagnetic noise in an open environment can easily lead to signal misjudgment, and multiple repeated tests are required to reduce accidental errors, resulting in low efficiency.

[0083] In addition, existing test schemes mostly rely on a single correction term (such as fixed hardware delay compensation), and do not establish a multi-dimensional dynamic compensation model, making it difficult to adapt to different communication protocols (such as the delay characteristic differences between low-power Bluetooth BLE and high-speed Wi-Fi 6E) and complex channel environments (such as multipath fading, burst interference), resulting in limited universality and accuracy of test results.

[0084] Based on this, this application provides a method, device, and equipment for testing the response time of wireless communication devices, aiming to solve all or part of the above technical problems.

[0085] The technical solution of the present application and how the technical solution of the present application solves the above technical problems will be described in detail below with specific embodiments. These several specific embodiments below can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments. The embodiments of the present application will be described below with reference to the accompanying drawings.

[0086] Specifically, as Figure 1 shown, the method may include:

[0087] Step S101, sending a test signal to the wireless communication device to be tested through a preset sending method, and recording the sending time when the test signal is sent.

[0088] Optionally, before sending the test signal, a signal generator or test software (such as LabVIEW, MATLAB) can be used in the present application to generate a test signal, and the test signal conforms to the communication protocol of the wireless communication device to be tested (such as Wi-Fi, Bluetooth, LTE), and specifically may include frequency, modulation method (QPSK, OFDM, etc.), data packet format (such as 802.11 frame) and content (such as pseudo-random sequence), etc.

[0089] Correspondingly, after generating the test signal, the test signal can be sent to the wireless communication device to be tested based on a preset sending method, and the specific implementation method of the preset sending method can be set according to actual needs, and the embodiments of the present application do not limit this. For example, the signal can be sent to the wireless communication device to be tested (DUT) through a radio frequency cable (conductive test) or an antenna (radiation test), and a dedicated test device (such as a vector signal generator) or software-defined radio (SDR, such as USRP) can be used to control the sending of the test signal.

[0090] Further, when sending the test signal to the wireless communication device to be tested, record the sending time when the test signal is sent. For example, a high-precision clock source (such as a GPS-tamed atomic clock, a PTP synchronization network) can be specifically used to record the sending time, and the accuracy can reach the microsecond level (μs). It should be noted that during this process, if computer control is used, background tasks need to be turned off to reduce the operating system delay, and the time stamp is synchronously recorded through hardware triggering (GPIO) as the sending time.

[0091] Step S102, receiving a response signal returned by the wireless communication device to be tested based on the test signal, and recording the receiving time when the response signal is received.

[0092] Optionally, the specific type of the wireless communication device to be tested can be set according to the actual situation. For example, a spectrum analyzer, a vector signal analyzer, or a receiver SDR can be used as the wireless communication device to be tested to capture the test signal. Among them, the receiving device needs to be in the same frequency band as the device under test and configured with matching demodulation parameters (such as symbol rate, coding method).

[0093] Correspondingly, the wireless communication device to be tested determines the arrival of the test signal through a triggering mechanism (such as level triggering, specific frame header detection), records the reception time of the received response signal when the signal arrives, and stores the response data in real time for subsequent analysis (such as using an oscilloscope or software tool to capture IQ data). It should be noted that the clock of the wireless communication device to be tested needs to be strictly synchronized with the sending end (such as using the same clock source or NTP / PTP protocol for synchronization), and the reception time is the timestamp of the first valid symbol (such as marked by the FPGA hardware timestamp).

[0094] In practical applications, to ensure the accuracy of the response time, environmental interference (such as other wireless signals, electromagnetic noise) can be excluded. If necessary, the test can be carried out in a shielded room, and multiple tests are performed to handle possible packet loss or error codes. A timeout mechanism is set to avoid infinite waiting for the response.

[0095] In an optional embodiment of the present application, the frame header of the test signal includes a check field. Recording the reception time of the received response signal includes:[[]]END]

[0096] Parsing the response signal to obtain the field to be checked and the sequence number;

[0097] Comparing the field to be checked with the check field. If the field to be checked is consistent with the check field and the sequence number is a consecutive sequence number, record the reception time of the received response signal.

[0098] Optionally, a check field can be set in the frame header of the test signal. When the response signal is received, the response signal is parsed to obtain the field to be checked and the sequence number, and then the parsed field to be checked is compared with the set check field. If the field to be checked is consistent with the set check field and the sequence number is a consecutive sequence number, record the reception time of the received response signal.

[0099] For example, add a CRC-16 check field (such as polynomial 0x8005) to the test signal frame header. The frame body contains an incrementing sequence number. Parse the frame header of the received data in real time, calculate the CRC and compare it with the field value. When the CRC check passes and the sequence numbers are consecutive, it is determined as a valid response, and a timestamp record is triggered as the reception time.

[0100] In practical applications, to have better anti-interference capabilities, an anti-interference combined trigger mechanism (i.e., CRC check + dynamic threshold mechanism) can be set. At this time, the trigger condition for recording the trigger timestamp is as follows:

[0101] Trigger condition = (CRC check passed) ∧ (signal power > threshold)

[0102] At this time, only when the CRC check passes and the signal power is greater than the threshold will it be recognized as a response signal, and the receiving moment of the timestamp record will be triggered.

[0103] Among them, the threshold is:

[0104] V th (t) = μ 噪声 (t) + 3·σ 噪声 (t)

[0105] Among them, μ 噪声 is the average noise power in the past 1 ms, and σ 噪声 is the standard deviation of the noise power.

[0106] Step S103: Obtain the initial response time according to the sending moment and the receiving moment.

[0107] Optionally, after obtaining the sending moment and the receiving moment, the difference between the sending moment and the receiving moment can be used as the initial response time. That is:

[0108] Δt = t 接收 -t 发送

[0109] Among them, Δt is the initial response time, t 接收 is the receiving moment, and t 发送 is the sending moment.

[0110] Step S104: Determine the compensation and correction time, and compensate and correct the initial response time based on the compensation and correction time to obtain the target response time.

[0111] Optionally, after obtaining the initial response time, the compensation and correction time can be determined, and then the initial response time can be compensated and corrected based on the compensation and correction time to obtain the target response time. At this time, the obtained target response time can achieve microsecond-level accurate measurement of the response time in a complex environment, and can significantly improve the accuracy, repeatability, and scenario applicability of the test results.

[0112] In an optional embodiment of the present application, the compensation and correction time includes at least one of the hardware delay time, the propagation delay time, the software reference delay, and the clock synchronization delay;

[0113] Compensating and correcting the initial response time based on the compensation and correction time to obtain the target response time includes:

[0114] Sum the compensation correction time and the initial response time to obtain the target response time.

[0115] Optionally, the compensation correction time may include at least one of a hardware delay time, a propagation delay time, a software reference delay, and a clock synchronization delay. In this case, the compensation correction time and the initial response time can be added, and the sum obtained can be used as the final target response time.

[0116] In an optional embodiment of the present application, the hardware delay time is determined by the following method:

[0117] Obtain the real-time temperature based on the temperature sensors deployed on the key nodes of the radio frequency link;

[0118] Obtain the clock frequency deviation based on the frequency monitoring circuits deployed on the key nodes of the radio frequency link;

[0119] Establish a temperature dynamic compensation model according to the real-time temperature and the clock frequency deviation;

[0120] Determine the hardware delay time according to the temperature dynamic compensation model.

[0121] Optionally, temperature sensors and frequency monitoring circuits (such as PLL feedback signals) can be deployed on the transmitting end of the test signal and the key nodes of the radio frequency link of the wireless communication device to be tested (such as power amplifiers, ADC / DAC modules). Then, obtain the real-time temperature based on the deployed temperature sensors, and obtain the clock frequency deviation based on the deployed frequency monitoring circuits. Further, establish a temperature dynamic compensation model based on the obtained real-time temperature and clock frequency deviation, and the temperature dynamic compensation model can be expressed by the following formula:

[0122] t1(T,Δf)=t0*(1+α(T-T0)+βΔf)

[0123] Where t1 is the hardware delay time, t0 is the calibration value (measured at room temperature T0), T is the real-time temperature, Δf is the clock frequency deviation, T0 is the temperature standard value (i.e., room temperature), α is the temperature coefficient, and β is the frequency drift coefficient.

[0124] Correspondingly, after establishing the temperature dynamic compensation model, the hardware delay time can be dynamically and real-time corrected through the temperature dynamic compensation model based on the obtained real-time temperature and clock frequency deviation.

[0125] For example, when calibrating the transmission end delay t 标定 =2.5 μs at room temperature T0 = 25 °C, when the temperature rises to T = 45 °C and the frequency drift Δf = 2 ppm:

[0126] t1 = 2.5×(1 + 0.02%×20 + 0.1%×2) = 2.5×1.004 = 2.51 μs

[0127] In the embodiments of the present application, through dynamic hardware delay calibration, the influence of hardware delay by factors such as temperature, supply voltage, and device aging can be eliminated, the test accuracy can be improved, complex scenario adaptation can be supported, the test flexibility can be enhanced, enabling a leapfrog upgrade of the wireless communication device test system in terms of accuracy, efficiency, and reliability, providing key technical support for high-real-time applications, and promoting the evolution of industry test standards towards intelligence and self-adaptation at the same time.

[0128] In an alternative embodiment of the present application, the propagation delay time is determined by the following method:

[0129] Send a broadband probing signal through a vector network analyzer or software-defined radio, and capture the channel impulse response;

[0130] According to the channel impulse response, determine the additional delay corresponding to each path, and determine the additional delay corresponding to the strongest reflection path from the additional delays corresponding to each path;

[0131] Obtain the antenna spacing corresponding to the time of sending the test signal, and determine the propagation delay time according to the antenna spacing, the additional delay corresponding to the strongest reflection path, and the speed of light.

[0132] Optionally, for the propagation delay time, a vector network analyzer (VNA) or software-defined radio (SDR) can be used to send a broadband probing signal (such as a Chirp signal), and then capture the channel impulse response based on the sent broadband probing signal. Further, according to the obtained channel impulse response, determine the additional delay corresponding to each path (i.e., extract the multipath components), and then determine the additional delay corresponding to the strongest reflection path from the additional delays corresponding to each path. Among them, the extraction of multipath components can be expressed as:

[0133]

[0134] where a k is the attenuation coefficient of the kth path, and τ k is the additional delay of the kth path.

[0135] Further, the additional delay of the multipath takes the τ K of the strongest reflection path, and the additional delay is:

[0136] τ 多径 = max(τ k )(when a k > 0.5a main path)

[0137] Correspondingly, the antenna spacing corresponding to the transmission of the test signal can be obtained, and then the propagation delay time can be determined according to the antenna spacing, the additional delay corresponding to the strongest reflection path, and the speed of light. Specifically:

[0138]

[0139] where t 传播 is the propagation delay time, d is the antenna spacing, c is the speed of light, and τ k is the additional delay of the strongest reflection path.

[0140] For example, in an indoor environment, the main path delay of 33.3 ns (corresponding to a distance of 10 m) is measured, and the additional delay of the strongest reflection path τ1 = 15 ns. Then the corrected propagation delay time is:

[0141] t 传播 = 33.3 + 15 = 48.3 ns

[0142] In the embodiments of the present application, the traditional method calculates the propagation delay only based on the straight-line distance, ignoring the additional delay caused by multipath effects (such as indoor reflections and metal blockages). In the present application, by modeling the multipath components (extracting the strongest reflection path in the channel impulse response), the propagation delay error can be reduced from 50 ns to 10 ns, improving the test accuracy in complex environments. At the same time, it supports the test requirements of mobile devices such as vehicles and drones, avoiding error accumulation caused by static models, and can accurately evaluate the beamforming and handover time delays to optimize the network performance.

[0143] In an alternative embodiment of the present application, the software reference delay includes at least one of the delay components corresponding to the physical layer, the MAC layer, the network layer, and the application layer.

[0144] Optionally, the software reference is divided into the physical layer (PHY), the MAC layer, the network layer (such as IP), and the application layer. At this time, the software reference delay can be decomposed into independent components of the physical layer (PHY), the MAC layer, the network layer (such as IP), and the application layer, and then the sum of the independent components of the physical layer (PHY), the MAC layer, the network layer (such as IP), and the application layer is used as the software reference delay. Among them, the physical layer can measure the modulation / demodulation time (such as the OFDM symbol processing time) as the delay time, the MAC layer can count the frame encapsulation / parsing time (such as the 802.11 frame aggregation delay) as the delay time, the network layer calculates the data packet fragmentation / reassembly time as the delay time, and the application layer tests the user-state protocol processing time (such as MQTT message serialization) as the delay time.

[0145] Optionally, for software benchmark latency, the protocol stack layer latency model can also be automatically matched according to the data packet header fields (such as EtherType 0x0800 indicating IPv4), and then dynamic protocol identification and compensation can be performed.

[0146] For example, if the TCP protocol (port number 80) is detected, an additional retransmission queue latency compensation item is added:

[0147] t TCP = t 基线 + N 重传 × t RTO

[0148] Where, N 重传为 is the number of retransmissions (counted by SEQ / ACK numbers), and t RTO is the timeout retransmission time (usually ≥200 ms).

[0149] In this application, the latency time is decomposed into the physical layer, MAC layer, network layer, and application layer to identify the contributions of each layer, which can accurately locate the latency bottleneck, and can also guide the development of the protocol stack (such as reducing the overhead of the TCP retransmission mechanism), improving the real-time performance of the device. At the same time, independent modeling is performed for the latency characteristics of different protocols (such as low-power Bluetooth BLE and high-speed 5G NR) to avoid errors caused by a unified compensation value.

[0150] In an optional embodiment of this application, the clock synchronization latency is determined by the following method:

[0151] Determine the latency time corresponding to the PTP clock mode and the latency time corresponding to the GPS clock mode;

[0152] Obtain the respective weights corresponding to the PTP clock mode and the GPS clock mode;

[0153] According to the weights of the PTP clock mode and the weights of the GPS clock mode, perform weighted processing on the latency time corresponding to the PTP clock mode and the latency time corresponding to the GPS clock mode to obtain the clock synchronization latency.

[0154] Optionally, in this application, a synchronization mode decision logic can be selected. Among them, the PTP priority mode is that when the network environment is stable (PTP path delay jitter <1 μs), PTP synchronization is adopted, and the master clock state is elected through BMCA (Best Master Clock Algorithm). And GPS seamless switching means that if PTP synchronization is lost (3 consecutive Sync message timeouts) or the GPS signal strength > -130 dBm, then switch to the GPS disciplined clock, and the switching time <100 ms.

[0155] Correspondingly, when two clock modes coexist, weighted average fusion output can be adopted, that is, determine the delay time corresponding to the PTP clock mode and the delay time corresponding to the GPS clock mode, and then, according to the weight of the PTP clock mode and the weight of the GPS clock mode, perform weighted processing on the delay time corresponding to the PTP clock mode and the delay time corresponding to the GPS clock mode to obtain the clock synchronization delay. Specifically:

[0156] t 同步 =ω PTP ·t PTP +ω GPS ·t GPS

[0157]

[0158] Among them, σ PTP is the standard deviation of the PTP clock deviation (about 50 ns in the laboratory environment), and σ GPS is the standard deviation of the GPS clock deviation (about 100 ns in the open environment).

[0159] In the embodiments of the present application, through the collaborative innovation of dynamic hardware delay calibration, multipath propagation delay modeling, protocol stack delay decomposition, dual-mode clock synchronization and anti-interference joint triggering mechanism, the defects of traditional test methods in terms of accuracy, reliability and scenario adaptability are solved, providing a full-stack technical guarantee for the research and development and certification of high-real-time wireless communication devices, and promoting the large-scale implementation in fields such as industry and intelligent transportation.

[0160] The embodiments of the present application provide a test device for the response time of a wireless communication device. As Figure 2 shown, the device may include: a transmission time acquisition module 201, a reception time acquisition module 202, a response time determination module 203, and a response time correction module 204, where

[0161] The transmission time acquisition module is configured to send a test signal to the wireless communication device to be tested through a preset transmission method, and record the transmission time of sending the test signal;

[0162] The reception time acquisition module is configured to receive a response signal returned by the wireless communication device to be tested based on the test signal, and record the reception time of receiving the response signal;

[0163] The response time determination module is configured to obtain an initial response time according to the transmission time and the reception time;

[0164] The response time correction module is configured to determine a compensation correction time, and perform compensation correction on the initial response time based on the compensation correction time to obtain a target response time.

[0165] Optionally, the compensation correction time includes at least one of a hardware delay time, a propagation delay time, a software reference delay, and a clock synchronization delay;

[0166] When the response time correction module compensates and corrects the initial response time based on the compensation correction time to obtain the target response time, it is specifically used for:

[0167] Sum the compensation correction time and the initial response time to obtain the target response time.

[0168] Optionally, the hardware delay time is determined by the following method:

[0169] Obtain the real-time temperature based on the temperature sensors deployed at the key nodes of the radio frequency link;

[0170] Obtain the clock frequency deviation based on the frequency monitoring circuits deployed at the key nodes of the radio frequency link;

[0171] Establish a temperature dynamic compensation model according to the real-time temperature and the clock frequency deviation;

[0172] Determine the hardware delay time according to the temperature dynamic compensation model.

[0173] Optionally, the temperature dynamic compensation model is expressed by the following formula:

[0174] t1(T,Δf)=t0*(1+α(T-T0)+βΔf)

[0175] Where, t1 is the hardware delay time, t0 is the calibration value, T is the real-time temperature, Δf is the clock frequency deviation, T0 is the temperature standard value, α is the temperature coefficient, and β is the frequency drift coefficient.

[0176] Optionally, the propagation delay time is determined by the following method:

[0177] Send a broadband detection signal through a vector network analyzer or software-defined radio and capture the channel impulse response;

[0178] According to the channel impulse response, determine the additional delay corresponding to each path, and determine the additional delay corresponding to the strongest reflection path from the additional delays corresponding to each path;

[0179] Obtain the antenna spacing corresponding to the sending of the test signal, and determine the propagation delay time according to the antenna spacing, the additional delay corresponding to the strongest reflection path, and the speed of light.

[0180] Optionally, the software reference delay includes at least one of a delay component corresponding to the physical layer, a delay component corresponding to the MAC layer, a delay component corresponding to the network layer, and a delay component corresponding to the application layer.

[0181] Optionally, the clock synchronization delay is determined in the following manner:

[0182] Determine the delay time corresponding to the PTP clock mode and the delay time corresponding to the GPS clock mode;

[0183] Obtain the respective weights corresponding to the PTP clock mode and the GPS clock mode;

[0184] According to the weights of the PTP clock mode and the GPS clock mode, perform weighted processing on the delay time corresponding to the PTP clock mode and the delay time corresponding to the GPS clock mode to obtain the clock synchronization delay.

[0185] Optionally, the frame header of the test signal includes a check field. When the reception time acquisition module records the reception time of the received response signal, it is specifically used for:

[0186] Parse the response signal to obtain the field to be checked and the serial number;

[0187] Compare the field to be checked with the check field. If the field to be checked is consistent with the check field and the serial number is a consecutive serial number, record the reception time of the received response signal.

[0188] The test device for the response time of a wireless communication device in this embodiment can execute the test method for the response time of a wireless communication device shown in the embodiments of the present application. The implementation principle is similar and will not be elaborated here.

[0189] The embodiments of the present application provide an electronic device. The electronic device in the embodiments of the present application includes: a processor; and a memory configured to store machine-readable instructions that, when executed by the processor, cause the processor to execute a test method for the response time of a wireless communication device.

[0190] Compared with the prior art, it can be achieved that when determining the response time of a wireless communication device, based on the transmission time of the sent test signal and the reception time of the received response signal, an initial response time is obtained, and then the initial response time is compensated and corrected based on the compensation and correction time to obtain the final target response time. The target response time obtained at this time is obtained through dynamic hardware delay calibration, multipath propagation delay modeling, protocol stack delay decomposition, dual-mode clock synchronization, and anti-interference joint trigger mechanism, solving the defects of traditional test methods in terms of accuracy, reliability, and scenario adaptability, providing a full-stack technical guarantee for the research and development and certification of high-real-time wireless communication devices, and promoting the large-scale implementation in fields such as industry and intelligent transportation.

[0191] The embodiments of the present application provide an electronic device, as Figure 3 shown Figure 3The electronic device shown includes: a processor 2001 and a memory 2003. Among them, the processor 2001 and the memory 2003 are connected, such as being connected through a bus 2002. Optionally, the electronic device 2000 may further include a transceiver 2004. It should be noted that in practical applications, the transceiver 2004 is not limited to one, and the structure of the electronic device 2000 does not constitute a limitation to the embodiments of the present application.

[0192] The processor 2001 can be a CPU, a general-purpose processor, a DSP, an ASIC, an FPGA or other programmable logic devices, transistor logic devices, hardware components or any combination thereof. It can implement or execute various exemplary logic blocks, modules and circuits described in connection with the disclosure of the present application. The processor 2001 can also be a combination that implements computing functions, such as a combination including one or more microprocessors, a combination of a DSP and a microprocessor, etc.

[0193] The bus 2002 may include a path for transmitting information between the above components. The bus 2002 can be a PCI bus or an EISA bus, etc. The bus 2002 can be divided into an address bus, a data bus, a control bus, etc. For the sake of representation, Figure 3 only a thick line is used to represent it in the figure, but it does not mean that there is only one bus or one type of bus.

[0194] The memory 2003 can be a ROM or other types of static storage devices that can store static information and instructions, a RAM or other types of dynamic storage devices that can store information and instructions, or it can also be an EEPROM, a CD-ROM or other optical disc storage (including compact discs, laser discs, optical discs, digital versatile discs, Blu-ray discs, etc.), magnetic storage media or other magnetic storage devices, or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto.

[0195] The memory 2003 is used to store the application program code for implementing the solution of the present application, and is controlled by the processor 2001 to execute. The processor 2001 is used to execute the application program code stored in the memory 2003 to implement Figure 2 the actions of a test device for the response time of a wireless communication device provided by the shown embodiment.

[0196] It should be understood that although the steps in the flowchart of the accompanying drawings are shown sequentially as indicated by the arrows, these steps are not necessarily executed sequentially in the order indicated by the arrows. Unless otherwise clearly stated in this document, there is no strict order restriction for the execution of these steps, and they can be executed in other orders. Moreover, at least a part of the steps in the flowchart of the accompanying drawings may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but can be executed at different times, and their execution order is not necessarily sequential, but can be executed alternately or in turn with at least a part of other steps or sub-steps or stages of other steps.

[0197] The above are only some embodiments of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the principle of the present invention, several improvements and refinements can be made, and these improvements and refinements should also be regarded as the protection scope of the present invention.

Claims

1. A method for testing the response time of a wireless communication device, characterized in that, Including: Sending a test signal to a wireless communication device to be tested through a preset sending mode, and recording the sending moment when the test signal is sent; Receiving a response signal returned by the wireless communication device to be tested based on the test signal, and recording the receiving moment when the response signal is received; Obtaining an initial response time according to the sending moment and the receiving moment; Determining a compensation correction time, and compensating and correcting the initial response time based on the compensation correction time to obtain a target response time.

2. The method according to claim 1, wherein The compensation correction time includes at least one of a hardware delay time, a propagation delay time, a software reference delay, and a clock synchronization delay; The compensating and correcting the initial response time based on the compensation correction time to obtain a target response time includes: Performing a summation process on the compensation correction time and the initial response time to obtain the target response time.

3. The method according to claim 2, characterized in that Determining the hardware delay time through the following method: Obtaining real-time temperature based on a temperature sensor deployed at a key node of the radio frequency link; Obtaining a clock frequency deviation based on a frequency monitoring circuit deployed at the key node of the radio frequency link; Establishing a temperature dynamic compensation model according to the real-time temperature and the clock frequency deviation; Determining the hardware delay time according to the temperature dynamic compensation model.

4. The method according to claim 3, wherein The temperature dynamic compensation model is represented by the following formula: t1(T,Δf)=t0*(1+α(T-T0)+βΔf) Where, t1 is the hardware delay time, t0 is a calibration value, T is the real-time temperature, Δf is the clock frequency deviation, T0 is the temperature standard value, α is the temperature coefficient, and β is the frequency drift coefficient.

5. The method according to claim 2, characterized in that, Determining the propagation delay time through the following method: Sending a broadband detection signal through a vector network analyzer or software-defined radio, and capturing the channel impulse response; Determining an additional delay corresponding to each path according to the channel impulse response, and determining an additional delay corresponding to the strongest reflection path from the additional delays corresponding to each path; Obtaining the antenna spacing corresponding to when the test signal is sent, and determining the propagation delay time according to the antenna spacing, the additional delay corresponding to the strongest reflection path, and the speed of light.

6. The method according to claim 2, wherein The software reference delay includes at least one of a delay component corresponding to the physical layer, a delay component corresponding to the MAC layer, a delay component corresponding to the network layer, and a delay component corresponding to the application layer.

7. The method according to claim 2, characterized in that, Determining the clock synchronization delay through the following method: Determining a delay time corresponding to the PTP clock mode and a delay time corresponding to the GPS clock mode; Obtaining respective weights corresponding to the PTP clock mode and the GPS clock mode; Performing a weighting process on the delay time corresponding to the PTP clock mode and the delay time corresponding to the GPS clock mode according to the weight of the PTP clock mode and the weight of the GPS clock mode to obtain the clock synchronization delay.

8. The method according to claim 1, wherein The frame header of the test signal includes a check field, and the recording the receiving moment when the response signal is received includes: Parsing the response signal to obtain a field to be checked and a sequence number; Compare the field to be verified with the verification field. If the field to be verified is consistent with the verification field and the serial number is a consecutive serial number, record the reception time of receiving the response signal.

9. A test device for the response time of a wireless communication device, characterized in that, Comprising: A transmission time acquisition module, configured to send a test signal to a wireless communication device to be tested through a preset transmission method, and record the transmission time of sending the test signal; A reception time acquisition module, configured to receive a response signal returned by the wireless communication device to be tested based on the test signal, and record the reception time of receiving the response signal; A response time determination module, configured to obtain an initial response time according to the transmission time and the reception time; A response time correction module, configured to determine a compensation correction time, and perform compensation correction on the initial response time based on the compensation correction time to obtain a target response time.

10. An electronic device, characterized in that, Comprising: A processor and a memory, the memory is configured to store machine-readable instructions, and when the instructions are executed by the processor, the processor executes the method according to any one of claims 1-8.