Broadband power amplifier with output reconfigurable network
Through the design of the three-stage cascaded amplifier circuit and output reconfigurable network, the problem of poor linearity of GaN materials in low power state is solved, and high efficiency and high harmonic rejection is achieved, which is suitable for broadband power amplifiers.
Patent Information
- Application Number
- CN202510813675.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-18
- Publication Date
- 2025-07-22
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
GaN materials have poor linearity in low power states, making it difficult to maintain high efficiency and suppress the generation of high harmonics in low power states.
The three-stage cascaded amplifier circuit and output reconfigurable network are adopted. Through an amplifier design with a gate width ratio of 1:2:8, the first and second switch control output reconfigurable network is combined with the first and second switches to ground and match the fundamental wave in high-power mode to suppress harmonics; and a parallel-series LC structure is formed in low-power mode to suppress harmonics.
It realizes high efficiency and high power output under normal power supply conditions, maintains good linearity in low voltage state and suppresses the generation of high harmonics without increasing chip area.
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Figure CN120357856A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of microelectronics technology, and particularly to a broadband power amplifier with an output reconfigurable network. Background Art
[0002] The third-generation wide-bandgap semiconductor materials represented by gallium nitride (GaN) have become the forefront topic and hot issue in the global semiconductor research field. GaN technology can achieve high output power within a relatively wide frequency range. Benefiting from its excellent characteristics such as wide bandgap width, high electron mobility, fast switching speed, and high thermal conductivity, GaN materials show significant advantages in high-frequency, high-power, and high-temperature application fields and become the ideal choice for high-power and high-efficiency broadband devices.
[0003] For certain specific application scenarios, the system only needs to operate in a low-power state most of the time, and occasionally requires high-power output. Since the GaN material itself has a great advantage in terms of compression depth, but has poor linearity when operating at low power.
[0004] The above content is only used to assist in understanding the technical solution of this application, and does not represent an admission that the above content is prior art. Summary of the Invention
[0005] The main purpose of this application is to provide a broadband power amplifier with an output reconfigurable network, aiming to enable the bandwidth amplifier to maintain high-power output with high efficiency under normal power supply conditions, and to ensure good linearity and suppress the generation of high-order harmonics while achieving low-power output in a low-voltage state.
[0006] To achieve the above purpose, this application proposes a broadband power amplifier with an output reconfigurable network, including:
[0007] A three-stage cascaded amplifier circuit, which is composed of a first-stage amplifier, a second-stage amplifier, and a third-stage amplifier connected in sequence. The gate widths of the first-stage amplifier, the second-stage amplifier, and the third-stage amplifier are in a ratio of 1:2:8. Among them, the third-stage amplifier is composed of multiple GaN HEMT cells connected in parallel;
[0008] An output reconfigurable network, connected to the output end of the third-stage amplifier, including a first switch, a second switch, a compensation microstrip line, a first LC resonance unit, and a second LC resonance unit;
[0009] The source of the first switch is connected to the first LC resonance unit; the drain of the second switch is grounded through the compensation microstrip line, and the source of the second switch is connected to the second LC resonance unit;
[0010] When the first switch is turned off and the second switch is turned on, the output reconfigurable network is equivalent to a microstrip line grounded structure to perform impedance matching only for the fundamental wave;
[0011] When the first switch is turned on and the second switch is turned off, the first LC resonance unit and the second LC resonance unit form a parallel - series LC structure to suppress the second harmonic and the third harmonic.
[0012] In one embodiment, the broadband power amplifier further includes:
[0013] An input network, the input network is connected to the input end of the first - stage amplifier; the input network includes a first resistor and a first capacitor, one end of the first resistor is connected to the RF input port, and the other end of the first resistor is connected to the gate of the first - stage amplifier through the first capacitor, for improving the input standing - wave ratio.
[0014] In one embodiment, the broadband power amplifier further includes:
[0015] An RC stabilization network, the RC stabilization network is respectively connected to the gate bias terminal of the first - stage amplifier and the gate bias terminal of the second - stage amplifier; the RC stabilization network includes a second resistor and a second capacitor connected in parallel, where: one end of the second resistor is connected to the gate bias voltage, and the other end is connected to the gate; the second capacitor is arranged in parallel with the second resistor.
[0016] In one embodiment, the broadband power amplifier further includes:
[0017] A bias network, the bias network is respectively connected to the first - stage amplifier, the second - stage amplifier and the third - stage amplifier; the bias network includes a bias microstrip line, and the wavelength of the bias microstrip line is not greater than one - quarter of the wavelength of the fundamental - wave center frequency.
[0018] In one embodiment, the broadband power amplifier further includes:
[0019] An inter - stage matching network, the inter - stage matching network is arranged between the second - stage amplifier and the third - stage amplifier; the inter - stage matching network includes three - section L - type structures, and each section of the L - type structure is composed of a series - connected inter - stage matching microstrip line and a third capacitor, for matching the output impedance of the second - stage amplifier to the input impedance of the third - stage amplifier and controlling the second - harmonic impedance.
[0020] In one embodiment, the broadband power amplifier further includes:
[0021] A power distribution circuit, the power distribution circuit includes a bias circuit, a fourth capacitor and a power divider. The bias circuit is disposed between the power divider and the second-stage amplifier for providing a DC bias voltage to the power divider. The fourth capacitor is connected in series between the RF signal output terminal of the power divider and the input terminal of the second-stage amplifier for coupling of RF signals and DC isolation.
[0022] In one embodiment, the broadband power amplifier further includes:
[0023] A power combining network, the power combining network is connected to the drain of the third-stage amplifier. The power combining network includes:
[0024] A multi-stage T-junction microstrip line structure for combining multiple signals into one. A grounding capacitor is connected in parallel at the node of each T-junction microstrip line structure, and together with the microstrip line of the power combining network, an L-type impedance matching structure is formed.
[0025] In one embodiment, the T-junction microstrip line structure of the power combining network shares the same metal layer with the drain bias line of the third-stage amplifier.
[0026] In one embodiment, the first switch and the second switch are GaN HEMT devices, whose gate control voltage is independent of the bias voltage of the amplifier, and a logic level signal is provided by an external drive circuit to control their switching states.
[0027] In one embodiment, multiple GaN HEMT cells are symmetrically arranged, their sources are connected to the SiC substrate through a via array, and the gates and drains of adjacent cells are respectively connected in parallel through metal strips of equal length and width.
[0028] This application adopts a three-stage amplifier circuit with a gate width ratio of 1:2:8. The first two stages of amplifiers are used to pre-amplify the signal and boost the gain. The last stage with a parallel structure of eight transistor cells outputs the saturation power under high-voltage power supply and achieves the power-added efficiency. The output reconfigurable network is controlled by the first switch and the second switch. In the high-power mode, the first switch is turned off and the second switch is turned on, grounding the compensation microstrip line to form a fundamental matching stub, avoiding the loss of the harmonic suppression network, and ensuring high-efficiency output. In the low-power mode, the first switch is turned on and the second switch is turned off. The first LC resonance unit and the second LC resonance unit jointly form a band-stop filter network, tuning the second and third harmonic impedances to a near-short circuit state, thereby suppressing the generation of higher-order harmonics. At the same time, the phase distortion is offset by the compensation microstrip line to maintain the integrity of the fundamental signal. That is, this application realizes the dual optimization of efficiency addition under high voltage and harmonic suppression under low voltage through the mode switching of the output reconfigurable network, without increasing the chip area, enabling the broadband amplifier to maintain high-efficiency high-power output under normal power supply conditions, and ensuring good linearity and suppressing the generation of higher-order harmonics while achieving low-power output in the low-voltage state. Brief Description of the Drawings
[0029] The drawings here are incorporated into the specification and form a part of this specification, showing the embodiments consistent with this application, and are used together with the specification to explain the principles of this application.
[0030] In order to more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, for those of ordinary skill in the art, other drawings can also be obtained based on these drawings without creative efforts.
[0031] Figure 1 It is a schematic structural diagram provided for an embodiment of a broadband power amplifier with an output reconfigurable network in this application.
[0032] Explanation of the Reference Numerals in the Drawings:
[0033] 10. Output reconfigurable network; X1. First switch; X2. Second switch; L0. Compensation microstrip line; LC1. First LC resonance unit; LC2. Second LC resonance unit; 20. Input network, R1. First resistor; C1. First capacitor; 30. RC stabilization network; R2. Second resistor; C2. Second capacitor; 40. Bias network; 50. Inter-stage matching network; C3. Third capacitor; 60. Power distribution circuit; C4. Fourth capacitor; 70. Power combining network.
[0034] The realization of the purpose, functional features, and advantages of this application will be further described with reference to the embodiments and the drawings. Detailed Embodiments
[0035] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present application without creative efforts shall fall within the protection scope of the present application.
[0036] It should be noted that if there are directional indications (such as up, down, left, right, front, back,...) involved in the embodiments of the present application, the directional indications are only used to explain the relative position relationship and movement conditions between components in a specific posture. If the specific posture changes, the directional indications will also change accordingly.
[0037] In addition, if there are descriptions involving "first", "second", etc. in the embodiments of the present application, the descriptions of "first", "second", etc. are only for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one such feature. In addition, if "and / or" or "and / or" appears throughout the text, its meaning includes three parallel scenarios. Taking "A and / or B" as an example, it includes scenario A, scenario B, or the scenario where A and B are satisfied simultaneously. In addition, the technical solutions between various embodiments can be combined with each other, but it must be based on the fact that those of ordinary skill in the art can implement them. When the combination of technical solutions results in contradictions or cannot be implemented, it should be considered that such a combination of technical solutions does not exist and is not within the protection scope required by the present application.
[0038] The third-generation wide-bandgap semiconductor materials represented by gallium nitride (GaN) have become a frontier topic and a hot topic in the global semiconductor research field. GaN technology can achieve high output power in a relatively wide frequency range. Thanks to its excellent characteristics such as wide bandgap width, high electron mobility, fast switching speed, and high thermal conductivity, GaN materials show significant advantages in high-frequency, high-power, and high-temperature application fields and become an ideal choice for high-power and high-efficiency broadband devices.
[0039] For some specific application scenarios, the system only needs to operate in a low-power state most of the time, and occasionally requires high-power output. Since the GaN material itself has great advantages in terms of compression depth, but has poor linearity when working at low power.
[0040] The present application proposes a broadband power amplifier having an output reconfigurable network 10.
[0041] Please refer to Figure 1, in an embodiment of the present application, the broadband power amplifier having the output reconfigurable network 10 includes a three-stage cascaded amplification circuit and an output reconfigurable network 10. The three-stage cascaded amplification circuit is composed of a first-stage amplifier (VG1-VD1), a second-stage amplifier (VG2-VD2), and a third-stage amplifier (VG3-VD3) connected in sequence. The gate widths of the first-stage amplifier, the second-stage amplifier, and the third-stage amplifier are in a ratio of 1:2:8. Among them, the third-stage amplifier is composed of multiple GaN HEMT cells connected in parallel; the output reconfigurable network 10 is connected to the output end of the third-stage amplifier and includes a first switch X1, a second switch X2, a compensation microstrip line L0, a first LC resonance unit LC1, and a second LC resonance unit LC2; the source of the first switch X1 is connected to the first LC resonance unit LC1; the drain of the second switch X2 is grounded through the compensation microstrip line L0, and the source of the second switch X2 is connected to the second LC resonance unit LC2; when the first switch X1 is turned off and the second switch X2 is turned on, the output reconfigurable network 10 is equivalent to a microstrip line grounding structure to perform impedance matching only for the fundamental wave; when the first switch X1 is turned on and the second switch X2 is turned off, the first LC resonance unit LC1 and the second LC resonance unit LC2 form a parallel-series LC structure to suppress the second harmonic and the third harmonic.
[0042] In this embodiment, the output reconfigurable network 10 includes a slender microstrip line. The slender microstrip line can be equivalent to an inductor and jointly form an LC resonance network (i.e., the first LC resonance unit LC1 and the second LC resonance unit LC2) with the capacitors in the output reconfigurable network 10. The first switch X1 and the second switch X2 are transistors. By changing the gate voltages of the first switch X1 and the second switch X2, it is possible to control whether the sources and drains of the first switch X1 and the second switch X2 are conducting.
[0043] In this embodiment, the switching of the broadband power amplifier having the output reconfigurable network 10 in different modes can be achieved by changing the drain voltage and controlling the gate voltage of the transistor. Specifically, in the high-power operating mode, the drain voltage is 28V, the first switch X1 is off, and the second switch X2 is on. The entire output reconfigurable network 10 is approximately equivalent to a microstrip line grounding, and forms a matching with the capacitor to directly perform impedance matching for the fundamental wave, ensuring the efficiency and output power under saturation operation. In the low-power mode, the first switch X1 is on, the second switch X2 is off, and at the same time the drain voltage is 12V. The first LC resonance unit LC1 and the second LC resonance unit LC2 of the reconfigurable network form a parallel-series LC structure, which is equivalent to a broadband band-stop filter network and can effectively suppress the second and third harmonics.
[0044] In this embodiment, since the grounding length of the microstrip line needs to be longer in the high-power mode and the microstrip line length of the first LC resonance unit LC1 is shorter in the low-power mode, this microstrip line is introduced as a compensation line in the high-power mode. Compared with traditional harmonic suppression networks, especially broadband suppression networks, since their frequency responses are not completely ideal, when the lower sideband of the second harmonic and the upper sideband of the fundamental wave are close in frequency, the efficiency of the high-frequency fundamental wave will be affected. Suppressing harmonics during high-power output will reduce the output power and efficiency of the fundamental wave and increase the operating current. The reconfigurable network proposed in this application can avoid suppressing harmonics under normal power supply to ensure the output power and efficiency of the fundamental wave. At the same time, it suppresses harmonics under low voltage and low power to ensure linearity. Although the efficiency will also be affected to some extent under low voltage, the current itself is small under low voltage conditions, and there will be no problem of excessive current.
[0045] In a feasible implementation manner, the broadband power amplifier further includes an input network 20, and the input network 20 is connected to the input end of the first-stage amplifier; the input network 20 includes a first resistor R1 and a first capacitor C1. One end of the first resistor R1 is connected to the radio frequency input port, and the other end of the first resistor R1 is connected to the gate of the first-stage amplifier through the first capacitor C1 for improving the input standing wave ratio.
[0046] In this embodiment, the design of the input network 20 helps to optimize the input matching of the amplifier, reduce signal reflection, and thus improve the performance of the overall system. The first capacitor C1 plays a role in blocking direct current, preventing the direct current signal in the circuit from flowing to the radio frequency signal source. At the same time, the combination of the first resistor R1 and the first capacitor C1 can adjust the input impedance to better match the output impedance of the signal source, thereby ensuring the effective transmission of the signal. This not only improves the input standing wave ratio but also helps to protect the first-stage amplifier from possible damage caused by reflected signals.
[0047] In a feasible implementation manner, the broadband power amplifier further includes an RC stabilization network 30, and the RC stabilization network 30 is respectively connected to the gate bias terminal of the first-stage amplifier and the gate bias terminal of the second-stage amplifier; the RC stabilization network 30 includes a second resistor R2 and a second capacitor C2 connected in parallel, where: one end of the second resistor R2 is connected to the gate bias voltage, and the other end is connected to the gate; the second capacitor C2 is arranged in parallel with the second resistor R2.
[0048] In this embodiment, since the amplifier may become unstable under high-frequency and large-signal conditions, resulting in oscillation or self-excitation. The RC stabilization network 30 of the present application adopts a parallel connection of a resistor and a capacitor to increase the stability of the power amplifier, ensure the absolute stability of the power amplifier, and prevent oscillation or self-excitation. Optionally, in order to make the power amplifier in an absolutely stable state, that is, the stability factor is greater than 1, a resistor-capacitor RC parallel network can be connected to the gate bias input ends of the die of the first two stages of amplifiers (the first-stage amplifier and the second-stage amplifier). The parallel capacitor can reduce the effective gate capacitance of the transistor, can increase the cut-off frequency of the entire circuit, and ensure the stability of the power amplifier chip without losing high-frequency gain, preventing the circuit from self-exciting. In the last stage, due to the large power and the fact that the performance of the last-stage (third-stage amplifier) circuit has a great impact on the output power and efficiency, if a stabilization network is added, the efficiency will be greatly affected. Therefore, the third-stage amplifier does not add the RC stabilization network 30.
[0049] In a feasible implementation manner, the broadband power amplifier further includes a bias network 40, and the bias network 40 is respectively connected to the first-stage amplifier, the second-stage amplifier, and the third-stage amplifier; the bias network 40 includes a bias microstrip line, and the wavelength of the bias microstrip line is not greater than one-fourth of the wavelength of the fundamental center frequency.
[0050] In this embodiment, the bias network 40 is used to feed the drain and gate of the transistors of each stage of the amplifier. The bias network 40 can be composed of a feeding inductor and a bypass capacitor grounded. In this embodiment, a quarter-wavelength line of the fundamental center frequency is used instead of the inductor. The bias network 40 ensures the complete transmission of the DC signal to the drain and gate of the transistor, and at the same time prevents the RF signal in the circuit from leaking into the DC power supply. The capacitance value of the bypass capacitor is relatively large, and only signals with a relatively large frequency can pass through. For the RF signal input in the present application, it is a short-circuit point, while the DC signal cannot pass through the bypass capacitor to the ground. Therefore, the quarter-wavelength bias microstrip line of the fundamental center frequency wavelength can change the short-circuit point where the corresponding fundamental frequency signal is grounded to an open-circuit point, preventing the RF signal from leaking.
[0051] Optionally, in order to further improve the efficiency of the amplifier and reduce the layout area, the bias microstrip line can also be shorter than one-fourth of the wavelength of the fundamental center frequency, and impedance transformation is jointly performed by tuning the length of the bias microstrip line and the matching circuit connected thereto. In addition, since the gate current is almost 0, a small resistor can also be connected in series between the gate and the bias network 40 in the present application to enhance the circuit stability and eliminate oscillation.
[0052] In a feasible implementation manner, the broadband power amplifier further includes an inter-stage matching network 50, and the inter-stage matching network 50 is disposed between the second-stage amplifier and the third-stage amplifier; the inter-stage matching network 50 includes three sections of L-shaped structures, and each section of the L-shaped structure is composed of a series-connected inter-stage matching microstrip line and a third capacitor C3, and is used for matching the output impedance of the second-stage amplifier to the input impedance of the third-stage amplifier and controlling the second harmonic impedance.
[0053] In this embodiment, in this embodiment, the input network 20 can match the input impedance of the first-stage die to a preset impedance (such as 50 ohms), improve the input reflection coefficient. There is no need to match the impedance between the first and second stages to the preset impedance, but the output impedance of the first-stage amplifier die is conjugate-matched to the input impedance of the second-stage amplifier die, or the two can also be matched to an intermediate value. The matching network between the second-stage amplifier and the third-stage amplifier has a greater impact on the output power and power added efficiency.
[0054] In this embodiment, the inter-stage matching network 50 between the second-stage amplifier and the third-stage amplifier is designed as a three-section L-shaped network. Each section of the L-shaped structure is composed of a series-connected inter-stage matching microstrip line and a third capacitor C3, so as to control the second harmonic impedance of the output of the second-stage amplifier to be matched to the input impedance of the third-stage amplifier and control the second harmonic impedance. It can be understood that there are many types of impedance matching circuit structures. Based on the time working parameters of the circuit in this application (the working frequency is 7-12 GHz, the bandwidth is 5 GHz, the center frequency is 9.5 GHz, the relative working bandwidth is 53%, and the relative working bandwidth of the RF circuit components is greater than 50%), it belongs to the range of broadband amplifiers. Therefore, a broadband matching network structure is required. Therefore, a matching structure that mixes lumped parameter elements and distributed parameter elements can be selected, that is, a T-shaped matching network and a multi-section L-shaped matching structure composed of microstrip lines and capacitors.
[0055] In a feasible implementation manner, the broadband power amplifier further includes a power distribution circuit 60. The power distribution circuit 60 includes a bias circuit, a fourth capacitor C4, and a power divider. The bias circuit is disposed between the power divider and the second-stage amplifier and is used for providing a DC bias voltage for the power divider; the fourth capacitor C4 is connected in series between the RF signal output end of the power divider and the input end of the second-stage amplifier and is used for coupling of the RF signal and DC isolation.
[0056] In this embodiment, since the drain current is large, adding a resistor will cause circuit loss, so no resistor is added to the drain bias circuit. The fourth capacitor C4, as a key component for RF coupling and DC isolation, is connected in series between the RF signal output terminal of the power divider and the input terminal of the second-stage amplifier, effectively preventing DC signals from entering the RF path while ensuring efficient transmission of RF signals. This enables the power distribution circuit 60 to evenly distribute the input RF signal power to multiple amplifier channels.
[0057] In a feasible implementation manner, the broadband power amplifier further includes a power combining network 70, and the power combining network 70 is connected to the drain of the third-stage amplifier; the power combining network 70 includes a multi-stage T-junction microstrip line structure for combining multiple signals into one; a grounded capacitor is connected in parallel at the node of each T-junction microstrip line structure, and together with the microstrip line of the power combining network 70, an L-type impedance matching structure is formed.
[0058] In this embodiment, the power combining network 70 adopts a multi-stage T-junction microstrip line structure, which has broadband characteristics and can adapt to signal combination within a relatively wide frequency range. At the same time, a grounded capacitor is connected in parallel at the node of each T-junction microstrip line structure, and together with the microstrip line of the power combining network 70, an L-type impedance matching structure is formed. This design helps to optimize the impedance matching of the signal, reduce signal reflection and loss, and thus improve the combination efficiency.
[0059] Specifically, this embodiment adopts a three-stage T-junction microstrip line structure. First, the T-junction formed by the microstrip line is used to combine the power of two signals. Then, when passing through the next T-junction for four-way combination, a grounded capacitor is connected in parallel, and the capacitor and the microstrip line form an L-type structure for impedance matching. Finally, through another T-junction for eight-way power combination, all the microstrip lines forming the T-junction not only achieve power combination but also perform impedance matching. After the power combination is completed, the output signal will be processed by the reconfigurable network.
[0060] In a feasible implementation manner, the T-junction microstrip line structure of the power combining network 70 shares the same metal layer with the drain bias line of the third-stage amplifier. In this embodiment, to save the circuit layout area, the T-junction microstrip line structure of the power combining network 70 and the drain bias line of the third-stage amplifier are designed on the same metal layer, which not only optimizes the space utilization but also simplifies the circuit structure and reduces the manufacturing cost. At the same time, since they are on the same metal layer, the electromagnetic interference between the signal path and the bias path is effectively controlled, ensuring the stability and performance of the circuit.
[0061] In a feasible implementation manner, the first switch X1 and the second switch X2 are GaN HEMT devices, whose gate control voltage is independent of the bias voltage of the amplifier. A logic level signal is provided by an external drive circuit to control their switching states. In this embodiment, by independently controlling the gate voltage of the GaN HEMT device, its switching state can be accurately controlled, thereby realizing the switching of the output reconfigurable network 10 in different modes. The external drive circuit provides a logic level signal to ensure the stability and reliability of the switching state.
[0062] In a feasible implementation manner, multiple GaN HEMT cells are symmetrically arranged, and their sources are connected to the SiC substrate through a via array. The gates and drains of adjacent cells are respectively connected in parallel through metal strips with equal length and width.
[0063] In this embodiment, the symmetrical arrangement of multiple GaN HEMT cells helps to achieve a more uniform current distribution, improving the thermal stability and reliability of the amplifier. Since the chip area is small and there are many active area die, heat is concentrated. To ensure the thermal stability of the chip, the active area transistors adopt the source cross-gate grounding method because the substrate SiC has good thermal conductivity, the vias are far from the heat source and the gate bars have better thermal conductivity, and the multi-cell parallel connection method can effectively disperse the heat source, reduce the chip thermal resistance, and improve the long-term reliability of the chip.
[0064] In the embodiment of the present application, a three-stage amplifier circuit with a gate width ratio of 1:2:8 is adopted. The signal is pre-amplified and the gain is improved through the first two stages of amplifiers. The last-stage eight-cell parallel structure outputs the saturated power and realizes the power added efficiency under high-voltage power supply; the output reconfigurable network 10 is controlled by the first switch X1 and the second switch X2. In the high-power mode, the first switch X1 is turned off and the second switch X2 is turned on, so that the compensation microstrip line L0 is grounded to form a fundamental wave matching stub, avoiding the loss of the harmonic suppression network and ensuring high-efficiency output; in the low-power mode, the first switch X1 is turned on and the second switch X2 is turned off. The first LC resonance unit LC1 and the second LC resonance unit LC2 together form a band-stop filter network, adjusting the second and third harmonic impedances to a nearly short-circuit state, thereby suppressing the generation of high-order harmonics. At the same time, the phase distortion is offset through the compensation microstrip line L0 to maintain the integrity of the fundamental wave signal. That is, the present application realizes the dual optimization of efficiency addition under high voltage and harmonic suppression under low voltage through the mode switching of the output reconfigurable network 10, and without increasing the chip area, enabling the bandwidth amplifier to maintain high-efficiency high-power output under normal power supply conditions, and ensuring good linearity and suppressing the generation of high-order harmonics while realizing low-power output in the low-voltage state.
[0065] The above are only exemplary embodiments of the present application, and do not limit the patent scope of the present application. Any equivalent structural transformation made under the technical concept of the present application by using the content of the specification and drawings of the present application, or any direct / indirect application in other related technical fields, is included in the patent protection scope of the present application.
Claims
1. A broadband power amplifier with an output reconfigurable network, characterized in that, Comprising: A three-stage cascaded amplifier circuit, which is composed of a first-stage amplifier, a second-stage amplifier and a third-stage amplifier connected in sequence. The gate widths of the first-stage amplifier, the second-stage amplifier and the third-stage amplifier are in a ratio of 1:2:
8. Among them, the third-stage amplifier is composed of a plurality of GaN HEMT cell elements connected in parallel; An output reconfigurable network, connected to the output end of the third-stage amplifier, including a first switch, a second switch, a compensation microstrip line, a first LC resonance unit and a second LC resonance unit; The source of the first switch is connected to the first LC resonance unit; the drain of the second switch is grounded through the compensation microstrip line, and the source of the second switch is connected to the second LC resonance unit; When the first switch is turned off and the second switch is turned on, the output reconfigurable network is equivalent to a microstrip line grounded structure to perform impedance matching only for the fundamental wave; When the first switch is turned on and the second switch is turned off, the first LC resonance unit and the second LC resonance unit form a parallel-series LC structure to suppress the second harmonic and the third harmonic.
2. The broadband power amplifier with an output reconfigurable network as claimed in claim 1, wherein The broadband power amplifier further includes: An input network, which is connected to the input end of the first-stage amplifier; the input network includes a first resistor and a first capacitor. One end of the first resistor is connected to the RF input port, and the other end of the first resistor is connected to the gate of the first-stage amplifier through the first capacitor, for improving the input standing wave ratio.
3. The broadband power amplifier with an output reconfigurable network as claimed in claim 1, wherein, The broadband power amplifier further includes: An RC stabilization network, which is respectively connected to the gate bias terminal of the first-stage amplifier and the gate bias terminal of the second-stage amplifier; the RC stabilization network includes a second resistor and a second capacitor connected in parallel, where: one end of the second resistor is connected to the gate bias voltage, and the other end is connected to the gate; the second capacitor is arranged in parallel with the second resistor.
4. The broadband power amplifier with an output reconfigurable network according to claim 1, characterized in that, The broadband power amplifier further includes: A bias network, which is respectively connected to the first-stage amplifier, the second-stage amplifier and the third-stage amplifier; the bias network includes a bias microstrip line, and the wavelength of the bias microstrip line is not greater than one-fourth of the wavelength of the fundamental wave center frequency.
5. The broadband power amplifier with an output reconfigurable network as claimed in claim 1, wherein The broadband power amplifier further includes: An inter-stage matching network, which is arranged between the second-stage amplifier and the third-stage amplifier; the inter-stage matching network includes three sections of L-shaped structures, and each section of the L-shaped structure is composed of a series-connected inter-stage matching microstrip line and a third capacitor, for matching the output impedance of the second-stage amplifier to the input impedance of the third-stage amplifier and controlling the second harmonic impedance.
6. The broadband power amplifier with an output reconfigurable network according to claim 1, characterized in that, The broadband power amplifier further includes: A power distribution circuit, which includes a bias circuit, a fourth capacitor and a power divider. The bias circuit is arranged between the power divider and the second-stage amplifier, for providing a DC bias voltage for the power divider; the fourth capacitor is connected in series between the RF signal output end of the power divider and the input end of the second-stage amplifier, for coupling of the RF signal and DC isolation.
7. The broadband power amplifier with an output reconfigurable network as claimed in claim 1, wherein The broadband power amplifier further includes: A power combining network, which is connected to the drain of the third-stage amplifier; the power combining network includes: A multi-stage T-junction microstrip line structure for combining multiple signals into one; a grounding capacitor is connected in parallel at the node of each T-junction microstrip line structure, and together with the microstrip line of the power combining network, an L-type impedance matching structure is formed.
8. The broadband power amplifier with an output reconfigurable network as claimed in claim 7, wherein The T-junction microstrip line structure of the power combining network shares the same metal layer with the drain bias line of the third-stage amplifier.
9. The broadband power amplifier with an output reconfigurable network as claimed in claim 1, wherein The first switch and the second switch are GaN HEMT devices, and their gate control voltages are independent of the bias voltage of the amplifier. A logic level signal is provided through an external drive circuit to control their switching states.
10. The broadband power amplifier with an output reconfigurable network as claimed in claim 1, wherein Multiple GaN HEMT cells are symmetrically arranged, and their sources are connected to the SiC substrate through a via array. The gates and drains of adjacent cells are respectively connected in parallel through metal strips with equal length and width.
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