Interactive design method and system for analogue integrated circuit layout planning

Abstract

The invention discloses an interactive design method and system for simulating layout planning. The interactive design method comprises the following steps: A, selecting the type and shape of a component from a component list; b, editing a creation mode of the component according to the type of the component; c, editing component attributes and / or parameters; d, judging whether the parameters of the component attributes are legal or not, and if yes, executing the step E; otherwise, returning to the step C; and E, creating a graph of the component. By adopting the method and the device, information splitting between a framework design stage and a Floor Plan stage in an existing analog circuit design can be eliminated, repeated work and serial processes are reduced, and the design efficiency and consistency are improved.

Description

Technical Field

[0001] The present application relates to electronic design automation (EDA) technology for integrated circuits (ICs), and in particular to an interactive design method and system for analog layout planning. Background Art

[0002] Figure 1 The following is a schematic diagram of the design process of analog integrated circuits in the prior art. Figure 1 As shown in the figure, architecture design is the initial stage of analog circuit design. It aims to plan the overall functional implementation and module division of the circuit based on system-level requirements, laying the foundation for subsequent circuit design and integrated circuit functional implementation. In this process, architecture design needs to comprehensively consider the impact of key factors such as circuit architecture, circuit area, process constraints, layout of key signal paths, and location distribution of modules on circuit design.

[0003] Floor planning is the starting stage of analog layout design, and its main task is to perform macroscopic spatial layout of devices and functional units in chips or modules. In this process, the design is usually based on the results of architecture design, and combines area constraints, power consumption requirements, layout symmetry and matching requirements to generate a reasonable layout plan for subsequent detailed layout design.

[0004] In addition, in the general process of existing analog integrated circuit design, circuit design and layout generation are the two most important links. Figure 1 The design rule check (DRC) is used to check whether the layout drawing meets the specified design rules. Figure 1 Layout Versus Schematic (LVS) is a verification method used to ensure that the actual physical layout of the circuit is completely consistent with the original circuit schematic.

[0005] In the traditional analog integrated circuit design process, architecture design and floor plan are usually two independent steps. The design implementation process often requires the help of third-party tools, and the design results need to be included in the design process in the form of documents. The existing separate design process will lead to cumbersome information transmission. Especially in the process of architecture design, some floor plans have actually been planned, but due to the lack of unified platform support, this information cannot be directly used for subsequent design work, resulting in reduced efficiency of analog integrated circuit design. Summary of the invention

[0006] In view of this, the main purpose of this application is to provide an interactive design method and system for analog layout planning, aiming to eliminate the information gap between the architecture design and the floor plan stage in the existing analog circuit design, reduce repetitive work and serial processes, and improve design efficiency and consistency.

[0007] To achieve the above object, this application adopts the following technical solutions:

[0008] An interactive design method for analog layout planning includes the following steps:

[0009] A. Select the type and shape of the component from the component list;

[0010] B. Edit the creation mode of the component according to the type of the component;

[0011] C. Edit the component attributes and / or parameters;

[0012] D. Judge whether the parameters of the component attributes are legal. If so, execute step E; otherwise, return to step C;

[0013] E. Create the graphic of the component.

[0014] F. Judge whether the graphic of the component meets the specifications. If so, complete the creation process; otherwise, return to step E.

[0015] Among them: The types of the components in step A include:

[0016] The bump type of the small raised structure used to connect the chip to the substrate or the packaging layer in chip packaging, the pin type used to specify the electrical interface between modules, the wiring channel type between modules, the inductor type used to pre-plan the layout position of the inductor, the functional unit type used as a functional module in integrated circuit design, and the voltage domain type used to reasonably divide the voltage domain to help ensure the compatibility and stability between modules and optimize power management.

[0017] The creation mode of the component in step B is specifically: the creation method based on the graphic features of the component type and the drag-and-drop creation method.

[0018] The steps of editing the component attributes and / or parameters in step C include:

[0019] According to the different creation modes of the selected components, set one or more of the size of the component to be created, whether to perform array creation, set the number of rows and columns of the array creation, the row offset between different rows / the spacing between different rows and columns; and / or set the parameters related to the created component, the parameters of the name bound to the component, the library name / cell name / view name of the device.

[0020] The step of determining whether the parameters for judging the component attributes described in step D includes, but is not limited to:

[0021] Judging the name and naming convention of the component, judging the device position pointed to by the library name / unit name / view name, judging the pin width / pin length, and judging the pin layer / annotation layer.

[0022] The process of creating the graph of the component described in step E is specifically: automatically generated according to the previously selected component type and / or component shape, and the constraint conditions of the set component attributes and / or parameters.

[0023] The step of judging whether the graph of the component conforms to the specification described in step F specifically refers to whether the creation of the layout graph itself meets the layout design requirements.

[0024] Whether the creation of the layout graph itself meets the layout design requirements includes:

[0025] For polygon components, if edge-edge self-intersection occurs during the creation process, the creation of the current component is rejected;

[0026] For the path of channel type components, if line-line intersection occurs during the creation process, the creation of the current component is rejected.

[0027] An interactive design system for simulating layout planning includes:

[0028] A component type / shape selection module for selecting the type and shape of the component from a component list; a component creation mode editing module for editing the creation mode of the component according to the type of the component; a component attribute / parameter editing module for editing the component attributes and / or parameters; a component attribute parameter legality judgment module for judging whether the parameters of the component attributes are legal; a component graph creation module for drawing the graph of the component, and a component graph normalization judgment module for judging whether the graph of the component conforms to the specification.

[0029] The interactive design method and system for simulating layout planning of the present invention have the following beneficial effects compared with the prior art:.

[0030] Applying the method of the present invention application allows designers to directly complete the preliminary plane planning and related information annotation in the EDA platform software during the architecture design stage, so that designers can directly edit and update the planning file with the pre-annotated information in the subsequent specific Floor Plan work.

[0031] By organically integrating the framework design with the Floor Plan phase, this method ensures the seamless connection of the design process, avoids redundant steps and time waste in the traditional design process, and provides a more integrated and efficient working mode for designers. Description of the Drawings

[0032] Figure 1 Schematic diagram of the simulation integrated circuit design process for the prior art;

[0033] Figure 2 Flowchart of the interactive design method for analog layout planning according to an embodiment of the present invention;

[0034] Figure 3 For the present invention Figure 2 Schematic diagram of the creation process taking the Bump component as an example in;

[0035] Figure 4 For the present invention Figure 2 Schematic diagram of the creation process taking the Channel component as an example in;

[0036] Figure 5 Functional block diagram of the interactive design system for analog layout planning according to an embodiment of the present invention. Detailed Description of the Invention

[0037] Next, the technical solutions in the embodiments of the present application will be clearly described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art belong to the scope of protection of the present application.

[0038] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, rather than to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so that the embodiments of the present application can be implemented in an order other than those illustrated or described herein, and the objects distinguished by "first", "second", etc. are usually of the same category, and the number of objects is not limited. For example, the first object can be one or multiple. In addition, "and / or" in the specification and claims means at least one of the connected objects, and the character " / ", generally represents an "or" relationship between the associated objects.

[0039] Figure 2 Flowchart of the interactive design method for analog layout planning for the present invention application.

[0040] As Figure 2 shown, the interactive design method for analog layout planning mainly includes the following steps:

[0041] Step 21: Select the type and shape of the component from the Component list.

[0042] To simplify the architecture design and support preliminary layout planning, in this embodiment, the interactive design system of the present invention application can provide 6 different component types for analog integrated circuit designers. These component types are different from the Instance (device type in the layout) that points to a specific device. These components are used to identify specific entities or layout planning areas in the layout. The 6 different component types are as follows:

[0043] Bump type, a small raised structure used to connect the chip to the substrate or packaging layer in chip packaging. As an interface connecting the chip and the outside world, it is divided into two parts: the Bump itself and the pin. The Bump itself is responsible for physical connection, while the pin is used to connect the internal circuit to ensure the effective transmission of electrical signals.

[0044] Pin type, mainly refers to the pins for external connection of the integrated circuit module, used to specify the electrical interface between modules. According to the bit width, the pin can be a single-bit pin (Single-bit Pin, that is, a single pin) or a multi-bit pin (Bus-bit Pin, that is, a group of consecutive pins), enabling it to adapt to various complex connection requirements.

[0045] Channel type, refers to the connection line between modules. In analog circuit design, complex analog circuits are usually divided into multiple independently developed circuit modules, and finally electrically connected through appropriate connection lines. This component type is mainly used to pre-plan the connection line area between different modules in advance. Preferably, for example, before selecting to create a Channel type component from the component list, it supports pre-selecting the Pin type in advance. This step is an optional option. It is mainly used when the designer determines that the Channel component to be created will be connected to certain Pins, and the Pins can be pre-selected before creating the Channel to reduce the number of parameter settings for the Channel component.

[0046] Inductor type, mainly refers to the inductor element used in integrated circuit design. Due to its relatively large physical size, the inductor occupies an important position in the circuit layout. This component type is mainly used to pre-plan the layout position of the inductor in the interactive design method of layout planning, and optimize the overall layout and performance of the circuit.

[0047] The type of functional unit (Block) refers to the functional modules in circuit design, such as circuit modules like amplifiers and digital-to-analog converters. Each module has a relatively independent function and can be developed and tested separately during the design phase, and finally integrated into a larger system. The purpose of designing this component type is also to plan the positions of these modules in advance.

[0048] The type of voltage domain (Domain) refers to different regions in circuit design, including different voltage regions, signal regions, etc. For example, for the voltage domain, different regions have different voltage ranges. For instance, the voltage range of some modules is 0 - 3V, while that of some regions is -5V - 5V. This component type is used to reasonably divide the Domain, which helps ensure the compatibility and stability between modules and optimize power management simultaneously.

[0049] Step 22: Edit the steps of the creation mode of the component according to the described component type.

[0050] In this embodiment, for the 6 different component types, the interactive design method and system of the present invention provide two different component creation modes: one is the center (point)-based creation mode, that is, the creation mode based on the graphic features of the component type; the other is the drag-and-drop creation mode. Among them:

[0051] Selecting the creation mode based on the graphic features of the component type can ensure that the creation logic of each component is consistent with the creation logic of the corresponding shape in the layout, reducing the learning cost of users. For example, the creation of rectangular and polygonal components follows the same logic as the creation of rectangles and polygons in the layout, facilitating users to operate proficiently.

[0052] While choosing the drag-and-drop creation method enables integrated circuit designers to adjust the size at any time according to their own needs during the drag-and-drop process. Specifically, after the user enters the step of creating a component, press and drag the mouse to change the size and position of the pattern. During this process, the user can preview the shape of the pattern in real time to ensure that the result meets the expectations.

[0053] In this embodiment, in addition to providing the above two creation methods, the interactive design method of the present invention application also supports corresponding wizard design and optimization according to the characteristics of the component to be created. For example, it automatically gives information prompts to guide the designer to set the attributes and / or parameters of the component, so as to better meet the functional implementation, performance indicators, and quality requirements of integrated circuit design.

[0054] Here, taking the creation of a Channel type component as an example (refer to Figure 4 ) for illustration. According to the design requirements, the type of pattern to be created can be selected, including various different types such as polygons, rectangles, and paths.

[0055] Step 23: The step of editing the component Attribute and / or setting the Parameter.

[0056] Next, in the embodiments of the present invention, according to different component types, the process of editing the component attributes and / or setting the parameters will be described respectively:

[0057] 1) Here, taking the creation process of the Bump type as an example:

[0058] The embodiments of the present invention application can provide three mainstream geometric shape options: circular, square, and octagonal, to meet the user's need to select a suitable Bump shape according to their own needs. Refer to Figure 3 the specific creation process shown:

[0059] After selecting the graphic, the user is supported to select the creation mode on the creation page. In the embodiments of the present invention application, in addition to supporting the drag-and-drop creation mode mentioned above for the creation of Bumps, considering the nature of Bumps themselves, the center (point) creation mode is also supported.

[0060] In this embodiment, the process of editing the component Attribute and / or setting the Parameter is different due to different creation modes. For example: Drag-and-drop creation does not require setting parameters; while in the center (point) creation mode, options such as the size of the component to be created and whether to perform array creation need to be set. If the array method is used for creation, parameters such as the number of rows and columns for array creation, the row offset between different rows, and the spacing between different rows and columns also need to be set. In addition to these parameters related to creation, parameters bound to the Bump component can also be set, such as the names of the Bump and its corresponding Pin, and information such as the Library Name / Cell Name / ViewName of the corresponding device.

[0061] The user first specifies the specific size of the selected pattern on the interface. For a circle, it is to specify the diameter of the pattern; for a square, it is to specify the side length of the pattern; for an octagon, it is to specify the height (i.e., the vertical distance between the topmost side and the bottommost side). Subsequently, the user clicks the mouse to determine the center point position of the pattern, and the system will automatically generate a Bump with the corresponding size and shape accordingly.

[0062] In addition, in the center (point) creation mode, the user is supported to create in an array mode. For example, the number of rows and columns to be created can be determined on the interface, and the x-axis and y-axis distances between the centers of adjacent Bumps and other parameters can be set.

[0063] In this way, the user only needs to click once within the Design Automation (DA) interface of the interactive design system of the present invention application to generate multiple evenly distributed Bump type components, thus greatly improving the work efficiency of layout planning design.

[0064] 2) Here, take the creation process of the Pin type as an example for illustration:

[0065] When creating the Pin type in this embodiment, in addition to being able to create it in the default manner, that is, the graphical features of the component type, it also supports a way that facilitates the user to customize the creation of Pin components.

[0066] If the user sets relevant parameters in advance in the creation interface. At this time, the system will automatically calculate the width according to the parameters set on the interface through a specific formula. When creating, the width of the component will be set to the calculated width value, and the width calculation formula is as follows:

[0067] Width of the component = Pin_Width * Pin_Num + Space * (Pin_Num - 1).

[0068] In the above formula, Pin_Width represents the width of the Pin type component set in the creation interface; Pin_Num represents the total number of pins pointed to by the input Pin_Name when creating the interface; Space represents the spacing between Pins set on the interface. And after setting the parameters, it will automatically perform parameter checking, report errors for incorrect parameter settings and require modification.

[0069] It should be noted that Pin_Name can input multiple different pin names in the way of space separation. These names are divided into single-line pin names (such as A, B, etc., each name points to a single pin) and multi-bit pin names (such as A<5:0>, pointing to a group of consecutive pins). Pin_Num in the formula is the total number of pins pointed to by all the input pin names.

[0070] When creating the Pin type, the present invention application fully considers the situation that the same component may correspond to multiple different Pins, and the order of Pins is crucial in the planning stage. For this reason, the present invention application provides three key attributes to help the user accurately specify the arrangement order of Pins.

[0071] Among them: Order represents the relationship between the internal arrangement order of Pins and the input Pin_Name;

[0072] Separate: Control the arrangement order of a group of consecutive pins corresponding to a multi-bit pin to ensure logical continuity and rationality of physical layout;

[0073] Cross: Define the crossover method between pins with different names to optimize the signal transmission path.

[0074] Through these three attributes, users can very accurately specify the arrangement order of the pins corresponding to a component, providing a detailed reference for subsequent conversion into a layout.

[0075] 3) Take the creation of the channel type as an example:

[0076] During the Channel creation process, the main process is as follows: Figure 4 shown.

[0077] The Channel of the present invention supports the creation of multiple geometric pattern types, including rectangle, polygon and path. Rectangle is used to define a regular shape area with fixed width and height; polygon is a closed boundary formed by a series of vertices, which is suitable for depicting complex irregular areas; path is a linear geometric object with fixed width, which is suitable for point-to-point areas.

[0078] In addition to the traditional graphic creation method, the present invention also innovatively introduces an automatic creation method of Pin association according to the needs of users:

[0079] When creating a Channel type, if a Pin is selected in advance, the width and starting point of the created component will become fixed. The width is calculated according to a specific formula, and the starting point is determined as the center point of the Pin selected in advance. When creating, it will change the direction and length of the component extension as the user's mouse moves, and distinguish specific components (to be created but not yet created) and their types, so that the Channel component is connected to the Pin, which is convenient for user operation, helps to improve design efficiency, and saves user time.

[0080] In this embodiment, the Pin is not the Pin type mentioned above, but refers to the actual pin / pin of the integrated circuit (chip), that is, the actual Pin generated after the Pin type component is converted. Because the width of the Pin type component itself is not necessarily the width of the real Pin, using the width of the Pin type component will cause problems with the width of the created Channel component.

[0081] In the creation mode of Pin foot association, if the user does not set relevant parameters on the interface, then when creating a component, the component width will be set to a fixed width according to the width and spacing of the pre-selected Pin feet, ensuring that the generated component can exactly accommodate the pre-selected Pin feet; if the user sets relevant parameters on the interface, then the component width will be set by combining the relevant parameters of the pre-selected Pin feet and the parameters set in the interface, and will be calculated according to the following formula:

[0082] Channel_Width = n * Pin_Width+(n - 1)*Space.

[0083] In the above formula, Channel_Width represents the width of the created component; n represents the number of pre-selected pin feet in the pre-selection; Pin_Width and Space are both constant values custom-set by the user in the automated design interface of this invention application. If the user does not specify, they default to the width and spacing of the pre-selected Pin feet.

[0084] In the creation process of the Channel type, this invention application provides relevant attributes to help the designer control the wiring layer inside this component. One is to specify the wiring layer in the horizontal and vertical directions, allowing the user to clearly select a specific wiring layer and perform wiring according to the set rules; the other is to set the range of the wiring layer, allowing the user to define an interval of the wiring layer, thereby flexibly restricting the layer where the wiring is located; these two methods ensure that the designer can specify a suitable wiring layer according to specific requirements and design rules and accurately transmit the information to the subsequent process.

[0085] In this embodiment, the creation of a Channel type component is used as an example for illustration (refer to Figure 4 ). For a Channel, the information contained in its parameters includes the information of the Channel type Net file, such as whether the width of the Net and the spacing between them are specified by the user or use the information of the Pin connected to the Channel. Whether the Net uses a specified specific horizontal wiring layer and vertical wiring layer or uses a specified wiring layer range. If the previous pattern type selection is the path type, then it will also have an additional width attribute, allowing the user to set the width of the created component.

[0086] 4) Taking the design of an inductor type component as an example for illustration:

[0087] This invention embodiment provides a series of graphic options, including octagons. In the inductor layout, the octagon takes into account both the physical characteristics of the inductor and the feasibility of industrial manufacturing, and is one of the most commonly used patterns in the inductor layout. When creating, it can also include multiple inductor-related attribute settings, which is convenient for users to set.

[0088] Create the Inductor component by means of drag-and-drop creation provided in this invention application, enabling users to intuitively adjust the size and shape of the Inductor component, ensuring flexibility and accuracy in design.

[0089] 5) Take the creation and design of components of the functional unit (Block) type as an example for illustration:

[0090] Embodiments of the present invention support various graphic creation methods such as rectangles and polygons, and provide creation options including the default creation mode.

[0091] In addition, this invention application also introduces multiple property settings related to Blocks, enabling users to precisely configure component characteristics according to specific requirements, ensuring flexibility and accuracy in design.

[0092] 6) Take the creation and design of components of the voltage domain (Domain) type as an example for illustration:

[0093] The creation of the Domain provides the creation of various different types of components including voltage. For each type, relevant property settings are provided.

[0094] Embodiments of this invention application support various graphic creation methods such as rectangles and polygons, and provide creation options including the default creation mode.

[0095] Step 24: Determine whether the component attributes and / or parameters are legal; if so, execute Step 25; otherwise, return to Step 23.

[0096] In this embodiment, the property settings of each component are related to its corresponding function, so the attributes of each component have their own characteristics.

[0097] This invention application takes the Bump component as an example for illustration. The Bump component corresponds to the bumps on the chip and is responsible for connecting the chip to the outside. Therefore, it is bound to a Pin, and its attributes are also divided into two parts: namely, the attributes of the Pin responsible for internal connection, and the attributes of the Bump component responsible for external connection.

[0098] In this embodiment, the process of determining whether the parameters of its attributes are legal includes:

[0099] For PinNames, specify the names of one or more Pins bound to the Bump component. Here, a legality check of the Pin names is performed, requiring them to conform to the naming specification for pins, that is, except for multi-bit pin names, they cannot include illegal characters. For example, "A<5:0>" is a legal multi-bit pin name, while "A<:0>" is an illegal pin name.

[0100] For the library name / cell name / view name, specify the device location pointed to by the Bump component type. The legal requirement is that it be kept complete, and the absence of any part of the three will make it impossible for subsequent people to accurately locate it; the absence of any part of the three mentioned here means that it is allowed to be fully filled or fully empty, and other situations are not allowed.

[0101] For the pin width / pin length, judge the width and length of the corresponding pin, and its legality check requires that it must be a positive number.

[0102] For the pin layer / label layer, judge the process layer where the corresponding pin and its label are located. The process layer here is selected from the process library bound to the floor plan file, and the user cannot input it arbitrarily. Therefore, only the correctness verification of this attribute is performed, and the legality check can be omitted.

[0103] In addition, the attributes of other components are similar to those of the Bump component. First, relevant attribute settings will be given according to their application purposes, etc., and then combined with the actual situation, appropriate legality checks will be set for each attribute to avoid situations where the attribute information is mis-entered or other reasons cause the designers to be unable to understand.

[0104] Step 25: Steps to create the graphics of the component.

[0105] In the embodiment of the present invention application, the creation process of the graphics of the above component is that the interactive design system of the present invention automatically generates and draws the layout according to the previously selected component type and / or component shape, as well as the respective set component attributes and / or parameters and other constraint conditions. On the basis of automatically completing the creation of the component graphics, the designer can also adjust parameters such as the width, length, interconnection size (wire width), and relative size between the transistor and the interconnection of the created component according to needs (such as performance indicators, quality requirements, etc.).

[0106] For example, in the embodiment of creating a Bump type component (refer to Figure 3 ), if the drag-and-drop creation mode is selected, the Bump component can be directly created by clicking and dragging with the mouse cursor; if the center (point) creation mode is selected, the center position can be directly determined and the mouse can be clicked to create. In both of the above creation modes, the system will prompt the user to select / edit and determine the size and position of the component to be created according to the settings required to support the designer to typeset according to needs.

[0107] For another example, in the embodiment of creating a Pin type component (refer to Figure 4 ), when a Pin is not preselected or the selected pattern type is a polygon, the creation of the graph at this time is the same as the conventional creation mode corresponding to the pattern. When a Pin is preselected and two types, namely a rectangle and a path, are selected, the starting point of creating the pattern is determined as the midpoint of the preselected Pin, and the parameter width is determined after being calculated by the formula mentioned above; the designer can click to determine the turning point and double-click to determine the end point on the creation / drawing interface to determine the shape of the component. However, no matter what the creation mode is, the system will display relevant information according to the settings to prompt the user to select / edit and determine the size and position of the component to be created, so as to support the designer to typeset according to needs.

[0108] Step 26: Determine whether the component graph conforms to the specification. If it does, the creation is completed and ended; if not, return to Step 25.

[0109] In this embodiment, the graph specification of the component does not restrict the position of the layout graph. One of the purposes of the present invention is to facilitate the user / user to carry out the initial planning of the integrated circuit layout, and this planning does not need to strictly comply with the layout design rules, etc. The specific precise position arrangement can be further refined in the further design link. Therefore, determining whether the component graph of the present invention application conforms to the specification mainly includes: determining whether the creation of the layout graph itself conforms to the layout design requirements.

[0110] For example, for a polygon, if the situation of edge-edge self-intersection occurs during the creation process, a prompt or warning message is designed to pop up and the creation of the component is refused. Because for a polygon, it is impossible for edges to cross each other.

[0111] For another example, for the path of a Channel type component, the situation of line-line crossing is not allowed during the creation process. This is because in the path type, one path may point to multiple wirings on the same process layer with a certain distance from each other. If crossing occurs, the layout designer cannot handle this situation, so an error will be reported and creation will be prohibited when painting.

[0112] Traditional layout planning and design methods require users to manually draw planning patterns and mark necessary data in an independent layout planning software design environment. These data are only for reference and cannot be directly integrated into the subsequent analog integrated circuit design link, thus resulting in the disconnection and low efficiency of the integrated circuit design automation workflow.

[0113] The above interactive design method and system provided by the embodiments of the present invention can seamlessly integrate the integrated circuit planning function into the design system (that is, such asFigure 5 In the EDA software platform shown, not only are the business breakpoints in the traditional workflow eliminated, enabling a smooth transition from planning to implementation, but the entire design process is also greatly simplified. This method allows users to efficiently create and edit circuit components in a unified environment, ensuring that all planning data can be directly and effectively applied to the actual design, thus effectively simplifying the design process.

[0114] Based on the same concept as the above-mentioned interactive design method for analog integrated circuit layout planning in this invention application, this invention application also provides an interactive design system for analog integrated circuit layout planning (refer to Figure 5 ), which mainly includes: a component type / shape selection module for selecting the type and shape of the component from a component list; a component creation mode editing module for editing the creation mode of the component according to the type of the component; a component attribute / parameter editing module for editing the attributes and / or parameters of the component; a component attribute parameter legality judgment module for judging whether the parameters of the component attributes are legal; and a component graphic creation module for drawing the graphic of the component, as well as a component graphic normalization judgment module for judging whether the graphic of the component conforms to the specification. The said interactive design system belongs to Figure 5 a subsystem of the EDA software platform shown.

[0115] In this way, through the above-mentioned intelligent and automated design program components / program modules provided by this invention, in the interactive design system for analog integrated circuit layout planning, functions such as selecting the component type and shape, editing the creation mode of the component, editing the attributes and / or parameters of the component, judging the legality of the parameters of the component attributes, and creating the graphic of the component can be achieved by using the above-mentioned program components / program modules.

[0116] Using this invention can greatly enhance the designer / user experience. Parameters that previously needed to be set and adjusted one by one by the designer / user can now be automatically configured through a preset program using this invention, significantly reducing the workload of the user. Using this automated interactive design method and its system can not only speed up the design process but also reduce the possibility of human error in design, ensuring a higher level of design accuracy. Therefore, this invention can significantly improve the simplicity of operation and design efficiency, while ensuring the consistency and integrity of data transfer, making complex circuit design more intuitive.

[0117] The embodiments of the present application have been described above in conjunction with the accompanying drawings. However, the present application is not limited to the above specific embodiments. The above specific embodiments are merely illustrative and not restrictive. Under the inspiration of the present application, those of ordinary skill in the art can also make many forms without departing from the purpose of the present application and the scope protected by the claims, and all of them fall within the protection scope of the present application.

Claims

1. An interactive design method for analog layout planning, characterized in that, It includes the following steps: A. Select the type and shape of the component from the component list; B. Edit the creation mode of the component according to the type of the component; C. Edit the component attributes and / or parameters; D. Judge whether the parameters of the component attributes are legal. If so, execute step E; Otherwise, return to step C; E. Create the graphic of the component. F. Judge whether the graphic of the component conforms to the specification. If so, complete the creation process; Otherwise, return to step E.

2. The interactive design method for analog layout planning according to claim 1, characterized in that The types of the components in step A include: The bump type of the small bump structure used to connect the chip to the substrate or the package layer in chip packaging, the pin type used to specify the electrical interface between modules, the wiring channel type between modules, the inductor type used to pre-plan the layout position of the inductor, the functional unit type used as a functional module in integrated circuit design, and the voltage domain type used to reasonably divide the voltage domain, which helps to ensure the compatibility and stability between modules and optimize power management.

3. The interactive design method for analog layout planning according to claim 1, characterized in that, The creation mode of the component in step B is specifically: the creation method based on the graphic features of the component type and the drag-and-drop creation method.

4. The interactive design method for analog layout planning according to claim 1, characterized in that The step of editing the component attributes and / or parameters in step C includes: According to the different creation modes of the selected components, set one or more of the size of the component to be created, whether to perform array creation, set the number of rows and columns of array creation, the row offset between different rows / the spacing between different rows and columns; and / or set the parameters related to the created component, the name bound to the set component, the library name / unit name / view name parameters of the device.

5. The interactive design method for analog layout planning according to claim 1, characterized in that The step of judging whether the parameters of the component attributes are legal in step D includes but is not limited to: Judge the name of the component and its naming specification, judge the device position pointed to by the library name / unit name / view name, judge the pin width / pin length, and judge the pin layer / annotation layer.

6. The interactive design method for analog layout planning according to claim 1, characterized in that, The process of creating the graphic of the component in step E is specifically: automatically generated according to the previously selected component type and / or component shape, and the constraint conditions of the set component attributes and / or parameters.

7. The interactive design method for analog layout planning according to claim 1, characterized in that The judgment of whether the graphic of the component in step F conforms to the specification specifically refers to whether the creation of the layout graphic itself meets the layout design requirements.

8. The interactive design method for analog layout planning according to claim 7, wherein Whether the creation of the layout graphic itself meets the layout design requirements includes: For polygon components, if edge-edge self-intersection occurs during the creation process, the creation of the current component is rejected; For the path of channel type components, if line-line intersection occurs during the creation process, the creation of the current component is rejected.

9. An interactive design system for simulating layout planning, characterized in that, It includes: A component type / shape selection module for selecting the type and shape of the component from the component list; A component creation mode editing module for editing the creation mode of the component according to the type of the component; A component attribute / parameter editing module for editing the component attributes and / or parameters; a component attribute parameter legality judgment module for judging whether the parameters of the component attributes are legal; and a component graphics creation module for drawing the graphics of the component, and a component graphics normalization judgment module for judging whether the graphics of the component conform to the specifications.

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