Self-locking pulse instruction control on-off circuit for satellite

Abstract

The invention discloses a self-locking pulse instruction control startup and shutdown circuit for a satellite. The circuit comprises an auxiliary power supply sub-circuit, an input surge current suppression sub-circuit, a pulse signal startup / shutdown sub-circuit and a signal self-locking sub-circuit, the auxiliary power supply sub-circuit generates auxiliary power supply voltage and supplies the auxiliary power supply voltage to the signal self-locking sub-circuit; the input surge current suppression sub-circuit carries out surge current suppression on an external input primary bus power supply; the pulse signal startup sub-circuit receives an external pulse type startup instruction signal and transmits the external pulse type startup instruction signal to the signal self-locking sub-circuit; the pulse signal shutdown sub-circuit receives an external pulse type shutdown instruction signal and transmits the external pulse type shutdown instruction signal to the signal self-locking sub-circuit; and the signal self-locking sub-circuit receives the pulse-type power-on instruction signal or the pulse-type power-off instruction signal to realize a circuit self-locking function so as to control the on-off state of the input surge current suppression sub-circuit to the post-stage secondary power supply circuit. The on-off frequency is increased, the mechanical resistance is good, and the radiation-proof design of the satellite load secondary power supply single machine is facilitated.

Description

Technical Field

[0001] The present invention belongs to the technical field of aerospace overall technology, and relates to a self-locking pulse command control on-off circuit for a satellite. Background Art

[0002] With the continuous increase in the types of satellite payloads, the demand for secondary power supplies is also increasing. The secondary power supply not only needs to meet the basic power supply requirements of satellite payloads, but also needs to have functions such as various command on-off and input undervoltage protection to meet the index requirements of satellite payload users. In the input bus on-off circuit of the secondary power supply single unit of satellite payloads, the conventional circuit design uses a magnetic latching relay or a control circuit built with a voltage comparator SF193AMDRH to control the conduction or cut-off of the primary bus switch tube.

[0003] The magnetic latching relay is a mechanical switch and is relatively sensitive to mechanical response. When the mechanical vibration level is relatively large, the magnetic latching state is prone to flip, resulting in a relatively limited layout position of the magnetic latching relay on the power supply single unit. Moreover, its mechanical contacts have a risk of adhesion after long-term operation, which also affects the reliability of the secondary power supply single unit; the voltage comparator SF193AMDRH is a DIP-8 package plug-in dual-channel comparator chip and cannot realize reflow soldering electrical installation. Only one of the comparators is used when it is used as the input bus on-off control circuit, which is relatively wasteful. And the total ionizing dose index of this component is only 50 krad(Si), which brings great inconvenience to the radiation-resistant design of the secondary power supply single unit of satellite payloads. Summary of the Invention

[0004] The technical problem solved by the present invention is: overcoming the deficiencies of the prior art, and proposing a self-locking pulse command control on-off circuit for a satellite.

[0005] The technical solution adopted by the present invention is:

[0006] A self-locking pulse command control on-off circuit for a satellite, comprising an auxiliary power supply sub-circuit, an input inrush current suppression sub-circuit, a pulse signal turn-on sub-circuit, a pulse signal turn-off sub-circuit, and a signal self-locking sub-circuit;

[0007] The auxiliary power supply sub-circuit: accessing the external input primary bus power supply, generating an auxiliary power supply voltage VCC, and providing it to the signal self-locking sub-circuit;

[0008] The input inrush current suppression sub-circuit: suppressing the inrush current of the external input primary bus power supply, avoiding the inrush current impact on the primary bus caused by the large current during instant high-voltage charging; realizing the on and off of the subsequent secondary power supply circuit under the control of the signal self-locking sub-circuit;

[0009] Pulse signal startup sub - circuit: Receives an external pulsed startup command signal and transmits it to the signal self - locking sub - circuit;

[0010] Pulse signal shutdown sub - circuit: Receives an external pulsed shutdown command signal and transmits it to the signal self - locking sub - circuit;

[0011] Signal self - locking sub - circuit: Receives a pulsed startup command signal or a pulsed shutdown command signal and implements the circuit self - locking function, thereby indirectly controlling the on - off state of the input surge current suppression sub - circuit for the subsequent secondary power supply circuit.

[0012] Preferably, the auxiliary power supply sub - circuit includes resistors R1, R2, capacitor C1, and zener diode Z1; One end of resistor R1 is connected to the positive line terminal of the external input power supply, and the other end serves as the output terminal VCC of the auxiliary power supply sub - circuit. And the output terminal VCC of the auxiliary power supply sub - circuit is simultaneously connected to one end of resistor R2, one end of capacitor C1, and the cathode of zener diode Z1. The other ends of resistor R2, capacitor C1, and the anode of zener diode Z1 are simultaneously connected to the return line terminal of the external input power supply.

[0013] Preferably, the input surge current suppression sub - circuit includes resistors R3, R4, capacitor C2, zener diode Z2, and power MOS transistor M1; One end of resistor R3 is connected to the positive line terminal of the external input power supply, and the other end is connected to the gate of power MOS transistor M1. And the gate of the surge - suppressing power MOS transistor is simultaneously connected to one end of resistor R4, one end of capacitor C2, and the cathode of zener diode Z2. The other ends of resistor R4, capacitor C2, and the anode of zener diode Z2 are simultaneously connected to the return line terminal of the external input power supply; The source of power MOS transistor M1 is connected to the return line terminal of the external input power supply, and the drain is connected to the return line terminal of the subsequent secondary power supply; The gate of the power MOS transistor M1 is simultaneously connected to the output terminal of the signal self - locking sub - circuit.

[0014] Preferably, the pulse signal startup sub - circuit includes diode D5, resistors R5, R6, R7, filter capacitor C3, and optocoupler U1; The anode of diode D5 is connected to the positive line terminal of the external pulsed startup command signal, the cathode of D5 is connected to one end of current - limiting resistor R5, and the other end of R5 is simultaneously connected to one end of voltage - dividing resistor R6, one end of filter capacitor C3, and the anode of the primary - side light - emitting diode inside optocoupler U1. The other ends of R6, C3, and the cathode of the primary - side light - emitting diode inside U1 are simultaneously connected to the return line terminal of the external pulsed startup command signal; The collector of the secondary - side phototransistor inside optocoupler U1 is connected to one end of resistor R7, the emitter of the secondary - side phototransistor inside U1 serves as the output terminal of the pulse signal startup sub - circuit and is connected to the startup command receiving terminal of the signal self - locking sub - circuit; The other end of resistor R7 is connected to the output terminal VCC of the auxiliary power supply sub - circuit.

[0015] Preferably, the pulse signal shutdown sub-circuit includes a diode D6, resistors R8, R9, R10, a filter capacitor C4, and an optocoupler U2; the anode of the diode D6 is connected to the positive line terminal of the external pulsed shutdown command signal, the cathode of D6 is connected to one end of the current-limiting resistor R8, and the other end of R8 is simultaneously connected to one end of the voltage-dividing resistor R9, one end of the filter capacitor C4, and the anode of the primary side light-emitting diode in the optocoupler U2. The other ends of R9, C4, and the cathode of the primary side light-emitting diode in U2 are simultaneously connected to the return line terminal of the external pulsed shutdown command signal; the collector of the secondary side phototransistor in the optocoupler U2 is connected to one end of the resistor R10, the emitter of the secondary side phototransistor in U2 is connected to the return line terminal of the external input power supply, and the other end of the resistor R10 serves as the output terminal of the pulse signal shutdown sub-circuit and is connected to the shutdown command receiving terminal of the signal self-locking sub-circuit.

[0016] Preferably, the signal self-locking sub-circuit includes transistors Q1, Q2, Q3, resistors R11, R12, R13, R14, R15, R16, R17, capacitors C5, C6, C7, and an optocoupler U3; the emitter of the transistor Q1, one end of the filter capacitor C5, one end of the resistor R13, one end of R15, and one end of R16 are simultaneously connected to the output terminal VCC of the auxiliary power supply sub-circuit. The base of the transistor Q1 is simultaneously connected to the other end of the capacitor C5, the other end of the resistor R13, and one end of the resistor R14;

[0017] The collector of the transistor Q1 serves as the startup command receiving terminal of the signal self-locking sub-circuit and is connected to one end of the resistor R11. The base of the transistor Q2 serves as the shutdown command receiving terminal of the signal self-locking sub-circuit, and the base of the transistor Q2 is simultaneously connected to the other end of the resistor R11, one end of the resistor R12, and one end of the capacitor C6; the other end of the resistor R12, the other end of the capacitor C6, and the emitter of the transistor Q2 are simultaneously connected to the return line terminal of the external input power supply; the other end of the resistor R14 is simultaneously connected to the collector of the transistor Q2 and the cathode of the primary side light-emitting diode in the optocoupler U3. The other end of R15 is connected to the anode of the primary side light-emitting diode in the optocoupler U3. The other end of R16 is simultaneously connected to the collector of the secondary side phototransistor in the optocoupler U3, one end of the resistor R17, one end of the capacitor C7, and the base of the transistor Q3. The other ends of the resistor R17, the capacitor C7, and the emitter of the transistor Q3 are simultaneously connected to the return line terminal of the external input power supply, and the collector of the transistor Q3 is the output terminal of the signal self-locking sub-circuit.

[0018] Preferably, the subsequent secondary power supply is the load of the input surge current suppression sub-circuit.

[0019] The beneficial effects of the present invention compared with the prior art are:

[0020] (1) Since the present invention adopts an electronic switch, it avoids the mechanical sensitivity problems and the limited number of on / off operations caused by using a magnetic latching relay, greatly increases the number of on / off operations, and has good mechanical resistance performance, without being restricted by the mechanically sensitive areas of the satellite.

[0021] (2) Since it does not use the control circuit built with the voltage comparator SF193AMDRH, and adopts surface-mounted triodes and optocouplers, the total ionizing dose resistance indexes are both 100 krad(Si), which is beneficial to the radiation resistance design of the satellite payload secondary power supply unit. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 It is a schematic diagram of the circuit of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0023] The present invention will be further described below in conjunction with the drawings.

[0024] The present invention is mainly applied to the input bus on / off circuit of the satellite payload secondary power supply unit, and can also be widely applied to the power distribution circuit of the satellite payload secondary power supply and ground electronic devices.

[0025] The input bus adopted by the present invention is a DC bus for satellites, and the voltages are generally 28V, 42V and 100V. The self-locking pulse command control on / off circuit of the present invention adopts surface-mounted components, which has low cost and is conducive to automated production. It has the self-locking function of the on / off pulse command and can be applied to various secondary power supplies of satellites with a small volume. As Figure 1 shown, this circuit includes an auxiliary power supply sub-circuit 1, an input surge current suppression sub-circuit 2, a pulse signal turn-on sub-circuit 3, a pulse signal turn-off sub-circuit 4, and a signal self-locking sub-circuit 5. The following functions can be realized. When the primary bus normal power supply voltage is present, the subsequent secondary power supply is in the initial off state; when the pulse signal turn-on sub-circuit receives a pulsed turn-on command, the power MOS transistor switch circuit of the input surge suppression circuit conducts, and the subsequent secondary power supply works normally. When the pulsed turn-on command disappears, the power MOS transistor switch circuit of the input surge suppression circuit can maintain the conducting state and continue to work; when the pulse signal turn-on sub-circuit receives a pulsed turn-off command, the power MOS transistor switch circuit of the input surge suppression circuit turns off, and the subsequent secondary power supply shuts down. When the pulsed turn-on command disappears, the power MOS transistor switch circuit of the input surge suppression circuit can maintain the off state, and the subsequent secondary power supply maintains the off state.

[0026] Auxiliary power supply sub-circuit: It is connected between the positive return lines of the external input power supply to generate an auxiliary power supply voltage VCC and provide the VCC voltage for the signal self-locking sub-circuit.

[0027] Input surge current suppression sub - circuit: When connecting to the external input primary bus power supply, the gate voltage of the power MOS transistor rises exponentially according to the time constant set by the resistor - capacitor. When it reaches the turn - on voltage, the power MOS transistor gradually conducts. After a certain time delay, the charging voltage of the capacitor in the subsequent - stage circuit rises gradually from 0V, avoiding the surge current impact on the primary bus caused by the large current during instantaneous high - voltage charging. By controlling the level state of the control point of the signal self - locking sub - circuit, the turn - on and turn - off of the power MOS transistor can be indirectly controlled.

[0028] Pulse - signal power - on sub - circuit: The light - emitting diode on the primary side of the optocoupler receives the pulsed power - on command signal and transmits the power - on command signal to the signal self - locking sub - circuit through the phototransistor on the secondary side.

[0029] Pulse - signal power - off sub - circuit: The light - emitting diode on the primary side of the optocoupler receives the pulsed power - off command signal and transmits the power - off command signal to the signal self - locking sub - circuit through the phototransistor on the secondary side.

[0030] Signal self - locking sub - circuit: Receives the pulsed command signals transmitted by the pulse - signal power - on and power - off sub - circuits and realizes the circuit self - locking function, maintaining the level state of the control point of the signal self - locking sub - circuit, thereby indirectly controlling the on - off state of the power MOS transistor M1.

[0031] Specifically, the auxiliary power - supply sub - circuit includes: a reference voltage - stabilizing circuit composed of resistors R1, R2, capacitor C1, and zener diode Z1. One end of resistor R1 is connected to the positive line terminal of the external input power supply, and the other end is used as the output terminal VCC of the auxiliary power - supply sub - circuit. And the output terminal VCC of the auxiliary power - supply sub - circuit is simultaneously connected to one end of resistor R2, one end of capacitor C1, and the cathode of zener diode Z1. The other ends of resistor R2, capacitor C1, and the anode of zener diode Z1 are simultaneously connected to the return line terminal of the external input power supply.

[0032] The input surge current suppression sub - circuit includes: resistors R3, R4, capacitor C2, zener diode Z2, and power MOS transistor M1. One end of resistor R3 is connected to the positive line terminal of the external input power supply, and the other end is connected to the gate of power MOS transistor M1. And the gate of the surge - suppressing power MOS transistor is simultaneously connected to one end of resistor R4, one end of capacitor C2, and the cathode of zener diode Z2. The other ends of resistor R4, capacitor C2, and the anode of zener diode Z2 are simultaneously connected to the return line terminal of the external input power supply; the source of power MOS transistor M1 is connected to the return line terminal of the external input power supply, and the drain is connected to the return line terminal of the subsequent - stage secondary power supply; the gate of the power MOS transistor M1 is simultaneously connected to the output terminal of the signal self - locking sub - circuit. By slowly increasing the gate voltage of MOS transistor M1, the function of slowly turning on MOS transistor M1 is achieved, playing a role in suppressing current surges.

[0033] The pulse signal startup sub - circuit includes: diode D5, resistor R5, resistor R6, resistor R7, capacitor C3, and optocoupler U1. The anode of diode D5 is connected to the positive line terminal of the external pulsed startup command signal. The cathode of D5 is connected to one end of the current - limiting resistor R5. The other end of R5 is simultaneously connected to one end of the voltage - dividing resistor R6, one end of the filtering capacitor C3, and the anode of the primary - side light - emitting diode inside the optocoupler U1. The other ends of R6, C3, and the cathode of the primary - side light - emitting diode inside U1 are simultaneously connected to the return line terminal of the external pulsed startup command signal. The collector of the secondary - side phototransistor inside the optocoupler U1 is connected to one end of the resistor R7. The emitter of the secondary - side phototransistor inside U1 serves as the output terminal of the pulse signal startup sub - circuit and is connected to the startup command receiving terminal of the signal self - locking sub - circuit. The other end of the resistor R7 is connected to the output terminal VCC of the auxiliary power supply sub - circuit. The pulse signal startup sub - circuit receives the pulsed startup signal through the primary side of the optocoupler, causing the secondary side of the optocoupler to be in an instantaneous conduction state, changing the control - point level state of the subsequent signal self - locking sub - circuit, thereby indirectly controlling the power MOS transistor M1 to be in the on - state, enabling the subsequent secondary power supply to be in the startup state;

[0034] The pulse signal shutdown sub - circuit includes: diode D6, resistor R8, resistor R9, resistor R10, capacitor C4, and optocoupler U2. The anode of diode D6 is connected to the positive line terminal of the external pulsed shutdown command signal. The cathode of D6 is connected to one end of the current - limiting resistor R8. The other end of R8 is simultaneously connected to one end of the voltage - dividing resistor R9, one end of the filtering capacitor C4, and the anode of the primary - side light - emitting diode inside the optocoupler U2. The other ends of R9, C4, and the cathode of the primary - side light - emitting diode inside U2 are simultaneously connected to the return line terminal of the external pulsed shutdown command signal. The collector of the secondary - side phototransistor inside the optocoupler U2 is connected to one end of the resistor R10. The emitter of the secondary - side phototransistor inside U2 is connected to the return line terminal of the external input power supply. The other end of the resistor R10 serves as the output terminal of the pulse signal shutdown sub - circuit and is connected to the shutdown command receiving terminal of the signal self - locking sub - circuit. The pulse signal shutdown sub - circuit receives the pulsed shutdown signal through the primary side of the optocoupler U2, causing the secondary side of the optocoupler U2 to be in an instantaneous conduction state, changing the control - point level state of the subsequent signal self - locking sub - circuit, thereby indirectly controlling the power MOS transistor M1 to be in the off - state, enabling the subsequent secondary power supply to be in the shutdown state;

[0035] The signal self-locking circuit includes: triode Q1, triode Q2, triode Q3, optocoupler U3, resistor R11, resistor R12, resistor R13, resistor R14, resistor R15, resistor R16, resistor R17, capacitor C5, capacitor C6, capacitor C7. The emitter of triode Q1, one end of filtering capacitor C5, one end of resistor R13, one end of R15, and one end of R16 are simultaneously connected to the output terminal VCC of the auxiliary power supply sub-circuit. The base of triode Q1 is simultaneously connected to the other end of capacitor C5, the other end of resistor R13, and one end of resistor R14; the collector of triode Q1 serves as the start-up instruction receiving end of the signal self-locking circuit and is connected to one end of resistor R11. The base of triode Q2 serves as the shutdown instruction receiving end of the signal self-locking circuit, and the base of the said triode Q2 is simultaneously connected to the other end of resistor R11, one end of resistor R12, and one end of capacitor C6; the other end of resistor R12, the other end of capacitor C6, and the emitter of triode Q2 are simultaneously connected to the external input power supply return line terminal; the other end of resistor R14 is simultaneously connected to the collector of triode Q2 and the cathode of the primary side light-emitting diode inside optocoupler U3. The other end of R15 is connected to the anode of the primary side light-emitting diode inside optocoupler U3. The other end of R16 is simultaneously connected to the collector of the secondary side phototransistor inside optocoupler U3, one end of resistor R17, one end of capacitor C7, and the base of triode Q3. The other end of resistor R17, the other end of capacitor C7, and the emitter of triode Q3 are simultaneously connected to the external input power supply return line terminal. The collector of triode Q3 is the output terminal of the signal self-locking circuit.

[0036] The signal control point of the signal self-locking circuit is located at the base of triode Q2, and the signal output point of the self-locking circuit is at the collector of triode Q3. By receiving the pulse instructions of the start-up sub-circuit and the shutdown sub-circuit of the pulse signal, changing the potential of the signal control point of the self-locking circuit, and further changing the potential of the signal output point of the self-locking circuit, the conduction state of the power MOS transistor M1 is turned on or off.

[0037] Circuit function analysis of the present invention

[0038] a) Analysis of the start-up and shutdown function principle:

[0039] Initial state: In the normal power supply state of the primary bus, the auxiliary power supply sub-circuit is connected to the zener diode Z1 through a current-limiting resistor to provide the reference voltage VCC. Before the start-up instruction is sent, Q1, Q2, and U3 in the self-locking circuit are all in the off state, and Q3 is in the on state under the action of the auxiliary power supply voltage VCC. The potential of the signal output point of the self-locking circuit is at a low level, pulling down the gate voltage of the power MOS transistor M1, making the subsequent secondary power supply in the shutdown state;

[0040] Power-on state: When the pulse signal power-on sub-circuit receives a pulsed power-on signal, the secondary side of U1 conducts instantaneously. The auxiliary power supply voltage VCC passes through the secondary side of U1 and applies a voltage to the base of Q2, generating a base current I of Q2. b2 , Q2 conducts, and a collector current I of Q2 flows. c2 , Under the action of the current I c2 , Q1 conducts, and a collector current I of Q1 flows. c1 , Thereafter, without the action of the pulsed power-on signal, Q2 will continue to conduct under the action of the collector current I c1 of Q1. The continuous conduction of Q2 causes U3 to conduct, pulling down the base potential of Q3. Thereafter, Q3 is cut off, losing control of the gate voltage of the power MOS transistor M1, thus enabling the subsequent secondary power supply to be in the power-on state.

[0041] Power-off state: When the pulse signal power-off sub-circuit receives a pulsed power-off signal, the secondary side of U2 conducts instantaneously, pulling down the base level of Q2 to 0V. Q2 turns off, and the collector current I of Q2 c2 is cut off. Thereafter, Q1 turns off, and the collector current I flowing through Q1 c1 is cut off. Thereafter, without the continuous action of the pulsed power-off signal, Q2 remains off, causing U3 to turn off, and at this time it returns to the initial state. The triode Q3 continues to be in the conducting state under the action of the auxiliary power supply voltage VCC, and the signal output point potential of the self-locking circuit is at a low level. Pulling down the gate voltage of the power MOS transistor M1 enables the subsequent secondary power supply to be in the power-off state.

[0042] The parts not detailed in the present invention belong to the common general knowledge of those skilled in the art.

Claims

1. A self-locking pulse command control on-off circuit for a satellite, characterized in that: It includes an auxiliary power supply circuit, an input inrush current suppression sub-circuit, a pulse signal power-on sub-circuit, a pulse signal power-off sub-circuit, and a signal self-locking sub-circuit; Auxiliary power supply circuit: Connects to the external input primary bus power supply, generates an auxiliary power supply voltage VCC, and supplies it to the signal self-locking sub-circuit; Input inrush current suppression sub-circuit: Suppresses the inrush current of the external input primary bus power supply, avoiding the inrush current impact on the primary bus caused by the large current during instantaneous high-voltage charging; Under the control of the signal self-locking sub-circuit, it realizes the on and off of the subsequent secondary power supply circuit; Pulse signal power-on sub-circuit: Receives an external pulsed power-on command signal and transmits it to the signal self-locking sub-circuit; Pulse signal power-off sub-circuit: Receives an external pulsed power-off command signal and transmits it to the signal self-locking sub-circuit; Signal self-locking sub-circuit: Receives a pulsed power-on command signal or a pulsed power-off command signal, and realizes the circuit self-locking function, thereby indirectly controlling the on and off states of the input inrush current suppression sub-circuit for the subsequent secondary power supply circuit.

2. The self-locking pulse command control power-on and power-off circuit for a satellite according to claim 1, wherein: The auxiliary power supply circuit includes resistors R1, R2, capacitor C1, and zener diode Z1; One end of resistor R1 is connected to the positive line end of the external input power supply, and the other end is used as the output terminal VCC of the auxiliary power supply circuit. And the output terminal VCC of the auxiliary power supply circuit is simultaneously connected to one end of resistor R2, one end of capacitor C1, and the cathode of zener diode Z1. The other ends of resistor R2, capacitor C1, and the anode of zener diode Z1 are simultaneously connected to the return line end of the external input power supply.

3. The self-locking pulse command control on-off circuit for a satellite according to claim 1, wherein: The input inrush current suppression sub-circuit includes resistors R3, R4, capacitor C2, zener diode Z2, and power MOS transistor M1; One end of resistor R3 is connected to the positive line end of the external input power supply, and the other end is connected to the gate of power MOS transistor M1. And the gate of the surge suppression power MOS transistor is simultaneously connected to one end of resistor R4, one end of capacitor C2, and the cathode of zener diode Z2. The other ends of resistor R4, capacitor C2, and the anode of zener diode Z2 are simultaneously connected to the return line end of the external input power supply; The source of power MOS transistor M1 is connected to the return line end of the external input power supply, and the drain is connected to the return line end of the subsequent secondary power supply; The gate of the power MOS transistor M1 is simultaneously connected to the output terminal of the signal self-locking sub-circuit.

4. A self-locking pulse command control power-on and power-off circuit for a satellite according to claim 1, characterized in that: The pulse signal power-on sub-circuit includes diode D5, resistors R5, R6, R7, filter capacitor C3, and optocoupler U1; The anode of diode D5 is connected to the positive line end of the external pulsed power-on command signal. The cathode of D5 is connected to one end of current-limiting resistor R5. The other end of R5 is simultaneously connected to one end of voltage-dividing resistor R6, one end of filter capacitor C3, and the anode of the primary side light-emitting diode inside optocoupler U1. The other ends of R6, C3, and the cathode of the primary side light-emitting diode inside U1 are simultaneously connected to the return line end of the external pulsed power-on command signal; The collector of the secondary side phototransistor inside optocoupler U1 is connected to one end of resistor R7. The emitter of the secondary side phototransistor inside U1 is used as the output terminal of the pulse signal power-on sub-circuit and is connected to the power-on command receiving end of the signal self-locking sub-circuit; The other end of resistor R7 is connected to the output terminal VCC of the auxiliary power supply circuit.

5. The self-locking pulse command control power-on and power-off circuit for a satellite according to claim 1, wherein: The pulse signal shutdown sub - circuit includes diode D6, resistors R8, R9, R10, filter capacitor C4, and optocoupler U2; the anode of diode D6 is connected to the positive line end of the external pulsed shutdown command signal, the cathode of D6 is connected to one end of current - limiting resistor R8, the other end of R8 is simultaneously connected to one end of voltage - dividing resistor R9, one end of filter capacitor C4, and the anode of the primary - side light - emitting diode inside optocoupler U2, the other end of R9, the other end of C4, and the cathode of the primary - side light - emitting diode inside U2 are simultaneously connected to the return line end of the external pulsed shutdown command signal; the collector of the secondary - side phototransistor inside optocoupler U2 is connected to one end of resistor R10, the emitter of the secondary - side phototransistor inside U2 is connected to the return line end of the external input power supply, and the other end of resistor R10 is used as the output end of the pulse signal shutdown sub - circuit and is connected to the shutdown command receiving end of the signal self - locking sub - circuit.

6. The self-locking pulse command control on-off circuit for a satellite according to claim 1, characterized in that: The signal self - locking sub - circuit includes transistors Q1, Q2, Q3, resistors R11, R12, R13, R14, R15, R16, R17, capacitors C5, C6, C7, and optocoupler U3; the emitter of transistor Q1, one end of filter capacitor C5, one end of resistor R13, one end of R15, and one end of R16 are simultaneously connected to the output end VCC of the auxiliary power supply sub - circuit, the base of transistor Q1 is simultaneously connected to the other end of capacitor C5, the other end of resistor R13, and one end of resistor R14; The collector of transistor Q1 is used as the startup command receiving end of the signal self - locking sub - circuit and is connected to one end of resistor R11, the base of transistor Q2 is used as the shutdown command receiving end of the signal self - locking sub - circuit, and the base of transistor Q2 is simultaneously connected to the other end of resistor R11, one end of resistor R12, and one end of capacitor C6; the other end of resistor R12, the other end of capacitor C6, and the emitter of transistor Q2 are simultaneously connected to the return line end of the external input power supply; the other end of resistor R14 is simultaneously connected to the collector of transistor Q2 and the cathode of the primary - side light - emitting diode inside optocoupler U3, the other end of R15 is connected to the anode of the primary - side light - emitting diode inside optocoupler U3, the other end of R16 is simultaneously connected to the collector of the secondary - side phototransistor inside optocoupler U3, one end of resistor R17, one end of capacitor C7, and the base of transistor Q3, the other end of resistor R17, the other end of capacitor C7, and the emitter of transistor Q3 are simultaneously connected to the return line end of the external input power supply, and the collector of transistor Q3 is the output end of the signal self - locking sub - circuit.

7. A self-locking pulse command control power-on and power-off circuit for a satellite according to claim 1, characterized in that: The subsequent - stage secondary power supply is the load of the input surge current suppression sub - circuit.

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