Ultra-stable laser digital automatic locking system and automatic locking method

Abstract

The invention discloses an ultra-stable laser digital automatic locking system and an automatic locking method, and relates to the technical field of ultra-stable laser frequency automatic locking. The ultra-stable laser digital locking system comprises a frequency locking circuit module and a frequency locking laser module. Specifically, according to the system, temperature locking and frequency locking are integrated in one frequency locking circuit module; the temperature of an optical reference cavity of the frequency locking laser module and the working frequency of the frequency locking laser module are simultaneously locked through an FPGA and a matched temperature analog-to-digital conversion unit, a frequency locking analog-to-digital conversion unit, a signal monitoring analog-to-digital converter, a temperature control unit and a frequency control unit. Compared with a digital-analog hybrid circuit in a traditional scheme, the number of components in the system is greatly reduced, the anti-interference capability is enhanced, and the adjustment precision and the stability are obviously enhanced.

Description

Technical Field

[0001] The present application relates to the technical field of ultra-stable laser frequency automatic locking, and in particular to an ultra-stable laser digital automatic locking system and automatic locking method. Background Art

[0002] Ultra-stable laser refers to a laser with a frequency stability of 10 -15 -10 -17 The laser has the remarkable characteristics of extremely narrow linewidth, ultra-high frequency stability, low noise and high monochromaticity, and its linewidth is as low as below 1 Hz. As the next generation of laser frequency standard, it has an irreplaceable position in optical frequency atomic clocks, gravitational wave detection, satellite-to-ground time-frequency transmission and ultra-stable photogenerated microwave sources.

[0003] To meet the diverse application scenarios of ultrastable lasers as frequency reference sources, it is necessary to achieve simultaneous locking of the laser system in multiple loops. These loops include at least a laser temperature locking loop and a PDH (Pound-Drever-Hall locking) loop; they may also include a stabilized optical intensity locking loop, a residual amplitude modulation locking loop (RAM locking loop), a fiber noise suppression locking loop (FNC locking loop), and a laser frequency shift locking loop.

[0004] Traditional solutions typically use hybrid analog-digital circuits to automatically lock a single PDH loop in an ultrastable laser. However, these solutions are limited in their flexibility due to the number of gain adjustment switches or digitally controlled potentiometers. As the number of locked loops increases, parameter adjustment introduces a significant number of control components, inevitably increasing circuit complexity and reducing the reliability of the ultrastable laser system.

[0005] How to achieve the function of simultaneous multi-loop locking of ultra-stable laser systems with the help of a circuit structure with low complexity has become one of the technical problems that need to be solved urgently in the field of laser frequency automatic locking technology. Summary of the Invention

[0006] Based on the above problems, the present application provides an ultra-stable laser digital automatic locking system, which realizes the simultaneous locking of multiple loops in the ultra-stable laser system through a highly integrated digital circuit structure, thereby significantly improving the accuracy, stability and anti-interference ability of the ultra-stable laser system.

[0007] The embodiments of this application disclose the following technical solutions:

[0008] The first aspect of the present application discloses an ultra-stable laser digital automatic locking system, wherein a frequency locking circuit module in the system includes a temperature analog-to-digital conversion unit, a frequency locking analog-to-digital conversion unit, a signal monitoring analog-to-digital converter, a first frequency synthesizer, an FPGA, a temperature control unit, and a frequency control unit; the FPGA is communicatively connected to other units in the frequency locking circuit module; the FPGA includes a first digital PID and a second digital PID; the frequency locking laser module in the system includes a first detector, a second detector, a thermistor, a refrigerator, a first acousto-optic modulator, a piezoelectric ceramic, an electro-optic modulator, and an optical reference cavity;

[0009] The thermistor is used to convert the temperature change of the optical reference cavity into a corresponding resistance value change;

[0010] The first detector is used to convert the reflected light signal into a reflected light voltage analog signal; the reflected light signal includes a modulated light signal reflected by the optical reference cavity;

[0011] The second detector is used to convert the transmitted light signal into a transmitted light voltage analog signal; the transmitted light signal includes an optical power signal transmitted through the optical reference cavity;

[0012] The temperature analog-to-digital conversion unit is used to convert the resistance value change into a temperature voltage digital signal;

[0013] The frequency-locked analog-to-digital conversion unit is configured to convert the AC voltage analog signal in the reflected light voltage analog signal into a reflected light AC voltage digital signal;

[0014] The signal monitoring analog-to-digital converter is used to convert the transmitted light voltage analog signal into a transmitted light voltage digital signal;

[0015] The FPGA is configured to generate a temperature voltage digital feedback signal based on the temperature voltage digital signal and the first digital PID; and generate a frequency locking voltage digital feedback signal based on the reflected light AC voltage digital signal, the transmitted light voltage digital signal, and the second digital PID;

[0016] The temperature control unit is used to convert the temperature voltage digital feedback signal into a temperature current analog feedback signal; the temperature current analog feedback signal is used to control the refrigerator;

[0017] The frequency control unit is used to convert the frequency-locking voltage digital feedback signal into a frequency-locking control feedback frequency signal; the frequency-locking control feedback frequency signal is used to control the first acousto-optic modulator and the piezoelectric ceramic;

[0018] The first frequency synthesizer is used to generate a modulation signal to control the electro-optical modulator.

[0019] In an optional implementation, the frequency locking circuit module further includes a stable light intensity analog-to-digital conversion unit and a stable light intensity locking control unit; the stable light intensity analog-to-digital conversion unit and the stable light intensity locking control unit are both communicatively connected to the FPGA; the FPGA further includes a third digital PID;

[0020] The stabilized light intensity analog-to-digital conversion unit is used to convert the DC voltage analog signal in the reflected light voltage analog signal into a reflected light DC voltage digital signal;

[0021] The FPGA is further configured to generate a steady light intensity voltage digital feedback signal based on the reflected light DC voltage digital signal and the third digital PID;

[0022] The stable light intensity locking control unit is used to convert the stable light intensity voltage digital feedback signal into power adjustment of the target loop feedback radio frequency signal; the power adjustment of the target loop feedback radio frequency signal is used to control the driving power of the first acousto-optic modulator.

[0023] In an optional implementation, the frequency-locked laser module further includes a third detector; the frequency-locked circuit module further includes a RAM locking unit; the RAM locking unit includes a mixer, a sixth analog-to-digital converter, and a second frequency synthesizer;

[0024] The sixth analog-to-digital converter and the second frequency synthesizer are both communicatively connected to the FPGA; the FPGA further includes a fourth digital PID;

[0025] The third detector is used to detect the modulated optical signal modulated by the electro-optical modulator and convert the modulated optical signal into a modulated optical voltage analog signal;

[0026] The second frequency synthesizer is used to output a radio frequency reference frequency signal;

[0027] The mixer is configured to generate a mixed analog signal based on the modulated photovoltage analog signal and the radio frequency reference frequency signal;

[0028] The sixth analog-to-digital converter is configured to convert the mixed analog signal into a mixed digital signal;

[0029] The FPGA is further configured to generate a mixing feedback digital signal based on the mixing digital signal and the fourth digital PID;

[0030] The first frequency synthesizer is further configured to output a feedback voltage signal based on the mixed digital signal, wherein the feedback voltage signal is configured to compensate for fluctuations in the driving DC voltage of the electro-optical modulator.

[0031] In an optional implementation, the temperature analog-to-digital conversion unit includes a bridge amplifier circuit and a first analog-to-digital converter;

[0032] The bridge amplifier circuit is used to convert the resistance value change into a temperature voltage analog value;

[0033] The first analog-to-digital converter is used to convert the temperature voltage analog value into the temperature voltage digital signal.

[0034] In an optional implementation, the frequency-locked analog-to-digital conversion unit includes a DC bias device, a first low-pass filter, and a fifth analog-to-digital converter;

[0035] The DC bias device is used to obtain the AC voltage analog signal from the reflected light voltage analog signal;

[0036] The first low-pass filter is used to perform a filtering operation on the AC voltage analog signal to obtain a target AC voltage analog signal;

[0037] The fifth analog-to-digital converter is used to convert the target AC voltage analog signal into the reflected light AC voltage digital signal.

[0038] In an optional implementation, the temperature control unit includes a first digital-to-analog converter and a linear current source;

[0039] The first digital-to-analog converter is configured to convert the temperature voltage digital feedback signal into the temperature voltage analog feedback signal;

[0040] The linear current source is used to convert the temperature voltage analog feedback signal into the temperature current analog feedback signal.

[0041] In an optional implementation, the frequency control unit includes an acousto-optic modulator control subunit and a piezoelectric ceramic control subunit; the frequency-locked control feedback frequency signal includes a first radio frequency feedback signal and a piezoelectric ceramic voltage feedback signal;

[0042] The acousto-optic modulator control subunit includes a fourth digital-to-analog converter, a second voltage-controlled oscillator, and a first power amplifier; the piezoelectric ceramic control subunit includes a fifth digital-to-analog converter and a high-voltage amplifier;

[0043] The fourth digital-to-analog converter is configured to convert the frequency-locking voltage digital feedback signal into a first frequency-locking voltage analog feedback signal;

[0044] The second voltage-controlled oscillator is configured to convert the first frequency-locked voltage analog feedback signal into a first initial radio frequency signal;

[0045] The first power amplifier is used to amplify the first initial RF signal into the first RF feedback signal; the first RF feedback signal is used to control the first acousto-optic modulator;

[0046] The fifth digital-to-analog converter is configured to convert the frequency-locking voltage digital feedback signal into a second frequency-locking voltage analog feedback signal;

[0047] The high-voltage amplifier is used to convert the second frequency-locked voltage analog feedback signal into the piezoelectric ceramic voltage feedback signal; the piezoelectric ceramic voltage feedback signal is used to control the piezoelectric ceramic.

[0048] In an optional implementation, the stabilized light intensity analog-to-digital conversion unit includes a DC bias device, an amplifier circuit, and a fourth analog-to-digital converter;

[0049] The DC bias device is used to obtain a DC voltage analog signal from the reflected light voltage analog signal;

[0050] The amplifier circuit is used to amplify the AC voltage analog signal to obtain an amplified DC voltage analog signal;

[0051] The fourth analog-to-digital converter is used to convert the amplified DC voltage analog signal into the reflected light DC voltage digital signal.

[0052] In an optional implementation, the stable light intensity locking control unit includes a digital-to-analog converter 3, an electrically adjustable attenuator and a first power amplifier;

[0053] The third digital-to-analog converter is used to convert the stable light intensity voltage digital feedback signal into a stable light intensity voltage analog feedback signal;

[0054] The electrically adjustable attenuator is used to convert the stable light intensity voltage analog feedback signal into a target loop gain feedback signal;

[0055] The first power amplifier is used to convert the target loop gain feedback signal into power adjustment of the target loop feedback radio frequency signal.

[0056] In an optional implementation, the frequency-locked laser module includes a first optical path; a seed laser, a first acousto-optic modulator, an electro-optic modulator, and the optical reference cavity are placed in sequence in the first optical path along the direction of seed light transmission; the optical reference cavity is configured with the refrigerator and the thermistor; the seed laser is configured with the piezoelectric ceramic; and the seed laser, the acousto-optic modulator, and the electro-optic modulator are connected by optical fibers.

[0057] In an optional implementation, the frequency-locked laser module also includes a fourth detector and a second optical path; the second optical path includes a first beam splitter, a second beam splitter, a second acousto-optic modulator and a reflector; the first beam splitter is located on an optical fiber connecting the first acousto-optic modulator and the electro-optic modulator, and the first beam splitter is connected to the second beam splitter through an optical fiber; the second beam splitter is also connected to the reflector and the second acousto-optic modulator respectively through an optical fiber; the second beam splitter transmits the first beat frequency optical signal to the photosensitive surface of the fourth detector through the optical fiber; the first beat frequency optical signal is a beat frequency optical signal generated based on the seed light and the reflector.

[0058] In an optional implementation, the frequency locking circuit module further includes a fiber optic noise suppression analog-to-digital conversion unit, and a frequency shift and fiber optic noise locking control unit; the fiber optic noise suppression analog-to-digital conversion unit and the frequency shift and fiber optic noise locking control unit are both communicatively connected to the FPGA; the FPGA further includes a fifth digital PID;

[0059] The fourth detector is used to convert the first beat frequency optical signal into an optical fiber noise voltage analog signal;

[0060] The optical fiber noise suppression analog-to-digital conversion unit is used to convert the optical fiber noise voltage analog signal into an optical fiber noise voltage digital signal;

[0061] The FPGA is further configured to generate a fiber noise voltage digital feedback signal based on the fiber noise voltage digital signal and the fifth digital PID;

[0062] The frequency shift and fiber noise locking control unit is used to generate a second radio frequency feedback signal based on the fiber noise voltage digital feedback signal; the second radio frequency feedback signal is used to control the second acousto-optic modulator.

[0063] In an optional implementation, the frequency shift and fiber noise locking control unit includes a second digital-to-analog converter, a first voltage-controlled oscillator, and a second power amplifier;

[0064] The second digital-to-analog converter is configured to convert the optical fiber noise voltage digital feedback signal into an optical fiber noise voltage analog feedback signal;

[0065] The first voltage-controlled oscillator is used to convert the optical fiber noise voltage analog feedback signal into a second initial radio frequency signal;

[0066] The second power amplifier is configured to amplify the second initial RF signal into a second RF feedback signal.

[0067] In an optional implementation, the second optical path further includes an optical frequency comb and a fifth detector; a second beat signal generated based on a reference optical signal output by the optical frequency comb and a modulated optical signal output by the second acousto-optic modulator is transmitted to a photosensitive surface of the fifth detector via an optical fiber;

[0068] The frequency locking circuit module further includes a frequency shift analog-to-digital conversion unit; the frequency shift analog-to-digital conversion unit is communicatively connected to the FPGA; the FPGA further includes a sixth digital PID;

[0069] The fifth detector is configured to convert the second beat frequency optical signal into a frequency-shifted voltage analog signal;

[0070] The frequency-shift analog-to-digital conversion unit is configured to convert the frequency-shift voltage analog signal into a frequency-shift voltage digital signal;

[0071] The FPGA is further configured to generate a frequency-shifted voltage digital feedback signal based on the frequency-shifted voltage digital signal and the sixth digital PID;

[0072] The second digital-to-analog converter is further configured to convert the frequency-shifted voltage digital feedback signal into a frequency-shifted voltage analog feedback signal;

[0073] The first voltage-controlled oscillator is further configured to convert the frequency-shifted voltage analog feedback signal into a third initial radio frequency signal;

[0074] The second power amplifier is further configured to amplify the third initial RF signal into a third RF feedback signal; and the third RF feedback signal is used to regulate the second acousto-optic modulator.

[0075] The second aspect of the present application discloses a laser digital automatic locking method, comprising:

[0076] After setting the initial parameters of the ultra-stable laser digital automatic locking system, an initial parameter set is acquired; the initial parameter set includes the initial power and initial temperature of the seed laser, the initial frequency and initial phase of the electro-optical modulator, the initial temperature of the optical reference cavity, the initial bias voltage of the piezoelectric ceramic, and the initial bias voltage of the second voltage-controlled oscillator;

[0077] Determining whether the ultra-stable laser digital automatic locking system is in a normal working state based on the collected parameters in the initial parameter set;

[0078] If it is determined that the ultra-stable laser automatic locking system is in a normal working state, the operating temperature of the refrigerator in the ultra-stable laser digital automatic locking system is controlled by the thermistor, the temperature analog-to-digital conversion unit, the FPGA, the temperature control unit and the refrigerator in the laser digital automatic system;

[0079] After determining that the difference between the temperature of the refrigerator and a preset reference temperature is less than a first value, the operating frequency of the frequency-locked laser module in the ultra-stable laser digital automatic locking system is controlled by the first detector, the second detector, the frequency-locked analog-to-digital conversion unit, the signal monitoring analog-to-digital converter, the FPGA, the frequency control unit, the piezoelectric ceramic and the first acousto-optic modulator in the laser digital automatic control system.

[0080] In an optional implementation, the method further includes:

[0081] After determining that the difference between the operating frequency of the frequency-locked laser module and the preset reference frequency is less than a second value, the laser power of the frequency-locked laser module is controlled by the first detector, the stabilized light intensity analog-to-digital conversion unit, the FPGA, the stabilized light intensity locking control unit, and the first acousto-optic modulator in the laser digital automatic control system;

[0082] After determining that the difference between the laser power of the frequency-locked laser module and the preset reference laser power is less than a third value, controlling the residual amplitude modulation of the frequency-locked laser module by means of a third detector, a RAM locking unit, and an electro-optical modulator in the laser digital automatic control system;

[0083] After determining that the difference between the voltage fluctuation caused by the actual residual amplitude modulation and the preset reference amplitude is less than a fourth value, determining the operating mode of the ultra-stable laser digital automatic locking system;

[0084] If it is determined that the operating mode of the ultra-stable laser digital automatic locking system is the first operating mode, the fiber noise in the frequency-locked laser module is controlled by the fourth detector, the fiber noise suppression analog-to-digital conversion unit, the FPGA, the frequency shift and fiber noise locking control unit, and the second acousto-optic modulator in the ultra-stable laser digital automatic locking system;

[0085] If it is determined that the operating mode of the ultra-stable laser digital automatic locking system is the second operating mode, the operating frequency of the frequency-locked laser module is controlled by the optical frequency comb, the fifth detector, the frequency-shifting analog-to-digital conversion unit, the FPGA, the frequency-shifting and fiber noise locking control unit and the second acousto-optic modulator in the ultra-stable laser digital automatic locking system.

[0086] Compared with the existing technology, this application has the following beneficial effects:

[0087] The present application discloses an ultra-stable laser digital automatic locking system, in which temperature locking and frequency locking are integrated into a frequency-locking circuit module. The system achieves simultaneous locking of the temperature of the optical reference cavity of the frequency-locking laser module and the operating frequency of the frequency-locking laser module through an FPGA and a matching temperature analog-to-digital conversion unit, a frequency-locking analog-to-digital conversion unit, a signal monitoring analog-to-digital converter, a temperature control unit, and a frequency control unit. Compared with the digital-analog hybrid circuit in the traditional solution, the number of components in the system is greatly reduced, and the anti-interference capability, adjustment accuracy, and stability are significantly enhanced. BRIEF DESCRIPTION OF THE DRAWINGS

[0088] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0089] Figure 1 A schematic structural diagram of an ultra-stable laser digital automatic locking system provided in an embodiment of the present application;

[0090] Figure 2 A schematic structural diagram of a frequency locking circuit module provided in an embodiment of the present application;

[0091] Figure 3 A flowchart of a laser digital automatic locking method provided in an embodiment of the present application;

[0092] Figure 4 A schematic structural diagram of another ultra-stable laser digital automatic locking system provided in an embodiment of the present application;

[0093] Figure 5 A schematic structural diagram of another frequency locking circuit module provided in an embodiment of the present application;

[0094] Figure 6 This is a flowchart of another laser digital automatic locking method provided in an embodiment of the present application. DETAILED DESCRIPTION

[0095] In order to help those skilled in the art better understand the present invention, the following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of this application.

[0096] To facilitate understanding of the technical solution in this application, an ultra-stable laser automatic locking system including a laser temperature locking loop and a PDH locking loop is first introduced through Example 1; then, a control method of the ultra-stable laser automatic locking system described in Example 1 is introduced through Example 2.

[0097] On this basis, an ultra-stable laser automatic locking system including a laser temperature locking loop, a PDH locking loop, a stable optical intensity locking loop, a residual amplitude modulation locking loop, a fiber noise suppression locking loop and a laser frequency shift locking loop is introduced through Example 3; and then a control method of the ultra-stable laser automatic locking system described in Example 3 is introduced through Example 4.

[0098] It should be noted that the first detector is detector 1 in the drawings; the second detector is detector 2 in the drawings; the third detector is detector 3 in the drawings; the fourth detector is detector 4 in the drawings; and the fifth detector is detector 5 in the drawings.

[0099] It should be noted that the first acousto-optic modulator is the acousto-optic modulator 1 in the drawings; the second acousto-optic modulator is the acousto-optic modulator 2 in the drawings.

[0100] It should be noted that the first analog-to-digital converter is the analog-to-digital converter 1 in the accompanying drawing; the fourth digital-to-analog converter is the digital-to-analog converter 4 in the accompanying drawing; the fifth analog-to-digital converter is the analog-to-digital converter 5 in the accompanying drawing; the sixth analog-to-digital converter is the analog-to-digital converter 6 in the accompanying drawing; and the signal monitoring analog-to-digital converter is the analog-to-digital converter 7 in the accompanying drawing.

[0101] It should be noted that the first digital-to-analog converter is the digital-to-analog converter 1 in the accompanying drawing; the second digital-to-analog converter is the digital-to-analog converter 2 in the accompanying drawing; the third digital-to-analog converter is the digital-to-analog converter 3 in the accompanying drawing; the fourth digital-to-analog converter is the analog-to-digital converter 4 in the accompanying drawing; and the fifth digital-to-analog converter is the digital-to-analog converter 5 in the accompanying drawing.

[0102] It should be noted that the second frequency synthesizer is the frequency synthesizer 1 in the drawing; the first frequency synthesizer is the frequency synthesizer 2 in the drawing.

[0103] It should be noted that the first low-pass filter is the low-pass filter 1 in the accompanying drawing; the first voltage-controlled oscillator is the voltage-controlled oscillator 1 in the accompanying drawing; the second voltage-controlled oscillator is the voltage-controlled oscillator 2 in the accompanying drawing; the first power amplifier is the power amplifier 2 in the accompanying drawing; the second power amplifier is the power amplifier 1 in the accompanying drawing; the first beam splitter is the beam splitter 1 in the accompanying drawing; and the second beam splitter is the beam splitter 2 in the accompanying drawing.

[0104] Example 1:

[0105] Figure 1This is a schematic diagram of the structure of an ultra-stable laser digital automatic locking system provided in an embodiment of the present application. Figure 1 As shown, the ultra-stable laser automatic locking system includes a frequency locking circuit module and a frequency locking laser module.

[0106] The frequency locking circuit module includes: a temperature analog-to-digital conversion unit, a frequency locking analog-to-digital conversion unit, an analog-to-digital converter 7, an FPGA, a temperature control unit, a frequency control unit and a frequency synthesizer 2; the FPGA is communicatively connected to other units in the frequency locking circuit module.

[0107] The FPGA includes a first digital PID and a second digital PID ( Figure 1 (not shown in the figure); FPGA has the function of demodulating and filtering the received digital signal; when the FPGA receives the corresponding digital signal, it will digitally demodulate and filter the digital signal to obtain the filtered result; then, according to the automatic locking process, the filtered result can be input into the corresponding digital PID for calculation; FPGA can also realize the functions of bias adjustment (bias voltage adjustment of piezoelectric ceramics), frequency scanning and voltage scanning.

[0108] Figure 1 The automatic locking process in is the locking method corresponding to the ultra-stable laser automatic locking system in this application.

[0109] The frequency-locked laser module includes core components such as piezoelectric ceramics, seed laser (fiber laser), acousto-optic modulator 1, electro-optic modulator, optical reference cavity, detector 1, detector 2, cooler and thermistor; in order to achieve the adjustment of the optical path, it also includes multiple supporting optical elements such as multiple collimators, prisms, multiple mirrors, polarization-maintaining beam splitters, etc.

[0110] in, Figure 1 The square indicated by the dashed box in the figure represents the optical reference cavity, i.e. Figure 1 The optical reference cavity in FIG. 1 is a schematic diagram, and the specific structure of the optical reference cavity is not limited in this application.

[0111] Along the propagation direction of the seed light, Figure 1 On the optical path of the frequency-locked laser module (also called the first optical path), seed lasers ( Figure 1 The optical fiber laser is provided in the optical fiber laser device, an acousto-optic modulator 1, an electro-optic modulator and an optical reference cavity; the optical reference cavity is provided with a refrigerator and a thermistor; the seed laser is provided with a piezoelectric ceramic; the seed laser, the acousto-optic modulator 1 and the electro-optic modulator are connected by an optical fiber.

[0112] It should be noted that the specific connection relationship between the optical reference cavity, the refrigerator, and the thermistor is not limited in this application; this application only emphasizes that the thermistor is used to convert the temperature change of the optical reference cavity into a corresponding resistance value change; the refrigerator is used to control the operating temperature of the optical reference cavity.

[0113] It should be noted that Figure 1 The electro-optic modulator is used to modulate the laser signal in the frequency-locked laser module and to move the laser operating frequency under the side-locked condition; the piezoelectric ceramic is used to suppress the long-term drift of the operating frequency of the laser in the frequency-locked laser module; the acousto-optic modulator 1 is used to quickly and accurately lock the operating frequency of the laser in the frequency-locked laser module.

[0114] It should be noted that since the working principle of the frequency-locked laser and the functions of each optical device are existing technologies, the relevant contents will not be described in detail in this application.

[0115] Figure 1 The thermistor, temperature analog-to-digital conversion unit, FPGA, temperature control unit, and refrigerator comprise a laser temperature locking loop. Within the laser temperature locking loop, the thermistor converts temperature changes in the optical reference cavity into corresponding resistance changes and transmits the voltage corresponding to the resistance change to the temperature analog-to-digital conversion unit. The temperature analog-to-digital conversion unit converts the received voltage into a temperature-voltage digital signal and sends this temperature-voltage digital signal to the FPGA. The FPGA demodulates and filters the received temperature-voltage digital signal and then performs a numerical operation on it with a preset temperature value to obtain a temperature error. The P and I parameters of the first digital PID in the FPGA are then activated, and the temperature error is processed by the first digital PID to obtain a temperature-voltage digital feedback signal, which is then sent to the temperature control unit. The temperature control unit converts the received temperature-voltage digital feedback signal into a temperature-current analog feedback signal. The temperature-current analog feedback signal is then used to control the cooling or heating of the refrigerator.

[0116] Figure 1The detector 1, detector 2, frequency-locked analog-to-digital conversion unit, analog-to-digital converter 7, acousto-optic modulator 1, piezoelectric ceramics, and FPGA constitute a PDH lock loop; the frequency synthesizer 2 is still used in the adjustment process of this PDH loop. In the PDH lock loop, detector 1 converts the detected reflected light signal into a reflected light voltage analog signal and sends it to the frequency-locked analog-to-digital conversion unit. The frequency-locked analog-to-digital conversion unit converts the AC voltage analog signal in the received reflected light voltage analog signal into a reflected light AC voltage digital signal and sends the reflected light AC voltage digital signal to the FPGA. Simultaneously, detector 2 converts the received transmitted light signal into a transmitted light voltage analog signal and sends it to the analog-to-digital converter 7. The analog-to-digital converter 7 converts the received transmitted light voltage analog signal into a transmitted light voltage digital signal and sends the transmitted light voltage digital signal to the FPGA.

[0117] After receiving the reflected light AC voltage digital signal and the transmitted light voltage digital signal, the FPGA performs signal demodulation and filtering operations on the above two signals, and then inputs the demodulated and filtered results into the second digital PID to generate a frequency-locked voltage digital feedback signal (this process is described in detail in Example 2).

[0118] After receiving the frequency-locking voltage digital feedback signal from the FPGA, the frequency control unit converts the frequency-locking voltage digital feedback signal into a frequency-locking control feedback frequency signal. The frequency-locking control feedback frequency signal includes a first RF feedback signal and a piezoelectric ceramic voltage feedback signal. The first RF feedback signal controls the operation of the acousto-optic modulator 1, while the piezoelectric ceramic feedback signal controls the operation of the piezoelectric ceramic, thereby controlling the operating frequency of the laser in the frequency-locked laser module.

[0119] It should be noted that Figure 1 The modulation signal for controlling the electro-optical modulator is generated by the frequency synthesizer 2; wherein the modulation signal includes the modulation signal required by the frequency-locked loop and the modulation signal required by the side-locked band mode.

[0120] Figure 2 This is a structural diagram of a frequency locking circuit module provided in an embodiment of the present application. Figure 2 As shown, the temperature analog-to-digital conversion unit consists of a bridge amplifier circuit and an analog-to-digital converter 1; the temperature control unit consists of a digital-to-analog converter 1 and a linear current source; the frequency-locked analog-to-digital conversion unit consists of a DC bias device, a low-pass filter 1 and an analog-to-digital converter 5; the frequency control unit consists of an acousto-optic modulator control subunit and a piezoelectric ceramic control subunit; the acousto-optic modulator control subunit consists of a circuit unit consisting of a digital-to-analog converter 4, a voltage-controlled oscillator 2 and a power amplifier 2; and the piezoelectric ceramic control subunit consists of a circuit unit consisting of a digital-to-analog converter 5 and a high-voltage amplifier.

[0121] The specific functions of the components in the temperature analog-to-digital conversion unit are as follows: the bridge amplifier circuit converts the resistance change detected by the thermistor into a temperature voltage analog value; analog-to-digital converter 1 converts the temperature voltage analog value into a temperature voltage digital signal. The specific functions of the components in the temperature control unit are as follows: digital-to-analog converter 1 converts the temperature voltage digital feedback signal into a temperature voltage analog feedback signal; the linear current source converts the temperature voltage analog feedback signal into a temperature current analog feedback signal; and the temperature current analog feedback signal is used to control the cooling or heating of the refrigerator.

[0122] The specific functions of each device in the frequency-locked analog-to-digital conversion unit are as follows: after receiving the reflected light voltage analog signal transmitted by the detector 1, the DC bias device obtains the AC voltage analog signal in the reflected light voltage analog signal; the low-pass filter 1 is used to filter the AC voltage analog signal to obtain the target AC voltage analog signal; the analog-to-digital converter 5 is used to convert the target AC voltage analog signal into a reflected light AC voltage digital signal.

[0123] The detector 2 converts the received transmitted light signal into a transmitted light voltage analog signal and sends it to the analog-to-digital converter 7; the analog-to-digital converter 7 converts the received transmitted light voltage analog signal into a transmitted light voltage digital signal and sends it to the FPGA.

[0124] The first demodulation and filtering unit in the FPGA is used in conjunction with the first digital PID; after demodulating and filtering the temperature voltage digital signal, the first demodulation and filtering unit performs numerical calculations with a preset temperature value to obtain a temperature error, and inputs the temperature error into the first digital PID; the first digital PID processes the temperature error to obtain a temperature voltage digital feedback signal, and sends the temperature voltage digital feedback signal to the temperature control unit.

[0125] The second demodulation and filtering unit in the FPGA is used in conjunction with the second digital PID; after the second demodulation and filtering unit demodulates and filters the reflected light AC voltage digital signal output by the analog-to-digital converter 5, it performs numerical calculations with the preset AC voltage value to obtain an AC voltage error value, and inputs the AC voltage error signal into the second digital PID; the second digital PID processes the AC voltage error signal and the transmitted light voltage digital signal output by the analog-to-digital converter 7 to obtain a frequency-locked voltage digital feedback signal.

[0126] The specific functions of each component in the acousto-optic modulation control subunit in the frequency control unit are as follows: the digital-to-analog converter 4 is used to convert the frequency-locking voltage digital feedback signal into a first frequency-locking voltage analog feedback signal; the voltage-controlled oscillator 2 is used to convert the first frequency-locking voltage analog feedback signal into a first initial RF signal; the power amplifier 2 is used to amplify the first initial RF signal into a first RF feedback signal; and the operation of the acousto-optic modulator 1 is controlled by the first RF feedback signal.

[0127] The specific components in the piezoelectric ceramic control subunit in the frequency control unit are: the digital-to-analog converter 5 is used to convert the frequency-locking voltage digital feedback signal into a second frequency-locking voltage analog feedback signal; the high-voltage amplifier is used to convert the second frequency-locking voltage analog feedback signal into a piezoelectric ceramic voltage feedback signal; and the piezoelectric ceramic operation is controlled by the piezoelectric ceramic voltage feedback signal.

[0128] Example 2:

[0129] Based on the ultra-stable laser digital automatic locking system in Example 1, this application provides a laser digital automatic locking method. The laser digital automatic locking method in this application includes:

[0130] First, after setting the initial parameters of the ultra-stable laser digital automatic locking system, an initial parameter set is collected; based on some parameters in the collected initial parameter set, such as the operating temperature and operating power of the laser, the power of the power amplifier, etc., it is determined whether the ultra-stable laser digital automatic locking system is in a normal working state; wherein, the initial parameter set includes the initial power and initial temperature of the seed laser, the initial frequency and initial phase of the electro-optical modulator, the initial temperature of the optical reference cavity, the initial bias voltage of the piezoelectric ceramic, and the initial bias voltage of the second voltage-controlled oscillator; wherein, the parameters in the initial parameter set used to determine whether the ultra-stable laser digital automatic locking system is in a normal working state include the operating temperature of the frequency-locked laser, the power of the frequency-locked laser, and the power of the power amplifier.

[0131] Secondly, if it is determined that the ultra-stable laser automatic locking system is in normal working condition, the operating temperature of the refrigerator in the ultra-stable laser digital automatic locking system is controlled through the thermistor, temperature analog-to-digital conversion unit, FPGA, temperature control unit and refrigerator in the laser digital automatic system.

[0132] Finally, after determining that the difference between the temperature of the refrigerator and the preset reference temperature is less than the first value, the operating frequency of the frequency-locked laser module in the ultra-stable laser digital automatic locking system is controlled through the detector 1, detection 2, frequency-locked analog-to-digital conversion unit, analog-to-digital converter 7, FPGA, frequency control unit, piezoelectric ceramics and acousto-optic modulator 1 in the laser digital automatic control system.

[0133] Next, combine Figure 3 The control method of the ultra-stable laser digital automatic locking system disclosed in this application is described in detail. Figure 3 This is a flow chart of a laser digital automatic locking method provided in an embodiment of the present application. Figure 3 As shown, the laser digital automatic locking method disclosed in this application includes:

[0134] S301, start locking.

[0135] Prepare to start the multi-loop simultaneous locking work of the ultra-stable laser digital automatic locking system.

[0136] S302, configuring initial parameters of the system operation.

[0137] For the ultra-stable laser digital automatic locking system in Example 1, its corresponding initial parameters include: the initial power and initial temperature of the seed laser, the initial frequency and initial phase of the electro-optical modulator, the initial temperature of the optical reference cavity, the initial bias voltage of the piezoelectric ceramic, and the initial bias voltage of the voltage-controlled oscillator 2; then enter S303.

[0138] S303: Determine whether the system is operating normally.

[0139] The system described in this application is an ultra-stable laser digital automatic locking system. After the data in the initial parameter set are assigned to the corresponding parameter positions of the ultra-stable laser digital automatic locking system, the system automatically performs a series of initialization operations and tests to determine whether the system is in normal working order. If the system is in normal working order, the process proceeds to S305; otherwise, the process returns to S304.

[0140] S304, troubleshooting.

[0141] S305 , turn on P and I of the first digital PID.

[0142] The first digital PID is the digital PID in the FPGA corresponding to the laser temperature locking loop. In this step, the proportional (P) and integral (I) parameters in the controller of the first digital PID are enabled so that they begin to participate in the system regulation; then the process proceeds to S306.

[0143] S306: Determine whether the temperature fluctuation is less than a first value.

[0144] The thermistor converts the detected temperature of the cooler in the optical reference cavity into a corresponding resistance value and transmits the resistance value to the temperature analog-to-digital conversion unit; the temperature analog-to-digital conversion unit converts the received resistance value into a temperature voltage digital signal and sends the temperature voltage digital signal to the FPGA; the FPGA demodulates and filters the received temperature voltage digital signal, and then performs numerical calculations with the preset temperature value to obtain the temperature error, that is, the temperature fluctuation.

[0145] If it is determined that the difference between the temperature fluctuation of the cooler in the optical reference cavity and the preset reference temperature is smaller than the first value, it is determined that the temperature of the optical reference cavity is accurately controlled, and the process proceeds to S308 .

[0146] If it is determined that the difference between the temperature fluctuation of the laser in the optical reference cavity and the preset reference temperature is greater than the first value, it is determined that the temperature of the optical reference cavity is not stable, and the process proceeds to S307.

[0147] Exemplarily, the first value may be 0.001°C.

[0148] S307, adjust temperature control parameters.

[0149] That is, the initial temperature of the optical reference cavity, the signal filtering parameters, and the P and I parameters of the digital PID are reset; after the temperature parameters are reset, the process returns to S305.

[0150] S308, laser light power operating point setting.

[0151] After determining that the temperature of the optical reference cavity is precisely controlled, that is, determining that the laser temperature locking loop completes temperature locking, the initial laser power of the seed laser is set, and then proceeding to S309.

[0152] S309: PZT coarse scanning, EOM modulation frequency and phase adjustment, and opening of P in the second digital PDH.

[0153] This step starts the PDH loop locking process.

[0154] Specifically, first start the piezoelectric ceramic (PZT) to perform coarse scanning, then set the frequency and phase of the electro-optical modulator (EOM), and then turn on the ratio (P) parameter in the second digital PDH; enter S310.

[0155] S310 , determining whether the error signal 1 is greater than the threshold 1 and the transmission signal is greater than the threshold 2.

[0156] In this application, the detector 1 converts the detected reflected light signal into a reflected light voltage analog signal and sends it to the frequency-locked analog-to-digital conversion unit; the frequency-locked analog-to-digital conversion unit converts the AC voltage analog signal in the received reflected light voltage analog signal into a reflected light AC voltage digital signal, and sends the reflected light AC voltage digital signal to the FPGA; the FPGA demodulates and filters the reflected light AC voltage digital signal, and then performs numerical operations with a preset first reference voltage value to obtain an error signal 1.

[0157] In this application, the second detector converts the detected transmitted light signal into a transmitted light voltage analog signal and sends it to the analog-to-digital converter 7; the analog-to-digital converter 7 converts the received transmitted light voltage analog signal into a transmitted light voltage digital signal as Figure 3 The transmission signal in .

[0158] After obtaining the error signal 1 and the transmission signal, the error signal 1 is compared with the preset threshold 1, and the transmission signal is compared with the preset threshold 2; if it is determined that the error signal 1 is greater than the threshold 1 and the transmission signal is greater than the threshold 2, then enter S311; otherwise, enter S312.

[0159] S311, PZT fine scanning.

[0160] That is, the piezoelectric ceramic (PZT) is started to perform fine scanning, and then enter S314.

[0161] S312, determine whether the number of coarse scans is less than N1.

[0162] If it is determined that the number of PZT coarse scans is less than N1, the process proceeds to S309; otherwise, the process proceeds to S313.

[0163] S313: Adjust the locking parameters in the PDH locking loop.

[0164] That is, the initial laser power of the seed laser is reset, the initial frequency and initial phase of the electro-optical modulator, and the P and I parameters of the digital PID are reset; and the process returns to S309.

[0165] S314, determining whether the transmission signal is greater than a threshold value 3.

[0166] If it is determined that the transmission signal is less than the preset threshold value 3, the process proceeds to S316; otherwise, the process proceeds to S315.

[0167] S315, determining whether the number of fine scans is less than N2.

[0168] If it is determined that the number of fine scans is less than N2, the process returns to S311; otherwise, the process returns to S313.

[0169] S316 , turn off the PZT scan, and turn on I1 and I2 in the second digital PDH.

[0170] That is, the PZT scan is turned off, and the I1 and I2 integral parameters in the second digital PDH controller are enabled; then the process goes to S317.

[0171] S317 , determining whether the error signal 1 is greater than the threshold 1 and the transmission signal is greater than the threshold 3.

[0172] If it is determined that the error signal 1 is greater than the threshold 1 and the transmission signal is greater than the threshold 3, then the process proceeds to S318; otherwise, the process proceeds to S320.

[0173] S318: Turn on I3 in the second digital PDH.

[0174] That is, the I3 integral parameter in the second digital PDH controller is turned on, and then the process enters S319.

[0175] S319 , determining whether the error signal peak is greater than threshold 1, the transmission signal is greater than threshold 2, and the PZT voltage change rate is less than the target voltage change rate; wherein the error signal peak is the peak value of the demodulated error signal.

[0176] If so, the PDH loop is locked, the laser operating power of the frequency-locked laser module is determined to be stable near the preset laser power, and the process proceeds to S322; otherwise, the process proceeds to S320.

[0177] The target voltage change rate may be 10V / 1s.

[0178] S320 , turn off I1 , I2 , and I3 in the second digital PID.

[0179] That is, turn off the I1, I2 and I3 integral parameters in the second digital PID controller; then enter S321.

[0180] S321, determine whether the number of scans is less than N3.

[0181] If it is determined that the number of scans is less than N3, the process returns to S309; otherwise, the process proceeds to S313. The number of scans refers to the number of times the PZT voltage scans back and forth within a set fixed range.

[0182] S322, relock monitoring.

[0183] That is, after determining that each control loop in the ultra-stable laser digital automatic locking system has completed locking, the signals detected by each detector are continuously monitored; then the process enters S323.

[0184] S323: Is the lock lost?

[0185] If it is determined that the temperature fluctuation, error signal 1, transmission signal or PZT voltage change rate does not meet the corresponding preset value, it is determined that the lock is lost and the process goes to S324; otherwise, it returns to S323.

[0186] S324, loops P and I are closed.

[0187] Close the P and I in the PID controllers corresponding to all locking loops, that is, close the P and I in the first digital PID and close the P and I in the second digital PID, and then enter S301 to start relocking.

[0188] Example 3:

[0189] It's no secret that frequency-stabilized lasers can be used as high-precision reference lasers, providing a stable frequency benchmark for various optical measurements and quantum optics experiments. They can also be used in conjunction with lasers like optical frequency combs to achieve high-precision frequency measurement and calibration. Both of these applications demonstrate the importance and widespread application of frequency-stabilized lasers in modern optical technology.

[0190] Figure 4 This is a schematic diagram of the structure of another ultra-stable laser digital automatic locking system provided in an embodiment of the present application. Figure 1 Compared with the ultra-stable laser digital automatic locking system in Figure 4 A second optical path is added to the frequency-locked laser module of the ultra-stable laser digital automatic locking system. The second optical path can use the frequency-locked laser as a high-precision reference laser (first working mode), or it can beat the frequency of the frequency-locked laser with the optical frequency comb to achieve high-precision frequency measurement and calibration (second working mode).

[0191] At the same time, in order to make the frequency-locked laser module have better frequency stability and power stability, Figure 4 The frequency locking circuit module in the invention adds the circuit structure corresponding to the stable light intensity locking loop, the circuit structure corresponding to the RAM locking loop, the circuit structure corresponding to the FNC locking loop and the circuit structure corresponding to the frequency shift locking loop.

[0192] Combine Figure 4 As shown, the ultra-stable laser automatic locking system includes a frequency-locking circuit module and a frequency-locking laser module. The frequency-locking circuit module includes a temperature analog-to-digital conversion unit, a frequency-shifting analog-to-digital conversion unit, a fiber-optic noise suppression analog-to-digital conversion unit, a light-intensity stabilization analog-to-digital conversion unit, a frequency-locking analog-to-digital conversion unit, a RAM locking unit, a temperature control unit, a frequency-shifting and fiber-optic noise locking control unit, a light-intensity stabilization locking control unit, a frequency control unit and analog-to-digital converter 7, an FPGA, and a frequency synthesizer 2. The FPGA is communicatively connected to the other units in the frequency-locking circuit module.

[0193] The FPGA includes a first digital PID, a second digital PID, a third digital PID, a fourth digital PID, a fifth digital PID and a sixth digital PID ( Figure 4 The above-mentioned digital PID is not shown in the figure, and multiple digital PIDs are used to represent it); the FPGA has the function of demodulating and filtering the received digital signal; when the FPGA receives the corresponding digital signal, it digitally demodulates and filters the digital signal to obtain a filtered error signal; then, according to the automatic locking process, the filtered error signal can be input into the corresponding digital PID for calculation; the FPGA can also realize the functions of bias adjustment (bias voltage adjustment of piezoelectric ceramics), frequency scanning and voltage scanning; Figure 4 The automatic locking process in is the locking method corresponding to the ultra-stable laser automatic locking system in this application.

[0194] The frequency-locked laser module includes a first optical path and a second optical path; the first optical path and the Figure 1 The first optical path in the frequency-locked laser module shown in is exactly the same. For details about the first optical path, please refer to Figure 1The introduction of relevant content will not be repeated here.

[0195] The second optical path in the frequency-locked laser module includes a beam splitter 1, a beam splitter 2, an acousto-optic modulator 2 and a reflector; the beam splitter 1 is located on the optical fiber connecting the acousto-optic modulator 1 and the electro-optic modulator, and the beam splitter 1 and the beam splitter 2 are connected through the optical fiber; the beam splitter 2 is also connected to the reflector and the acousto-optic modulator 2 respectively through the optical fiber; the beam splitter 2 transmits the first beat frequency optical signal to the photosensitive surface of the detector 4 through the optical fiber; the first beat frequency optical signal is an optical signal generated by the seed light and the optical signal after the seed light is reflected by the reflector through the beam splitter.

[0196] The second optical path in the frequency-locked laser module also includes an optical frequency comb, a beam splitter 4 and a detector 5; the reference light signal output by the optical frequency comb and the modulated light signal output by the acousto-optic modulator 2 are transmitted via optical fiber to the beam splitter 4 to generate a second beat signal; the second beat signal is transmitted via optical fiber to the photosensitive surface of the detector 5.

[0197] Figure 4 The temperature analog-to-digital conversion unit, temperature control unit, frequency-locked analog-to-digital conversion unit, frequency control unit, frequency synthesizer 2 and analog-to-digital converter 7 in the frequency-locked circuit module; and the functions of detectors 1 and 2 in the frequency-locked laser module are the same as those in FIG. Figure 1 The contents recorded in are exactly the same and will not be repeated here.

[0198] Figure 4 The detector 1, the stable light intensity analog-to-digital conversion unit, the FPGA, the stable light intensity locking control unit, and the acousto-optic modulator 1 constitute a stable light intensity locking loop. In the stable light intensity locking loop, the reflected light signal detected by the detector 1 is converted into a reflected light voltage analog signal and sent to the stable light intensity analog-to-digital conversion unit. The stable light intensity analog-to-digital conversion unit converts the DC voltage analog signal in the received reflected light voltage analog signal into a reflected light DC voltage digital signal and sends the reflected light DC voltage digital signal to the FPGA. After receiving the reflected light DC voltage digital signal, the FPGA demodulates and calculates the reflected light DC voltage digital signal and a preset light intensity power value. The demodulation calculation result is passed through a low-pass filter as a stable light intensity error. The stable light intensity error is then sent to a third digital PID in the FPGA. The stable light intensity error is calculated by the third digital PID to generate a stable light intensity voltage digital feedback signal. After receiving the stable light intensity voltage digital feedback signal, the stable light intensity locking control unit converts it into a power adjustment of the target loop feedback radio frequency signal. The power adjustment of the target loop feedback radio frequency signal controls the operation of the acousto-optic modulator 1.

[0199] Figure 4The detector 3, RAM lock unit, frequency synthesizer 2, FPGA, and electro-optical modulator in the RAM lock loop form a RAM lock loop. In the RAM lock loop, after detecting the modulated optical signal modulated by the electro-optical modulator (the modulated optical signal output by the electro-optical modulator is transmitted to the photosensitive surface of the detector 3 via the beam splitter 3), the detector 3 converts the modulated optical signal into a modulated optical voltage analog signal. The RAM frequency lock unit demodulates and filters the modulated optical voltage analog signal to obtain a mixed digital signal. After receiving the mixed digital signal, the FPGA calculates the mixed optical signal using the fourth digital PID in the FPGA to obtain a mixed feedback digital signal. The frequency synthesizer 2 generates a dual modulation signal based on the mixed feedback digital signal and a pre-set reference frequency signal. The dual modulation signal controls the operation of the electro-optical modulator to achieve residual amplitude modulation (RAM) locking.

[0200] Figure 4 The detector 4, fiber noise suppression analog-to-digital conversion unit, FPGA, frequency shift and fiber noise locking control unit, and acousto-optic modulator 2 constitute an FNC locking loop. In the FNC locking loop, the detector 4 converts the first beat frequency optical signal generated by the seed light and the reflector into an analog fiber noise voltage signal; the fiber noise suppression analog-to-digital conversion unit converts the analog fiber noise voltage signal into a digital fiber noise voltage signal; after receiving the digital fiber noise voltage signal, the FPGA performs high-pass filtering on the digital fiber noise voltage signal, then demodulates and calculates it with a preset fiber noise reference frequency, and then performs low-pass filtering on the demodulation calculation result to obtain a fiber noise error signal; the fifth digital PID in the FPGA calculates the fiber noise error signal to generate a digital fiber noise voltage feedback signal; the frequency shift and fiber noise locking control unit processes the digital fiber noise voltage feedback signal to generate a second RF feedback signal; and the second RF feedback signal is used to control the operation of the acousto-optic modulator 2 to achieve locking of the FNC loop.

[0201] Figure 4The detector 5, the frequency-shift analog-to-digital conversion unit, the FPGA, the frequency-shift and fiber noise locking control unit, and the acousto-optic modulator 2 constitute a frequency-shift locking loop. In the frequency-shift locking loop, the detector 5 converts the second beat frequency optical signal (the beat frequency optical signal formed after the reference optical signal output by the optical frequency comb and the modulated optical signal output by the acousto-optic modulator 2 are transmitted to the beam splitter 4 via the optical fiber) into a frequency-shift voltage analog signal; the frequency-shift analog-to-digital conversion unit converts the frequency-shift voltage analog signal into a frequency-shift voltage digital signal; upon receiving the frequency-shift voltage digital signal, the FPGA performs high-pass filtering on the frequency-shift voltage digital signal, and then demodulates and calculates it with a preset reference frequency. The calculation result is then low-pass filtered and used as a frequency-shift error signal; the sixth digital PID in the FPGA calculates the frequency-shift error signal to generate a frequency-shift voltage digital feedback signal; the frequency-shift noise unit processes the frequency-shift voltage digital feedback signal to generate a third radio frequency feedback signal; and the acousto-optic modulator 2 is controlled by the third radio frequency feedback signal to achieve frequency locking of the frequency-shift locking loop.

[0202] From the above introduction, we can see that Figure 4 The FNC loop locking loop and the frequency shift locking loop share the same frequency shift and fiber noise locking unit. Figure 4 The FNC loop locking loop in the system is the first working mode, that is, the frequency-locked laser module in the ultra-stable laser digital automatic locking system is directly used as a locking loop in the process of using a high-precision reference laser; Figure 4 The frequency-shift locking loop (FSL) in the second operating mode is a locking loop used during use, where the frequency-locked laser module in the ultra-stable laser digital automatic locking system beats the optical frequency comb to achieve high-precision frequency measurement and calibration. When the FSL module operates in the first operating mode, FNC locking is performed; when the FSL module operates in the second operating mode, the FSL locking loop is locked. Those skilled in the art will choose to lock the FNC loop or the FSL locking loop based on the operating mode of the frequency-locked laser module in the ultra-stable laser digital automatic locking system.

[0203] Figure 5 This is a structural diagram of another frequency locking circuit module provided in an embodiment of the present application. Figure 5 As shown, the temperature analog-to-digital conversion unit consists of a bridge amplifier circuit and an analog-to-digital converter 1; the temperature control unit consists of a digital-to-analog converter 1 and a linear current source; the frequency-locked analog-to-digital conversion unit consists of a DC bias device, a low-pass filter 3 and an analog-to-digital converter 5; the frequency control unit consists of an acousto-optic modulator control subunit and a piezoelectric ceramic control subunit; the acousto-optic modulator control subunit consists of a digital-to-analog converter 4, a voltage-controlled oscillator 2 and a power amplifier 2; and the piezoelectric ceramic control subunit consists of a digital-to-analog converter 5 and a high-voltage amplifier. Figure 5 The structure of the above units and the function of each device in each unit can be found in Figure 2 The introduction of relevant content will not be repeated here. Figure 5 The functions of the first digital PID, the second digital PID, the first demodulation filter unit, and the second demodulation filter unit are shown in Figure 2 The introduction of relevant content will not be repeated here.

[0204] Combine Figure 5 As shown, the frequency shift analog-to-digital conversion unit consists of a low-pass filter 1 and an analog-to-digital converter 2; the fiber noise suppression analog-to-digital conversion unit consists of a low-pass filter 2 and an analog-to-digital converter 3; the stable light intensity analog-to-digital conversion unit consists of a DC bias, an amplifier circuit and an analog-to-digital converter 4; the RAM frequency locking unit consists of a mixer, a low-pass filter 4, an amplifier, an analog-to-digital converter 6 and a frequency synthesizer 1; the frequency shift and fiber noise locking control unit consists of a digital-to-analog converter 2, a voltage-controlled oscillator 1 and a power amplifier 1; and the stable light intensity locking control unit consists of a digital-to-analog converter 3, an electrically adjustable attenuator and a power amplifier 2.

[0205] The specific functions of the components in the fiber noise suppression analog-to-digital conversion unit are as follows: after receiving the analog fiber noise voltage signal from detector 4, low-pass filter 2 filters the analog fiber noise voltage signal to obtain a filtered analog fiber noise voltage signal; analog-to-digital converter 3 converts the filtered analog fiber noise voltage signal into a digital fiber noise voltage signal. The specific functions of the components in the frequency-shifting analog-to-digital conversion unit are as follows: after receiving the analog frequency-shifted voltage signal from detector 5, low-pass filter 1 filters the analog frequency-shifted voltage signal to obtain a filtered analog frequency-shifted voltage signal; analog-to-digital converter 2 converts the filtered analog frequency-shifted voltage signal into a digital frequency-shifted voltage signal.

[0206] The specific functions of each component in the frequency shift and fiber noise locking control unit are as follows: the digital-to-analog converter 2 can convert the frequency shift voltage digital feedback signal into a frequency shift voltage analog feedback signal, and can also convert the fiber noise voltage digital feedback signal into a fiber noise voltage analog feedback signal; the voltage-controlled oscillator 1 can convert the frequency shift voltage analog feedback signal into a third initial RF signal, and can also convert the noise voltage analog feedback signal into a second initial RF signal; the power amplifier 1 can amplify the third initial RF signal into a third RF feedback signal and feed the third RF feedback signal back to the acousto-optic modulator 2; it can also convert the second initial RF signal into a second RF feedback signal and feed the second feedback signal back to the acousto-optic modulator 2.

[0207] The specific functions of each device in the stable light intensity analog-to-digital conversion unit are as follows: the DC bias device is used to obtain the DC voltage analog signal in the reflected light voltage analog signal sent by the detector 1; the amplifier circuit is used to amplify the DC voltage analog signal to obtain the amplified DC voltage analog signal; the analog-to-digital converter 4 is used to convert the amplified DC voltage analog signal into a reflected light DC voltage digital signal.

[0208] The specific functions of each component in the stable light intensity locking control unit are as follows: the digital-to-analog converter 3 is used to convert the stable light intensity voltage digital feedback signal into a stable light intensity voltage analog feedback signal; the electrically adjustable attenuator is used to convert the stable light intensity voltage analog feedback signal into a target loop gain feedback signal; the power amplifier 2 is used to convert the target loop gain feedback signal into power adjustment of the target loop feedback RF signal.

[0209] The specific functions of each component in the RAM lock unit are as follows: detector 3 is used to detect the modulated optical signal modulated by the electro-optical modulator and convert it into a modulated optical voltage analog signal; frequency synthesizer 1 is used to output a radio frequency reference frequency signal; mixer is used to demodulate the modulated optical voltage analog signal using the radio frequency reference frequency signal to obtain a mixed analog signal; low-pass filter 4 is used to filter the mixed analog signal to obtain a filtered mixed analog signal, i.e., a demodulated error signal; amplifier is used to amplify the filtered mixed analog signal to obtain a target mixed analog signal, i.e., an amplified error signal; analog-to-digital converter 6 is used to convert the target mixed analog signal into a mixed digital signal and send it to the FPGA. The FPGA processes the mixed digital signal to obtain a mixed feedback digital signal; frequency synthesizer 2 is used to output a feedback voltage signal based on the mixed feedback digital signal to compensate for fluctuations in the driving DC voltage of the electro-optical modulator.

[0210] The role of the first demodulation filter unit and the first digital PID in the FPGA, the role of the second demodulation filter unit and the second digital PID, and the role of the fourth digital PID refer to Figure 3 The introduction of the relevant text in the text will not be repeated here.

[0211] The third demodulation and filtering unit in the FPGA is used in conjunction with the third digital PID; after the third demodulation and filtering unit processes the reflected light DC voltage digital signal output by the analog-to-digital converter 4, it demodulates and calculates the reflected light DC voltage digital signal and the preset light intensity power value. The result of the demodulation calculation passes through a low-pass filter and is used as the stable light intensity error, and the stable light intensity error is sent to the third digital PID in the FPGA; the stable light intensity error is calculated by the third digital PID to generate a stable light intensity voltage digital feedback signal.

[0212] The fourth demodulation and filtering unit in the FPGA is used in conjunction with the fifth digital PID. After receiving the optical fiber noise voltage digital signal output by the analog-to-digital converter 3, the fourth demodulation and filtering unit performs high-pass filtering on the optical fiber noise voltage digital signal, and then performs demodulation calculation with a preset optical fiber noise reference frequency. The demodulation calculation result is then low-pass filtered to obtain an optical fiber noise error signal. The fifth digital PID in the FPGA performs calculations on the optical fiber noise error signal to generate an optical fiber noise voltage digital feedback signal.

[0213] The fifth demodulation and filtering unit in the FPGA is used in conjunction with the sixth digital PID. After receiving the frequency-shifted voltage digital signal output by the analog-to-digital converter 2, the fifth demodulation and filtering unit performs high-pass filtering on the frequency-shifted voltage digital signal, and then demodulates and calculates it with a preset reference frequency. The calculation result is then low-pass filtered and used as a frequency-shifted error signal. The sixth digital PID operates on the frequency-shifted error signal to generate a frequency-shifted voltage digital feedback signal. The frequency-shifted noise unit processes the frequency-shifted voltage digital feedback signal to generate a third RF feedback signal. The third RF feedback signal is used to control the operation of the acousto-optic modulator 2 to achieve frequency locking of the frequency-shifted locked loop.

[0214] Example 4:

[0215] Based on the ultra-stable laser digital automatic locking system in Example 3, this application provides another laser digital automatic locking method. The other laser digital automatic locking method in this application includes:

[0216] The first step is to set the initial parameters of the ultra-stable laser digital automatic locking system and collect an initial parameter set. Based on the parameters in the initial parameter set, it is determined whether the ultra-stable laser digital automatic locking system is in normal operation. The initial parameter set includes the initial power and initial temperature of the seed laser, the initial frequency and initial phase of the electro-optical modulator, the initial temperature of the optical reference cavity, the initial bias voltage of the piezoelectric ceramic, and the initial bias voltage of the second voltage-controlled oscillator.

[0217] In the second step, if it is determined that the ultra-stable laser automatic locking system is in normal working condition, the operating temperature of the refrigerator in the ultra-stable laser digital automatic locking system is controlled through the thermistor, temperature analog-to-digital conversion unit, FPGA, temperature control unit and refrigerator in the laser digital automatic system.

[0218] In the third step, after determining that the difference between the temperature of the refrigerator and the preset reference temperature is less than the first value, the operating frequency of the frequency-locked laser module in the ultra-stable laser digital automatic locking system is controlled through the detector 1, detector 2, frequency-locked analog-to-digital conversion unit, analog-to-digital converter 7, FPGA, frequency control unit, piezoelectric ceramics and acousto-optic modulator 1 in the laser digital automatic control system.

[0219] In the fourth step, after determining that the difference between the operating frequency of the frequency-locked laser module and the preset reference frequency is less than the second value, the laser power of the frequency-locked laser module is controlled through the detector 1, the stable light intensity analog-to-digital conversion unit, the FPGA, the stable light intensity locking control unit and the acousto-optic modulator 1 in the laser digital automatic control system.

[0220] In the fifth step, after determining that the difference between the laser power of the frequency-locked laser module and the preset reference laser power is less than the third value, the remaining amplitude of the frequency-locked laser module is controlled through the detector 3, RAM locking unit and electro-optical modulator in the laser digital automatic control system.

[0221] Step 6: After determining that the difference between the actual remaining amplitude and the preset reference amplitude is less than the fourth value, determine the working mode of the ultra-stable laser digital automatic locking system.

[0222] In the seventh step, if it is determined that the operating mode of the ultra-stable laser digital automatic locking system is the first operating mode, the fiber noise in the frequency-locked laser module is controlled through the detector 4, fiber noise suppression analog-to-digital conversion unit, FPGA, frequency shift and fiber noise locking control unit and acousto-optic modulator 2 in the ultra-stable laser digital automatic locking system.

[0223] In the eighth step, if it is determined that the operating mode of the ultra-stable laser digital automatic locking system is the second operating mode, the operating frequency of the frequency-locked laser module is controlled through the optical frequency comb, detector 5, frequency shift analog-to-digital conversion unit, FPGA, frequency shift and fiber noise locking control unit and acousto-optic modulator 2 in the ultra-stable laser digital automatic locking system.

[0224] The ninth step is to continuously monitor the signals detected by each detector after confirming that each control loop in the ultra-stable laser digital automatic locking system has completed locking; if abnormal conditions such as sudden large fluctuations in signal strength, offset in signal frequency, or distortion in signal waveform are found, relock based on the laser digital automatic locking method provided in this application.

[0225] Next, combine Figure 6 A control method for another ultra-stable laser digital automatic locking system disclosed in this application is described in detail. Figure 6 This is a flow chart of another ultra-stable laser digital automatic locking method provided in an embodiment of the present application. Figure 6 As shown, another laser digital automatic locking method disclosed in this application includes:

[0226] S601, temperature lock.

[0227] S602: Determine whether the temperature fluctuation is less than a first value.

[0228] The temperature lock content involved in S601, namely Figure 3 The contents of S301-S305; and the contents involved in S602, namely Figure 3 For the contents of S601 and S602, refer to the introduction of S301-306 in the above embodiment and will not be repeated here.

[0229] S603: Setting the laser optical power operating point and determining the laser operating mode.

[0230] Before performing laser frequency locking, first, the power value of the seed laser output is set, that is, the laser optical power operating point is set; then, it is determined whether the operating mode of the laser locking module is the first operating mode or the second operating mode.

[0231] After setting the laser optical power operating point and determining the laser operating mode, enter S604.

[0232] S604: PZT coarse scanning, EOM modulation frequency and phase adjustment, and opening of P in the second digital PDH.

[0233] The relevant contents of S604 are described in S309 in the above embodiment, which will not be described in detail here. After S604, the process proceeds to S605.

[0234] S605 , determining whether error signal 1 is greater than threshold 1 and transmission signal is greater than threshold 2 and error signal 3 is greater than threshold 6.

[0235] For the relevant contents of the error signal 1 and the transmission signal, please refer to the introduction of the relevant contents of S310 in the above embodiment, which will not be repeated here.

[0236] In the present application, the detector 3 converts the modulated optical signal modulated by the electro-optical modulator into a modulated optical voltage analog signal and sends it to the RAM locking unit; the error signal is obtained after being processed by the RAM locking unit.

[0237] After obtaining error signal 1, transmission signal and error signal 3, error signal 1 is compared with preset threshold 1, transmission signal is compared with preset threshold 2, and error signal 3 is compared with preset threshold 6; if it is determined that error signal 1 is greater than threshold 1, error signal 3 is greater than threshold 6, and transmission signal is less than threshold 2, then enter S606; otherwise, enter S607.

[0238] S606, PZT fine scanning.

[0239] That is, the piezoelectric ceramic (PZT) is started to perform fine scanning, and then enter S609.

[0240] S607, determining whether the number of coarse scans is less than N1.

[0241] If it is determined that the number of PZT coarse scans is less than N1, the process proceeds to S604; otherwise, the process proceeds to S608.

[0242] S608: Adjust the locking parameters in the PDH locking loop.

[0243] That is, the initial laser power of the seed laser is reset, and the initial frequency and initial phase of the electro-optical modulator are reset; and the process returns to S604.

[0244] S609: Determine whether the transmission signal is greater than threshold 3.

[0245] If the transmission signal is greater than the threshold 3, the process proceeds to S611; otherwise, the process proceeds to S610.

[0246] S610, determining whether the number of fine scans is less than N2.

[0247] If it is determined that the number of fine scans is less than N2, the process returns to S606; otherwise, the process returns to S608.

[0248] S611, turn off the PZT scan, and turn on I1 and I2 in the second digital PDH.

[0249] That is, the PZT scan is turned off, and the I1 and I2 integral parameters in the second digital PDH controller are enabled; then the process goes to S612.

[0250] S612 , determining whether the error signal 1 is greater than the threshold 1 and the transmission signal is less than the threshold 3.

[0251] If it is determined that the error signal 1 is greater than the threshold 1 and the transmission signal is less than the threshold 3, the process proceeds to S615; otherwise, the process proceeds to S613.

[0252] S613 , turn off I1 , I2 and I3 in the second digital PID.

[0253] That is, the I1, I2 and I3 integral parameters in the second digital PID controller are turned off, and the process goes to S614.

[0254] S614, determine whether the number of scans is less than N3. What number of scans?

[0255] If it is determined that the number of scans is less than N3, the process returns to S608; otherwise, the process proceeds to S604.

[0256] S615: Turn on I3 in the second digital PDH.

[0257] That is, the I3 integral parameter in the second digital PDH controller is turned on, and then the process goes to S616.

[0258] S616 , determining whether the error signal peak is greater than threshold 1, the transmission signal is greater than threshold 2, and the PZT voltage change rate is less than the target voltage change rate.

[0259] If so, the PDH loop is locked, and the laser operating power of the frequency-locked laser module is determined to be stable near the preset laser power, and the process proceeds to S617; otherwise, the process proceeds to S613.

[0260] S617, turn on P and I in the third digital PID.

[0261] That is, the proportional (P) parameter and the integral (I) parameter in the third digital PID are turned on, and the process goes to S618.

[0262] S618, determine whether error signal 2 is less than threshold 4.

[0263] The error signal 2 in this application is the transmitted light signal detected by the detector 2, which is converted into a transmitted light voltage analog signal and sent to the analog-to-digital converter 7. The analog-to-digital converter 7 converts the received transmitted light voltage analog signal into a transmitted light voltage digital signal; the transmitted light voltage digital signal is input into the FPGA and calculated with the preset transmitted light reference voltage to obtain the error signal.

[0264] After obtaining the error signal 2, it is determined whether the error signal 2 is less than the threshold 4; if the error signal 2 is less than the threshold 4, the process proceeds to S620; otherwise, the process proceeds to S619.

[0265] S619, turn off P and I in the third digital PID.

[0266] After turning off P and I in the third digital PID, the process proceeds to S613.

[0267] S620 , turn on P and I in the fourth digital PID.

[0268] That is, the proportional (P) parameter and the integral (I) parameter in the third digital PID are turned on, and the process goes to S621.

[0269] S621, determine whether the error signal 3 is less than the threshold 5.

[0270] If the error signal 3 is less than the threshold 5, the process proceeds to S623; otherwise, the process proceeds to S622.

[0271] S622, turn off P and I in the fourth digital PID.

[0272] S623, determining whether it is the first working mode.

[0273] The frequency-locked laser module in this application has two operating modes: the first operating mode and the second operating mode. In the first operating mode, the frequency-locked laser is used as a high-precision reference laser, corresponding to the FNC locking loop. In the second operating mode, the frequency-locked laser beats the optical frequency comb to achieve high-precision frequency measurement and calibration, corresponding to the frequency-shift locking loop.

[0274] In this step, it is determined whether the working mode of the frequency-locked laser module is the first working mode; if it is the first working mode, FNC locking is required, and the process goes to S630; if it is not the first working mode but the second working mode, the frequency shift locking loop needs to be locked, and the process goes to S624.

[0275] S624, start EOM frequency scanning.

[0276] The frequency scanning state of the electro-optic modulator in the first optical path of the frequency-locked laser module is started, and the process goes to S625.

[0277] S625 , determine whether the error signal 4 is greater than the threshold 7 .

[0278] After detecting the first beat frequency optical signal, the detector 4 in the present application converts the first beat frequency optical signal into an optical fiber noise voltage analog signal; the optical fiber noise suppression analog-to-digital conversion unit converts the optical fiber noise voltage analog signal into an optical fiber noise voltage digital signal, and sends the optical fiber noise voltage digital signal to the FPGA. The FPGA performs numerical calculations on the noise digital voltage signal and the corresponding noise digital voltage reference value to obtain an error signal 4.

[0279] After obtaining the error signal 4, the error signal 4 is compared with the preset threshold 7; if the error signal 4 is greater than the threshold 7, the process proceeds to S626; otherwise, the process proceeds to S629;

[0280] S626, turn on P and I in the sixth digital PID.

[0281] S627, determine whether the error signal 4 is less than the threshold 8.

[0282] After turning on P and I in the sixth digital PID, it is determined whether the error signal 4 is less than the threshold 8. If the error signal 4 is less than the threshold 8, the process proceeds to S634; otherwise, the process proceeds to S628.

[0283] S628, turn off P and I in the sixth digital PID, and turn off EOM frequency scanning.

[0284] S629: Adjust the locking parameters in the frequency shift locking loop.

[0285] After S628, the process proceeds to S629 to reset the parameters in the frequency shift locking loop; and then proceeds to S624.

[0286] S630: Turn on P and I in the fifth digital PID.

[0287] That is, open the P and I of the PID control in the FNC locking loop; then, enter S631.

[0288] S631, determine whether the error signal 4 is less than the threshold 8.

[0289] If the error signal 4 is smaller than the preset threshold 8, the process proceeds to S634; otherwise, the process proceeds to S632.

[0290] S632, turn off P and I in the fifth digital PID.

[0291] S633: Adjust the locking parameters in the FNC locking loop.

[0292] After S632, the locking parameters in the FNC locking loop are adjusted; then, the process proceeds to S630.

[0293] S634, relock detection.

[0294] That is, after determining that each control loop in the ultra-stable laser digital automatic locking system has completed locking, the signals detected by each detector are continuously monitored; then the process enters S635.

[0295] S635, determine whether the lock is lost.

[0296] Determine whether there are any abnormal conditions such as sudden and significant fluctuations in signal strength, offset in signal frequency, or distortion in signal waveform; if so, determine that the system is locked and proceed to S636; otherwise, return to S634.

[0297] S636, turns off P and I in all digital PIDs.

[0298] Close the P and I in the PID controllers corresponding to all locking loops in the ultra-stable laser digital locking system, and then enter S601 to start relocking.

[0299] The above is merely one specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. An ultra-stable laser digital automatic locking system, characterized in that: The frequency-locking circuit module in the system includes a temperature analog-to-digital conversion unit, a frequency-locking analog-to-digital conversion unit, a signal monitoring analog-to-digital converter, a first frequency synthesizer, an FPGA, a temperature control unit, and a frequency control unit; the FPGA is communicatively connected to the other units in the frequency-locking circuit module; the FPGA includes a first digital PID and a second digital PID; the frequency-locking laser module in the system includes a first detector, a second detector, a thermistor, a refrigerator, a first acousto-optic modulator, a piezoelectric ceramic, an electro-optic modulator, and an optical reference cavity; The thermistor is used to convert the temperature change of the optical reference cavity into a corresponding resistance value change; The first detector is used to convert the reflected light signal into a reflected light voltage analog signal; the reflected light signal includes a modulated light signal reflected by the optical reference cavity; The second detector is used to convert the transmitted light signal into a transmitted light voltage analog signal; the transmitted light signal includes an optical power signal transmitted through the optical reference cavity; The temperature analog-to-digital conversion unit is used to convert the resistance value change into a temperature voltage digital signal; The frequency-locked analog-to-digital conversion unit is configured to convert the AC voltage analog signal in the reflected light voltage analog signal into a reflected light AC voltage digital signal; The signal monitoring analog-to-digital converter is used to convert the transmitted light voltage analog signal into a transmitted light voltage digital signal; The FPGA is configured to generate a temperature voltage digital feedback signal based on the temperature voltage digital signal and the first digital PID; and generate a frequency locking voltage digital feedback signal based on the reflected light AC voltage digital signal, the transmitted light voltage digital signal, and the second digital PID; The temperature control unit is used to convert the temperature voltage digital feedback signal into a temperature current analog feedback signal; the temperature current analog feedback signal is used to control the refrigerator; The frequency control unit is used to convert the frequency-locking voltage digital feedback signal into a frequency-locking control feedback frequency signal; the frequency-locking control feedback frequency signal is used to control the first acousto-optic modulator and the piezoelectric ceramic; The first frequency synthesizer is used to generate a modulation signal to control the electro-optical modulator.

2. The system according to claim 1, wherein: The frequency locking circuit module further includes a stable light intensity analog-to-digital conversion unit and a stable light intensity locking control unit; the stable light intensity analog-to-digital conversion unit and the stable light intensity locking control unit are both communicatively connected to the FPGA; the FPGA further includes a third digital PID; The stabilized light intensity analog-to-digital conversion unit is used to convert the DC voltage analog signal in the reflected light voltage analog signal into a reflected light DC voltage digital signal; The FPGA is further configured to generate a steady light intensity voltage digital feedback signal based on the reflected light DC voltage digital signal and the third digital PID; The stable light intensity locking control unit is used to convert the stable light intensity voltage digital feedback signal into power adjustment of the target loop feedback radio frequency signal; the power adjustment of the target loop feedback radio frequency signal is used to control the driving power of the first acousto-optic modulator.

3. The system according to claim 2, characterized in that The frequency-locked laser module further includes a third detector; the frequency-locked circuit module further includes a RAM locking unit; the RAM locking unit includes a mixer, a sixth analog-to-digital converter and a second frequency synthesizer; The sixth analog-to-digital converter and the second frequency synthesizer are both communicatively connected to the FPGA; the FPGA further includes a fourth digital PID; The third detector is used to detect the modulated optical signal modulated by the electro-optical modulator and convert the modulated optical signal into a modulated optical voltage analog signal; The second frequency synthesizer is used to output a radio frequency reference frequency signal; The mixer is configured to generate a mixed analog signal based on the modulated photovoltage analog signal and the radio frequency reference frequency signal; The sixth analog-to-digital converter is configured to convert the mixed analog signal into a mixed digital signal; The FPGA is further configured to generate a mixing feedback digital signal based on the mixing digital signal and the fourth digital PID; The first frequency synthesizer is further configured to output a feedback voltage signal based on the mixed digital signal, wherein the feedback voltage signal is configured to compensate for fluctuations in the driving DC voltage of the electro-optical modulator.

4. The system according to claim 1, wherein: The temperature analog-to-digital conversion unit includes a bridge amplifier circuit and a first analog-to-digital converter; The bridge amplifier circuit is used to convert the resistance value change into a temperature voltage analog value; The first analog-to-digital converter is used to convert the temperature voltage analog value into the temperature voltage digital signal.

5. The system according to claim 1, wherein: The frequency-locked analog-to-digital conversion unit includes a DC bias device, a first low-pass filter and a fifth analog-to-digital converter; The DC bias device is used to obtain the AC voltage analog signal from the reflected light voltage analog signal; The first low-pass filter is used to perform a filtering operation on the AC voltage analog signal to obtain a target AC voltage analog signal; The fifth analog-to-digital converter is used to convert the target AC voltage analog signal into the reflected light AC voltage digital signal.

6. The system according to claim 1, wherein: The temperature control unit includes a first digital-to-analog converter and a linear current source; The first digital-to-analog converter is configured to convert the temperature voltage digital feedback signal into the temperature voltage analog feedback signal; The linear current source is used to convert the temperature voltage analog feedback signal into the temperature current analog feedback signal.

7. The system according to claim 1, wherein: The frequency control unit includes an acousto-optic modulator control subunit and a piezoelectric ceramic control subunit; the frequency-locked control feedback frequency signal includes a first radio frequency feedback signal and a piezoelectric ceramic voltage feedback signal; The acousto-optic modulator control subunit includes a fourth digital-to-analog converter, a second voltage-controlled oscillator, and a first power amplifier; the piezoelectric ceramic control subunit includes a fifth digital-to-analog converter and a high-voltage amplifier; The fourth digital-to-analog converter is configured to convert the frequency-locking voltage digital feedback signal into a first frequency-locking voltage analog feedback signal; The second voltage-controlled oscillator is configured to convert the first frequency-locked voltage analog feedback signal into a first initial radio frequency signal; The first power amplifier is used to amplify the first initial RF signal into the first RF feedback signal; the first RF feedback signal is used to control the first acousto-optic modulator; The fifth digital-to-analog converter is configured to convert the frequency-locking voltage digital feedback signal into a second frequency-locking voltage analog feedback signal; The high-voltage amplifier is used to convert the second frequency-locked voltage analog feedback signal into the piezoelectric ceramic voltage feedback signal; the piezoelectric ceramic voltage feedback signal is used to control the piezoelectric ceramic.

8. The system according to claim 2, wherein: The stabilized light intensity analog-to-digital conversion unit includes a DC bias device, an amplifier circuit and a fourth analog-to-digital converter; The DC bias device is used to obtain a DC voltage analog signal from the reflected light voltage analog signal; The amplifier circuit is used to amplify the AC voltage analog signal to obtain an amplified DC voltage analog signal; The fourth analog-to-digital converter is used to convert the amplified DC voltage analog signal into the reflected light DC voltage digital signal.

9. The system according to claim 2, wherein: The stable light intensity locking control unit includes a digital-to-analog converter 3, an electrically adjustable attenuator and a first power amplifier; The third digital-to-analog converter is used to convert the stable light intensity voltage digital feedback signal into a stable light intensity voltage analog feedback signal; The electrically adjustable attenuator is used to convert the stable light intensity voltage analog feedback signal into a target loop gain feedback signal; The first power amplifier is used to convert the target loop gain feedback signal into power adjustment of the target loop feedback radio frequency signal.

10. The system according to any one of claims 1 to 9, characterized in that The frequency-locked laser module includes a first optical path; along the direction of seed light transmission, the seed laser, the first acousto-optic modulator, the electro-optic modulator and the optical reference cavity are sequentially placed in the first optical path; The optical reference cavity is configured with the refrigerator and the thermistor; The seed laser is configured with the piezoelectric ceramic; The seed laser, the acousto-optic modulator and the electro-optic modulator are connected via optical fibers.

11. The system according to claim 10, wherein: The frequency-locked laser module also includes a fourth detector and a second optical path; the second optical path includes a first beam splitter, a second beam splitter, a second acousto-optic modulator and a reflector; the first beam splitter is located on an optical fiber connecting the first acousto-optic modulator and the electro-optic modulator, and the first beam splitter and the second beam splitter are connected through an optical fiber; the second beam splitter is also connected to the reflector and the second acousto-optic modulator respectively through optical fibers; the second beam splitter transmits a first beat frequency optical signal to the photosensitive surface of the fourth detector through the optical fiber; the first beat frequency optical signal is a beat frequency optical signal generated based on the seed light and the reflector.

12. The system according to claim 11, wherein: The frequency locking circuit module further includes an optical fiber noise suppression analog-to-digital conversion unit, and a frequency shift and optical fiber noise locking control unit; the optical fiber noise suppression analog-to-digital conversion unit and the frequency shift and optical fiber noise locking control unit are both communicatively connected to the FPGA; the FPGA further includes a fifth digital PID; The fourth detector is used to convert the first beat frequency optical signal into an optical fiber noise voltage analog signal; The optical fiber noise suppression analog-to-digital conversion unit is used to convert the optical fiber noise voltage analog signal into an optical fiber noise voltage digital signal; The FPGA is further configured to generate a fiber noise voltage digital feedback signal based on the fiber noise voltage digital signal and the fifth digital PID; The frequency shift and fiber noise locking control unit is configured to generate a second radio frequency feedback signal based on the fiber noise voltage digital feedback signal; The second radio frequency feedback signal is used to control the second acousto-optic modulator.

13. The system according to claim 12, wherein: The frequency shift and fiber noise locking control unit includes a second digital-to-analog converter, a first voltage-controlled oscillator and a second power amplifier; The second digital-to-analog converter is configured to convert the optical fiber noise voltage digital feedback signal into an optical fiber noise voltage analog feedback signal; The first voltage-controlled oscillator is used to convert the optical fiber noise voltage analog feedback signal into a second initial radio frequency signal; The second power amplifier is configured to amplify the second initial RF signal into a second RF feedback signal.

14. The system according to claim 13, wherein: The second optical path further includes an optical frequency comb and a fifth detector; a second beat signal generated based on the reference optical signal output by the optical frequency comb and the modulated optical signal output by the second acousto-optic modulator is transmitted to the photosensitive surface of the fifth detector via an optical fiber; The frequency locking circuit module further includes a frequency shift analog-to-digital conversion unit; the frequency shift analog-to-digital conversion unit is communicatively connected to the FPGA; the FPGA further includes a sixth digital PID; The fifth detector is configured to convert the second beat frequency optical signal into a frequency-shifted voltage analog signal; The frequency-shift analog-to-digital conversion unit is configured to convert the frequency-shift voltage analog signal into a frequency-shift voltage digital signal; The FPGA is further configured to generate a frequency-shifted voltage digital feedback signal based on the frequency-shifted voltage digital signal and the sixth digital PID; The second digital-to-analog converter is further configured to convert the frequency-shifted voltage digital feedback signal into a frequency-shifted voltage analog feedback signal; The first voltage-controlled oscillator is further configured to convert the frequency-shifted voltage analog feedback signal into a third initial radio frequency signal; The second power amplifier is further configured to amplify the third initial RF signal into a third RF feedback signal; and the third RF feedback signal is used to regulate the second acousto-optic modulator.

15. A laser digital automatic locking method, characterized in that: The method comprises: After setting the initial parameters of the ultra-stable laser digital automatic locking system, an initial parameter set is acquired; the initial parameter set includes the initial power and initial temperature of the seed laser, the initial frequency and initial phase of the electro-optical modulator, the initial temperature of the optical reference cavity, the initial bias voltage of the piezoelectric ceramic, and the initial bias voltage of the second voltage-controlled oscillator; Determining whether the ultra-stable laser digital automatic locking system is in a normal working state based on the collected parameters in the initial parameter set; If it is determined that the ultra-stable laser automatic locking system is in a normal working state, the operating temperature of the refrigerator in the ultra-stable laser digital automatic locking system is controlled by the thermistor, the temperature analog-to-digital conversion unit, the FPGA, the temperature control unit and the refrigerator in the laser digital automatic system; After determining that the difference between the temperature of the refrigerator and a preset reference temperature is less than a first value, the operating frequency of the frequency-locked laser module in the ultra-stable laser digital automatic locking system is controlled by the first detector, the second detector, the frequency-locked analog-to-digital conversion unit, the signal monitoring analog-to-digital converter, the FPGA, the frequency control unit, the piezoelectric ceramic and the first acousto-optic modulator in the laser digital automatic control system.

16. The method according to claim 15, characterized in that The method further comprises: After determining that the difference between the operating frequency of the frequency-locked laser module and the preset reference frequency is less than a second value, the laser power of the frequency-locked laser module is controlled by the first detector, the stabilized light intensity analog-to-digital conversion unit, the FPGA, the stabilized light intensity locking control unit, and the first acousto-optic modulator in the laser digital automatic control system; After determining that the difference between the laser power of the frequency-locked laser module and the preset reference laser power is less than a third value, controlling the residual amplitude modulation of the frequency-locked laser module by means of a third detector, a RAM locking unit, and an electro-optical modulator in the laser digital automatic control system; After determining that the difference between the voltage fluctuation caused by the actual residual amplitude modulation and the preset reference amplitude is less than a fourth value, determining the operating mode of the ultra-stable laser digital automatic locking system; If it is determined that the operating mode of the ultra-stable laser digital automatic locking system is the first operating mode, the fiber noise in the frequency-locked laser module is controlled by the fourth detector, the fiber noise suppression analog-to-digital conversion unit, the FPGA, the frequency shift and fiber noise locking control unit, and the second acousto-optic modulator in the ultra-stable laser digital automatic locking system; If it is determined that the operating mode of the ultra-stable laser digital automatic locking system is the second operating mode, the operating frequency of the frequency-locked laser module is controlled by the optical frequency comb, the fifth detector, the frequency-shifting analog-to-digital conversion unit, the FPGA, the frequency-shifting and fiber noise locking control unit and the second acousto-optic modulator in the ultra-stable laser digital automatic locking system.

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