A dynamic integration method and system for interpretation modules supporting SCPC, TDMA and VSAT simultaneously

Abstract

This invention relates to the field of non-cooperative satellite communications technology and discloses a method and system for dynamically integrating interpretation modules that simultaneously support SCPC, TDMA, and VSAT. The system comprises a model definition module, a dynamic loading engine, an online switching controller, and a monitoring interface. The model definition module generates XML configuration and zip files, the dynamic loading engine parses and loads bit files into the FPGA, the online switching controller performs task management and state recovery, and the monitoring interface enables bidirectional communication. The supporting method establishes a three-level architecture for development, integration, and integration engineering. This system and method enable the simultaneous and uniform definition and description of interpretation modules for communication systems such as SCPC, TDMA, and VSAT, supporting flexible combination and online switching. The system and method support dynamic parameter configuration, cross-platform migration, and version management, enabling flexible integration and switching of interpretation modules for multiple communication systems.

Description

Technical Field

[0001] The present invention relates to the technical field of non-cooperative satellite communications, in particular to a method and system for dynamically integrating decoding modules supporting SCPC, TDMA and VSAT simultaneously. Background Art

[0002] Traditional SCPC demodulators, TDMA demodulators, and VSAT network processing equipment are all designed and developed for a single application scenario, and are unable to dynamically integrate decoding modules for three communication systems within a single device. In the field of non-cooperative satellite communications, with the advancement and application of satellite networking communication technology, many high-value satellite communication reconnaissance targets have expanded from single individuals to groups of targets. Because target groups often utilize satellite signals from multiple communication systems, they must be able to covertly receive and intelligently process all active satellite signals. This requires a single intelligent satellite signal detection and control device capable of simultaneously processing multiple signals from different communication systems, while also enabling flexible combination, dynamic configuration, and online switching of signal specifications. Traditional SCPC demodulators, TDMA demodulators, and VSAT network processing equipment cannot meet these requirements. Summary of the Invention

[0003] The object of the present invention is to overcome the deficiencies of the prior art and provide a method for dynamically integrating decoding modules that simultaneously support SCPC, TDMA and VSAT, comprising the following steps:

[0004] Construct a three-level interpretation mode organizational structure, including: Development mode: define the interpretation capability of the interpretation module of a single signal specification, the interpretation capability includes specification information, bit file, enabled functional components, interpretation parameters and interpretation status;

[0005] Integration mode: Customize and combine multiple development modes based on user needs to form a signal processing solution across communication systems;

[0006] Integration Engineering: Integrates multiple integration modes, supports default loading and online switching;

[0007] Define the configuration and hierarchical relationship of development mode, integration mode and integration project through XML files, and package the overall configuration in the form of zip compression package;

[0008] Dynamic loading of interpretation mode: parses the development mode information corresponding to the selected interpretation mode and loads the bit file into the FPGA; enables the monitoring interface and establishes a two-way connection between the computer monitoring software and the FPGA; loads interpretation parameters and status, and automatically configures parameters according to default values ​​or historical values;

[0009] Switching interpretation modes online: Stop the current FPGA task and disconnect; unload the current bit file and load the bit file for the new interpretation mode; enable the monitoring interface and establish a connection; run the FPGA task and restore the parameters and task status.

[0010] Furthermore, it is characterized in that the specification information of the development model includes:

[0011] ID, name, and description; key performance parameters: modulation mode, coding type, number of parallel channels, maximum symbol rate; version information and bit file path.

[0012] Furthermore, the interpretation parameters include: carrier frequency, symbol rate, modulation mode, coding type, and code rate; the interpretation status includes signal indication, demodulation lock, bit error rate, and signal-to-noise ratio; and the parameter value range, default value, and display order are dynamically configured through an XML file.

[0013] Furthermore, the integration model is generated by the following steps:

[0014] Select multiple development modes and customize functional components, parameters, and status; generate a configuration package containing a customized development mode directory and integration definition files; define the default loaded development mode and switchable flags.

[0015] Furthermore, the integrated project is generated by the following steps:

[0016] Select multiple integration modes and eliminate duplicate development modes; generate integration project definition files and integration mode index files; integrate all configurations into a zip archive, supporting cross-platform migration and version management.

[0017] Furthermore, the dynamic loading includes:

[0018] Parse and load the corresponding bit file according to the interpretation mode ID selected by the user; automatically enable functional components and bind monitoring interfaces according to XML configuration; initialize parameters to default values ​​when loading for the first time, and restore the most recent parameter values ​​when loading in historical mode.

[0019] Furthermore, the online switching includes:

[0020] Check and stop the current FPGA task; unload the current functional component and bit file; load a new bit file and restore the historical task status.

[0021] A dynamic integration system for interpretation modules that simultaneously supports SCPC, TDMA, and VSAT, characterized by applying the dynamic integration method for interpretation modules that simultaneously supports SCPC, TDMA, and VSAT, comprising a model definition module, a dynamic loading engine, an online switching controller, and a monitoring interface;

[0022] The model definition module is used to generate XML configuration and zip packaging of development mode, integration mode and integration project;

[0023] The dynamic loading engine is used to parse the zip package and load the bit file into the FPGA to configure the functional components and parameters;

[0024] The online switching controller is used to execute FPGA task stop / start, bit file unloading / loading and working status recovery;

[0025] The monitoring interface is used for bidirectional communication with the FPGA functional components to transmit control instructions and status data.

[0026] The present invention has the beneficial effect of unifying the definitions of interpretation modules for different communication systems, such as SCPC, TDMA, and VSAT, through interpretation modes. This not only enables unified dynamic loading, avoiding hard coding and improving flexibility, but also transcends the boundaries of communication systems, allowing for the arbitrary combination and integration of interpretation modules on demand, thus meeting the growing number of signal processing application scenarios where multiple communication systems coexist. The proposed and constructed interpretation module definition model defines and describes these modules along five dimensions: specification information, bit files (i.e., interpretation module program files), enabled functional components, interpretation parameters, and interpretation status, facilitating the continued expansion of signal specification processing capabilities.

[0027] The three-level interpretation model organization of development mode, integration mode and integration engineering allows the model configuration to maintain sufficient adaptability and evolution while building unity and consistency, maintaining flexibility and scalability. It can not only adapt to single application scenarios such as traditional SCPC group demodulation, multi-channel TDMA demodulation, and VSAT networking processing, but also adapt to increasingly urgent and extensive new application scenarios, such as SCPC+TDMA multi-channel demodulation, multiple VSAT networking processing, and multi-channel SCPC interpretation + VSAT networking processing.

[0028] The model is presented and integrated in XML file and zip compression package formats. Horizontal sections are defined according to the AOP (aspect-oriented) concept. Each type of information is defined and described using an XML file. The interpretation model is displayed and stored hierarchically according to the directory structure, making the model definition logic and hierarchy clearer, more in line with the user's thinking mode, and easier for manual viewing and understanding. Zip compression packages are used to integrate and package XML files, bit files, and multi-level directory structures, and the multi-level configurations of multiple interpretation modules are materialized into one configuration item for easy use, migration, and version management.

[0029] The implementation method of dynamic loading and integration based on the interpretation mode realizes on-demand dynamic loading and online switching of interpretation modules in a universal, portable and generalizable manner. It not only allows sustainable expansion and rapid adaptation to the flexible response and rapid switching of multi-system signal processing task scenarios, but also eliminates the need for traditional software hard coding, thereby improving the robustness and responsiveness of the software. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 The present invention is a flowchart of a method for dynamically integrating interpretation modules that simultaneously supports SCPC, TDMA and VSAT;

[0031] Figure 2 This is a schematic diagram of the corresponding relationship between development mode, integration mode and integration engineering;

[0032] Figure 3 Define component blocks for signal specifications;

[0033] Figure 4 Dynamically load flow charts for interpretation mode;

[0034] Figure 5 Flowchart for online switching of interpretation mode. DETAILED DESCRIPTION

[0035] The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings, but the protection scope of the present invention is not limited to the following.

[0036] The features and performance of the present invention are further described in detail below with reference to the embodiments.

[0037] A dynamic integration system for interpretation modules that supports SCPC, TDMA and VSAT simultaneously, including a model definition module, a dynamic loading engine, an online switching controller and a monitoring interface;

[0038] The model definition module is used to generate XML configuration and zip packaging of development mode, integration mode and integration project;

[0039] The dynamic loading engine is used to parse the zip package and load the bit file into the FPGA to configure the functional components and parameters;

[0040] The online switching controller is used to execute FPGA task stop, bit file unloading / loading and state recovery;

[0041] The monitoring interface is used for bidirectional communication with the FPGA functional components to transmit control instructions and status data.

[0042] In the model definition module:

[0043] like Figure 1As shown, a method for dynamically integrating interpretation modules that simultaneously support SCPC, TDMA, and VSAT uses a dynamic integration system for interpretation modules that simultaneously support SCPC, TDMA, and VSAT, including the following steps:

[0044] Construct a three-level interpretation mode organizational structure, including: Development mode: define the interpretation capability of the interpretation module of a single signal specification, the interpretation capability includes specification information, bit file, enabled functional components, interpretation parameters and interpretation status;

[0045] Integration mode: Customize and combine multiple development modes based on user needs to form a signal processing solution across communication systems;

[0046] Integration Engineering: Integrates multiple integration modes, supports default loading and online switching;

[0047] Define the configuration and hierarchical relationship of development mode, integration mode and integration project through XML files, and package the overall configuration in the form of zip compression package;

[0048] Dynamically load the interpretation mode to the FPGA: parse the development mode information corresponding to the selected interpretation mode and load the bit file to the FPGA; enable the monitoring interface and establish a two-way connection between the computer monitoring software and the FPGA; load the interpretation parameters and status, and automatically configure the parameters according to the default values ​​or historical values;

[0049] Switching interpretation modes online: Stop the current FPGA task and disconnect; unload the current bit file and load the bit file of the new interpretation mode; enable the monitoring interface and establish a connection, and restore parameters and task status.

[0050] The specification information of the development model includes:

[0051] ID, name, and description; key performance parameters: modulation mode, coding type, number of parallel channels, maximum symbol rate; version information and bit file path.

[0052] The decoding parameters include: carrier frequency, symbol rate, information rate, modulation mode, spectrum type, low quality, high frequency shift, time slot length, coding type, code rate, channel scrambling code, cascade code, cascade scrambling code, interleaving depth, differential, frame type, frame scrambling code, inversion, header removal, number of packets, code length, information length, etc.; the decoding status includes signal indication, demodulation lock indication, decoding lock indication, decoding frame synchronization indication, decoding check indication, frame processing synchronization indication, CRC check, carrier frequency deviation, rate deviation, bit error rate, signal-to-noise ratio, signal level, etc.; the decoding parameters to be displayed and set, their value ranges, default values ​​and display order, and the decoding status to be displayed and their display order are dynamically configured through XML files.

[0053] The integration model is generated by the following steps:

[0054] Select multiple development modes and customize functional components, parameters, and status; generate a configuration package containing a customized development mode directory and integration definition files; define the default loaded development mode and switchable flags.

[0055] The integration project is generated by the following steps:

[0056] Select multiple integration modes and eliminate duplicate development modes; generate integration project definition files and integration mode index files; integrate all configurations into a zip archive, supporting cross-platform migration and version management.

[0057] The dynamic loading includes:

[0058] Parse and load the corresponding bit file according to the interpretation mode ID selected by the user; automatically enable functional components and bind monitoring interfaces according to XML configuration; initialize parameters to default values ​​when loading for the first time, and restore the most recent parameter values ​​when loading in historical mode.

[0059] The online switching includes:

[0060] Check and stop the current FPGA task; unload the current functional component and bit file; after loading the new bit file, run the functional component in the FPGA and restore the historical task status.

[0061] Specifically, the present invention constructs a unified interpretation module definition model, namely the interpretation mode, which uniformly defines and describes interpretation modules for different signal specifications of communication systems such as SCPC, TDMA, and VSAT in a software-defined function (SDF) manner, and supports dynamic loading and online switching based on configuration.

[0062] 1. Interpretation mode

[0063] The interpretation mode includes three levels: development mode, integration mode, and integration engineering.

[0064] Development modes define the performance baseline of the interpretation module. During interpretation module development, different versions are developed based on application scenarios, such as the number of signal processing resources, signal processing complexity, and supported performance parameters of the FPGA model. Development modes provide a detailed description of the performance baseline for each type of interpretation module, defining and describing the maximum signal processing capabilities of the interpretation module from a technical perspective. Each interpretation module is assigned a corresponding development mode.

[0065] The integration model selects and customizes development models based on signal processing requirements, then combines, prioritizes, and integrates them as needed to form a specific signal processing solution. Compared to the development model, the integration model addresses project and task requirements, bypassing the constraints of existing technology frameworks. From the perspectives of application and integration, it allows for customization and combination based on application and integration, creating a variety of flexible and scalable signal processing solutions. An integration model can include one or more interpretation modules for SCPC communication systems, as well as one or more interpretation modules for TDMA and VSAT communication systems. When defining an integration model, the development model must be tailored to user needs, enabling and configuring required functions, parameters, and states while disabling and masking those that are not. This maximizes signal processing efficiency while reducing signal processing complexity and improving usability and maintainability. When demodulation or decoding lock fails, fewer parameters and states to check make it easier to quickly locate and resolve the problem. An integration model consists of multiple development models customized to user needs.

[0066] An integration project is a solution set that defines and supports dynamic switching of multiple integration modes based on the integration mode. An integration project includes multiple integration modes, defines a default integration mode to support automatic loading, and allows online switching between multiple integration modes. An integration project can include different SCPC integration modes, TDMA integration modes, as well as multiple different VSAT integration modes such as Evolution, SkyEdgeII, UHP, HN / HX, etc. According to the current mission requirements, different integration modes can be flexibly switched online on demand to output different signal processing capabilities in an instant and stable manner. An integration project consists of one or more integration modes and supports online switching to different integration modes.

[0067] The correspondence between development mode, integration mode and integration engineering, such as Figure 2 As shown:

[0068] VTB_16Chan, DVB-S2 / S2X_8Chan, and UHP_8Chan represent development models for multiple decoding modules for different communication systems, such as SCPC, DVB, and TDMA. VTB indicates the signal encoding type, TPC_H indicates the high-speed TPC processing version, and 16Chan indicates the number of channels supported for simultaneous processing.

[0069] Multi-channel Decoding, UHP Network Processing, and Evolution Network Processing represent three integrated modes. Multi-channel Decoding integrates multiple development modes for various communication systems, including VTB_16Chan, SEQ_16Chan, TCM_12Chan, TPC_H_8Chan, LDPC_6Chan, Turbo_16Chan, DVB-S2_8Chan, and HN / HX_8Chan, for SCPC, DVB, and TDMA. UHP Network Processing integrates development modes for UHP VSAT master station signals, including DVB-S2 / S2X_8Chan and UHP_8Chan. Evolution Network Processing integrates development modes for Evolution VSAT master station signals, including DVB-S2 / S2X_8Chan and Evolution_8Chan.

[0070] Multi-channel Demodulation and UHP Network Processing and U and E VSAT Network Processing represent two integrated projects. Multi-channel Demodulation and UHP Network Processing combines and integrates the multi-channel interpretation and UHP network processing modes, while U and E VSAT Network Processing combines and integrates the UHP network processing and Evolution network processing modes.

[0071] 2. Standardized definition of interpretation capability

[0072] In the development mode, the interpretation and processing capabilities of each signal specification are defined and described in detail through five dimensions: specification information, bit file (i.e., interpretation module program file), enabled functional components, interpretation parameters, and interpretation status.

[0073] like Figure 3 The signal specification defines the block diagram

[0074] 1) Specifications

[0075] Specification information includes three parts: basic specification information, key performance parameters, and specification version information.

[0076] (1) Basic information of the specification, which defines the unique ID, name, and description of the signal specification. The description generally uses natural language to describe the main characteristics, application scenarios, limitations, and usage constraints of the specification.

[0077] (2) Key performance parameters, which are used to provide a basis for module selection for the dynamic selection and loading of the decoding module. They quantitatively define the modulation mode supported by the signal specification, the coding type, the number of channels supporting parallel decoding processing, the maximum symbol rate of a single channel, the total symbol rate supported by all channels, and other performance parameters. They support the definition of algorithm modules with different performance parameter versions (such as 4-channel ultra-high-speed version, 8-channel high-speed version, 12-channel medium-speed version, 16-channel low-speed version, etc.) according to the complexity of the signal and the processing requirements, and support the selection of appropriate versions of algorithm modules according to the modulation mode, coding type, and symbol rate of the signal.

[0078] (3) Specification version information, which describes the version number, release date, update date, and version history of the signal specification.

[0079] 2) Bit file

[0080] A bit file is a program file implemented in Verilog and loaded onto an FPGA for execution. Different versions of bit files are typically developed for different FPGA models. In addition to decoding, bit files can also implement other signal processing functions such as ADC acquisition, FFT, DDC, and more as needed.

[0081] 3) Enabled functional components

[0082] Enabled functional components are used to define and select the signal processing functions implemented in the bit file. In addition to the interpretation functional components, they generally also include AD acquisition, FFT, DDC and other functional components.

[0083] 4) Supported interpretation parameters

[0084] Supported decoding parameters are used to define and configure the demodulation and decoding parameters supported by this signal specification, including the parameters used, value range, default value, and display / setting order. Demodulation parameters include carrier frequency, symbol rate, information rate, modulation mode, spectrum type (normal / inverse spectrum), low quality, high frequency shift, and time slot length. Decoding parameters include coding type, code rate, channel scrambling code, concatenated code, concatenated scrambling code, interleaving depth, differential, frame type, frame scrambling code, inversion, header removal, number of packets, code length, and information length. The decoding parameters vary for each signal specification. Dynamic configuration of decoding parameters enables unified description and dynamic loading of signal processing functions for multiple communication systems, such as SCPC, TDMA, and VSAT, laying a critical foundation for the implementation of SDF.

[0085] 5) Displayed interpretation status

[0086] The displayed interpretation status is used to define and configure the interpretation status supported by this signal specification, including the displayed status name, numerical unit, and display order. Interpretation status includes: signal indication, demodulation lock indication, demodulation frame synchronization indication, decoding lock indication, decoding frame synchronization indication, decoding check indication, frame processing synchronization indication, CRC check, carrier frequency deviation, rate deviation, bit error rate, signal-to-noise ratio, and signal level. Similar to interpretation parameters, the interpretation status of each signal specification is not exactly the same. By dynamically configuring the interpretation status, the signal processing status of multiple communication systems, such as SCPC, TDMA, and VSAT, can be uniformly described and dynamically displayed.

[0087] 3. Model materialization in the form of XML files and zip archives

[0088] The development mode, integration mode, configuration of the integration project, as well as their composition and integration relationship are described in XML files, and the overall configuration consisting of multi-level directories is organized and packaged in the form of zip compression packages.

[0089] 1) Development model as shown in Table 1:

[0090] Table 1 Development model definition file composition table

[0091]

[0092] The directory structure is: Communication System / Signal Specification / Interpretation Module. The directory structure in the example above is: SCPC / VTB / VTB_16Chan. The file names and meanings in the directory are as follows:

[0093] The DemParamConfig.xml file defines the interpretation parameters supported by the signal specification, including the interpretation parameter ID, display name, display component type, value range, default value, display order, etc.

[0094] The DemPatternAssembly.xml file defines the functional components supported by the signal specification, such as FFT, DDC, demodulation and decoding;

[0095] The DemPatternDef.xml file defines basic specification information, key performance parameters, and specification version information:

[0096] The DemStatusConfig.xml file defines the interpretation status supported by the signal specification, including the interpretation status ID, display name, display order, etc.

[0097] F1.bit file is a bit file that implements the demodulation and decoding program logic;

[0098] The ParamRule.xml file defines specific rules for decoding parameter values. For example, when the modulation mode is BPSK, only 1 / 2 and 2 / 3 bit rates are supported. When the modulation mode is QPSK or 8PSK, all bit rates, including 1 / 2, 2 / 3, 3 / 4, 4 / 5, and 5 / 6, are supported.

[0099] The created and saved development mode will be reused multiple times in subsequent integration modes and integration projects, avoiding redefinition and configuration each time.

[0100] 2) Integration Mode

[0101] The integration mode definition file is composed as shown in Table 2:

[0102] Table 2 Composition of integration mode definition files

[0103]

[0104] The integration mode directory is named after the integration mode ID and contains the customized development mode saved in the directory structure and the following files:

[0105] The ContainedUserPatternIndex.xml file contains the development pattern information included in the integration pattern, which describes the composition of the integration pattern (customized and modified development pattern) and its path;

[0106] Directories such as SCPC, TDMA, DVB, and VSAT store the bit files and XML files related to the development modes included in the integration mode. These files are not detailed here. When creating an integration mode, select the development mode to integrate. This allows you to quickly import and integrate the selected development mode configuration into the current integration mode. You can then make minor customizations as needed, eliminating the need to redefine the development mode configuration from scratch each time.

[0107] The F0.bit file is a bit file that implements the signal distribution and demodulation and decoding program logic.

[0108] The IntPatternInfo.xml file describes the definition of the integration pattern, including the integration pattern ID, display name, pattern description information, the set of development pattern IDs included, version information, and the default loaded development pattern.

[0109] The created and saved integration mode will be reused in multiple subsequent integration projects, avoiding redefinition and configuration each time.

[0110] 3) Integration Engineering

[0111] The integration project definition file is composed of the following components:

[0112] Table 3 Composition of integrated project definition files

[0113]

[0114] Includes a GUID-named directory, a DevPatterns directory, a ContainedIntPatternIndex.xml file, and an IntProjectInfo.xml file;

[0115] The directory named in GUID format stores the integration mode included in the integration project;

[0116] The DevPatterns directory stores the development patterns included in all integration patterns in the integration project. If multiple integration patterns contain the same development pattern, only one copy of the development pattern is stored in the DevPatterns directory, eliminating redundant storage. When creating an integration project, select the integration pattern to package to quickly import and integrate the selected integration pattern configuration into the current integration project.

[0117] The ContainedIntPatternIndex.xml file stores the integration patterns included in the integration project:

[0118] The IntProjectInfo.xml file stores the definition information of the integration project, including the integration project ID, display name, description information, the set of integrated modes, and version information.

[0119] 4) Output of overall configuration data in zip format

[0120] Overall configuration data output in zip format:

[0121] A defined and configured integration project consists of an integration project information XML file, an integrated pattern index XML file, a development pattern directory (DevPatterns), and multiple directories named by integration pattern IDs. After being compressed and packaged in zip format, it can be imported, exported, loaded, and updated. It supports use across different platforms, such as Windows, Linux, and domestic operating systems, facilitating migration. Furthermore, as a managed product, it undergoes version control and configuration management, facilitating software process management.

[0122] 4. Dynamic loading and online switching of interpretation modes

[0123] Each FPGA supports dynamic loading and online switching of interpretation modes, running bitfile program logic for a specific development mode. Different FPGAs can load and run different development modes within the interpretation mode, thereby delivering interpretation processing capabilities with varying signal specifications. Multiple signal processing channels within a single FPGA are independent and can execute interpretation tasks in parallel without interfering with each other. Multiple FPGAs are also independent and independent of each other: switching interpretation modes on one FPGA does not affect signal processing on other FPGAs. When switching to a new interpretation mode for the first time, interpretation parameters (such as modulation, forward and reverse spectrum, encoding type, and bit rate) are automatically set to the default values ​​configured for the interpretation mode. When switching back to a previously used interpretation mode, the previous interpretation parameters are automatically loaded. Switching interpretation modes can be accomplished with a single click via an interface, significantly improving the flexibility and convenience of interpreting and processing target group signals across various communication systems.

[0124] Dynamic loading of interpretation mode, such as Figure 4 As shown, the main process of dynamic loading in interpretation mode is as follows:

[0125] a) The user selects the interpretation mode to be loaded into the FPGA and runs on the software interface. The software obtains the mode ID based on the mode name and then obtains the definition of the interpretation mode;

[0126] b) Parse the interpretation mode definition, find and parse the corresponding development mode information, and load the bit file in the development mode;

[0127] c) Load the enabled functional components in development mode;

[0128] d) Establish a two-way connection between the computer monitoring software and the functional components in the bit file, support the control instructions to be issued to the FPGA for execution, and the FPGA to output FFT data, DDC data, demodulated data, decoded data, demodulation constellation diagram, interpretation status and other data and status indicators;

[0129] e) Loading interpretation parameters and interpretation status to support setting and display on computer monitoring software;

[0130] f) Automatically set the interpretation parameters according to the configured default interpretation parameters;

[0131] g) Complete the dynamic loading process.

[0132] Online switching of interpretation mode, such as Figure 5 As shown in the figure, the main process of online switching of interpretation mode is as follows:

[0133] a) Check whether there is a current interpretation task being executed;

[0134] b) If it exists, stop the demodulation, decoding and data acquisition processing tasks of the current interpretation mode first; otherwise, skip this step;

[0135] c) Disconnect the bidirectional connection between the computer monitoring software and the functional components in the current interpretation mode bit file, in preparation for stopping and releasing the functional components running in the FPGA;

[0136] d) Stop and release the FFT, DDC, demodulation and decoding components running in the FPGA to prepare for unloading the bit file from the FPGA;

[0137] e) Unload the bit file of the current decoding mode from the FPGA;

[0138] f) Load the bit file of the new interpretation mode into the FPGA;

[0139] g) loading the enabled functional components in the new interpretation mode;

[0140] h) Establish a two-way connection between the computer monitoring software and the functional components in the new interpretation mode bit file;

[0141] i) Loading new interpretation mode interpretation parameters and interpretation status;

[0142] j) If historical parameters exist, the most recent interpretation parameters will be automatically restored; otherwise, the interpretation parameters will be automatically set according to the configured default interpretation parameters;

[0143] k) If there is a historical task (the task being executed before exiting, which needs to be automatically resumed when power is turned on), the previous demodulation and decoding or data acquisition task will be automatically resumed;

[0144] l) Complete the dynamic loading process.

[0145] The flexibility and scalability of signal processing are greatly improved through dynamic loading and online switching of interpretation modes.

Claims

1. A method for dynamically integrating decoding modules that supports SCPC, TDMA, and VSAT simultaneously, characterized in that: The steps include: Construct a three-level interpretation mode organizational structure, including: Development mode: define the interpretation capability of the interpretation module of a single signal specification, the interpretation capability includes specification information, bit file, enabled functional components, interpretation parameters and interpretation status; Integration mode: Customize and combine multiple development modes based on user needs to form a signal processing solution across communication systems; Integration Engineering: Integrates multiple integration modes, supports default loading and online switching; Define the configuration and hierarchical relationship of development mode, integration mode and integration project through XML files, and package the overall configuration in the form of zip compression package; Dynamic loading of interpretation mode: parses the development mode information corresponding to the selected interpretation mode and loads the bit file into the FPGA; enables the monitoring interface and establishes a two-way connection between the computer monitoring software and the FPGA; loads interpretation parameters and status, and automatically configures parameters according to default values ​​or historical values; Switching interpretation modes online: Stop the current FPGA task and disconnect; unload the current bit file and load the bit file for the new interpretation mode; enable the monitoring interface and establish a connection; run the FPGA task and restore the parameters and task status.

2. The method for dynamically integrating decoding modules supporting SCPC, TDMA and VSAT according to claim 1, wherein: The specification information of the development model includes: ID, name, and description; key performance parameters: modulation mode, coding type, number of parallel channels, maximum symbol rate; version information and bit file path.

3. The method for dynamically integrating decoding modules supporting SCPC, TDMA and VSAT according to claim 1, wherein: The interpretation parameters include: carrier frequency, symbol rate, modulation mode, coding type, and code rate; the interpretation status includes signal indication, demodulation lock, bit error rate, and signal-to-noise ratio; the parameter value range, default value, and display order are dynamically configured through an XML file.

4. The method for dynamically integrating decoding modules supporting SCPC, TDMA and VSAT according to claim 1, wherein: The integration model is generated by the following steps: Select multiple development modes and customize functional components, parameters, and status; generate a configuration package containing a customized development mode directory and integration definition files; define the default loaded development mode and switchable flags.

5. The method for dynamically integrating decoding modules supporting SCPC, TDMA and VSAT simultaneously according to claim 1, characterized in that: The integration project is generated by the following steps: Select multiple integration modes and eliminate duplicate development modes; generate integration project definition files and integration mode index files; integrate all configurations into a zip archive, supporting cross-platform migration and version management.

6. The method for dynamically integrating decoding modules supporting SCPC, TDMA and VSAT according to claim 1, wherein: The dynamic loading includes: Parse and load the corresponding bit file according to the interpretation mode ID selected by the user; automatically enable functional components and bind monitoring interfaces according to XML configuration; initialize parameters to default values ​​when loading for the first time, and restore the most recent parameter values ​​when loading in historical mode.

7. The method for dynamically integrating decoding modules supporting SCPC, TDMA and VSAT according to claim 1, wherein: The online switching includes: Check and stop the current FPGA task; unload the current functional component and bit file; load a new bit file and restore the historical task status.

8. A dynamic integration system of interpretation modules supporting SCPC, TDMA and VSAT simultaneously, characterized in that: A method for dynamically integrating interpretation modules supporting SCPC, TDMA, and VSAT simultaneously according to any one of claims 1 to 7 is applied, comprising a model definition module, a dynamic loading engine, an online switching controller, and a monitoring interface; The model definition module is used to generate XML configuration and zip packaging of development mode, integration mode and integration project; The dynamic loading engine is used to parse the zip package and load the bit file into the FPGA to configure the functional components and parameters; The online switching controller is used to execute FPGA task stop / start, bit file unloading / loading and working status recovery; The monitoring interface is used for bidirectional communication with the FPGA functional components to transmit control instructions and status data.

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