Method and device for determining processor frequency and chip

Abstract

The invention discloses a processor frequency determination method and device and a chip, and belongs to the technical field of image processing. The method comprises the following steps: acquiring performance data of an image frame drawing task; obtaining the actual operation time length of the image frame drawing task in a historical time window; determining the effective operation duration of the image frame drawing task in the historical time window according to the performance data and the actual operation duration; and determining the task load of the image frame drawing task according to the effective operation duration, and determining the operation frequency of a central processing unit according to the task load.

Description

Technical Field

[0001] The present application belongs to the field of image processing technology, and specifically relates to a method, device and chip for determining processor frequency. Background Art

[0002] When electronic devices render image frames, they need to dynamically adjust the CPU's operating frequency based on the task load to optimize system performance and energy efficiency. Specifically, when the task load is high, the system needs to increase the CPU frequency to speed up image frame rendering and avoid frame drops; when the task load is low, the CPU frequency can be reduced to save energy.

[0003] In related technologies, CPU frequency is usually adjusted based on the actual runtime of the image frame drawing task within a set historical time window. That is, the task load is estimated through the actual runtime, and the CPU frequency is adjusted accordingly. However, during the image frame drawing task, the CPU often waits for external resources due to waiting for memory or thread dependencies. While waiting for external resources, although the CPU is active, it does not process instructions and does not consume the task load. Therefore, this situation will cause the calculated task load to be too large, thereby affecting the accuracy of CPU frequency adjustment. Summary of the Invention

[0004] The purpose of the embodiments of the present application is to provide a method, device and chip for determining processor frequency, which can solve the technical problem of low accuracy in existing CPU frequency adjustment.

[0005] In a first aspect, an embodiment of the present application provides a method for determining a processor frequency, the method comprising:

[0006] Get performance data of image frame drawing tasks;

[0007] Obtaining the actual running time of the image frame drawing task within the historical time window;

[0008] determining an effective running time of the image frame drawing task within the historical time window according to the performance data and the actual running time;

[0009] The task load of the image frame rendering task is determined according to the effective running time, and the running frequency of the central processing unit is determined according to the task load.

[0010] In a second aspect, an embodiment of the present application provides a device for determining a processor frequency, the device comprising:

[0011] A first acquisition module is used to acquire performance data of an image frame drawing task;

[0012] A second acquisition module is used to obtain the actual running time of the image frame drawing task in the historical time window;

[0013] A first determining module is configured to determine an effective running time of the image frame drawing task within the historical time window according to the performance data and the actual running time;

[0014] The second determining module is configured to determine a task load of the image frame drawing task according to the effective running time, and determine an operating frequency of a central processing unit according to the task load.

[0015] In a third aspect, an embodiment of the present application provides an electronic device comprising a processor and a memory, wherein the memory stores programs or instructions that can be run on the processor, and when the programs or instructions are executed by the processor, the steps of the method provided in the first aspect are implemented.

[0016] In a fourth aspect, an embodiment of the present application provides a readable storage medium, on which a program or instruction is stored, and when the program or instruction is executed by a processor, the steps of the method provided in the first aspect are implemented.

[0017] In a fifth aspect, an embodiment of the present application provides a chip, which includes a processor and a communication interface, the communication interface and the processor are coupled, and the processor is used to run programs or instructions to implement the method provided in the first aspect.

[0018] In a sixth aspect, an embodiment of the present application provides a computer program product, which is stored in a storage medium and executed by at least one processor to implement the method provided in the first aspect.

[0019] In the processor frequency determination method, device, and chip of the present application, the performance data of the image frame drawing task can be obtained while simultaneously obtaining the actual runtime of the image frame drawing task within a set historical time window. Based on the performance data and the actual runtime, the effective runtime of the image frame drawing task within the historical time window is then determined. A more accurate task load is estimated using the effective runtime, and the CPU operating frequency is determined based on the task load. Compared to related techniques that estimate CPU operating frequency using only actual runtime, this solution avoids the false load generated by the CPU while waiting for external resources, thereby determining a more accurate CPU operating frequency. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 This is a flowchart of a method for determining a processor frequency provided by an embodiment of the present application;

[0021] Figure 2 is a structural diagram of a device for determining processor frequency provided by another embodiment of the present application;

[0022] Figure 3 is a structural diagram of an electronic device provided by yet another embodiment of the present application;

[0023] Figure 4 It is a schematic diagram of the hardware structure of the electronic device provided in the embodiment of the present application. DETAILED DESCRIPTION

[0024] The following will be combined with the accompanying drawings in the embodiments of the present application to clearly describe the technical solutions in the embodiments of the present application. Obviously, the embodiments described are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field fall within the scope of protection of this application.

[0025] The terms "first," "second," and the like in the specification and claims of this application are used to distinguish similar objects, and are not used to describe a specific order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate, so that the embodiments of this application can be implemented in an order other than that illustrated or described herein, and that the objects distinguished by "first," "second," and the like are generally of the same type, and do not limit the number of objects; for example, the first object can be one or more. In addition, the term "and / or" in the specification and claims represents at least one of the connected objects, and the character " / " generally indicates that the objects associated with each other are in an "or" relationship.

[0026] To solve the above technical problems, the present application provides a method for determining a processor frequency. The method for determining a processor frequency provided by the present application is described in detail below with reference to the accompanying drawings through specific embodiments and their application scenarios.

[0027] like Figure 1 As shown, Figure 1 : is a flow chart of a method for determining a processor frequency provided by an embodiment of the present application. The embodiment of the present application provides a method for determining a processor frequency, which may include:

[0028] S101, obtaining performance data of an image frame rendering task;

[0029] In this embodiment, an image frame drawing task refers to the task of an electronic device drawing each generated image frame. An image frame drawing task includes the sequential drawing of multiple image frames. The performance data of the image frame drawing task can represent the resource usage of the electronic device and the operating efficiency of the image frame drawing task during the execution of the image frame drawing task.

[0030] Specifically, the performance data of the image frame drawing task may include actual drawing time, level 1 instruction cache miss rate, level 1 data cache miss rate, number of instructions, and memory wait ratio.

[0031] The frame rate of the electronic device can be obtained through system settings or screen refresh rate, and then the reciprocal of the frame rate is determined as the target drawing time of a single image frame. The target drawing time refers to the time that each image frame should theoretically be completed. For example, if the frame rate of the electronic device is 60FPS, then the corresponding target drawing time of a single image frame is 16.67ms. However, the actual drawing time of each image frame is not equal to its target drawing time. The actual drawing time refers to the actual drawing time consumed by a certain image frame in the image frame drawing task.

[0032] When an electronic device draws an image frame, the central processing unit (CPU) executes the corresponding instructions. During the CPU's instruction execution process, it frequently accesses the data cache to obtain variables, stack space, and other data. The first-level data cache is one of the storage areas closest to the CPU core and has the fastest access speed. In the process of obtaining data, the CPU will first try to obtain data from the first-level data cache (L1D Cache). If the desired data cannot be obtained from the first-level data cache, it will then obtain data from the second-level cache and the third-level cache. Therefore, the first-level data cache miss rate refers to the proportion of electronic devices that fail to obtain the desired data when accessing the first-level data cache when drawing a certain image frame. For example, if the CPU accesses the first-level data cache a total of 10,000 times, and fails to obtain the desired data 500 times, then the first-level data cache miss rate is 5%.

[0033] When an electronic device renders an image frame, the central processing unit (CPU) executes the corresponding instructions. The L1 instruction cache is a high-speed cache within the CPU that temporarily stores instructions to be executed. As the program runs, the CPU continuously retrieves instructions from memory and executes them. When retrieving instructions, the CPU first attempts to retrieve them from the L1 instruction cache (L1I Cache). If the L1I cache fails, it then retrieves instructions from the L2 and L3 caches. Therefore, the L1I cache miss rate refers to the percentage of times an electronic device fails to retrieve the desired instruction when accessing the L1I cache while rendering a specific image frame. For example, if the CPU retrieves instructions from the L1I cache 10,000 times and fails to retrieve the desired instruction 600 times, the L1I cache miss rate is 6%.

[0034] The instruction count refers to the number of instructions executed by the electronic device during the drawing of a specific image frame. The memory wait ratio refers to the ratio of the time the CPU is idle while waiting for memory data to be returned to the actual drawing time of the image frame.

[0035] S102, obtaining the actual running time of the image frame rendering task within the historical time window;

[0036] In this embodiment, during the process of an electronic device executing an image frame drawing task, the execution time of the image frame drawing task can be divided into multiple historical time windows, wherein each historical time window is a time interval that records the historical behavior of the image frame drawing task. The actual running time of the image frame drawing task within each historical time window can be obtained. The actual running time refers to the actual length of time the image frame drawing task occupies the CPU execution within the historical time window. For example, the historical time window can be a 16ms time window. If the image frame drawing task actually runs for 5.2ms within this time window, then the actual running time of the image frame drawing task within this historical time window is 5.2ms.

[0037] S103: Determine the effective running time of the image frame rendering task within the historical time window according to the performance data and the actual running time.

[0038] In the embodiments of the present application, the actual runtime refers to the total time during the historical time window that the CPU is allocated to the image frame drawing task and is in the running state. However, during the actual runtime, the CPU may encounter issues such as waiting for memory and poor scheduling, so the CPU may not effectively execute tasks during all actual runtimes. Therefore, the effective runtime of the image frame drawing task within the historical time window can be determined based on performance data and the actual runtime. This effective runtime refers to the portion of time during which the image frame drawing task actually executes useful instructions and effectively advances the drawing process.

[0039] In some embodiments, determining the effective running time of the image frame rendering task within the historical time window based on the performance data and the actual running time includes:

[0040] determining a duration correction factor based on the performance data;

[0041] The product of the duration correction coefficient and the actual running duration is determined as the effective running duration.

[0042] In this embodiment, the duration correction coefficient refers to a scaling factor dynamically calculated based on performance data of the image frame drawing task during execution, and is used to correct the actual running time to reflect the effectiveness of task execution.

[0043] Specifically, the system can determine the execution efficiency of the image frame drawing task based on the performance data of the image frame drawing task: if the performance data indicates that the execution efficiency of the image frame drawing task is high, a larger duration correction factor can be determined; if the performance data indicates that the execution efficiency of the image frame drawing task is low, a smaller duration correction factor can be determined. Subsequently, the product of the duration correction factor and the actual running time can be determined as the effective running time to correct the actual running time, so that the effective running time more accurately reflects the actual load of the image frame drawing task.

[0044] In this embodiment, the duration correction coefficient can be dynamically calculated based on the performance data, and the actual running duration can be corrected using the duration correction coefficient to obtain the effective running duration. The effective running duration can more accurately reflect the actual load of the task, thereby effectively improving the accuracy of CPU frequency adjustment.

[0045] In some embodiments, the performance data includes first performance data during the drawing process of an image frame preceding a first image frame to be drawn, and P second performance data during the drawing process of P image frames preceding the first image frame, where P is a positive integer greater than 1.

[0046] Determining the duration correction coefficient according to the performance data includes:

[0047] Obtain the time margin and initial correction coefficient of the target drawing time of a drawn single image frame;

[0048] The duration correction coefficient is determined according to the time margin, the initial correction coefficient, the first performance data and the P second performance data.

[0049] In this embodiment, first performance data of the drawing process of the image frame preceding the first image frame to be drawn, and second performance data of the drawing process of the P image frames preceding the first image frame, can be obtained respectively. The first performance data may include the actual drawing time, the level 1 instruction cache miss rate, the level 1 data cache miss rate, the number of instructions, and the memory wait ratio of the drawing process of the previous image frame; the second performance data may include the actual drawing time, the level 1 instruction cache miss rate, the level 1 data cache miss rate, the number of instructions, and the memory wait ratio of the drawing process of each of the P image frames preceding the first image frame. For example, P may be 10 or 20.

[0050] In addition to obtaining the first performance data and the second performance data, the time margin and initial correction coefficient of the drawn single image frame can also be obtained. The time margin is used to represent the proportion of time that the image frame drawing task should complete the drawing within the target drawing time. For example, if the frame rate of the electronic device is 60FPS, then the corresponding target drawing time of a single image frame is 16.67ms. If the time margin t left is 0.1, then this image frame needs to be at 16.67*(1-t left ) time to complete the drawing.

[0051] After each image frame is drawn, the duration correction coefficient is initialized. The duration correction coefficient after initialization is the initial correction coefficient, and the initial correction coefficient can be determined to be 1.

[0052] After obtaining the time margin, the initial correction coefficient, the first performance data, and the second performance data, the duration correction coefficient may be calculated based on the time margin, the initial correction coefficient, the first performance data, and the second performance data.

[0053] In this way, based on the performance data of the previous frame and the previous P frame of the current frame, combined with the obtained time margin and the initial correction coefficient, the duration correction coefficient can be dynamically adjusted to more accurately calculate the task load of the image frame drawing task.

[0054] In some embodiments, the first performance data includes a first actual drawing time, a first instruction cache miss rate, a first data cache miss rate, a first instruction quantity, and a first memory wait ratio, and each second performance data includes a second instruction cache miss rate, a second data cache miss rate, a second instruction quantity, and a second memory wait ratio.

[0055] The determining the duration correction coefficient according to the time margin, the initial correction coefficient, the first performance data, and the second performance data includes:

[0056] Determine a first quotient obtained by dividing the first actual drawing time by the target drawing time of the drawn single image frame;

[0057] Determining a second quotient obtained by dividing the first instruction cache miss rate by an average instruction cache miss rate, wherein the average instruction cache miss rate is an average of the P second instruction cache miss rates;

[0058] Determining a third quotient obtained by dividing the first data cache miss rate by the average data cache miss rate, wherein the average data cache miss rate is an average of the P second data cache miss rates;

[0059] determining a fourth quotient obtained by dividing the first instruction quantity by an average instruction quantity, wherein the average instruction quantity is an average of the P second instruction quantities;

[0060] Determine a fifth quotient obtained by dividing the first memory wait ratio by the average memory wait ratio, wherein the average memory wait ratio is an average value of the P second memory wait ratios;

[0061] The duration correction coefficient is determined according to the first quotient, the second quotient, the third quotient, the fourth quotient, the fifth quotient, the time margin, and the initial correction coefficient.

[0062] In this embodiment, the first data cache miss rate is the first-level data cache miss rate during the drawing process of the previous image frame of the first image frame, and the first instruction cache miss rate is the first-level instruction cache miss rate during the drawing process of the previous image frame of the first image frame; the second data cache miss rate is the first-level data cache miss rate during the drawing process of one of the P image frames before the first image frame, and the second instruction cache miss rate is the first-level instruction cache miss rate during the drawing process of one of the P image frames before the first image frame.

[0063] After obtaining the first performance data and P second performance data, a first quotient can be calculated by first dividing the first actual drawing time by the target drawing time of the rendered single image frame. The average of the P second instruction cache miss rates can be calculated as the average instruction cache miss rate, and then a second quotient can be calculated by dividing the first instruction cache miss rate by the average instruction cache miss rate. The average of the P second data cache miss rates can be calculated as the average data cache miss rate, and then a third quotient can be calculated by dividing the first data cache miss rate by the average data cache miss rate. The average of the P second instruction quantities can be calculated as the average instruction quantity, and then a fourth quotient can be calculated by dividing the first instruction quantity by the average instruction quantity. The average of the P second memory wait ratios can be calculated as the average memory wait ratio, and then a fifth quotient can be calculated by dividing the first memory wait ratio by the average memory wait ratio.

[0064] Subsequently, a duration correction coefficient may be calculated according to the first quotient, the second quotient, the third quotient, the fourth quotient, the fifth quotient, the time margin, and the initial correction coefficient.

[0065] The calculation formula can be shown as the following formula 1:

[0066]

[0067] Among them, C0 is the initial correction coefficient, C is the time correction coefficient, fTime nThe first actual drawing time, fTime required The target drawing duration, t left is the time margin, MR l1i(n) is the first instruction cache miss rate, MR l1i(avg) is the average instruction cache miss rate, MR l1d(n) is the first data cache miss rate, MR l1d(avg) is the average data cache miss rate, Inst n is the first instruction number, Inst avg is the average number of instructions, memBound n The first memory wait ratio, memBound avg The average memory wait ratio.

[0068] This approach allows us to quantify the relative change in execution efficiency for the previous frame by normalizing and comparing the performance data of the previous P frames with the average historical performance data of the previous P frames. Combining the time margin with the initial correction factor allows us to adaptively adjust the duration correction factor, more accurately reflecting the actual workload of the task.

[0069] S104 , determining a task load of the image frame rendering task according to the effective running time, and determining an operating frequency of a central processing unit according to the task load.

[0070] In an embodiment of the present application, after calculating the effective runtime of an image frame drawing task within a historical time window, the system can use this effective runtime as a basis for calculating the true load of the image frame drawing task, thereby calculating the true load of the image frame drawing task and adjusting the operating frequency of the central processing unit (CPU) based on the load. Specifically, a longer effective runtime indicates a greater computing power requirement for the task, and the system will select a higher CPU frequency to ensure that the image frame drawing task is completed within the target time; conversely, a shorter effective runtime indicates a lighter load for the task, and the system can appropriately reduce the CPU frequency to save energy.

[0071] For example, after determining the effective operating time, the system may calculate the load value through a window-assisted load tracking (WALT) algorithm or a task entity-based load tracking (PELT) algorithm, and then determine the operating frequency of the central processing unit based on the load value.

[0072] In this application, while obtaining the actual runtime of the image frame drawing task within a set historical time window, the performance data of the image frame drawing task can be obtained. Then, based on the performance data and the actual runtime, the effective runtime of the image frame drawing task within the historical time window can be determined. A more accurate task load can be estimated using the effective runtime, and the CPU operating frequency can be determined based on the task load. Compared to related art methods that only use actual runtime to estimate the CPU operating frequency, this solution can avoid the false load generated by the CPU while waiting for external resources, thereby determining a more accurate CPU operating frequency.

[0073] In some embodiments, after determining the duration correction coefficient according to the time margin, the initial correction coefficient, the first performance data, and the second performance data, the method further includes:

[0074] After the first image frame is drawn, obtaining third performance data during the drawing process of the first image frame;

[0075] adjusting the duration correction coefficient according to the third performance data;

[0076] The operating frequency of the central processing unit is adjusted according to the adjusted duration correction coefficient.

[0077] In this embodiment, before the first image frame is drawn, a duration correction coefficient can be determined based on the time margin, the initial correction coefficient, the first performance data and the second performance data, and then the CPU operating frequency can be determined based on the duration correction coefficient, and the first image frame can be drawn at the CPU operating frequency.

[0078] After the first image frame is drawn, the third performance data during the drawing process of the first image frame can be obtained. Then, the duration correction coefficient can be updated based on the third performance data, and the current load can be recalculated based on the adjusted duration correction coefficient, and the CPU operating frequency can be adjusted based on the recalculated load.

[0079] That is, after each frame is drawn, the system readjusts the CPU frequency before drawing the next frame. This allows the system to estimate the load and set an appropriate CPU frequency before drawing each frame. After each frame is drawn, the system adjusts the duration correction factor based on the performance data of the frame, achieving continuous adjustment of the CPU frequency. This effectively avoids energy waste caused by setting the frequency too high, and prevents frame drawing delays caused by setting the frequency too low.

[0080] In some embodiments, after determining the duration correction coefficient according to the time margin, the initial correction coefficient, the first performance data, and the second performance data, the method further includes:

[0081] During the drawing process of the first image frame, if the first image frame is not completed within the target drawing time, determining the product of the time correction coefficient and the first coefficient as a new time correction coefficient, adjusting the operating frequency of the central processing unit according to the new time correction coefficient, and determining the product of the target drawing time and the second coefficient as the new target drawing time, and repeating this step until the drawing of the first image frame is completed;

[0082] The first coefficient is a constant greater than 1, and the second coefficient is a constant greater than 0 and less than 1.

[0083] In this embodiment, the system not only readjusts the CPU operating frequency after each image frame is drawn, but also adjusts the duration correction coefficient when the image frame drawing times out, and adjusts the CPU operating frequency accordingly.

[0084] Specifically, the target drawing time refers to the time that each image frame should theoretically be completed. If the actual drawing time of a single image frame reaches the target drawing time and the drawing of the image frame is still not completed, it means that the drawing of the image frame has timed out. At this time, the electronic device may become stuck, so it is necessary to improve the performance of the electronic device to complete the drawing of the image frame as soon as possible.

[0085] Therefore, the original duration correction coefficient can be directly multiplied by the first coefficient greater than 1 to obtain a new duration correction coefficient. The new task load is calculated based on the new duration correction coefficient, and the CPU operating frequency is increased to speed up the subsequent drawing of the image frame.

[0086] Furthermore, the target drawing time may be multiplied by a second coefficient less than 1 to obtain a new target drawing time. If the image frame is still not drawn after the new target drawing time, the above steps are repeated to increase the time correction coefficient, increase the CPU operating frequency again, and reduce the target drawing time until the image frame is drawn.

[0087] Exemplarily, the first coefficient can be 1.5, the second coefficient can be 0.5, the initial duration correction coefficient is 1, the target drawing duration is 16.67ms, and a timer can be set with a timing duration of 16.67ms, which is started when the first image frame starts drawing. If the actual drawing duration of the first image frame reaches the target drawing duration, that is, within 16.67ms when the timer expires, the first image frame fails to be drawn. At this time, a new duration correction coefficient can be calculated as the first coefficient multiplied by the initial duration correction coefficient of 1.5, and the CPU operating frequency can be adjusted based on the duration correction coefficient of 1.5 to accelerate the drawing of the first image frame, and the initial target drawing duration of 16.67ms is multiplied by the second coefficient of 0.5 to obtain a new target drawing duration of 8.335ms. At this time, a timer can be reset with a timing duration of 8.335ms to continue drawing the first image frame. Repeat the above steps until the first image frame is drawn.

[0088] In this way, by dynamically adjusting the duration correction coefficient and the target drawing duration, the CPU operating frequency can be promptly increased when the image frame drawing times out, and the target drawing duration can be gradually shortened to ensure that the image frame is drawn as quickly as possible after the drawing timeout, effectively avoiding lag.

[0089] Figure 2 FIG. 2 is a schematic diagram of a structure of a device 200 for determining a processor frequency according to another embodiment of the present invention. Figure 2 As shown, the processor frequency determination device may include:

[0090] A first acquisition module 201 is used to acquire performance data of an image frame rendering task;

[0091] A second acquisition module 202 is used to acquire the actual running time of the image frame rendering task within the historical time window;

[0092] A first determining module 203 is configured to determine an effective running time of the image frame rendering task within the historical time window according to the performance data and the actual running time;

[0093] The second determining module 204 is configured to determine a task load of the image frame rendering task according to the effective running time, and determine an operating frequency of a central processing unit according to the task load.

[0094] In this application, while obtaining the actual runtime of the image frame drawing task within a set historical time window, the performance data of the image frame drawing task can be obtained. Then, based on the performance data and the actual runtime, the effective runtime of the image frame drawing task within the historical time window can be determined. A more accurate task load can be estimated using the effective runtime, and the CPU operating frequency can be determined based on the task load. Compared to related art methods that only use actual runtime to estimate the CPU operating frequency, this solution can avoid the false load generated by the CPU while waiting for external resources, thereby determining a more accurate CPU operating frequency.

[0095] In another optional example, the first determining module 203 includes:

[0096] a first determining unit, configured to determine a duration correction coefficient based on the performance data;

[0097] The second determining unit is configured to determine the effective running time by multiplying the time correction coefficient by the actual running time.

[0098] In another optional example, the first determining unit includes:

[0099] A first acquisition subunit is used to acquire a time margin and an initial correction coefficient of a target drawing time of a drawn single image frame;

[0100] The first determining subunit is configured to determine the duration correction coefficient according to the time margin, the initial correction coefficient, the first performance data, and the second performance data.

[0101] In another optional example, the first performance data includes a first actual drawing time, a first instruction cache miss rate, a first data cache miss rate, a first instruction quantity, and a first memory wait ratio, and each second performance data includes a second instruction cache miss rate, a second data cache miss rate, a second instruction quantity, and a second memory wait ratio.

[0102] The first determining subunit is specifically configured to:

[0103] Determine a first quotient obtained by dividing the first actual drawing time by the target drawing time of the drawn single image frame;

[0104] Determining a second quotient obtained by dividing the first instruction cache miss rate by an average instruction cache miss rate, wherein the average instruction cache miss rate is an average of the P second instruction cache miss rates;

[0105] Determining a third quotient obtained by dividing the first data cache miss rate by the average data cache miss rate, wherein the average data cache miss rate is an average of the P second data cache miss rates;

[0106] determining a fourth quotient obtained by dividing the first instruction quantity by an average instruction quantity, wherein the average instruction quantity is an average of the P second instruction quantities;

[0107] Determine a fifth quotient obtained by dividing the first memory wait ratio by the average memory wait ratio, wherein the average memory wait ratio is an average value of the P second memory wait ratios;

[0108] The duration correction coefficient is determined according to the first quotient, the second quotient, the third quotient, the fourth quotient, the fifth quotient, the time margin, and the initial correction coefficient.

[0109] In another optional example, the apparatus further includes:

[0110] a third acquisition module, configured to acquire third performance data during the drawing process of the first image frame after the drawing of the first image frame is completed;

[0111] a first adjustment module, configured to adjust the duration correction coefficient according to the third performance data;

[0112] The second adjustment module is configured to adjust the operating frequency of the central processing unit according to the adjusted duration correction coefficient.

[0113] In another optional example, the apparatus further includes:

[0114] a third adjustment module, configured to, during the drawing process of the first image frame, if the first image frame is not completely drawn within the target drawing time, determine a new drawing time correction coefficient by multiplying the time correction coefficient and the first coefficient; adjust the operating frequency of the central processing unit according to the new drawing time correction coefficient; and determine a new target drawing time by multiplying the target drawing time and the second coefficient; and repeat this step until the drawing of the first image frame is completely completed;

[0115] The first coefficient is a constant greater than 1, and the second coefficient is a constant greater than 0 and less than 1.

[0116] The processor frequency determination device in the embodiment of the present application can be an electronic device, or a component in the electronic device, such as an integrated circuit or chip. The electronic device can be a terminal, or other devices other than a terminal. Exemplarily, the electronic device can be a mobile phone, a tablet computer, a laptop computer, a PDA, an in-vehicle electronic device, a mobile Internet device (MID), an augmented reality (AR) / virtual reality (VR) device, a robot, a wearable device, an ultra-mobile personal computer (UMPC), a netbook or a personal digital assistant (PDA), etc., and can also be a server, a network attached storage (NAS), a personal computer (PC), a television (TV), an ATM or a self-service machine, etc., and can also be a server, a network attached storage (NAS), a personal computer (PC), a television (TV), an ATM or a self-service machine, etc., and can also be a server, a network attached storage (NAS), a personal computer (PC), a television (TV), an ATM or a self-service machine, etc., and the embodiment of the present application does not specifically limit it.

[0117] The processor frequency determination device in the embodiment of the present application may be a device having an operating system. The operating system may be an Android operating system, an iOS operating system, or other possible operating systems, which are not specifically limited in the embodiment of the present application.

[0118] The processor frequency determination device provided in the embodiment of the present application can achieve Figure 1 To avoid repetition, the various processes implemented in the method embodiment are not described here.

[0119] Alternatively, as Figure 3 As shown, an embodiment of the present application also provides an electronic device 100, including a processor 110, a memory 119, and a program or instruction stored in the memory 119 and executable on the processor 110. When the program or instruction is executed by the processor 110, each process of the embodiment of the method for determining the processor frequency described above is implemented, and the same technical effect can be achieved. To avoid repetition, it will not be described here.

[0120] It should be noted that the electronic devices in the embodiments of the present application include the above-mentioned mobile electronic devices and non-mobile electronic devices.

[0121] Please refer to Figure 4 , Figure 4 The following is a schematic diagram of the hardware structure of an electronic device implementing an embodiment of the present application. The electronic device 100 includes, but is not limited to, components such as a radio frequency unit 121, a network module 122, an audio output unit 123, an input unit 124, a sensor 125, a display unit 126, a user input unit 127, an interface unit 128, a memory 129, and a processor 120.

[0122] Those skilled in the art will understand that the electronic device 100 may also include a power source (such as a battery) to power each component, and the power source may be logically connected to the processor 120 through a power management system, thereby implementing functions such as charging, discharging, and power consumption management through the power management system. Figure 4 The electronic device structure shown in the figure does not constitute a limitation on the electronic device. The electronic device may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently, which will not be repeated here.

[0123] The processor 120 is configured to obtain performance data of an image frame rendering task;

[0124] The processor 120 is configured to obtain the actual running time of the image frame rendering task within the historical time window;

[0125] The processor 120 is configured to determine an effective running time of the image frame rendering task within the historical time window according to the performance data and the actual running time;

[0126] The processor 120 is configured to determine a task load of the image frame rendering task according to the effective running time, and determine an operating frequency of a central processing unit according to the task load.

[0127] In this application, while obtaining the actual runtime of the image frame drawing task within a set historical time window, the performance data of the image frame drawing task can be obtained. Then, based on the performance data and the actual runtime, the effective runtime of the image frame drawing task within the historical time window can be determined. A more accurate task load can be estimated using the effective runtime, and the CPU operating frequency can be determined based on the task load. Compared to related art methods that only use actual runtime to estimate the CPU operating frequency, this solution can avoid the false load generated by the CPU while waiting for external resources, thereby determining a more accurate CPU operating frequency.

[0128] In another optional example, the processor 120 is further configured to:

[0129] determining a duration correction factor based on the performance data;

[0130] The product of the duration correction coefficient and the actual running duration is determined as the effective running duration.

[0131] In another optional example, the processor 120 is further configured to:

[0132] Obtain the time margin and initial correction coefficient of the target drawing time of a drawn single image frame;

[0133] The duration correction coefficient is determined according to the time margin, the initial correction coefficient, the first performance data, and the second performance data.

[0134] In another optional example, the first performance data includes a first actual drawing time, a first instruction cache miss rate, a first data cache miss rate, a first instruction quantity, and a first memory wait ratio, and each second performance data includes a second instruction cache miss rate, a second data cache miss rate, a second instruction quantity, and a second memory wait ratio.

[0135] The processor 120 is specifically configured to:

[0136] Determine a first quotient obtained by dividing the first actual drawing time by the target drawing time of the drawn single image frame;

[0137] Determining a second quotient obtained by dividing the first instruction cache miss rate by an average instruction cache miss rate, wherein the average instruction cache miss rate is an average of the P second instruction cache miss rates;

[0138] Determining a third quotient obtained by dividing the first data cache miss rate by the average data cache miss rate, wherein the average data cache miss rate is an average of the P second data cache miss rates;

[0139] determining a fourth quotient obtained by dividing the first instruction quantity by an average instruction quantity, wherein the average instruction quantity is an average of the P second instruction quantities;

[0140] Determine a fifth quotient obtained by dividing the first memory wait ratio by the average memory wait ratio, wherein the average memory wait ratio is an average value of the P second memory wait ratios;

[0141] The duration correction coefficient is determined according to the first quotient, the second quotient, the third quotient, the fourth quotient, the fifth quotient, the time margin, and the initial correction coefficient.

[0142] In another optional example, the processor 120 is further configured to:

[0143] After the first image frame is drawn, obtaining third performance data during the drawing process of the first image frame;

[0144] adjusting the duration correction coefficient according to the third performance data;

[0145] The operating frequency of the central processing unit is adjusted according to the adjusted duration correction coefficient.

[0146] In another optional example, the processor 120 is further configured to:

[0147] During the drawing process of the first image frame, if the first image frame is not completed within the target drawing time, determining the product of the time correction coefficient and the first coefficient as a new time correction coefficient, adjusting the operating frequency of the central processing unit according to the new time correction coefficient, and determining the product of the target drawing time and the second coefficient as the new target drawing time, and repeating this step until the drawing of the first image frame is completed;

[0148] The first coefficient is a constant greater than 1, and the second coefficient is a constant greater than 0 and less than 1.

[0149] It should be understood that in an embodiment of the present application, the input unit 124 may include a graphics processing unit (GPU) 1241 and a microphone 1242, and the graphics processor 1241 processes the image data of a static picture or video obtained by an image capture device (such as a camera) in a video capture mode or an image capture mode. The display unit 126 may include a display panel 1261, and the display panel 1261 may be configured in the form of a liquid crystal display, an organic light emitting diode, etc. The user input unit 127 includes a touch panel 1271 and at least one of other input devices 1272. The touch panel 1271 is also called a touch screen. The touch panel 1271 may include two parts: a touch detection device and a touch controller. Other input devices 1272 may include, but are not limited to, a physical keyboard, function keys (such as volume control keys, switch keys, etc.), a trackball, a mouse, and a joystick, which will not be repeated here.

[0150] The memory 129 can be used to store software programs and various data. The memory 129 may mainly include a first storage area for storing programs or instructions and a second storage area for storing data, wherein the first storage area may store an operating system, applications or instructions required for at least one function (such as a sound playback function, an image playback function, etc.). In addition, the memory 129 may include a volatile memory or a non-volatile memory, or the memory 129 may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), a static random access memory (SRAM), a dynamic random access memory (DRAM), a synchronous dynamic random access memory (SDRAM), a double data rate synchronous dynamic random access memory (DDRSDRAM), an enhanced synchronous dynamic random access memory (ESDRAM), a synchronous link dynamic random access memory (SLDRAM), and a direct memory bus random access memory (DRRAM). The memory 129 in the embodiment of the present application includes but is not limited to these and any other suitable types of memory.

[0151] Processor 120 may include one or more processing units. Optionally, processor 120 integrates an application processor and a modem processor. The application processor primarily handles operations related to the operating system, user interface, and application programs, while the modem processor primarily processes wireless communication signals, such as a baseband processor. It is understood that the modem processor may not be integrated into processor 120.

[0152] An embodiment of the present application also provides a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, the various processes of the above-mentioned processor frequency determination method embodiment are implemented, and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0153] The processor is the processor in the electronic device in the above embodiment. The readable storage medium includes a computer readable storage medium, such as a computer read-only memory ROM, a random access memory RAM, a magnetic disk or an optical disk.

[0154] An embodiment of the present application further provides a chip, which includes a processor and a communication interface, the communication interface and the processor are coupled, and the processor is used to run programs or instructions to implement the various processes of the above-mentioned processor frequency determination method embodiment, and can achieve the same technical effect. To avoid repetition, it will not be repeated here.

[0155] It should be understood that the chip mentioned in the embodiments of the present application can also be called a system-level chip, a system chip, a chip system or a system-on-chip chip, etc.

[0156] An embodiment of the present application provides a computer program product, which is stored in a storage medium. The program product is executed by at least one processor to implement the various processes of the above-mentioned processor frequency determination method embodiment, and can achieve the same technical effect. To avoid repetition, it will not be repeated here.

[0157] It should be noted that, in this article, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the statement "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element. In addition, it should be noted that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in the opposite order according to the functions involved. For example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0158] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus the necessary general hardware platform, and of course can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art can be embodied in the form of a computer software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), including a number of instructions for enabling a terminal (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in each embodiment of the present application.

[0159] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of this application, ordinary technicians in this field can also make many forms without departing from the purpose of this application and the scope of protection of the claims, all of which are within the protection of this application.

Claims

1. A method for determining processor frequency, characterized in that: include: Get performance data of image frame drawing tasks; Obtaining the actual running time of the image frame drawing task within the historical time window; determining an effective running time of the image frame drawing task within the historical time window according to the performance data and the actual running time; The task load of the image frame rendering task is determined according to the effective running time, and the running frequency of the central processing unit is determined according to the task load.

2. The method according to claim 1, characterized in that Determining the effective running time of the image frame drawing task within the historical time window according to the performance data and the actual running time includes: determining a duration correction factor based on the performance data; The product of the duration correction coefficient and the actual running duration is determined as the effective running duration.

3. The method according to claim 2, characterized in that The performance data includes first performance data during the drawing process of an image frame preceding the first image frame to be drawn, and P second performance data during the drawing process of P image frames preceding the first image frame, where P is a positive integer greater than 1. Determining the duration correction coefficient according to the performance data includes: Obtain the time margin and initial correction coefficient of the target drawing time of a drawn single image frame; The duration correction coefficient is determined according to the time margin, the initial correction coefficient, the first performance data, and the second performance data.

4. The method according to claim 3, characterized in that The first performance data includes a first actual drawing time, a first instruction cache miss rate, a first data cache miss rate, a first instruction quantity, and a first memory wait ratio; each second performance data includes a second instruction cache miss rate, a second data cache miss rate, a second instruction quantity, and a second memory wait ratio; The determining the duration correction coefficient according to the time margin, the initial correction coefficient, the first performance data, and the second performance data includes: Determine a first quotient obtained by dividing the first actual drawing time by the target drawing time of the drawn single image frame; Determining a second quotient obtained by dividing the first instruction cache miss rate by an average instruction cache miss rate, wherein the average instruction cache miss rate is an average of the P second instruction cache miss rates; Determining a third quotient obtained by dividing the first data cache miss rate by the average data cache miss rate, wherein the average data cache miss rate is an average of the P second data cache miss rates; determining a fourth quotient obtained by dividing the first instruction quantity by an average instruction quantity, wherein the average instruction quantity is an average of the P second instruction quantities; Determine a fifth quotient obtained by dividing the first memory wait ratio by the average memory wait ratio, wherein the average memory wait ratio is an average value of the P second memory wait ratios; The duration correction coefficient is determined according to the first quotient, the second quotient, the third quotient, the fourth quotient, the fifth quotient, the time margin, and the initial correction coefficient.

5. The method according to claim 3, characterized in that After determining the duration correction coefficient according to the time margin, the initial correction coefficient, the first performance data, and the second performance data, the method further includes: After the first image frame is drawn, obtaining third performance data during the drawing process of the first image frame; adjusting the duration correction coefficient according to the third performance data; The operating frequency of the central processing unit is adjusted according to the adjusted duration correction coefficient.

6. The method according to claim 3, characterized in that After determining the duration correction coefficient according to the time margin, the initial correction coefficient, the first performance data, and the second performance data, the method further includes: During the drawing process of the first image frame, if the first image frame is not completed within the target drawing time, determining the product of the time correction coefficient and the first coefficient as a new time correction coefficient, adjusting the operating frequency of the central processing unit according to the new time correction coefficient, and determining the product of the target drawing time and the second coefficient as the new target drawing time, and repeating this step until the drawing of the first image frame is completed; The first coefficient is a constant greater than 1, and the second coefficient is a constant greater than 0 and less than 1.

7. A device for determining processor frequency, characterized in that: include: A first acquisition module is used to acquire performance data of an image frame drawing task; A second acquisition module is used to obtain the actual running time of the image frame drawing task in the historical time window; A first determining module is configured to determine an effective running time of the image frame drawing task within the historical time window according to the performance data and the actual running time; The second determining module is configured to determine a task load of the image frame drawing task according to the effective running time, and determine an operating frequency of a central processing unit according to the task load.

8. The device according to claim 7, characterized in that The first determining module includes: a first determining unit, configured to determine a duration correction coefficient based on the performance data; The second determining unit is configured to determine the effective running time by multiplying the time correction coefficient by the actual running time.

9. An electronic device, characterized in that: The method comprises a processor and a memory, wherein the memory stores a program or instruction that can be run on the processor, and when the program or instruction is executed by the processor, the steps of the method for determining the processor frequency according to any one of claims 1 to 6 are implemented.

10. A chip, characterized in that: The chip includes a processor and a communication interface, the communication interface is coupled to the processor, and the processor is used to run a program or instruction, and the program or instruction implements the steps of the method for determining the processor frequency according to any one of claims 1 to 6.

Images