System startup memory detection method and device, equipment and storage medium
By calculating the early virtual address mapping range during the Hypervisor startup stage and detecting the output error when the memory page address exceeds the output, the problem of difficult to troubleshoot memory mapping exceptions during the Hypervisor startup stage is solved, memory error detection and prompts before system startup is realized, and fault location is simplified.
Patent Information
- Application Number
- CN202511007047.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-22
- Publication Date
- 2025-08-22
- Estimated Expiration
- 2045-07-22
AI Technical Summary
During the Hypervisor startup stage, memory mapping exceptions make it difficult to detect faults. The existing technology lacks effective detection methods, resulting in no abnormal information output when the system crashes, making it difficult to locate the cause of the fault.
Before the final page table takes effect, the maximum value of the Hypervisor's early virtual address mapping range is calculated, and the base address of the allocated memory page is used to detect whether the allocated memory page virtual address range exceeds the maximum value, and an error prompt is output when it exceeds the value, returning a memory error.
It realizes accurate detection of memory errors before the system crashes, provides error prompts, which facilitates developers to locate and solve mapping exception problems, and avoids the situation of crashing without prompts.
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Figure CN120523747A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of Hypervisor technology, and in particular to a system startup memory detection method, device, equipment and storage medium. Background Art
[0002] During the Jailhouse Hypervisor boot process, when the memory management unit (MMU) is enabled, a simple temporary page table is created to support memory access during the early initialization phase. This temporary page table is typically a three-level page table structure used to map virtual addresses to physical addresses. After initialization is complete, a continuous mapped address space is obtained.
[0003] During the hypervisor's startup phase, it pre-establishes a physical memory pool for dynamic allocation of physical page frames. Free physical pages are managed using a bitmap or linked list, ensuring rapid allocation of physical memory before the page table takes effect. Page table pages (such as those in multi-level page tables) are not allocated all at once but are allocated dynamically as needed. If an allocated memory page is not mapped, an error will occur, leading to a system crash without any error output, making troubleshooting difficult. Summary of the Invention
[0004] The embodiments of the present invention provide a system startup memory detection method, apparatus, device and storage medium to solve the technical problem in the prior art that faults caused by abnormal hypervisor mapping during the startup phase are difficult to troubleshoot.
[0005] In a first aspect, an embodiment of the present invention provides a system startup memory detection method, comprising: Before the final page table takes effect, the maximum value of the hypervisor's early virtual address mapping range is calculated based on the first address of the hypervisor operation; When allocating memory pages using the dynamic allocation pool, the base address of the allocated memory page is used to determine the virtual address range of the allocated memory page, and whether the virtual address range of the allocated memory page exceeds the maximum value of the early virtual address mapping range of the hypervisor; When the maximum value of the Hypervisor's early virtual address mapping range is exceeded, an error message is output and a memory error is returned.
[0006] In a second aspect, an embodiment of the present invention further provides a system startup memory detection device, comprising: A calculation module is used to calculate the maximum value of the early virtual address mapping range of the hypervisor based on the first address of the hypervisor operation before the final page table takes effect; a detection module, configured to determine a virtual address range of the allocated memory page using a base address of the allocated memory page when allocating the memory page using the dynamic allocation pool, and to detect whether the virtual address range of the allocated memory page exceeds a maximum value of an early virtual address mapping range of the hypervisor; The output module is used to output an error prompt and return a memory error when the maximum value of the early virtual address mapping range of the Hypervisor is exceeded.
[0007] In a third aspect, an embodiment of the present invention further provides a device for configuring a jailhouse hypervisor, including: one or more processors; a storage device for storing one or more programs, When the one or more programs are executed by the one or more processors, the one or more processors implement the system startup memory detection method as described in any one of the above embodiments.
[0008] In a fourth aspect, an embodiment of the present invention further provides a storage medium comprising computer executable instructions, which, when executed by a computer processor, are used to execute the system startup memory detection method provided in the above embodiment.
[0009] The system startup memory detection method, apparatus, device, and storage medium provided by the embodiments of the present invention calculate the maximum value of the hypervisor's early virtual address mapping range based on the first address of the hypervisor operation before the final page table takes effect. When allocating memory pages using the dynamic allocation pool, the base address of the allocated memory page is used to determine the allocated memory page virtual address range, and detect whether the allocated memory page virtual address range exceeds the maximum value of the hypervisor's early virtual address mapping range. If the maximum value of the hypervisor's early virtual address mapping range is exceeded, an error prompt is output and a memory error is returned. The maximum range value of the virtual address determined in the early mapping process can be calculated based on the characteristics of the hypervisor operation.
[0010] Because virtual addresses are continuous, the base address can be used to determine the virtual address range of a memory page. When allocating a new CPU, the system determines whether a memory error exists based on whether the allocated address falls within the memory page virtual address range. A specific prompt can be returned for this error. Compared to traditional estimation methods, this reduces the possibility of inaccurate estimations caused by changes in dynamic allocations. It can accurately detect memory errors before the system freezes, making it easier for developers to locate the cause of the freeze. BRIEF DESCRIPTION OF THE DRAWINGS
[0011] Other features, objects and advantages of the present invention will become more apparent upon reading the detailed description of non-limiting embodiments made with reference to the following drawings: Figure 1 This is a flowchart of a system startup memory detection method provided by Embodiment 1 of the present invention; Figure 2 1 is a flow chart of a system startup memory detection method provided in Embodiment 2 of the present invention; Figure 3 This is a schematic diagram of the jailhouse Hypervisor memory layout in the system startup memory detection method provided in the second embodiment of the present invention; Figure 4 This is a structural diagram of a system startup memory detection device provided by Embodiment 3 of the present invention; Figure 5 It is a structural diagram of the device provided in Example 4 of the present invention. DETAILED DESCRIPTION
[0012] The present invention will be further described in detail below with reference to the accompanying drawings and examples. It will be understood that the specific embodiments described herein are intended only to illustrate the present invention and are not intended to limit the present invention. It should also be noted that, for ease of description, the accompanying drawings only illustrate portions relevant to the present invention, not all structures.
[0013] Example 1 Figure 1 This is a flowchart of a system startup memory detection method provided in Embodiment 1 of the present invention. This embodiment is applicable to the case where a memory error is generated when a hypervisor allocates a memory page before the final page table takes effect. The method can be performed by a system startup memory detection device and specifically includes the following steps: Step 110: Before the final page table takes effect, the maximum value of the hypervisor's early virtual address mapping range is calculated based on the first address of the hypervisor operation.
[0014] Before the final page table takes effect, the hypervisor must go through Stage 2 to build and activate the page table. This stage implements the mapping between physical and virtual addresses. The final page table corresponds to the memory virtual page table allocated to each CPU.
[0015] In this embodiment, the first address of the Hypervisor operation can be obtained in the following manner: the first address of the Hypervisor temporary page table is read from the key register of the memory management. Optionally, the key register of the memory management can be the TTBR0_EL2 register. Furthermore, since the TTBR0_EL2 register stores the physical address of the temporary page table, it is necessary to convert the physical address of the temporary page table into a virtual address through the offset between the Hypervisor virtual address and the physical address, that is, to obtain the first address of the Hypervisor operation. After obtaining the first address, the maximum value of the Hypervisor early virtual address mapping range can be calculated based on the size of the early virtual address mapping space generated in the initial stage.
[0016] Step 120 : When allocating memory pages using the dynamic allocation pool, determine the virtual address range of the allocated memory pages using the base address of the allocated memory pages, and detect whether the virtual address range of the allocated memory pages exceeds the maximum value of the early virtual address mapping range of the hypervisor.
[0017] In this embodiment, the hypervisor abstracts physical memory into a shared memory pool for shared use by systems corresponding to multiple CPUs. This process involves sequentially allocating memory pages to each CPU. The page map used by the initially generated page allocation pool is modified based on the memory page allocation results. Therefore, the virtual address range of each CPU's allocated memory page can be determined based on the base address of the allocated memory page.
[0018] After each allocation, the virtual address range of the memory page to be allocated to each CPU can be compared with the maximum value of the hypervisor early virtual address mapping range obtained in the above step to determine whether it exceeds the maximum value of the hypervisor early virtual address mapping range.
[0019] Step 130: When the maximum value of the early virtual address mapping range of the Hypervisor is exceeded, an error prompt is output and a memory error is returned.
[0020] Based on the results of the above steps, if the allocation is within the specified range, memory page allocation for the next CPU is continued until all CPUs are allocated. If the allocation is exceeded, an error message is output and a memory error is returned in the program. This prevents system crashes without any warning. Developers can use the error message to accurately locate the error, facilitating subsequent adjustments and optimizations.
[0021] This embodiment calculates the maximum value of the hypervisor's early virtual address mapping range based on the first address of the hypervisor before the final page table takes effect. When allocating memory pages using the dynamic allocation pool, the base address of the allocated memory page is used to determine the allocated memory page virtual address range, and the allocated memory page virtual address range is detected to determine whether it exceeds the maximum value of the hypervisor's early virtual address mapping range. If the maximum value of the hypervisor's early virtual address mapping range is exceeded, an error prompt is output and a memory error is returned. Based on the characteristics of the hypervisor, the maximum range of virtual addresses determined during the early mapping process can be calculated. Because virtual addresses are continuous, the base address can be used to determine the memory page virtual address range. When allocating a new CPU, whether the allocated address is within the memory page virtual address range is determined to determine whether there is a memory error, and a specific prompt can be returned for this error. Compared with traditional estimation methods, this method reduces the possibility of inaccurate estimation caused by changes in dynamic allocation, and can accurately detect memory errors in advance before the system crashes, making it easier for developers to locate the cause of the crash.
[0022] Example 2 Figure 2 This is a flow chart of a system startup memory detection method provided by a second embodiment of the present invention. This embodiment is optimized based on the above embodiment, and the method may further include the following steps: reading the first address of the hypervisor temporary page table from a key register of memory management; searching the page table according to the first address of the hypervisor operation, and calculating the size of the address space continuously mapped below the first address; calculating the size of data used for early initialization of the hypervisor according to the jailhouse hypervisor memory layout, and determining whether the size of the data used for early initialization exceeds the size of the address space continuously mapped below the first address. If the size exceeds, returning a hypervisor initialization failure memory error.
[0023] See also Figure 2 , the system starts the memory detection method, including: Step 210: Read the first address of the Hypervisor temporary page table from the key register of the memory management.
[0024] During early initialization, the temporary page table also corresponds to a mapped virtual address space range. Due to the Jailhouse Hypervisor's memory layout, the memory required during early initialization is not fixed but rather determined by multiple dynamic factors, including: Hypervisor image size: This refers to the size of the hypervisor binary itself, which determines the space occupied by code and static data. Per-CPU variable size: Per-CPU variables are private copies of each CPU core, used to avoid lock contention when accessed by multiple cores. The total memory consumption of per-CPU variables is proportional to the number of CPU cores, as each core requires a separate copy of the data. Space is allocated from reserved memory during initialization, and increasing the number of variables and cores significantly increases this requirement. Number of CPU cores: The number of cores directly affects the total size of per-CPU variables and page table overhead. For example, more cores require more per-CPU copies and may increase the management burden of the page table hierarchy. Configuration file data size: Jailhouse configuration files (such as .cell files) define resource boundaries (such as memory regions and IOMMU units). This data is loaded into memory at boot time, occupying additional space. The size of the configuration file depends on the complexity of the virtual machine (VM), such as the defined physical start address, size, and permission settings.
[0025] If the virtual address space used by the hypervisor in the early initialization phase exceeds the temporary mapping limit of 2MB, the system will immediately crash abnormally (such as a hardware failure or an unhandled trap) without outputting any error message. This makes troubleshooting extremely difficult because developers cannot obtain the crash context (such as the specific address or error code), and the log only shows the initialization interrupt without detailed diagnosis. Traditional methods solve this problem by increasing the early virtual address mapping space, but this method is affected by the aforementioned factors (such as the number of CPU cores or the size of the configuration file) because the memory requirements change dynamically. Increasing the space is only a temporary relief, not a fundamental solution. Therefore, even if the mapping is expanded, the security of the early mapping cannot be guaranteed. Therefore, in this embodiment, it is also necessary to detect its memory and output error information in the event of an exception to facilitate developers to locate the cause of the crash.
[0026] For example, the first address of the Hypervisor temporary page table can be read from the TTBR0_EL2 register.
[0027] Step 220 : Search the page table according to the first address of the hypervisor, and calculate the size of the address space continuously mapped below the first address.
[0028] Exemplarily, the method may include: calculating an index value of a first-level page table mapped by the hypervisor according to the first address of the hypervisor, determining a first-level page table entry according to the index value of the first-level page table, and obtaining a second-level page table base address from the first-level page table entry; According to the first address of the hypervisor, the index value of the second-level page table mapped by the hypervisor is calculated. According to the second-level page table base address and the index value of the second-level page table, the second-level page table entry is determined. The third-level page table base address is obtained from the second-level page table entry. According to the first address of the hypervisor operation, the index value of the third-level page table mapped by the hypervisor is calculated, the third-level page table entry is determined according to the third-level page table base address and the index value of the third-level page table, and the size of the address space continuously mapped below the first address is determined according to the third-level page table entry.
[0029] Optionally, the index value of the first-level page table mapped by the Hypervisor can be calculated based on the first address of the Hypervisor operation, which is a virtual address specified by the Hypervisor during compilation. The index value can be the value of bit
[39] to bit
[47] of the virtual address. The first-level page table entry is obtained by adding the base address of the Hypervisor temporary page table to the index value of the first-level page table. This entry is the physical address of the base address of the second-level page table. Then, the physical address of the base address of the second-level page table is converted into a virtual address through the offset between the virtual address and the physical address of the Hypervisor. Then, based on the first address of the Hypervisor, calculate the index value of the second-level page table mapped by the Hypervisor, and the value of bits
[30] to
[38] of the virtual address. Add the base address of the second-level page table obtained in the above steps to the index value of the second-level page table to obtain the second-level page table entry, which is the physical address of the base address of the third-level page table. Then, through the offset between the virtual address and the physical address of the Hypervisor, convert the physical address of the base address of the third-level page table into a virtual address. Then, based on the first address of the hypervisor, calculate the index value of the third-level page table mapped by the hypervisor, and the values of bits
[21] to
[29] of the virtual address. The third-level page table entry is obtained by adding the base address of the third-level page table obtained in the above steps to the index value of the third-level page table. This entry is the first entry in the hypervisor address mapping, and the scope of this entry is 2MB.
[0030] Correspondingly, determining the size of the address space continuously mapped below the first address based on the third-level page table entry may include: reading the first entry of the third-level page table, judging whether there is a valid flag based on the flag bit in the first entry, and when there is a valid flag, marking the size of the continuously mapped address space as the initial set page space size; reading the next entry, judging whether there is a valid flag based on the flag bit in the next entry, and when there is a valid flag, marking the size of the continuously mapped space as twice the initial set page space size, otherwise, marking the size of the continuously mapped address space as the size of the continuously mapped address space marked by the last entry; returning to the step of reading the next entry until there is no valid flag in the flag bit.
[0031] The Hypervisor temporary page table is a three-level page table, and the memory used for early Hypervisor initialization only creates block type entries on the third-level page table. Therefore, only the entries on the third-level page table need to be retrieved to calculate the address mapping space size.
[0032] If bit[0] of the page table entry is 1, it means the entry is valid; if bit[0] is 0, it means the page table is invalid; if bit[1] of the page table entry is 1, it means the entry contains the base address pointing to the next level page table; if bit[1] is 0, it means the entry is a block type. The memory block size of the third-level page table is 2MB.
[0033] Read the first entry in the hypervisor address mapping three-level page table and determine whether bits [0] and [1] are 1 and 0, respectively, to determine whether it is a valid block type entry. If it is a valid block type entry, the address mapping space size is 2MB. Read the second entry in the hypervisor address mapping three-level page table and determine whether it is a valid block type entry. If it is an invalid entry, the hypervisor address mapping space size is 2MB; if it is a valid block type entry, the hypervisor address mapping space size increases by 2MB. If the second entry in the hypervisor address mapping three-level page table is a valid block type entry, continue searching subsequent entries until an invalid entry is found. At this point, the number of valid block type entries is N, and the total size of the hypervisor address mapping space is 2NMB. Using this method, we can determine that the size of the hypervisor's early virtual address mapping space is 2N (N is greater than or equal to 1) MB.
[0034] Step 230 , based on the jailhouse Hypervisor memory layout, calculate the size of the data used for early initialization of the Hypervisor, and determine whether the size of the data used for early initialization exceeds the size of the address space continuously mapped below the first address. If so, return a Hypervisor initialization failure memory error.
[0035] Figure 3 This is a schematic diagram of the jailhouse Hypervisor memory layout in the system startup memory detection method provided by the second embodiment of the present invention, see Figure 3 Calculate the data size occupied by the hypervisor image, PerCPU variables, configuration file data, and the page allocation pool usage bitmap. For example, the hypervisor image size can be calculated based on compiled linker symbols; the PerCPU variable size can be calculated using the PerCPU variable data structure size and the maximum number of CPUs; and the configuration file data size can be calculated based on the parsed configuration file data structure. The page allocation pool usage bitmap size is calculated by dividing the number of memory pages (4KB) by the number of bits per page (4KB * 8). Alternatively, the hypervisor image size can be calculated by the difference between the image end position symbol and the image start address symbol defined in the compiled linker file. Since the PerCPU variable data structure size is relatively fixed, the total memory required per CPU can be determined from the PerCPU variable data structure size and the CPU data. For the configuration file, the initial data structure is fixed and describes the number of variable configurations, allowing calculation of the configuration file data size. The memory managed by the page allocation pool usage bitmap includes the total memory allocated to the hypervisor minus the size of the hypervisor image. The total hypervisor memory size can be obtained from the configuration file. The memory managed by the page allocation pool bitmap is divided by the number of bits per page (4k*8) to obtain the page allocation pool bitmap memory size.
[0036] By using the above method, a memory error can be detected during the initialization of the Hypervisor, and corresponding memory error information can be returned.
[0037] Step 240: Before the final page table takes effect, the maximum value of the hypervisor's early virtual address mapping range is calculated based on the first address of the hypervisor operation.
[0038] Step 250: When allocating a memory page using the dynamic allocation pool, determine the virtual address range of the allocated memory page using the base address of the allocated memory page, and detect whether the virtual address range of the allocated memory page exceeds the maximum value of the early virtual address mapping range of the hypervisor.
[0039] Step 260: When the maximum value of the early virtual address mapping range of the Hypervisor is exceeded, an error prompt is output and a memory error is returned.
[0040] This embodiment adds the following steps: reading the first address of the hypervisor temporary page table from a key register of memory management; searching the page table based on the first address of the hypervisor operation and calculating the size of the address space continuously mapped below the first address; calculating the size of the data used for early initialization of the hypervisor based on the jailhouse hypervisor memory layout, and determining whether the size of the data used for early initialization exceeds the size of the address space continuously mapped below the first address. If so, a hypervisor initialization failure memory error is returned. This allows for dynamic detection of the virtual address range of the allocated memory page during early virtual address mapping, accurately determining whether it exceeds the hypervisor's early virtual address mapping range using a three-level page table, and outputting an error message when the maximum value of the hypervisor's early virtual address mapping range is exceeded, making it easier for developers to locate the cause of the crash.
[0041] Example 3 Figure 4 This is a schematic diagram of the structure of the system startup memory detection device provided by the third embodiment of the present invention, see Figure 4 , the system starts the memory detection device, including: The calculation module 310 is used to calculate the maximum value of the early virtual address mapping range of the hypervisor according to the first address of the hypervisor operation before the final page table takes effect; A detection module 320 is configured to determine a virtual address range of the allocated memory page using a base address of the allocated memory page when allocating the memory page using the dynamic allocation pool, and to detect whether the virtual address range of the allocated memory page exceeds a maximum value of an early virtual address mapping range of the hypervisor; The output module 330 is configured to output an error prompt and return a memory error when the maximum value of the early virtual address mapping range of the Hypervisor is exceeded.
[0042] The system startup memory detection device provided in this embodiment calculates the maximum value of the hypervisor's early virtual address mapping range based on the first address of the hypervisor before the final page table takes effect; when allocating memory pages using the dynamic allocation pool, the allocated memory page virtual address range is determined using the base address of the allocated memory page, and the allocated memory page virtual address range is detected to see whether it exceeds the maximum value of the hypervisor's early virtual address mapping range; when it exceeds the maximum value of the hypervisor's early virtual address mapping range, an error prompt is output and a memory error is returned. The device can calculate the maximum range of virtual addresses determined in the early mapping process based on the characteristics of the hypervisor, use the continuity of virtual addresses, and then use the base address to determine the memory page virtual address range. When allocating a new CPU, it determines whether the memory is incorrect based on whether the allocated address is within the memory page virtual address range, and can return a specific prompt for the error. Compared with traditional estimation methods, the device reduces the possibility of inaccurate estimation caused by changes in dynamic allocation, and can accurately detect memory errors in advance before the system crashes, making it easier for developers to locate the cause of the crash.
[0043] Based on the above embodiments, the device further includes: The read module is used to read the first address of the Hypervisor temporary page table from the key register of memory management; The address space size calculation module is used to retrieve the page table according to the first address of the Hypervisor operation and calculate the size of the address space continuously mapped below the first address.
[0044] Based on the above embodiments, the calculation module includes: The second-level page table base address obtaining unit is used to calculate the index value of the first-level page table mapped by the hypervisor according to the first address of the hypervisor operation, determine the first-level page table entry according to the index value of the first-level page table, and obtain the second-level page table base address from the first-level page table entry; A third-level page table base address obtaining unit is used to calculate the index value of the second-level page table mapped by the hypervisor according to the first address of the hypervisor operation, determine the second-level page table entry according to the second-level page table base address and the index value of the second-level page table, and obtain the third-level page table base address from the second-level page table entry; The unit for obtaining the size of the continuously mapped address space is used to calculate the index value of the third-level page table mapped by the hypervisor based on the first address of the hypervisor operation, determine the third-level page table entry based on the third-level page table base address and the index value of the third-level page table, and determine the size of the address space continuously mapped below the first address based on the third-level page table entry.
[0045] Based on the above embodiments, the unit for obtaining the size of the continuously mapped address space includes: a first determination subunit, configured to read a first table entry of the third-level page table, determine whether a valid flag exists according to a flag bit in the first table entry, and if a valid flag exists, mark the size of the continuously mapped address space as the initial set page space size; a second judgment subunit, configured to read the next table entry, and determine whether a valid flag is present according to a flag bit in the next table entry; if a valid flag is present, marking the size of the continuously mapped address space as twice the initial set page space size; otherwise, marking the size of the continuously mapped address space as the size of the continuously mapped address space marked by the previous table entry; The return subunit is used to return to the step of reading the next table entry until there is no valid flag in the flag bit.
[0046] Based on the above embodiments, the device further includes: The initial failure memory error return module is used to calculate the data size used for early initialization of the hypervisor based on the jailhouse hypervisor memory layout, and determine whether the data size used for early initialization exceeds the size of the address space continuously mapped below the first address. If it exceeds, it returns a hypervisor initial failure memory error.
[0047] Based on the above embodiments, the initial failure memory error return module includes: The data calculation unit is used to calculate the data size occupied by the hypervisor image size, PerCPU variables, configuration file data, and page allocation pool usage bitmap based on the jailhouse hypervisor memory layout.
[0048] Based on the above embodiments, the usage data calculation unit is used to: Calculate the size of the Hypervisor image based on the compiled link symbols; Calculate the PerCPU variable size using the PerCPU variable data structure size and the maximum number of CPUs; Calculate the configuration file data size based on the parsed configuration file data structure; The size of the bitmap used by the page allocation pool is obtained by dividing the number of memory pages (4k) by the number of bits per page (4k*8).
[0049] The system startup memory detection device provided by the embodiment of the present invention can execute the system startup memory detection method provided by any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of the execution method.
[0050] Example 4 Figure 5 This is a structural diagram of a device configured with a Jailhouse Hypervisor provided in the fourth embodiment of the present invention. Figure 5 A block diagram of an exemplary device 12 suitable for use in implementing embodiments of the present invention is shown. Figure 5 The device 12 shown is only an example and should not bring any limitation to the functionality and scope of use of the embodiments of the present invention.
[0051] like Figure 5 As shown, device 12 is implemented as a general-purpose computing device. Components of device 12 may include, but are not limited to, one or more processors or processing units 16, a system memory 28, and a bus 18 that connects various system components (including system memory 28 and processing unit 16).
[0052] Bus 18 represents one or more of several types of bus structures, including a memory bus or memory controller, a peripheral bus, an accelerated graphics port, a processor, or a local bus using any of a variety of bus architectures. Examples of these architectures include, but are not limited to, an Industry Standard Architecture (ISA) bus, a Micro Channel Architecture (MAC) bus, an Enhanced ISA bus, a Video Electronics Standards Association (VESA) local bus, and a Peripheral Component Interconnect (PCI) bus.
[0053] Device 12 typically includes a variety of computer system readable media. These media can be any available media that can be accessed by device 12, including volatile and non-volatile media, removable and non-removable media.
[0054] System memory 28 may include computer system readable media in the form of volatile memory, such as random access memory (RAM) 30 and / or cache 32. Device 12 may further include other removable / non-removable, volatile / non-volatile computer system storage media. By way of example only, storage system 34 may be configured to read and write non-removable, non-volatile magnetic media ( Figure 5 Not shown, usually called a "hard drive"). Although Figure 5 Although not shown, a magnetic disk drive for reading and writing to a removable non-volatile magnetic disk (e.g., a "floppy disk"), as well as an optical disk drive for reading and writing to a removable non-volatile optical disk (e.g., a CD-ROM, DVD-ROM, or other optical media) may be provided. In these cases, each drive may be connected to bus 18 via one or more data media interfaces. Memory 28 may include at least one program product having a set (e.g., at least one) of program modules configured to perform the functions of various embodiments of the present invention.
[0055] A program / utility 40 having a set (at least one) of program modules 42 may be stored, for example, in memory 28. Such program modules 42 include, but are not limited to, an operating system, one or more application programs, other program modules, and program data, each of which, or some combination thereof, may include an implementation of a network environment. Program modules 42 generally implement the functions and / or methodologies of the embodiments described herein.
[0056] Device 12 may also communicate with one or more external devices 14 (e.g., a keyboard, pointing device, display 24, etc.), one or more devices that enable a user to interact with device 12, and / or any device that enables device 12 to communicate with one or more other computing devices (e.g., a network card, a modem, etc.). This communication may occur via input / output (I / O) interface 22. Furthermore, device 12 may communicate with one or more networks (e.g., a local area network (LAN), a wide area network (WAN), and / or a public network such as the Internet) via network adapter 20. As shown, network adapter 20 communicates with other modules of device 12 via bus 18. It should be understood that, although not shown, other hardware and / or software modules may be used in conjunction with device 12, including but not limited to microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems.
[0057] The processing unit 16 executes various functional applications and data processing by running programs stored in the system memory 28, such as implementing the system startup memory detection method provided by the embodiment of the present invention.
[0058] Example 5 The fifth embodiment of the present invention further provides a storage medium containing computer-executable instructions, which, when executed by a computer processor, are used to execute any of the system startup memory detection methods provided in the above embodiments.
[0059] The computer storage medium of the embodiments of the present invention may adopt any combination of one or more computer-readable media. The computer-readable medium may be a computer-readable signal medium or a computer-readable storage medium. The computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or device, or any combination thereof. More specific examples (a non-exhaustive list) of computer-readable storage media include: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof. In this document, a computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, device, or device.
[0060] A computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, which carries computer-readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. A computer-readable signal medium may also be any computer-readable medium other than a computer-readable storage medium that can transmit, propagate, or transport a program for use by or in conjunction with an instruction execution system, apparatus, or device.
[0061] Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.
[0062] Computer program code for performing the operations of the present invention may be written in one or more programming languages, or a combination thereof, including object-oriented programming languages such as Java, Smalltalk, C++, and conventional procedural programming languages such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a stand-alone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or device. In cases involving a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., through the Internet using an Internet service provider).
[0063] Note that the above are only preferred embodiments of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments, and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments and may include many other equivalent embodiments without departing from the concept of the present invention. The scope of the present invention is determined by the scope of the appended claims.
Claims
1. A system startup memory detection method, characterized in that: include: Before the final page table takes effect, the maximum value of the hypervisor's early virtual address mapping range is calculated based on the first address of the hypervisor operation; When allocating memory pages using the dynamic allocation pool, the base address of the allocated memory page is used to determine the virtual address range of the allocated memory page, and whether the virtual address range of the allocated memory page exceeds the maximum value of the early virtual address mapping range of the hypervisor; When the maximum value of the Hypervisor's early virtual address mapping range is exceeded, an error message is output and a memory error is returned.
2. The method according to claim 1, characterized in that The method further comprises: Read the first address of the Hypervisor temporary page table from the key register of memory management; The page table is retrieved according to the first address of the hypervisor, and the size of the address space continuously mapped below the first address is calculated.
3. The method according to claim 2, characterized in that The step of searching a page table according to a first address of the hypervisor and calculating a size of an address space continuously mapped below the first address includes: According to the first address of the hypervisor, the index value of the first-level page table mapped by the hypervisor is calculated, the first-level page table entry is determined according to the index value of the first-level page table, and the base address of the second-level page table is obtained from the first-level page table entry; According to the first address of the hypervisor, the index value of the second-level page table mapped by the hypervisor is calculated. According to the second-level page table base address and the index value of the second-level page table, the second-level page table entry is determined. The third-level page table base address is obtained from the second-level page table entry. According to the first address of the hypervisor operation, the index value of the third-level page table mapped by the hypervisor is calculated, the third-level page table entry is determined according to the third-level page table base address and the index value of the third-level page table, and the size of the address space continuously mapped below the first address is determined according to the third-level page table entry.
4. The method according to claim 3, characterized in that The determining the size of the address space continuously mapped below the first address according to the third-level page table entry includes: Read the first table entry of the third-level page table, determine whether there is a valid flag according to the flag bit in the first table entry, and if there is a valid flag, mark the size of the continuously mapped address space as the initial set page space size; Read the next table entry, and determine whether there is a valid flag based on the flag bit in the next table entry. If there is a valid flag, mark the size of the continuously mapped space as twice the initial set page space size; otherwise, mark the size of the continuously mapped address space as the size of the continuously mapped address space marked by the previous table entry; Return to the step of reading the next table entry until there is no valid flag in the flag bit.
5. The method according to claim 4, characterized in that The method further comprises: Based on the jailhouse Hypervisor memory layout, the size of the data used for early Hypervisor initialization is calculated. It is determined whether the size of the data used for early initialization exceeds the size of the address space continuously mapped below the first address. If it exceeds, a Hypervisor initialization failure memory error is returned.
6. The method according to claim 5, characterized in that The calculation of the data size used for early initialization of the Hypervisor based on the jailhouse Hypervisor memory layout includes: Based on the jailhouse Hypervisor memory layout, calculate the data size occupied by the Hypervisor image, PerCPU variables, profile data, and page allocation pool usage bitmap.
7. The method according to claim 6, characterized in that The calculation of the hypervisor image size, PerCPU variables, configuration file data, and the data size occupied by the page allocation pool bitmap includes: Calculate the size of the Hypervisor image based on the compiled link symbols; Calculate the PerCPU variable size using the PerCPU variable data structure size and the maximum number of CPUs; Calculate the configuration file data size based on the parsed configuration file data structure; The page allocation pool bitmap size is calculated using the number of memory pages and the number of bits per page.
8. A system startup memory detection device, characterized in that: include: A calculation module is used to calculate the maximum value of the early virtual address mapping range of the hypervisor based on the first address of the hypervisor operation before the final page table takes effect; a detection module, configured to determine a virtual address range of the allocated memory page using a base address of the allocated memory page when allocating the memory page using the dynamic allocation pool, and to detect whether the virtual address range of the allocated memory page exceeds a maximum value of an early virtual address mapping range of the hypervisor; The output module is used to output an error prompt and return a memory error when the maximum value of the early virtual address mapping range of the Hypervisor is exceeded.
9. A device configured with a jailhouse hypervisor, characterized in that: include: one or more processors; a storage device for storing one or more programs, When the one or more programs are executed by the one or more processors, the one or more processors implement the system startup memory detection method as described in any one of claims 1 to 7.
10. A storage medium containing computer-executable instructions, characterized in that: When executed by a computer processor, the computer executable instructions are used to execute the system startup memory detection method according to any one of claims 1 to 7.
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