Combined broadband chip capacitor with adjustable capacity and preparation method thereof

Abstract

The invention discloses a combined broadband chip capacitor with adjustable capacity and a preparation method thereof, the combined broadband chip capacitor comprises a dielectric ceramic body, an inner electrode is printed on the dielectric ceramic body, and the inner electrode extends to the middle part from one side of the dielectric ceramic body; the bottom end of the dielectric ceramic body is provided with a lower electrode, and the top end is provided with a first upper electrode and a second upper electrode. The first upper electrode, the inner electrode and the lower electrode form a first capacitor, the second upper electrode and the lower electrode form a second capacitor, and the first capacitor and the second capacitor form a combined broadband chip capacitor. The circuit access mode of the capacitor comprises the following steps of: randomly selecting one capacitor from the first capacitor and the second capacitor to access the circuit, and switching the other capacitor and adjusting the capacitance value according to the circuit requirement; or the first capacitor and the second capacitor are connected to the circuit at the same time after being bonded and combined through gold wires; or the circuit is accessed in a mode of leading in the first upper electrode and leading out the second upper electrode. According to the invention, the parasitic inductance is small, the use frequency is wide, and large capacitance and adjustable capacity can be realized.

Description

Technical Field

[0001] The present invention relates to the technical field of broadband chip capacitors, and in particular to a combined broadband chip capacitor with adjustable capacitance and a preparation method thereof. Background Art

[0002] Chip ceramic capacitors have upper and lower electrodes and gold terminals on the surface. They have stable electrical properties and excellent high-frequency performance, which can meet the requirements of microwave and millimeter-wave frequency band electronic circuits. They are used in microwave integrated circuits (MICs) for DC isolation, bypass, coupling, tuning, impedance matching, and coplanar waveguide functions.

[0003] Patent document with publication number CN208271745U discloses a broadband chip capacitor including a dielectric body, end electrodes, and multiple internal electrode groups. However, this type of broadband chip capacitor has a multi-layer structure and contains multiple metal internal electrodes, which has a high parasitic inductance and limits its frequency range of use. Patent document with publication number CN1832067 A discloses a surface-mount broadband microwave single-layer chip capacitor and its manufacturing method. It mainly divides the lower electrode into two electrodes, is suitable for SMT assembly technology, and reduces the parasitic inductance caused by the bonding wire. However, due to the structural strength requirements of the capacitor itself, the effective dielectric thickness of this type of capacitor is relatively thick, which cannot achieve a larger capacitance value and cannot meet the application requirements of lower frequency bands.

[0004] In view of this, this application is hereby filed. Summary of the Invention

[0005] The technical problem to be solved by the present invention is that existing broadband chip capacitors have problems such as large parasitic inductance, narrow operating frequency, relatively thick effective dielectric thickness, inability to achieve large capacitance, and non-adjustable capacitance. The purpose of the present invention is to provide a combined broadband chip capacitor with adjustable capacitance and a preparation method thereof. The present invention adopts a single-layer chip structure as a whole, with small parasitic inductance, high structural strength, and wider operating frequency; two capacitors are combined together, one of which adopts an embedded electrode design to achieve a larger capacitance value through a thinner effective dielectric and a larger electrode facing area; the other capacitor does not have a buried electrode design, has a thicker effective dielectric thickness, a smaller electrode facing area, and a smaller capacitance value; and during application, the capacitance value can also be easily adjusted.

[0006] The present invention is achieved through the following technical solutions:

[0007] In a first aspect, the present invention provides a combined broadband chip capacitor with adjustable capacitance. The combined broadband chip capacitor includes a dielectric ceramic body having an inner electrode printed thereon, the inner electrode extending from one side of the dielectric ceramic body to the middle thereof; a lower electrode is provided at the bottom end of the dielectric ceramic body, and a first upper electrode and a second upper electrode are provided at the top end of the dielectric ceramic body. The inner electrode is connected to the first upper electrode at a side edge, and an insulating material is provided on the side edge of the dielectric ceramic body adjacent to the first upper electrode.

[0008] The first upper electrode, the inner electrode and the lower electrode form a first capacitor, and the second upper electrode and the lower electrode form a second capacitor; the first capacitor and the second capacitor form a combined broadband chip capacitor.

[0009] Furthermore, the first capacitor is used as a capacitor with a large capacitance value; and the second capacitor is used as a capacitor with a small capacitance value.

[0010] Furthermore, the circuit connection method of the combined broadband chip capacitor is as follows:

[0011] One of the first capacitor and the second capacitor is selected to be connected to the circuit, and the other capacitor is switched and its capacitance is adjusted according to circuit requirements.

[0012] Furthermore, the circuit connection method of the combined broadband chip capacitor is as follows:

[0013] The first capacitor and the second capacitor are connected in parallel through gold wire bonding and then connected to the circuit at the same time.

[0014] Furthermore, the circuit connection method of the combined broadband chip capacitor is as follows:

[0015] The circuit is connected by leading in the first upper electrode and leading out the second upper electrode.

[0016] Furthermore, the capacitance value of the first capacitor is achieved by changing the distance between the inner electrode and the lower electrode or by changing the size of the inner electrode.

[0017] Furthermore, the capacitance value of the second capacitor is achieved by changing the number of blank ceramic diaphragms between the inner electrode and the first upper electrode or by changing the size of the surface electrode of the second capacitor.

[0018] In a second aspect, the present invention further provides a method for preparing a combined broadband chip capacitor with adjustable capacitance, the method comprising:

[0019] preparing a blank ceramic diaphragm and printing an inner electrode on the blank ceramic diaphragm;

[0020] The ceramic substrate is obtained by preparing a green ceramic substrate and a cooked ceramic substrate;

[0021] A first slot is formed on the upper surface of the ceramic substrate to obtain a first slot; and the depth of the first slot is greater than the distance from the surface of the ceramic substrate to the inner electrode;

[0022] The upper and lower terminal electrode materials are coated on the surface of the ceramic substrate after the first slotting to form a gold sheet; and the terminal electrode material is also coated inside the first slot;

[0023] Performing a second slotting operation in the first slot to obtain a second slot; wherein the depth of the second slot is greater than the thickness of the end electrode in the second slot;

[0024] After the second slotting, the upper surface of the gold sheet is coated with insulating material by screen printing or glue coating process and then cured; and the inner walls of the first slot hole and the second slot hole on the upper surface of the ceramic substrate are also coated with insulating material;

[0025] Using a photolithography process or a plasma cleaning process to remove excess insulating material on the surface of the gold sheet, leaving only the insulating material inside the first slot, the second slot, and the top edge of the slot for adhering to the surface of the gold layer;

[0026] The end electrode on the upper surface of the gold sheet is divided into a plurality of end electrodes of different sizes by photolithography using a photolithography mask, thereby obtaining a gold sheet with patterned surface electrodes;

[0027] The gold sheet with patterned surface electrodes is cut into the required combination of broadband chip capacitor products with optional capacitance.

[0028] Furthermore, an inner electrode is printed on the blank ceramic diaphragm, comprising:

[0029] N inner electrodes of the same size are printed on a blank ceramic diaphragm, where n≥1; different blank gaps are present between different inner electrodes according to different designs.

[0030] Furthermore, preparing a ceramic substrate green body includes:

[0031] Lay together several blank ceramic diaphragms and one ceramic diaphragm printed with an inner electrode, with the ceramic diaphragm printed with the inner electrode between any two blank ceramic diaphragms;

[0032] According to the requirements of the capacitor capacitance, the position of the ceramic diaphragm printed with the inner electrode inside the ceramic substrate green body is adjusted, that is, the effective distance between the inner electrode and the upper and lower electrodes is adjusted;

[0033] According to the selection requirements of the capacitor thickness, the number of blank ceramic diaphragms above or below the inner electrode can be increased or decreased at will;

[0034] The method comprises preparing a ceramic substrate green body, comprising:

[0035] The ceramic substrate green body is prepared into a ceramic substrate containing a single internal electrode through processes such as debonding, high-temperature sintering, surface grinding and polishing.

[0036] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0037] 1. The present invention discloses a combined broadband chip capacitor with adjustable capacity, upper and lower electrodes, and a single-layer chip structure. The capacitor has small parasitic inductance, high structural strength, and a wider operating frequency.

[0038] 2. The present invention provides a combined broadband chip capacitor with adjustable capacitance, which combines two capacitors together, wherein one capacitor (i.e., the first capacitor) adopts an embedded electrode design to achieve a larger capacitance value through a thinner effective dielectric and a larger electrode facing area; the other capacitor (i.e., the second capacitor) does not have an embedded electrode design, has a thicker effective dielectric thickness, a smaller electrode facing area, and an even smaller capacitance value.

[0039] 3. In the application process of the combined broadband chip capacitor with adjustable capacitance of the present invention, one of the capacitors can be selected to be connected to the circuit, and the capacitor can be replaced and the capacitance value adjusted according to the circuit requirements; or two capacitors with different capacitance values ​​can be connected to the circuit at the same time by gold wire bonding, which not only reduces the number of capacitors to be installed, but also reduces the installation space and cost. At the same time, the two capacitors with different capacitance values ​​can be used in parallel, which has a wider operating frequency range; or the first upper electrode is introduced and the second upper electrode is led out to realize coplanar waveguide, which is suitable for planar package type access circuit.

[0040] 4. The present invention provides a method for preparing a combined broadband chip capacitor with adjustable capacitance. During the preparation process, the capacitance of a large-capacitance capacitor can be adjusted by changing the distance between the embedded electrode (i.e., inner electrode) and the lower electrode or the size of the embedded electrode. The capacitance of a small-capacitance capacitor can be adjusted by changing the number of blank ceramic diaphragms between the embedded electrode (i.e., inner electrode) and the first upper electrode or the size of the surface electrode of the small capacitor. This function allows the capacitor's capacitance to be arbitrarily adjusted according to the actual application requirements of the circuit while maintaining the capacitor's package size, thereby improving the high integration of the circuit board. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] The drawings described herein are used to provide a further understanding of the embodiments of the present invention, constitute a part of this application, and do not constitute a limitation of the embodiments of the present invention. In the drawings:

[0042] Figure 1 A cross-sectional view of a combined broadband chip capacitor with adjustable capacitance according to the present invention;

[0043] Figure 2 This is a schematic structural diagram of a combined broadband chip capacitor with adjustable capacitance according to the present invention;

[0044] Figure 3 Schematic diagram of a ceramic diaphragm printed with inner electrode slurry according to the present invention;

[0045] Figure 4 The present invention is a schematic flow chart of a method for preparing a combined broadband chip capacitor with adjustable capacitance.

[0046] Reference numerals and corresponding component names:

[0047] 1- dielectric porcelain body; 2- inner electrode; 3- lower electrode; 41- first upper electrode; 42- second upper electrode; 5- insulating material. DETAILED DESCRIPTION

[0048] Hereinafter, the terms "include" or "may include" used in various embodiments of the present invention indicate the presence of the invented function, operation or element, and do not limit the addition of one or more functions, operations or elements. In addition, as used in various embodiments of the present invention, the terms "include", "have" and their cognates are intended only to indicate specific features, numbers, steps, operations, elements, components or combinations of the foregoing, and should not be understood as excluding the presence of one or more other features, numbers, steps, operations, elements, components or combinations of the foregoing or the possibility of adding one or more features, numbers, steps, operations, elements, components or combinations of the foregoing.

[0049] In various embodiments of the present invention, the expression "or" or "at least one of A or / and B" includes any or all combinations of the words listed simultaneously. For example, the expression "A or B" or "at least one of A or / and B" may include A, may include B, or may include both A and B.

[0050] The expressions (such as "first", "second", etc.) used in the various embodiments of the present invention may modify the various constituent elements in the various embodiments, but may not limit the corresponding constituent elements. For example, the above expressions do not limit the order and / or importance of the elements. The above expressions are only used to distinguish one element from other elements. For example, a first user device and a second user device indicate different user devices, although both are user devices. For example, without departing from the scope of the various embodiments of the present invention, a first element may be referred to as a second element, and similarly, a second element may also be referred to as a first element.

[0051] It should be noted that when a component is described as being “connected” to another component, the first component may be directly connected to the second component, and a third component may be “connected” between the first and second components. Conversely, when a component is described as being “directly connected” to another component, it can be understood that there is no third component between the first and second components.

[0052] The terms used in various embodiments of the present invention are only used to describe the purpose of specific embodiments and are not intended to limit the various embodiments of the present invention. As used herein, the singular form is intended to also include the plural form, unless the context clearly indicates otherwise. Unless otherwise limited, all terms used here (including technical terms and scientific terms) have the same meaning as those of ordinary skill in the art generally understood by the various embodiments of the present invention. The terms (such as those defined in generally used dictionaries) will be interpreted as having the same meaning as the contextual meaning in the relevant technical field and will not be interpreted as having idealized meaning or too formal meaning, unless clearly defined in various embodiments of the present invention.

[0053] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with examples and drawings. The exemplary embodiments of the present invention and their descriptions are only used to explain the present invention and are not intended to limit the present invention.

[0054] Example 1

[0055] like Figures 1 to 2 As shown, the present invention provides a combined broadband chip capacitor with adjustable capacitance. The combined broadband chip capacitor includes a dielectric porcelain body 1, on which an inner electrode 2 is printed. The inner electrode 2 extends from one side to the middle of the dielectric porcelain body 1. A lower electrode 3 is provided at the bottom end of the dielectric porcelain body 1, and a first upper electrode 41 and a second upper electrode 42 are provided at the top end of the dielectric porcelain body 1. The inner electrode 2 is connected to the first upper electrode 41 at the side, and an insulating material 5 is provided on the side of the dielectric porcelain body 1 near the first upper electrode 41.

[0056] The first upper electrode 41, the inner electrode 2 and the lower electrode 3 form a first capacitor, and the second upper electrode 42 and the lower electrode 3 form a second capacitor; the first capacitor serves as a large capacitance capacitor, and the second capacitor serves as a small capacitance capacitor; the first capacitor and the second capacitor constitute a combined broadband chip capacitor.

[0057] In this embodiment, the dielectric ceramic body 1 is a blank ceramic diaphragm, and its main component is any one of Class I and Class II dielectric ceramics or high dielectric constant grain boundary layer dielectric ceramics in the national standard GB / T 5596-1996.

[0058] In this embodiment, the dielectric ceramic body 1 is printed with an internal electrode 2, i.e., a ceramic diaphragm printed with an internal electrode, which refers to printing a metal paste including but not limited to Ag, Ni or Cu in a specific area on the blank ceramic diaphragm.

[0059] In this embodiment, the upper and lower end electrodes (first upper electrode 41, second upper electrode 42, lower electrode 3) include bottom metal and surface metal, the bottom metal component includes one or more of Ni, NiCr, TiW, Ti, Pt, etc., and the surface metal component is Au.

[0060] In this embodiment, the insulating material 5 on the side includes but is not limited to insulating materials such as solder resist ink and polyimide.

[0061] In this embodiment, the circuit connection methods of the combined broadband chip capacitor during application include the following three methods:

[0062] (1) Select one of the first capacitor and the second capacitor to connect to the circuit, and switch and adjust the capacitance of the other capacitor according to circuit requirements.

[0063] (2) The first capacitor and the second capacitor are connected in parallel through gold wire bonding and then connected to the circuit at the same time, which not only reduces the number of capacitors to be installed, reduces the installation space and cost, but also has a wider operating frequency range when two capacitors of different capacitance values ​​are used in parallel.

[0064] (3) The circuit is connected by the first upper electrode 41 and the second upper electrode 42, which can realize coplanar waveguide and is suitable for planar package type access circuit.

[0065] In this embodiment, during the preparation process, the capacitance value of the first capacitor is achieved by changing the distance between the inner electrode 2 and the lower electrode 3 or by changing the size of the inner electrode 2 .

[0066] In this embodiment, during the preparation process, the capacitance value of the second capacitor is achieved by changing the number of blank ceramic diaphragms between the inner electrode 2 and the first upper electrode 41 or by changing the size of the surface electrode of the second capacitor.

[0067] Example 2

[0068] like Figure 3 and 4 As shown, the difference between this embodiment and embodiment 1 is that this embodiment provides a method for preparing a combined broadband chip capacitor with adjustable capacitance, as shown in FIG. Figure 4 As shown, the preparation method comprises:

[0069] (1) Preparation of blank ceramic diaphragms

[0070] The preparation method of the blank ceramic diaphragm includes slurry preparation and diaphragm casting.

[0071] Specifically, slurry preparation refers to the process of mixing ceramic powder, organic solvent, etc. in a certain proportion and achieving uniform mixing through mechanical stirring.

[0072] Specifically, diaphragm casting refers to using a high-precision casting machine to prepare the above-mentioned prepared slurry into a blank ceramic diaphragm of a certain thickness and width. The thickness of the blank ceramic diaphragm ranges from 1μm to 100μm, and the width of the blank ceramic diaphragm ranges from 50mm to 500mm.

[0073] Furthermore, the blank ceramic diaphragm is cut into diaphragms with a length and width of 50 mm to 500 mm.

[0074] (2) Internal electrode printing, i.e. printing the internal electrode on a blank ceramic diaphragm

[0075] Internal electrode printing refers to printing the internal electrode slurry on a local area of ​​the blank ceramic diaphragm prepared above using a printing device. Figure 3 .

[0076] In this embodiment, n inner electrodes of the same size are printed on a blank ceramic diaphragm, where n≥1; and different blank gaps are provided between different inner electrodes according to different designs.

[0077] (3) Preparation of ceramic substrate (i.e., dielectric ceramic body 1)

[0078] Ceramic substrate preparation includes ceramic substrate green body preparation and ceramic substrate cooked body preparation;

[0079] Specifically, the preparation of the ceramic substrate green body refers to laminating n (n≥2) blank ceramic diaphragms and one ceramic diaphragm printed with an inner electrode, with the ceramic diaphragm printed with an inner electrode between any two blank ceramic diaphragms;

[0080] Among them, according to the selection requirements of the capacitor capacitance, the position of the ceramic diaphragm with the inner electrode printed thereon inside the ceramic substrate green body can be adjusted, that is, the effective distance between the inner electrode and the upper and lower electrodes can be adjusted;

[0081] According to the selection requirements of the capacitor thickness, the number of blank ceramic diaphragms above or below the inner electrode can be arbitrarily increased or decreased.

[0082] Specifically, the preparation of the ceramic substrate green body refers to subjecting the above-prepared ceramic substrate green body to processes such as debonding, high-temperature sintering, surface grinding and polishing to prepare a ceramic substrate containing a single internal electrode.

[0083] (4) First groove on the upper surface of the ceramic substrate

[0084] Specifically, the first grooving of the upper surface of the ceramic substrate refers to using a scribing device to scratch a groove of a certain width and depth at a predetermined position on the surface of the ceramic substrate.

[0085] In this embodiment, a first slot is formed on the upper surface of the ceramic substrate to obtain a first slot; and the depth of the first slot is greater than the distance from the surface of the ceramic substrate to the inner electrode, ensuring that the inner electrode of the first slot is disconnected.

[0086] (5) Preparation of terminal electrodes

[0087] In this embodiment, magnetron sputtering, evaporation coating or electroplating is used to coat the upper and lower end electrode materials on the surface of the ceramic substrate after the first slotting to form a gold sheet; and the inside of the first slot is also coated with the end electrode material.

[0088] (6) Second slotting

[0089] In this embodiment, a second slot is formed in the first slot by using a scribing device. The depth of the second slot needs to be greater than the thickness of the end electrode in the second slot to ensure that the end electrode at the bottom of the slot is disconnected.

[0090] Furthermore, the thickness of the scribing knife used for the second grooving of the upper surface of the ceramic substrate should be smaller than the thickness of the scribing knife used for the first grooving of the upper surface of the ceramic substrate to ensure that the terminal electrode material on the side of the inner wall of the slot is not damaged.

[0091] The above steps (4) to (6) of the first grooving, terminal electrode preparation and second grooving on the upper surface of the ceramic substrate are for leading out the inner electrode and connecting it to the first upper electrode. While the overall thickness of the capacitor meets its own structural strength, the effective dielectric thickness of the capacitor is reduced, further improving the capacitance value of the large capacitance capacitor.

[0092] (7) Coating insulation material

[0093] In this embodiment, the upper surface of the gold sheet after the second slotting is coated with insulating material by screen printing or glue coating process and cured; and the inner walls of the first slot and the second slot on the upper surface of the ceramic substrate are also coated with insulating material.

[0094] The purpose of designing this step (7) is to form a protective layer on the surface of the inner electrode and the side electrode to avoid arc discharge caused by solder overflow during use, which may cause a short circuit or a reduction in insulation distance between the lower electrode, the inner electrode and the first upper electrode.

[0095] (8) Remove excess insulation material

[0096] In this embodiment, photolithography or plasma cleaning is used to remove excess insulating material from the surface of the gold sheet, leaving only insulating material in the first slot, the second slot, and at the top edge of the slot for adhering to the surface of the gold layer.

[0097] (9) Surface electrode patterning

[0098] In this embodiment, a photolithography mask is used to photolithographically divide the terminal electrode on the upper surface of the gold sheet into a plurality of terminal electrodes of different sizes, thereby obtaining a gold sheet with patterned surface electrodes.

[0099] (10) Cutting

[0100] In this embodiment, a cutting device is used to cut the gold sheet after the surface electrode is patterned into a combination broadband chip capacitor product with a desired optional capacitance.

[0101] Furthermore, the cutting process must be performed according to the design, ensuring that the capacitor surface contains two electrodes separated by a blank area. One electrode is relatively large and connected to the inner electrode directly below it on the side; the other electrode is relatively small and has no corresponding inner electrode directly below it.

[0102] During the manufacturing process, the present invention adjusts the capacitance of a large-capacitance capacitor by varying the distance between the embedded electrode (i.e., inner electrode) and the lower electrode, or the size of the embedded electrode. The capacitance of a small-capacitance capacitor can be adjusted by varying the number of blank ceramic diaphragms between the embedded electrode (i.e., inner electrode) and the first upper electrode, or the size of the surface electrode of the small capacitor. This allows for arbitrary adjustment of the capacitor's capacitance based on actual circuit application requirements while maintaining the same capacitor package size, thereby enhancing the circuit board's high integration.

[0103] The specific implementation methods described above further illustrate the objectives, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above description is only a specific implementation method of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A combined broadband chip capacitor with adjustable capacitance, characterized in that: The combined broadband chip capacitor comprises a dielectric porcelain body (1), an inner electrode (2) printed on the dielectric porcelain body (1), and the inner electrode (2) extending from one side of the dielectric porcelain body (1) to the middle; a lower electrode (3) is provided at the bottom end of the dielectric porcelain body (1), and a first upper electrode (41) and a second upper electrode (42) are provided at the top end of the dielectric porcelain body (1); the inner electrode (2) and the first upper electrode (41) are connected at the side, and an insulating material (5) is provided on the side of the dielectric porcelain body (1) close to the first upper electrode (41); The first upper electrode (41), the inner electrode (2) and the lower electrode (3) form a first capacitor, and the second upper electrode (42) and the lower electrode (3) form a second capacitor; the first capacitor and the second capacitor constitute a combined broadband chip capacitor.

2. The combined broadband chip capacitor with adjustable capacitance according to claim 1, characterized in that: The first capacitor is used as a capacitor with a large capacitance value; the second capacitor is used as a capacitor with a small capacitance value.

3. The combined broadband chip capacitor with adjustable capacitance according to claim 1, characterized in that: The circuit connection method of this combination broadband chip capacitor is: One of the first capacitor and the second capacitor is selected to be connected to the circuit, and the other capacitor is switched and its capacitance is adjusted according to circuit requirements.

4. The combined broadband chip capacitor with adjustable capacitance according to claim 1, characterized in that: The circuit connection method of this combination broadband chip capacitor is: The first capacitor and the second capacitor are connected in parallel through gold wire bonding and then connected to the circuit at the same time.

5. The combined broadband chip capacitor with adjustable capacitance according to claim 1, characterized in that: The circuit connection method of this combination broadband chip capacitor is: The circuit is connected by a first upper electrode (41) leading in and a second upper electrode (42) leading out.

6. The combined broadband chip capacitor with adjustable capacitance according to claim 1, characterized in that: The capacitance value of the first capacitor is achieved by changing the distance between the inner electrode (2) and the lower electrode (3) or by changing the size of the inner electrode (2).

7. The combined broadband chip capacitor with adjustable capacitance according to claim 1, characterized in that: The capacitance value of the second capacitor is achieved by changing the number of blank ceramic diaphragms between the inner electrode (2) and the first upper electrode (41) or by changing the size of the surface electrode of the second capacitor.

8. The method for preparing a combined broadband chip capacitor with adjustable capacitance according to any one of claims 1 to 7, characterized in that: The preparation method comprises: preparing a blank ceramic diaphragm and printing an inner electrode on the blank ceramic diaphragm; The ceramic substrate is obtained by preparing a green ceramic substrate and a cooked ceramic substrate; A first slot is formed on the upper surface of the ceramic substrate to obtain a first slot; and the depth of the first slot is greater than the distance from the surface of the ceramic substrate to the inner electrode; The upper and lower terminal electrode materials are coated on the surface of the ceramic substrate after the first slotting to form a gold sheet; and the terminal electrode material is also coated inside the first slot; Performing a second slotting operation in the first slot to obtain a second slot; wherein the depth of the second slot is greater than the thickness of the end electrode in the second slot; After the second slotting, the upper surface of the gold sheet is coated with insulating material by screen printing or glue coating process and then cured; and the inner walls of the first slot hole and the second slot hole on the upper surface of the ceramic substrate are also coated with insulating material; Using a photolithography process or a plasma cleaning process to remove excess insulating material on the surface of the gold sheet, leaving only the insulating material inside the first slot, the second slot, and the top edge of the slot for adhering to the surface of the gold layer; The end electrode on the upper surface of the gold sheet is divided into a plurality of end electrodes of different sizes by photolithography using a photolithography mask, thereby obtaining a gold sheet with patterned surface electrodes; The gold sheet with patterned surface electrodes is cut into the required combination of broadband chip capacitor products with optional capacitance.

9. The preparation method according to claim 8, characterized in that Printing an inner electrode on the blank ceramic diaphragm, comprising: N inner electrodes of the same size are printed on the blank ceramic diaphragm, where n≥1; and different blank gaps are provided between different inner electrodes according to different designs.

10. The preparation method according to claim 8, characterized in that Preparation of a ceramic substrate green body, comprising: Lay together several blank ceramic diaphragms and one ceramic diaphragm printed with an inner electrode, with the ceramic diaphragm printed with the inner electrode between any two blank ceramic diaphragms; According to the selection requirements of the capacitor capacitance, the position of the ceramic diaphragm printed with the inner electrode inside the ceramic substrate green body is adjusted, that is, the effective distance between the inner electrode and the upper and lower electrodes is adjusted; According to the selection requirements of the capacitor thickness, the number of blank ceramic diaphragms above or below the inner electrode can be increased or decreased at will; The method comprises preparing a ceramic substrate green body, comprising: The ceramic substrate green body is subjected to debonding, high-temperature sintering, surface grinding and polishing processes to prepare a ceramic substrate containing a single internal electrode.

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