Parallel formation low-bandwidth pulse switching control method and device, and storage medium

Abstract

The invention discloses a parallel formation low-bandwidth pulse switching control method and device and a storage medium, and the method comprises the following steps: predicting an initial duty ratio according to the voltage relation of Buck-Boost topology; generating a feedforward prediction duty ratio through a feedforward compensation mechanism; dynamically selecting a loop switching mode according to a current error absolute value or a current change rate, and determining a current loop duty ratio; the loop switching mode comprises a current open-loop control mode and a current closed-loop control mode; when the loop switching mode is a current closed-loop control mode, a PI parameter is dynamically adjusted according to a current error value; and when the current average change rate and the current error meet the compensation condition, the current loop is controlled to enter steady-state control. According to the invention, the current switching speed and precision are obviously improved, the step response overshoot is greatly reduced, and the steady-state error minimization is ensured.

Description

Technical Field

[0001] The present invention relates to the technical field of lithium batteries, and in particular to a parallel formation low-bandwidth pulse switching control method, device, and storage medium. Background Art

[0002] With the advancement of society and technology, the frequency of research and development and updates for products like new energy vehicles has accelerated, and the application of lithium batteries in our lives is becoming increasingly important. According to the expansion plans of major battery manufacturers, battery production capacity will increase rapidly in the future, and the global lithium battery equipment market is also expected to grow rapidly. Demand for battery formation equipment, a crucial component of the battery production process, is also increasing. Lithium battery formation is the final step in battery production. Lithium battery formation equipment is responsible for controlling the charge and discharge of lithium batteries, detecting parameters, storing and analyzing data, and recovering energy during the formation process. The accuracy of the parameters detected by the formation equipment directly affects the quality of battery production, and the control method of the formation equipment directly determines the accuracy of each parameter.

[0003] The current lithium battery formation method uses the battery channels of lithium battery formation and capacity testing equipment to form series-connected batteries. When connecting lithium batteries, they must be connected according to a predetermined method. This leads to difficulties such as a small number of series connections, series voltage imbalance, large current switching impact, and low formation efficiency. With the improvement of battery production standards, the advantages of parallel formation are gradually emerging, and formation power supplies are developing in this direction. However, problems such as rapid switching of large currents at high power density need to be solved, thereby promoting the advancement of power lithium battery formation technology to meet the rapid development of the entire industry. Summary of the Invention

[0004] The purpose of the present invention is to provide a parallel low-bandwidth pulse switching control method, device, and storage medium to significantly improve the current switching speed and accuracy, greatly reduce the step response overshoot, and ensure that the steady-state error is minimized.

[0005] Another object of the present invention is to provide a parallel-connected low-bandwidth pulse switching control method, comprising the following steps:

[0006] Predict the initial duty cycle based on the voltage relationship of the Buck-Boost topology; generate the feedforward predicted duty cycle through the feedforward compensation mechanism;

[0007] The loop switching mode is dynamically selected according to the absolute value of the current error or the current change rate to determine the current loop duty cycle; the loop switching mode includes a current open-loop control mode and a current closed-loop control mode,

[0008] When the loop switching mode is the current closed-loop control mode, the PI parameters are dynamically adjusted according to the current error value;

[0009] When the average current change rate and the current error meet the compensation conditions, the control current loop enters steady-state control.

[0010] In the above technical solution, the loop switching mode is dynamically selected according to the absolute value of the current error or the current change rate, including:

[0011] When the absolute value of the current error value is not less than a first threshold value or the current change rate is not less than a second threshold value, a current open-loop control mode is adopted;

[0012] When the current error value is not less than a third threshold, a current closed-loop control mode is adopted; the current error value is the difference between the actual current value and the set current value.

[0013] In the above technical solution, determining the current loop duty cycle includes:

[0014] In the current open-loop control mode, the duty cycle of the current loop in the discharge mode is determined by the following formula:

[0015]

[0016] Among them, V port is the load voltage, V bus is the input bus voltage, R is the circuit DC impedance, I ref To set the current value;

[0017] In the current closed-loop control mode, the duty cycle of the current loop in the charging mode is determined by the following formula:

[0018]

[0019] Among them, V port is the load voltage, V bus is the input bus voltage, R is the circuit DC impedance, I ref is the set current value.

[0020] The above technical solution also includes:

[0021] In the closed-loop control stage, the feedforward prediction duty cycle and the closed-loop PI duty cycle are weighted and fused using the following formula:

[0022] D=α·D ff +(1-α)·D pi

[0023] Among them, α is the attenuation factor that decays linearly from 1 to 0, D pi is the duty cycle of the current loop PI control output, D ff is the feedforward predicted duty cycle.

[0024] The above technical solution also includes:

[0025] The maximum duty cycle threshold is set according to the charge and discharge mode.

[0026] In the above technical solution, the PI parameters are dynamically adjusted according to the current error value, including:

[0027] When the current error value is greater than 15A, aggressive PI control parameters are used;

[0028] When the current error value is no more than 15A and greater than 5A, standard PI control parameters are used;

[0029] When the current error value is no more than 5A, steady-state PI control parameters are adopted.

[0030] In the above technical solution, when the average current change rate and the current error meet the compensation conditions, the current loop is controlled to enter steady-state control, including:

[0031] When the average current change rate is less than a fourth threshold and the absolute value of the current error is less than a fifth threshold, the duty cycle is injected based on the inductor current ripple characteristic.

[0032] In the above technical solution, the compensation duty cycle is:

[0033]

[0034] Where sign(I err ) is the modulus of the current error, L is the topological inductance value, ΔI pp To allow the peak-to-peak ripple, V bus is the input bus voltage, T sw is the switching cycle.

[0035] The present invention also provides the following technical solutions:

[0036] Parallel connection into a low bandwidth loop high current fast switching control device, including:

[0037] The feedforward prediction module predicts the initial duty cycle based on the voltage relationship of the Buck-Boost topology and generates the feedforward predicted duty cycle through the feedforward compensation mechanism;

[0038] The loop switching module dynamically selects the loop switching mode according to the absolute value of the current error or the current change rate to determine the current loop duty cycle; the loop switching mode includes a current open-loop control mode and a current closed-loop control mode.

[0039] A multi-stage PI control module, when the loop switching mode is the current closed-loop control mode, dynamically adjusts the PI parameters according to the current error value;

[0040] The steady-state advance compensation module controls the current loop to enter steady-state control when the current average change rate and current error meet the compensation conditions.

[0041] The present invention also provides the following technical solutions:

[0042] A storage medium stores a computer program thereon, wherein when the computer program is executed, the parallelization to low-bandwidth pulse switching control method as described in any one of the above items is implemented.

[0043] Compared with the prior art, the present invention has the following beneficial effects:

[0044] The present invention is based on the low-bandwidth power loop characteristics in the parallel formation scenario, dynamically generates the initial duty cycle through a feedforward prediction mechanism, and combines the intelligent switching strategy of open-loop and closed-loop control to achieve rapid establishment of large current; it adopts multi-stage PI parameter adaptive adjustment technology, dynamically matches control parameters according to current error, and predicts the current convergence trend through a steady-state advance algorithm, optimizes the closed-loop adjustment process, and effectively overcomes the bottleneck problems of large system inertia and feedback delay. Through pulse duty cycle feedforward prediction, dynamic switching and multi-stage parameter adaptation, high-precision large-current pulse formation control is achieved in a low-bandwidth loop, solving the problems of slow dynamic response and large waveform distortion of traditional pulse technology, significantly improving current switching speed and accuracy, greatly reducing step response overshoot, ensuring the minimization of steady-state error, and taking into account system stability and dynamic adaptability, providing an innovative solution for efficient and high-precision formation of lithium batteries. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 Schematic diagram of a flow chart of an embodiment of the present invention. DETAILED DESCRIPTION

[0046] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0047] In low-bandwidth power loops, high system inertia becomes a key factor limiting the current buildup speed of parallel formation equipment. Low bandwidth means the system responds slowly to rapidly changing signals, making it difficult for high currents to quickly reach their set values ​​in such loops. Traditional closed-loop regulation performs adequately in low-current scenarios, but its flaws become apparent in high-current scenarios in the 300A range. Closed-loop regulation relies on feedback signals to adjust the output, but feedback signals in low-bandwidth systems update slowly, resulting in lags in the regulation process. For example, when the current needs to be rapidly increased from 0 to 300A, traditional closed-loop regulation can take a long time to bring the current close to the set value. This fails to meet the demand for rapid high-current switching during lithium battery formation, severely impacting formation efficiency.

[0048] The present invention provides a parallel-type low-bandwidth pulse switching control method, which uses a pulse-type power supply control algorithm to significantly improve the current switching speed and accuracy, greatly reduce the step response overshoot, and ensure that the steady-state error is minimized.

[0049] Specifically, such as Figure 1 As shown, the method includes:

[0050] Step S1: predicting an initial duty cycle based on the voltage relationship of the Buck-Boost topology; and generating a feedforward predicted duty cycle through a feedforward compensation mechanism.

[0051] In the feedforward prediction mechanism based on the BUCK-BOOST topology, let the input voltage be V bus , the output voltage is actually V port , the inductor current is IL, and the switching frequency is fs. The input voltage and output voltage are closely coupled. Input voltage fluctuations directly affect the duty cycle calculation, which in turn affects the output voltage and current. To compensate for these transient variations, a feedforward compensation mechanism is introduced. This mechanism dynamically generates an initial duty cycle based on the real-time changes in the input and output voltages and applies transient compensation, shortening the current settling time and ensuring output stability.

[0052] In charging mode (Buck topology), the initial duty cycle is:

[0053]

[0054] In discharge mode (Boost topology), the initial duty cycle is:

[0055]

[0056] In view of the deviation between the actual input bus voltage and the nominal value, a compensation duty cycle is introduced:

[0057]

[0058] Then, the feedforward predicted duty cycle is:

[0059] D ff_total =D ff +△D

[0060] k is the feedforward gain. Generally, it is set to 0.15 in charging mode and 0.12 in discharging mode to balance response speed and stability. nom The default bus voltage is usually 15V, which is used as the compensation reference. ff_total is the feedforward prediction duty cycle. ff_total Generated through pulse width modulation PWM.

[0061] Step S2: Dynamically select a loop switching mode according to the absolute value of the current error or the current change rate to determine the current loop duty cycle.

[0062] The loop switching mode includes a current open-loop control mode and a current closed-loop control mode. The loop switching mode is dynamically selected according to the absolute value of the current error or the current change rate, including:

[0063] When the absolute value of the current error value is not less than a first threshold value or the current change rate is not less than a second threshold value, a current open-loop control mode is adopted;

[0064] When the current error value is not less than a third threshold, a current closed-loop control mode is adopted; the current error value is the difference between the actual current value and the set current value.

[0065] The control strategy of the current open-loop control mode and the current closed-loop control mode adopts a dual switching mechanism based on the current error value and the current change rate criterion. Specifically, in the initial stage of current establishment (such as 0A→300A), the duty cycle D is directly predicted by feedforward. ff_total Open-loop control bypasses closed-loop feedback delays and achieves a one-step duty cycle. The initial duty cycle is significantly increased, boosting the current ramp rate to over 1000A / ms. This also avoids the slow current buildup problem caused by a too-small duty cycle in the initial stages of closed-loop regulation.

[0066] In some embodiments, the first threshold is 50A, and the second threshold is 1000A / ms, that is, |I err |=|I bat -I ref |≥50A or dI / dt≥1000A / ms, adopt current open-loop control mode D=D0. |I err | is the absolute value of the current error; I refTo set the current. When the current error is less than 50A and the current change slope is less than 1000A / ms, current open-loop control mode is used. Open-loop current control provides a fast response, allowing the current to quickly approach the set value. When the current error is greater than 50A or the current change slope is greater than 1000A / ms, current closed-loop control mode is switched to precisely adjust the current and eliminate errors.

[0067] The third threshold is 15A, which is I bat ≥I ref When the current is -15A, the current closed-loop control mode is adopted.

[0068] Furthermore, in order to achieve a smooth transition of the mixed duty cycle, an attenuation factor α is introduced. The feedforward prediction duty cycle and the closed-loop PI duty cycle are weighted and fused by the following formula:

[0069] D=α·D ff +(1-α)·D pi

[0070] Among them, α is the attenuation factor that decays linearly from 1 to 0, D pi is the duty cycle of the current loop PI control output, D ff The duty cycle is predicted for feedforward. As time goes by, α gradually decreases, allowing the system to smoothly transition from open-loop control to closed-loop control, avoiding current fluctuations during the switching process.

[0071] Step S3: Dynamically adjust the PI parameters according to the current error value.

[0072] A single PI control strategy can exhibit significant parameter mismatch when switching between charge and discharge modes in parallel formation equipment. PI control parameters are designed based on specific operating conditions. When these conditions change, the original parameters cannot adapt to the new conditions. For example, parameters adjusted in charge mode may result in over- or under-regulation in discharge mode. Typical operating data reveals that the single PI control strategy suffers significant loss in regulation efficiency when switching between charge and discharge modes. For example, in one operating condition, the regulation time increased by 30% after switching between charge and discharge modes. This not only reduces formation efficiency but also potentially affects battery consistency.

[0073] To address the above issues, the present application dynamically adjusts the PI parameters according to the current error value when the loop switching mode is the current closed-loop control mode. Multi-stage PI parameters are set, and the dynamic adaptation scheme constructs a hysteresis comparator architecture with a 15A / 5A graded threshold. When the current error value is greater than 15A, aggressive PI control parameters are adopted. Aggressive parameters have a larger proportional coefficient and a smaller integral time constant, which can quickly respond to errors and quickly make the current approach the set value, but may cause overshoot.

[0074] When the current error is between 5A and 15A, standard PI control parameters are used. These parameters strike a good balance between response speed and stability, effectively reducing overshoot and improving regulation accuracy.

[0075] When the current error is less than 5A, steady-state PI control parameters are used. These parameters have a smaller proportional coefficient and a larger integral time constant, further eliminating steady-state errors and stabilizing the current near the set value. This hierarchical adaptation approach enables efficient and stable control under varying operating conditions.

[0076] Step S4: When the current average change rate and the current error meet the compensation conditions, the current loop is controlled to enter steady-state control.

[0077] When current switches rapidly, parallel formation equipment faces challenges with ripple interference and parameter convergence. Ripple interference can cause current fluctuations at the moment of switching, leading to overshoot. Furthermore, system parameters struggle to converge quickly to a stable state during rapid switching, resulting in steady-state errors. This application anticipates the current convergence trend and enters the steady-state control phase early, avoiding steady-state overshoot caused by high system inertia and sampling lag.

[0078] Collect the current signal I[k] in real time and calculate the current change I[k]-I[k-1] between adjacent sampling points. In a sliding window of length N, calculate the average value of the current change:

[0079]

[0080] Where N is the number of samples, dI / dt avg is the average rate of change of current.

[0081] When the average current rate of change is less than a fourth threshold and the absolute value of the current error is less than a fifth threshold, steady-state is determined to be imminent, and duty cycle compensation is injected based on the inductor current ripple characteristics. The delay time caused by inertia and the allowable error range are considered. In this embodiment, the fourth threshold is 5A / ms, and the fifth threshold is 8A.

[0082] When the compensation conditions are met, the steady-state feedforward compensation duty cycle ΔD is immediately injected:

[0083]

[0084] Where sign(I err ) is the modulus of the current error, L is the topological inductance value, ΔI pp To allow the peak-to-peak ripple, V bus is the input bus voltage, T sw is the switching cycle.

[0085] Add the compensation duty cycle to the duty cycle D output by the current loop PI pi :

[0086] D=D pi +△D

[0087] The current trajectory is corrected in advance by compensation to offset the lag error caused by system inertia.

[0088] By injecting the compensation duty cycle in advance, the overshoot in the steady-state stage is reduced from the traditional method's 5%-10% to <2%, avoiding the risk of battery overcharge / over-discharge. The steady-state error is controlled within ±150mA at 300A full load (traditional method ±500mA), improving the consistency of battery formation. The adaptability to bus voltage fluctuations (±20%) and load changes is significantly improved, and the system robustness is enhanced. It effectively solves the problem of steady-state overshoot caused by system inertia and sampling lag in low-bandwidth power loops. The organic combination of dynamic response and steady-state accuracy significantly improves the efficiency and quality of the lithium battery formation process, providing key technical support for high-precision battery manufacturing.

[0089] The design of key parameters directly affects the system's dynamic response speed, steady-state accuracy, and overall reliability. The charging mode and the discharging mode have different circuit topology characteristics, so their parameter settings need to be optimized specifically. For example, the charging mode uses the Buck topology, and its proportional gain (K p =0.05A -1 ·s -1 ) is higher, which enhances the control loop's ability to respond quickly to current errors. At the same time, the integration time (T i =200μs) is shorter, which can accelerate the elimination of steady-state errors and ensure that the current is quickly established in a short time.

[0090] The discharge mode corresponds to the Boost topology. Since the reverse voltage characteristic easily causes high-frequency oscillation, a lower proportional gain (K p =0.03A -1 ·s -1 1) With a longer integration time (T i =500μs), by slowing down the adjustment speed to avoid overshoot while maintaining system stability.

[0091] The feedforward gain k is designed to compensate for bus voltage fluctuations. In charging mode, the feedforward gain is set to 0.15, which offsets the load voltage (V port ) and nominal value (V nom =15V) deviation to ensure the accuracy of the initial duty cycle; in discharge mode, due to the small voltage fluctuation during the boost process, the feedforward gain is slightly reduced to 0.12, which not only retains the compensation effect but also avoids duty cycle oscillation caused by over-regulation. max) is directly related to the safe operation of the circuit: the upper limit of the charging mode is 85% to prevent the input current from overshooting and damaging the power devices; the discharge mode is relaxed to 90%, making full use of the boost capability of the Boost topology, while avoiding overvoltage breakdown of the switch tube through limiting protection.

[0092] The coordinated design of these parameters solves the problem of large system inertia and significant feedback delay in low bandwidth loops. p With short T i The combination of can compress the current settling time from 0A to 300A to less than 500μs, while the feedforward compensation mechanism further offsets the impact of bus voltage fluctuations. In discharge mode, the parameter configuration takes into account both dynamic response and stability, making the overshoot of the step load less than 2%. In addition, the steady-state advance compensation algorithm injects a corrected duty cycle when the error and change rate dual thresholds are triggered by predicting the current convergence trend, accurately controlling the steady-state error within ±150mA. Experiments have shown that this parameter system can still maintain robustness when the bus voltage fluctuates by ±20%, providing an efficient and high-precision control basis for the lithium battery formation process.

[0093] Based on the same inventive concept, the present application also provides a device, comprising:

[0094] The feedforward prediction module predicts the initial duty cycle based on the voltage relationship of the Buck-Boost topology and generates the feedforward predicted duty cycle through the feedforward compensation mechanism;

[0095] The loop switching module dynamically selects the loop switching mode according to the absolute value of the current error or the current change rate to determine the current loop duty cycle; the loop switching mode includes a current open-loop control mode and a current closed-loop control mode.

[0096] A multi-stage PI control module, when the loop switching mode is the current closed-loop control mode, dynamically adjusts the PI parameters according to the current error value;

[0097] The steady-state advance compensation module controls the current loop to enter steady-state control when the current average change rate and current error meet the compensation conditions.

[0098] Based on the same inventive concept, the present invention further provides a storage medium storing a computer program, which, when executed by a processor, implements the steps of the aforementioned parallelization into low-bandwidth pulse switching control method.

[0099] Among them, computer programs include computer program code, which can be in source code form, object code form, executable file or some intermediate form. Computer-readable media may include: any entity or device capable of carrying computer program code, recording medium, USB flash drive, mobile hard disk, magnetic disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electric carrier signal, telecommunication signal and software distribution medium, etc. It should be noted that the content included in computer-readable media can be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media does not include electric carrier signals and telecommunication signals.

[0100] The present invention can be used in a wide variety of general-purpose or special-purpose computing system environments or configurations, such as personal computers, server computers, handheld or portable devices, tablet devices, multiprocessor systems, microprocessor-based systems, set-top boxes, programmable consumer electronics, network PCs, minicomputers, mainframe computers, and distributed computing environments that include any of the above.

[0101] The present application also provides an electronic device, including a memory, multiple processors and a program stored in the memory, wherein the program is configured to be executed by the processor, and when the multiple processors execute the program, the steps of the above-mentioned parallelization into low-bandwidth pulse switching control method are implemented.

[0102] The present invention also provides a storage medium storing a computer program that, when executed by a processor, implements the steps of the aforementioned method. The present invention can be used in a variety of general-purpose or specialized computing system environments or configurations, including, for example, personal computers, server computers, handheld or portable devices, tablet devices, multiprocessor systems, microprocessor-based systems, set-top boxes, programmable consumer electronics, network PCs, minicomputers, mainframe computers, and distributed computing environments that include any of the above.

[0103] The device in this embodiment and the method in the aforementioned embodiment are two aspects based on the same inventive concept. The implementation process of the method has been described in detail above, so those skilled in the art can clearly understand the structure and implementation process of the system in this embodiment based on the aforementioned description. For the sake of brevity of the specification, they will not be repeated here.

[0104] While embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions, and variations may be made to these embodiments without departing from the principles and spirit of the invention, and that the scope of the invention is defined by the appended claims and their equivalents.

Claims

1. A parallel-type low-bandwidth pulse switching control method, characterized in that: The following steps are involved: Predict the initial duty cycle based on the voltage relationship of the Buck-Boost topology; generate the feedforward predicted duty cycle through the feedforward compensation mechanism; Dynamically selecting a loop switching mode based on the absolute value of the current error or the current change rate to determine the current loop duty cycle; the loop switching mode includes a current open-loop control mode and a current closed-loop control mode; When the loop switching mode is the current closed-loop control mode, the PI parameters are dynamically adjusted according to the current error value; When the average current change rate and the current error meet the compensation conditions, the control current loop enters steady-state control.

2. The parallel formation low bandwidth pulse switching control method according to claim 1, characterized in that: Dynamically select loop switching mode based on the absolute value of the current error or the current change rate, including: When the absolute value of the current error value is not less than a first threshold value or the current change rate is not less than a second threshold value, a current open-loop control mode is adopted; When the current error value is not less than a third threshold, a current closed-loop control mode is adopted; the current error value is the difference between the actual current value and the set current value.

3. The parallel formation low bandwidth pulse switching control method according to claim 1, characterized in that: Determine the current loop duty cycle, including: In the current open-loop control mode, the duty cycle of the current loop in the discharge mode is determined by the following formula: Among them, V port is the load voltage, V bus is the input bus voltage, R is the circuit DC impedance, I ref To set the current value; In the current closed-loop control mode, the duty cycle of the current loop in the charging mode is determined by the following formula: Among them, V port is the load voltage, V bus is the input bus voltage, R is the circuit DC impedance, I ref is the set current value.

4. The parallel formation low bandwidth pulse switching control method according to claim 2, characterized in that: Also includes: In the closed-loop control stage, the feedforward prediction duty cycle and the closed-loop PI duty cycle are weighted and fused using the following formula: D=α·D ff +(1-a)·D pi Among them, α is the attenuation factor that decays linearly from 1 to 0, D pi is the duty cycle of the current loop PI control output, D ff Duty cycle is predicted for feedforward.

5. The parallel formation low bandwidth pulse switching control method according to claim 1, characterized in that: Also includes: The maximum duty cycle threshold is set according to the charge and discharge mode.

6. The parallel formation low bandwidth pulse switching control method according to claim 1, characterized in that: Dynamically adjust PI parameters according to the current error value, including: When the current error value is greater than 15A, aggressive PI control parameters are used; When the current error value is no more than 15A and greater than 5A, standard PI control parameters are used; When the current error value is no more than 5A, steady-state PI control parameters are adopted.

7. The parallel formation low bandwidth pulse switching control method according to claim 6, characterized in that: When the average current change rate and current error meet the compensation conditions, the current loop is controlled to enter steady-state control, including: When the average current change rate is less than a fourth threshold and the absolute value of the current error is less than a fifth threshold, the duty cycle is injected based on the inductor current ripple characteristic.

8. The parallel formation low bandwidth pulse switching control method according to claim 7, characterized in that: The compensation duty cycle is: Where sign(I err ) is the modulus of the current error, L is the topological inductance value, ΔI pp To allow the peak-to-peak ripple, V bus is the input bus voltage, T sw is the switching cycle.

9. Parallel connection into a low bandwidth loop high current fast switching control device, characterized in that, include: The feedforward prediction module predicts the initial duty cycle based on the voltage relationship of the Buck-Boost topology; Generate feedforward predicted duty cycle through feedforward compensation mechanism; The loop switching module dynamically selects the loop switching mode according to the absolute value of the current error or the current change rate to determine the current loop duty cycle; the loop switching mode includes a current open-loop control mode and a current closed-loop control mode. A multi-stage PI control module, when the loop switching mode is the current closed-loop control mode, dynamically adjusts the PI parameters according to the current error value; The steady-state advance compensation module controls the current loop to enter steady-state control when the current average change rate and current error meet the compensation conditions.

10. A storage medium, characterized in that: A computer program is stored thereon, and when the computer program is executed, the parallel-connected low-bandwidth pulse switching control method according to any one of claims 1 to 8 is implemented.

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