All-solid-state battery charging strategy optimization method based on Taguchi method

Abstract

The invention provides an all-solid-state battery charging strategy optimization method based on a Taguchi method, and the method comprises the steps: determining the charging stages of a to-be-tested all-solid-state battery and the current candidate value of each charging stage according to preset charging boundary conditions and preset charging multiplying power of interface impedance, current, charging time and battery temperature; designing a target orthogonal array list based on the charging stage, the current candidate value and the preset level number; performing charging and discharging test on the to-be-tested all-solid-state battery by adopting each row of charging strategy combination in the target orthogonal array list to obtain battery parameters; and calculating the average signal-to-noise ratio of each charging stage under each level according to the battery parameters and the initial interface impedance, and combining the current candidate values under the highest average signal-to-noise ratio in each charging stage to obtain a target charging strategy. According to the all-solid-state battery charging strategy of the scheme, the interface stability and the charging efficiency can be both considered, the research and development cost is reduced, and the reliability and the cycle life adaptability of the charging strategy are improved.

Description

Technical Field

[0001] The present invention relates to the technical field of solid-state batteries, and in particular to a method for optimizing a charging strategy of an all-solid-state battery based on the Taguchi method. Background Art

[0002] With the growing global demand for clean energy, new energy technologies have developed rapidly, especially the popularization of electric vehicles and renewable energy storage systems, which has promoted the advancement of battery technology. As an emerging energy storage device, solid-state batteries are considered to be an important development direction for the next generation of battery technology due to their wide electrochemical window and ability to adapt to higher charging rates at the same capacity. However, there are currently few experiments on charging strategies for all-solid-state batteries, and the traditional exhaustive experimental model has a high cost burden. In the research on charging strategies for all-solid-state batteries, metaheuristic algorithms and experience-driven trial and error are two commonly used research methods. However, the former leads to a sharp increase in computing resource consumption due to high-dimensional problems, while the latter is difficult to apply in practice due to the excessive number of experiments. Therefore, it is particularly urgent to develop a systematic and efficient all-solid-state battery charging strategy design method. Summary of the Invention

[0003] The present invention provides an all-solid-state battery charging strategy optimization method based on the Taguchi method, which not only significantly reduces R&D costs and time, but also provides a scientific solution that takes into account both interface stability and charging efficiency, providing systematic technical support for the efficient charging protocol design and life management of all-solid-state batteries.

[0004] In a first aspect, the present invention provides a method for optimizing a charging strategy of an all-solid-state battery based on the Taguchi method, comprising:

[0005] Determine the charging stage of the all-solid-state battery to be tested and the candidate current value for each charging stage based on preset charging boundary conditions and a preset charging rate including interface impedance, current, charging time, and battery temperature;

[0006] Designing a target orthogonal array table based on the charging stage, its candidate current value, and a preset number of levels; wherein the candidate current value at different levels in the same charging stage is different;

[0007] Performing a charge and discharge test on the all-solid-state battery to be tested using each row of the charging strategy combination in the target orthogonal array table to obtain battery parameters;

[0008] The average signal-to-noise ratio at each level in each charging stage is calculated according to the battery parameters and the initial interface impedance, and the current candidate values ​​at the highest average signal-to-noise ratio in each charging stage are combined to obtain a target charging strategy.

[0009] In a second aspect, the present invention provides a device for optimizing charging strategies of all-solid-state batteries based on the Taguchi method, comprising:

[0010] A preprocessing module is used to determine the charging stage of the all-solid-state battery to be tested and the candidate current value for each charging stage based on preset charging boundary conditions and a preset charging rate, including interface impedance, current, charging time and battery temperature;

[0011] a design module for designing a target orthogonal array table based on the charging stage, its candidate current values, and a preset number of levels; wherein the candidate current values ​​at different levels of the same charging stage are different;

[0012] a parameter acquisition module, configured to perform a charge and discharge test on the all-solid-state battery to be tested using each row of the charging strategy combination in the target orthogonal array table to obtain battery parameters;

[0013] The optimization module is used to calculate the average signal-to-noise ratio at each level in each charging stage according to the battery parameters and the initial interface impedance, and combine the current candidate values ​​at the highest average signal-to-noise ratio in each charging stage to obtain a target charging strategy.

[0014] In a third aspect, an embodiment of the present invention further provides a computing device comprising a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the method described in any first aspect of this specification is implemented.

[0015] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium having a computer program stored thereon, which, when executed in a computer, causes the computer to execute the method described in any one of the first aspects of this specification.

[0016] In a fifth aspect, a computer program product is provided, comprising a computer program, which, when executed by a processor, implements the steps of the method described in any first aspect of this specification.

[0017] The embodiment of the present invention provides a method for optimizing the charging strategy of an all-solid-state battery based on the Taguchi method. Under a preset charging rate and preset charging boundary conditions, the charging stage and the current candidate value of each stage of the all-solid-state battery to be tested are determined, so as to design a target orthogonal array table based on each charging stage and its current candidate value under a preset number of levels, and the current candidate value of the same charging stage at different levels is different. Each row in the target orthogonal array table represents a charging strategy combination. All charging strategy combinations are used to perform charge and discharge tests on the all-solid-state battery to be tested to obtain battery parameters. Then, the average signal-to-noise ratio of each charging stage at each level is calculated based on the battery parameters and the initial interface impedance of the all-solid-state battery. At the same time, the current candidate values ​​at the highest average signal-to-noise ratio in each charging stage of all the target orthogonal array tables are combined to obtain the optimal target charging strategy. In this way, by introducing the Taguchi method into the design of the all-solid-state battery charging strategy and considering the interface impedance of the all-solid-state battery, not only can the interface degradation mechanism be accurately captured, but also the R&D cost of the all-solid-state battery charging strategy can be significantly reduced and the engineering reliability and cycle life adaptability of the charging strategy can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0019] Figure 1 This is a flow chart of a method for optimizing a charging strategy for an all-solid-state battery based on the Taguchi method provided by one embodiment of the present invention;

[0020] Figure 2 This is a hardware architecture diagram of a computing device provided by one embodiment of the present invention;

[0021] Figure 3 It is a structural schematic diagram of an all-solid-state battery charging strategy optimization device based on the Taguchi method provided by one embodiment of the present invention. DETAILED DESCRIPTION

[0022] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0023] The specific implementation of the concept of this application is described below.

[0024] Please refer to Figure 1 , an embodiment of the present invention provides a method for optimizing a charging strategy of an all-solid-state battery based on the Taguchi method, the method comprising:

[0025] Step 100, determining the charging stages of the all-solid-state battery to be tested and candidate current values ​​for each charging stage based on preset charging boundary conditions and a preset charging rate, including interface impedance, current, charging time, and battery temperature;

[0026] Step 102 , designing a target orthogonal array table based on the charging stage, its candidate current values, and a preset number of levels; wherein the candidate current values ​​at different levels in the same charging stage are different;

[0027] Step 104, using each row of the target orthogonal array table charging strategy combination to perform a charge and discharge test on the all-solid-state battery to be tested, to obtain battery parameters;

[0028] Step 106 , calculating the average signal-to-noise ratio at each level in each charging stage according to the battery parameters and the initial interface impedance, and combining the candidate current values ​​at the highest average signal-to-noise ratio in each charging stage to obtain a target charging strategy.

[0029] In an embodiment of the present invention, under a preset charging rate and preset charging boundary conditions, the charging stage of the all-solid-state battery to be tested and the current candidate values ​​of each stage are determined, so as to design a target orthogonal array table based on each charging stage and its current candidate value under a preset number of levels, and the current candidate values ​​of the same charging stage at different levels are different. Each row in the target orthogonal array table represents a charging strategy combination, and all charging strategy combinations are used to perform charge and discharge tests on the all-solid-state battery to be tested to obtain battery parameters. Then, the average signal-to-noise ratio of each charging stage at each level is calculated by the battery parameters and the initial interface impedance of the all-solid-state battery. At the same time, the current candidate values ​​at the highest average signal-to-noise ratio in each charging stage of all the target orthogonal array tables are combined to obtain the optimal target charging strategy. In this way, by introducing the Taguchi method into the design of the all-solid-state battery charging strategy and considering the interface impedance of the all-solid-state battery, not only can the interface degradation mechanism be accurately captured, but also the R&D cost of the all-solid-state battery charging strategy can be significantly reduced and the engineering reliability and cycle life adaptability of the charging strategy can be improved.

[0030] Described below Figure 1 How to perform the steps shown.

[0031] First, for step 100, the preset charging boundary conditions include:

[0032] The interface impedance is not lower than the preset impedance lower limit and not higher than the preset impedance upper limit;

[0033] The candidate current value of the first charging stage is greater than the candidate current value of the second charging stage; and during the charging process, the charging time of the first charging stage is before the charging time of the second charging stage; the candidate current value of each charging stage is not lower than a preset current lower limit and not higher than a preset current upper limit;

[0034] The charging time is not less than the preset lower limit of charging time and not more than the preset upper limit of charging time;

[0035] During charging, the battery temperature is not lower than the preset lower temperature limit and not higher than the preset upper temperature limit.

[0036] Specifically, to ensure that battery charge and discharge tests are conducted in a controllable thermal environment and to promptly screen out abnormally performing all-solid-state batteries, the ranges of battery interface impedance, charging time, temperature, and current are limited. The preset charging boundary conditions include:

[0037] R min ≤R int ≤R max

[0038] I min ≤I j ≤I i ≤I max

[0039] t min ≤t chg ≤t max

[0040] T min ≤T chg ≤T max

[0041] Among them, R int is the current interface impedance; R min 、R max are the preset impedance lower limit and the preset impedance upper limit respectively; i and j are the number of charging stages, and 1≤i<j≤the total number of charging stages; I j , I i are the candidate current values ​​for the jth charging stage and the ith charging stage respectively; I min , I max They are respectively the preset current lower limit and the preset current upper limit; t chg is the charging time; t min , t max They are respectively the preset lower limit of charging time and the preset upper limit of charging time; T chg is the battery temperature; T min 、T max They are the preset battery temperature lower limit and the preset battery temperature upper limit respectively.

[0042] Specifically, in the present invention, the total number of charging stages is not less than 5, and can be flexibly set according to the actual needs of the user.

[0043] For step 102, a target orthogonal array table is designed based on the charging stage, its candidate current value, and the preset number of levels, including:

[0044] S1: Determine the number of charging stages as the number of influencing factors to determine the orthogonal array table;

[0045] S2: For each level, the maximum current candidate value at the charging stage at that level is selected to design an orthogonal array table to obtain a target orthogonal array table;

[0046] S3: Reducing the charging currents of all charging stages in the target orthogonal array table by a preset current interval value to obtain a target orthogonal array table for the next iteration; repeating S3 until the charging currents of all charging stages in the target orthogonal array table reach the minimum current candidate values ​​under the corresponding levels; wherein the number of columns in the target orthogonal array table is the same as the number of charging stages, and each row corresponds to a charging strategy combination.

[0047] Specifically, for example, if the number of charging stages is 5, then the number of influencing factors is 5. By looking at the orthogonal table used for experimental design, the L with an influencing factor of 5 is determined. 16 Orthogonal array table; take the preset number of levels as 4 as an example, where 1, 2, 3, and 4 are high, medium, low, and low levels of the impact factor respectively. 16 The orthogonal array table is shown in Table 1. At this time, for each charging stage, I min ≤I5<I4<I3<I2<I1≤I max, and the current candidate values ​​for each level are different, that is, the range of charging current values ​​for each level is different. For example, I1 = [16, 20], I2 = [12, 16], I3 = [8, 12], I4 = [4, 8], and I5 = [0.4, 4]. In step S2, for each level, the maximum current candidate value for the charging stage at that level is selected to design an orthogonal array table. Taking the first stage as an example, the current candidate values ​​for levels 1, 2, 3, and 4 are [19, 20], [18, 19], [17, 18], and [16, 17], respectively. The maximum current candidate value for level 1 in the first stage is 20, the maximum current candidate value for level 2 in the first stage is 19, the maximum current candidate value for level 3 in the first stage is 18, and the maximum current candidate value for level 4 in the first stage is 17. The same applies to the other stages, thus obtaining the target orthogonal array table. In step S3, based on the target orthogonal array of step S2, when the preset current interval value is 0.25, the charging current of each level is reduced by 0.25. That is, the maximum current candidate value for level 1 of the first stage is 19.75, the maximum current candidate value for level 2 of the first stage is 18.75, the maximum current candidate value for level 3 of the first stage is 17.75, and the maximum current candidate value for level 4 of the first stage is 16.75. The same applies to the other stages, thus obtaining the target orthogonal array table of the second iteration. S3 is repeated, and the preset current interval value is further reduced based on the target orthogonal array table of the second iteration. This is repeated three times until the final target orthogonal array table has the maximum current candidate value for level 1 of the first stage 1, the maximum current candidate value for level 2 of the first stage is 18, the maximum current candidate value for level 3 of the first stage is 17, and the maximum current candidate value for level 4 of the first stage is 16. In this way, a total of five target orthogonal array tables are obtained.

[0048] Table 1

[0049] Charging strategy combination <![CDATA[I1]]> <![CDATA[I2]]> <![CDATA[I3]]> <![CDATA[I4]]> <![CDATA[I5]]> 1 1 1 1 1 1 2 1 2 2 2 2 3 1 3 3 3 3 4 1 4 4 4 4 5 2 1 2 3 4 6 2 2 1 4 3 7 2 3 4 1 2 8 2 4 3 2 1 9 3 1 3 4 2 10 3 2 4 3 1 11 3 3 1 2 4 12 3 4 2 1 3 13 4 1 4 2 3 14 4 2 3 1 4 15 4 3 2 4 1 16 4 4 1 3 2

[0050] It should be noted that in the same target orthogonal array list, the current candidate values ​​at the same level in the same charging stage are the same, while in different target orthogonal array lists obtained in different iterations, the current candidate values ​​at the same level in the same charging stage are different.

[0051] In the present invention, by iteratively adding new target orthogonal array tables and generating new charging strategy combinations, it is possible to reduce the amount of experiments as much as possible while increasing the charging strategy combinations and evaluating multiple influencing factors and their interactions, reduce the consumption of computing resources, and screen out the optimal charging strategy combination.

[0052] It should be noted that before performing the charge and discharge test in step 104, all all-solid-state batteries to be tested are also subjected to pretreatment tests and initial performance tests. The pretreatment test eliminates any passivation experienced by the all-solid-state batteries between manufacturing and the first test. The initial performance test includes a cyclic charge and discharge test, an open circuit voltage test, and an electrochemical impedance spectroscopy test. The open circuit voltage test is used to calibrate the battery's performance parameters and screen out battery samples with consistent performance for subsequent experiments.

[0053] In step 104 , the battery parameters include charging time, discharging time, charging capacity, charging current, discharging current, battery open circuit voltage, and average temperature during the charging process.

[0054] Specifically, a battery life cycler is used to carry out the charging process in a constant temperature test chamber, and the preset charging mode (i.e., the charging strategy combination for each row in the target orthogonal array table) is input into the tester. All charge and discharge tests are set with the same parameters and repeated n times (n≥3) to eliminate accidental errors. After charging is completed, the all-solid-state battery to be tested is left to stand for one hour to make the battery temperature consistent with the ambient temperature and stabilize the terminal voltage. The same equipment is used to complete the low-rate discharge process of the battery, and all test data are recorded, including the battery's charging time, discharge time, charging capacity, discharge capacity, average temperature during charging, etc.

[0055] In a preferred embodiment, in step 106, the average signal-to-noise ratio at each level in each charging stage is calculated based on the battery parameters and the initial interface impedance, including:

[0056] D1: Calculate the current interface impedance based on battery parameters and initial interface impedance;

[0057] D2: When the battery parameters and the current interface impedance meet the preset charging boundary conditions, calculate the evaluation value of the charging strategy combination corresponding to the battery parameters;

[0058] D3: For each target orthogonal array table, calculate the average signal-to-noise ratio at each level in each charging stage based on the evaluation value of each row charging strategy combination and the current interface impedance, and combine the current candidate values ​​with the highest average signal-to-noise ratio in each charging stage to obtain the target charging strategy.

[0059] It should be noted that in step D2, if the charging time, battery temperature, and current interface impedance in the battery parameters all meet the preset charging boundary conditions, then all current charging strategy combinations are retained; but if any one of them does not meet the preset charging boundary conditions, then the charging strategy combination is eliminated and its evaluation value is no longer calculated, thereby further reducing the amount of calculation.

[0060] In a preferred embodiment, in step D1, the current interface impedance is determined by the following method:

[0061] An impedance growth model is constructed based on the battery parameters including charging time, charging current, average temperature during charging, current charging cycle number, and initial interface impedance.

[0062] The impedance growth model is analyzed using the historical battery parameters of the all-solid-state battery to be tested during charge and discharge tests to obtain the target impedance growth model.

[0063] The battery parameters are input into the target impedance enhancement model to obtain the current interface impedance.

[0064] Since the interfacial impedance growth of all-solid-state batteries is its unique performance degradation mechanism, it is mainly due to the polarization effect and thermal stress accumulation faced by the interface between the solid electrolyte and the electrode in long-term cycles. Since solid electrolytes lack the self-repairing ability of liquid electrolytes, the lithium ion migration resistance at the interface will gradually increase with the charge and discharge cycle, resulting in a significant increase in impedance. At the same time, solid-state batteries are more sensitive to charging strategies: high average charging currents may accelerate interface polarization, while high temperatures increase the risk of thermal stress stratification at the solid-solid interface. In the present invention, in order to accurately characterize this complex process, a multi-factor coupled impedance growth model that integrates the number of charging cycles, average charging current, and average charging temperature is designed:

[0065]

[0066] Among them, R int (N) is the current interface impedance after N charging cycles; R0 is the initial interface impedance; I avg is the average charging current during the charging process; T avg is the average temperature during the charging process; k1, k2, k3, and m are all model parameters. Preferably, the average charging current is obtained by averaging the charging currents.

[0067] In the present invention, the evolution law of the interface impedance is determined by obtaining the historical battery parameters of the all-solid-state battery to be tested in the historical charge and discharge tests, and then the above-mentioned model parameters are determined by parameter analysis. Specifically, the historical battery parameters are electrochemical impedance spectroscopy data, and the semicircular diameter in the high-frequency region under the initial cycle is used as the reference impedance (i.e., R0). By using multiple sets of cycle experimental data under different charging strategy combinations and combining them with the nonlinear least squares method to fit the model parameters in the impedance growth model, it is ensured that the model can accurately reflect the interface degradation law of solid-state batteries in long-term cycles.

[0068] In a preferred embodiment, the evaluation value in step D2 is determined by the following formula:

[0069]

[0070] Among them, Yall is the evaluation value; under any charging strategy combination, t cha , t dis are charging time and discharging time respectively; I cha (t), I dis (t) are the charging current function and the discharging current function respectively; OCV cha (SOC), OCV dis (SOC) are the battery open circuit voltages during the charging and discharging processes at the current SOC; t max is the preset upper limit of charging time; λ1, λ2, and λ3 are all weight coefficients.

[0071] In this invention, the aforementioned quality function allows for simultaneous optimization of charging capacity, charging efficiency, and charging time, transforming them into a single optimization problem. The evaluation value of each charging strategy combination under this optimization objective is then calculated, thereby obtaining a charging strategy that better meets user needs. It should be noted that the weight coefficients are flexibly set according to the user's charging needs, and λ1+λ2+λ3=1.

[0072] In a preferred embodiment, step D3 calculates the average signal-to-noise ratio at each level in each charging stage based on the evaluation value of each row charging strategy combination and the current interface impedance, including:

[0073] For each charging strategy combination, the signal-to-noise ratio is calculated based on the evaluation value of the charging strategy combination, the current interface impedance, the initial interface impedance, and the number of repeated experiments;

[0074] For each level of each charging stage, the following steps are performed: traversing the charging strategy combinations that include the level of the charging stage in the target orthogonal array table, and recording a first number of the charging strategy combinations; and calculating a ratio of a sum of the signal-to-noise ratios of the charging strategy combinations to the first number to obtain an average signal-to-noise ratio.

[0075] In a more preferred embodiment, the signal-to-noise ratio is determined by the following formula:

[0076]

[0077] Among them, S / N a is the signal-to-noise ratio of the charging strategy combination in row a; n is the number of repeated experiments; Y all,a is the evaluation value of the charging strategy combination in row a; α is the impedance coefficient; R int is the current interface impedance; R0 is the initial interface impedance.

[0078] In the present invention, by introducing the impedance growth factor into the signal-to-noise ratio This enables the signal-to-noise ratio to fully reflect the stability risks of all-solid-state batteries caused by characteristics such as interface impedance growth and heat accumulation during long-term cycles. In this way, the impact of independent surface interface degradation on performance is avoided, while coupling interference with traditional quality indicators such as charging time and temperature is avoided, achieving a dynamic balance between short-term performance and long-term stability.

[0079] In a more preferred embodiment, the average signal-to-noise ratio is determined by the following formula:

[0080]

[0081]

[0082] in, is the average signal-to-noise ratio of charging stage c at level b; m bc is the first quantity; S / N a is the signal-to-noise ratio of the charging strategy combination in row a; A is the total number of rows of charging strategy combinations in the target orthogonal array. Lac represents the c-column element of the charging strategy combination in row a, and lbc represents the b-level of charging stage c. Lac=lbc means that the charging strategy combination in row a contains the b-level of charging stage c, so ∈ bc (L ac ,l bc )=1, otherwise Lac≠lbc means that the charging strategy combination of row a does not include the b level of charging stage c, so ∈ bc (L ac ,l bc )=0.

[0083] Specifically, taking Table 1 as an example, the average signal-to-noise ratio is calculated for the first row and first column. At this time, c=1, b=1, that is, in the charging stage I1, when the level is 1, only the first 4 rows contain the 1 level of the I1 stage, so m bc =1+1+1+1+0+0+0+0+0+0+0+0+0+0+0+0=4.

[0084] In the present invention, the above formula can be used to obtain the average signal-to-noise ratio of each level in each target orthogonal array table for each charging stage. Then, for each charging stage, the highest value is determined from the average signal-to-noise ratios of all target orthogonal array tables, and the current candidate value of the level corresponding to the highest value is used as the optimal charging current for that charging stage. In this way, the optimal charging current for each charging stage is found and combined to obtain the target charging strategy. 16Taking the orthogonal array table as an example, each target orthogonal array table has 5×16 average signal-to-noise ratios. Then, for the charging stage I1, the maximum value is found from the first column of all target orthogonal array tables, and the current candidate value corresponding to the maximum value is used as the optimal current value of the charging stage I1. The same is true for other charging stages. Finally, the optimal charging current of each charging stage is obtained, thereby determining the target charging strategy containing the optimal charging current of each charging stage.

[0085] In the present invention, by integrating the impedance growth model of all-solid-state batteries and improving the signal-to-noise ratio, it is possible to accurately evaluate the impact of multiple factors on interface stability with a smaller number of experiments, significantly reducing experimental costs and improving optimization efficiency. Secondly, from orthogonal array design to data comparison and analysis, the impedance growth model and the improved signal-to-noise ratio calculation formula are introduced to make the entire process systematically adapt to the failure mechanism of solid-state batteries, which is convenient for extension to research fields such as thermal management and life prediction. In addition, by quantifying the impedance growth factor and the weight adjustment mechanism, a repeatable and scalable operating process is constructed, which enhances the reliability and consistency of the experimental results under complex working conditions and provides a standardized method basis for the study of all-solid-state battery charging strategies.

[0086] like Figure 2 、 Figure 3 As shown, the embodiment of the present invention provides a device for optimizing the charging strategy of a solid-state battery based on the Taguchi method. The device embodiment can be implemented by software, hardware, or a combination of software and hardware. From the hardware level, Figure 2 As shown in FIG. 1 , a hardware architecture diagram of a computing device where a device for optimizing a charging strategy of a solid-state battery based on the Taguchi method is located is provided in an embodiment of the present invention. Figure 2 In addition to the processor, memory, network interface, and non-volatile memory shown, the computing device in the embodiment may also include other hardware, such as a forwarding chip responsible for processing messages, etc. Taking software implementation as an example, Figure 3 As shown, as a logical device, the CPU of the computing device in which it is located reads the corresponding computer program in the non-volatile memory into the internal memory and runs it. This embodiment provides a device for optimizing the charging strategy of an all-solid-state battery based on the Taguchi method, which includes:

[0087] A pre-processing module 300 is used to determine the charging stage of the all-solid-state battery to be tested and the candidate current value for each charging stage based on preset charging boundary conditions and a preset charging rate, including interface impedance, current, charging time, and battery temperature;

[0088] A design module 302 is configured to design a target orthogonal array table based on the charging stage, its candidate current values, and a preset number of levels; wherein the candidate current values ​​for the same charging stage at different levels are different;

[0089] A parameter acquisition module 304 is configured to perform a charge and discharge test on the all-solid-state battery to be tested using each row of the charging strategy combination in the target orthogonal array table to obtain battery parameters;

[0090] The optimization module 306 is used to calculate the average signal-to-noise ratio at each level in each charging stage according to the battery parameters and the initial interface impedance, and combine the candidate current values ​​with the highest average signal-to-noise ratio in each charging stage to obtain a target charging strategy.

[0091] In some specific implementations, the preprocessing module 300 may be used to perform the above step 100 , the design module 302 may be used to perform the above step 102 , the parameter acquisition module 304 may be used to perform the above step 104 , and the optimization module 306 may be used to perform the above step 106 .

[0092] In one embodiment of the present invention, the preset charging boundary conditions include:

[0093] The interface impedance is not lower than the preset impedance lower limit and not higher than the preset impedance upper limit;

[0094] The candidate current value of the first charging stage is greater than the candidate current value of the second charging stage; and during the charging process, the charging time of the first charging stage is before the charging time of the second charging stage; the candidate current value of each charging stage is not lower than a preset current lower limit and not higher than a preset current upper limit;

[0095] The charging time is not less than the preset lower limit of charging time and not more than the preset upper limit of charging time;

[0096] During charging, the battery temperature is not lower than the preset lower temperature limit and not higher than the preset upper temperature limit

[0097] In one embodiment of the present invention, the design module 302 is further configured to perform the following operations:

[0098] S1: Determine the number of charging stages as the number of influencing factors to determine the orthogonal array table;

[0099] S2: For each level, the maximum current candidate value at the charging stage at that level is selected to design an orthogonal array table to obtain a target orthogonal array table;

[0100] S3: Reducing the charging currents of all charging stages in the target orthogonal array table by a preset current interval value to obtain a target orthogonal array table for the next iteration; repeating S3 until the charging currents of all charging stages in the target orthogonal array table reach the minimum current candidate values ​​under the corresponding levels; wherein the number of columns in the target orthogonal array table is the same as the number of charging stages, and each row corresponds to a charging strategy combination.

[0101] In one embodiment of the present invention, the battery parameters include charging time, discharging time, charging capacity, charging current, discharging current, battery open circuit voltage, and average temperature during charging.

[0102] In one embodiment of the present invention, the optimization module 306 is further configured to perform the following operations:

[0103] Calculate the current interface impedance based on the battery parameters and the initial interface impedance;

[0104] When the battery parameters and the current interface impedance meet the preset charging boundary conditions, the evaluation value of the charging strategy combination corresponding to the battery parameters is calculated; the evaluation value is determined by the following formula:

[0105]

[0106] Among them, Y all is the evaluation value; under any charging strategy combination, t cha , t dis are charging time and discharging time respectively; I cha (t), I dis (t) are the charging current function and the discharging current function respectively; OCV cha (SOC), OCV dis (SOC) are the battery open circuit voltages during the charging and discharging processes at the current SOC; t max is the preset upper limit of charging time; λ1, λ2, and λ3 are all weight coefficients;

[0107] For each target orthogonal array table, the average signal-to-noise ratio at each level of each charging stage is calculated according to the evaluation value of the charging strategy combination of each row and the current interface impedance, and the current candidate values ​​with the highest average signal-to-noise ratio in each charging stage are combined to obtain the target charging strategy.

[0108] In one embodiment of the present invention, the optimization module 306 is further configured to perform the following operations:

[0109] Based on the battery parameters including charging time, charging current, average temperature during charging, current charging cycle number and initial interface impedance, an impedance growth model is constructed:

[0110]

[0111] Among them, R int (N) is the current interface impedance after N charging cycles; R0 is the initial interface impedance; I avg is the average charging current during the charging process; T avg is the average temperature during the charging process; k1, k2, k3, and m are all model parameters;

[0112] The impedance growth model is analyzed using the historical battery parameters of the all-solid-state battery to be tested during charge and discharge tests to obtain the target impedance growth model.

[0113] The battery parameters are input into the target impedance enhancement model to obtain the current interface impedance.

[0114] In one embodiment of the present invention, the optimization module 306 is further configured to perform the following operations:

[0115] For each charging strategy combination, the signal-to-noise ratio is calculated based on the evaluation value of the charging strategy combination, the current interface impedance, the initial interface impedance, and the number of repeated experiments. The signal-to-noise ratio is determined by the following formula:

[0116]

[0117] Among them, S / N a is the signal-to-noise ratio of the charging strategy combination in row a; n is the number of repeated experiments; Y all,a is the evaluation value of the charging strategy combination in row a; α is the impedance coefficient; R int is the current interface impedance; R0 is the initial interface impedance;

[0118] For each level of each charging stage, the following steps are performed: traversing the charging strategy combinations that include the level of the charging stage in the target orthogonal array table and recording the first number of the charging strategy combinations; calculating the ratio of the sum of the signal-to-noise ratios of the charging strategy combinations to the first number to obtain an average signal-to-noise ratio; and determining the average signal-to-noise ratio using the following formula:

[0119]

[0120]

[0121] in, is the average signal-to-noise ratio of charging stage c at level b; m bc is the first quantity; S / N a is the signal-to-noise ratio of the charging strategy combination in row a; A is the total number of rows of charging strategy combinations in the target orthogonal array table.

[0122] It is understood that the structure illustrated in the embodiment of the present invention does not constitute a specific limitation on an all-solid-state battery charging strategy optimization device based on the Taguchi method. In other embodiments of the present invention, an all-solid-state battery charging strategy optimization device based on the Taguchi method may include more or fewer components than shown in the figure, or combine certain components, split certain components, or arrange the components differently. The components shown in the figure can be implemented in hardware, software, or a combination of software and hardware.

[0123] The information interaction, execution process, etc. between the modules in the above-mentioned device are based on the same concept as the embodiment of the method of the present invention. For specific contents, please refer to the description in the embodiment of the method of the present invention and will not be repeated here.

[0124] An embodiment of the present invention also provides a computing device, including a memory and a processor, wherein a computer program is stored in the memory, and when the processor executes the computer program, an all-solid-state battery charging strategy optimization method based on the Taguchi method in any embodiment of the present invention is implemented.

[0125] An embodiment of the present invention also provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the processor executes a method for optimizing a charging strategy for an all-solid-state battery based on the Taguchi method in any embodiment of the present invention.

[0126] An embodiment of the present application also provides a computer program product, which includes a computer program. A processor of a computer device reads the computer program from a computer-readable storage medium, and the processor executes the computer program, so that the computer device executes a full-solid-state battery charging strategy optimization method based on the Taguchi method described in any of the above embodiments.

[0127] Specifically, a system or device equipped with a storage medium can be provided, on which software program codes that implement the functions of any of the above-mentioned embodiments are stored, and a computer (or CPU or MPU) of the system or device can be enabled to read and execute the program codes stored in the storage medium.

[0128] In this case, the program code itself read from the storage medium can realize the function of any one of the above-mentioned embodiments, and thus the program code and the storage medium storing the program code constitute part of the present invention.

[0129] Examples of storage media for providing program code include floppy disks, hard disks, magneto-optical disks, optical disks (such as CD-ROM, CD-R, CD-RW, DVD-ROM, DVD-RAM, DVD-RW, DVD+RW), magnetic tapes, non-volatile memory cards, and ROMs. Alternatively, the program code can be downloaded from a server computer via a communication network.

[0130] In addition, it should be clear that the functions of any of the above embodiments can be achieved not only by executing the program code read by the computer, but also by enabling the operating system on the computer to complete part or all of the actual operations based on instructions of the program code.

[0131] In addition, it can be understood that the program code read from the storage medium is written into a memory provided in an expansion board inserted into the computer or into a memory provided in an expansion module connected to the computer, and then based on the instructions of the program code, a CPU installed on the expansion board or expansion module is enabled to perform part or all of the actual operations, thereby realizing the functions of any of the above embodiments.

[0132] It should be noted that, in this article, relational terms such as first and second are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply the existence of any such actual relationship or order between these entities or operations. Moreover, the terms "comprises", "comprising" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprising a ..." do not exclude the presence of other identical factors in the process, method, article or device comprising the elements.

[0133] Those skilled in the art will understand that all or part of the steps of implementing the above-mentioned method embodiment can be completed by hardware related to program instructions, and the aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it executes the steps of the above-mentioned method embodiment; and the aforementioned storage medium includes: ROM, RAM, disk or optical disk, etc. Various media that can store program codes.

[0134] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A method for optimizing charging strategy of all-solid-state batteries based on Taguchi method, characterized in that: include: Determine the charging stage of the all-solid-state battery to be tested and the candidate current value for each charging stage based on preset charging boundary conditions and a preset charging rate including interface impedance, current, charging time, and battery temperature; Designing a target orthogonal array table based on the charging stage, its candidate current value, and a preset number of levels; wherein the candidate current value at different levels in the same charging stage is different; Performing a charge and discharge test on the all-solid-state battery to be tested using each row of the charging strategy combination in the target orthogonal array table to obtain battery parameters; The average signal-to-noise ratio at each level in each charging stage is calculated according to the battery parameters and the initial interface impedance, and the current candidate values ​​at the highest average signal-to-noise ratio in each charging stage are combined to obtain a target charging strategy.

2. The method according to claim 1, characterized in that The preset charging boundary conditions include: The interface impedance is not lower than a preset impedance lower limit and not higher than a preset impedance upper limit; The candidate current value of the first charging stage is greater than the candidate current value of the second charging stage; and during the charging process, the charging time of the first charging stage is before the charging time of the second charging stage; the candidate current value of each charging stage is not lower than a preset current lower limit and not higher than a preset current upper limit; The charging time is not less than a preset lower limit of the charging time and not more than a preset upper limit of the charging time; During the charging process, the battery temperature is not lower than a preset lower temperature limit and not higher than a preset upper temperature limit.

3. The method according to claim 1, characterized in that The target orthogonal array table is designed based on the charging stage, its candidate current value and the preset number of levels, including: S1: Determine the number of the charging stages as the number of influencing factors to determine an orthogonal array table; S2: For each level, a maximum current candidate value of the charging stage at the level is selected to design the orthogonal array table to obtain a target orthogonal array table; S3: reducing the charging currents of all charging stages in the target orthogonal array table by a preset current interval value to obtain a target orthogonal array table for the next iteration; repeating S3 until the charging currents of all charging stages in the target orthogonal array table reach minimum current candidate values ​​under corresponding levels; wherein the number of columns in the target orthogonal array table is the same as the number of charging stages, and each row corresponds to a charging strategy combination.

4. The method according to claim 1, wherein The battery parameters include charging time, discharging time, charging capacity, charging current, discharging current, battery open circuit voltage, and average temperature during charging; Calculating the average signal-to-noise ratio at each level in each charging stage according to the battery parameters and the initial interface impedance includes: Calculating the current interface impedance according to the battery parameters and the initial interface impedance; When the battery parameters and the current interface impedance both meet the preset charging boundary conditions, calculating an evaluation value of the charging strategy combination corresponding to the battery parameters; For each of the target orthogonal array tables, the average signal-to-noise ratio of each charging stage at each level is calculated according to the evaluation value of the charging strategy combination in each row and the current interface impedance, and the current candidate values ​​at the highest average signal-to-noise ratio in each charging stage are combined to obtain the target charging strategy.

5. The method according to claim 4, characterized in that The current interface impedance is determined by the following method: constructing an impedance growth model based on the battery parameters including charging time, charging current, average temperature during charging, current charging cycle number, and the initial interface impedance; Performing parameter analysis on the impedance growth model using historical battery parameters of charge and discharge tests of the all-solid-state battery to be tested to obtain a target impedance growth model; Inputting the battery parameters into the target impedance enhancement model to obtain the current interface impedance; and / or, The evaluation value is determined by the following formula: Among them, Y all is the evaluation value; under any of the charging strategy combinations, t cha , t dis are charging time and discharging time respectively; I cha (t), I dis (t) are the charging current function and the discharging current function respectively; OCV cha (SOC), OCV dis (SOC) are the battery open circuit voltages during the charging and discharging processes at the current SOC; t max is the preset upper limit of charging time; λ1, λ2, and λ3 are all weight coefficients.

6. The method according to claim 4 or 5, characterized in that Calculating the average signal-to-noise ratio at each level in each charging stage according to the evaluation value of the charging strategy combination in each row and the current interface impedance includes: For each row of the charging strategy combination, a signal-to-noise ratio is calculated based on the evaluation value of the charging strategy combination, the current interface impedance, the initial interface impedance, and the number of repeated experiments; For each level of each charging stage, the following steps are performed: traversing the charging strategy combinations that include the level of the charging stage in the target orthogonal array table, and recording a first number of the charging strategy combinations; and calculating a ratio of the sum of the signal-to-noise ratios of the charging strategy combinations to the first number to obtain the average signal-to-noise ratio.

7. The method according to claim 6, characterized in that The signal-to-noise ratio is determined by the following formula: Among them, S / N a is the signal-to-noise ratio of the charging strategy combination in row a; n is the number of repeated experiments; Y all,a is the evaluation value of the charging strategy combination in row a; α is the impedance coefficient; R int is the current interface impedance; R0 is the initial interface impedance; and / or, The average signal-to-noise ratio is determined by the following formula: in, is the average signal-to-noise ratio of charging stage c at level b; m bc is the first quantity; S / N a is the signal-to-noise ratio of the charging strategy combination in the ath row; A is the total number of rows of the charging strategy combination in the target orthogonal array table.

8. A device for optimizing charging strategy of all-solid-state batteries based on Taguchi method, characterized in that: include: A preprocessing module is used to determine the charging stage of the all-solid-state battery to be tested and the candidate current value for each charging stage based on preset charging boundary conditions and a preset charging rate, including interface impedance, current, charging time and battery temperature; a design module for designing a target orthogonal array table based on the charging stage, its candidate current values, and a preset number of levels; wherein the candidate current values ​​at different levels of the same charging stage are different; a parameter acquisition module, configured to perform a charge and discharge test on the all-solid-state battery to be tested using each row of the charging strategy combination in the target orthogonal array table to obtain battery parameters; The optimization module is used to calculate the average signal-to-noise ratio at each level in each charging stage according to the battery parameters and the initial interface impedance, and combine the current candidate values ​​at the highest average signal-to-noise ratio in each charging stage to obtain a target charging strategy.

9. A computing device comprising a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the method according to any one of claims 1 to 7 is implemented.

10. A computer-readable storage medium having a computer program stored thereon, which, when executed in a computer, causes the computer to execute the method according to any one of claims 1 to 7.

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