Ultra-wideband receiving channelization processing method, device, equipment, medium and product

Abstract

The invention relates to the field of wireless communication, and provides an ultra-wideband receiving channelization processing method, device, equipment, medium and product, the method comprises the following steps: adopting a plurality of deFDM processing branches to process receiving signals of each frequency band, and the processing of the deFDM processing branches is as follows: a wideband deFDM module carries out multi-phase frequency conversion on the receiving signals according to the rough division of frequency band channels, a multi-phase frequency conversion signal is obtained; a multi-phase filtering module performs multi-phase filtering downsampling on the multi-phase frequency conversion signal to obtain a first-stage solution FDM signal; a fine deFDM module performs fine frequency conversion on the first-stage deFDM signal through frequency band channel fine division to obtain a fine frequency conversion signal; and the low-pass filtering module performs low-pass filtering on the fine frequency conversion signal by adopting a parameter symmetry design and a resource time division multiplexing method. According to the invention, ultra-wideband signal frequency decomposition multiplexing with excellent filtering performance and low resource complexity can be realized.

Description

Technical Field

[0001] The present invention relates to the field of wireless communications, and in particular to an ultra-wideband receiving channelization processing method, device, equipment, medium and product. Background Art

[0002] In wireless communication systems, ultra-wideband (UWB) signals feature large instantaneous bandwidth and high real-time performance. High-speed ADCs (Analog to Digital Converters) are required to sample these signals, and high-speed, high-throughput FPGAs (Field Programmable Gate Arrays) are used to digitally process them. In practice, the mismatch between the sampling rate of high-speed ADCs and the data processing capabilities of FPGAs makes improving digital channelization within FPGAs a key requirement for UWB signal processing. Furthermore, with the continuous development of various application areas, such as high-bandwidth electronic reconnaissance, broadband electronic countermeasures, and high-speed satellite data transmission, electronic signal information rates are increasing, and correspondingly, signal sampling and digital processing rates are also increasing, posing challenges to FPGA performance and processing resources. Therefore, implementing digital signal channelization in UWB signal processing applications has become a critical core technology that urgently needs to be addressed in fields such as radar reception and satellite signal transmission.

[0003] Traditional digital channelization algorithms often employ a digital down-conversion + polyphase filtering structure: a numerically controlled oscillator module, a digital multiplier module, and a digital filter module. The numerically controlled oscillator module generates an orthogonal demodulated signal based on the bandpass sampling theorem; the digital multiplier module uses quadrature demodulation to generate orthogonal signals from the high-rate digital signals sampled by the ADC; and the digital filter module utilizes a polyphase filter structure. Through filter decomposition, a high-order filter is decomposed into multiple lower-order sub-filters, performing parallel filtering on the high-rate digital signal. Polyphase decomposition reduces the data rate. In engineering, polyphase filters employ a highly efficient "decimation-first, filtering-later" structure to reduce computational complexity, taking into account the difference between signal rate and signal bandwidth.

[0004] To ensure distortion-free recovery of the original UWB signal after sampling, the ADC must process the UWB signal at a sampling rate exceeding twice the signal bandwidth. This requires a sampling rate exceeding Gsps. Traditional digital channelization algorithms require the numerically controlled oscillator and digital multiplier modules implemented in FPGAs to operate at the same rate, making the FPGA's speed incapable of matching the high-speed ADC in practical applications. Furthermore, traditional digital channelization algorithms employ polyphase filtering structures to reduce data rates. To achieve optimal filtering, higher-order filter coefficients are often employed, requiring more FPGA multiplier resources. In summary, limited filter performance, high implementation complexity, significant resource constraints, and limited flexibility limit the application of traditional UWB digital channelization algorithms in various engineering fields. Summary of the Invention

[0005] In response to the problems of limited performance, high implementation complexity, heavy resource pressure and poor flexibility of ultra-wideband signal frequency division filters in wireless communication systems, the present invention provides an ultra-wideband reception channelization processing method, device, equipment, medium and product, which can achieve ultra-wideband signal frequency division multiplexing with excellent filtering performance and low resource complexity.

[0006] The present invention provides an ultra-wideband receiving channelization processing method, characterized by comprising:

[0007] Several de-FDM processing branches are used to process the received signals of each frequency band. The processing of the de-FDM processing branches is as follows:

[0008] The broadband de-FDM module roughly divides the received signal into frequency band channels and performs multi-phase frequency conversion to obtain a multi-phase frequency conversion signal;

[0009] The multiphase filtering module performs multiphase filtering and downsampling on the multiphase frequency conversion signal to obtain a first-level de-FDM signal;

[0010] The fine de-FDM module performs fine frequency conversion on the first-stage de-FDM signal by finely dividing the frequency band channel to obtain a fine frequency conversion signal;

[0011] The low-pass filtering module adopts parameter symmetry design and resource time division multiplexing method to perform low-pass filtering on the fine frequency conversion signal.

[0012] In some embodiments, the broadband de-FDM module performs multi-phase frequency conversion on the received signal of the corresponding frequency band by roughly dividing the frequency band channel, including:

[0013] Frequency division multiplexing is used, with a total of K de-FDM processing branches. The k-th de-FDM processing branch corresponds to N' sub-bands, which are expressed as:

[0014]

[0015] For the sub-band signal S' of the kth de-FDM processing branch k (t) The discrete multiphase signal is obtained by discrete sampling processing, which is expressed as:

[0016]

[0017] Among them, A n' Indicates the signal amplitude of the n'th sub-band, kw n' =f n' / f s The frequency control word representing the discrete polyphase signal of the n'th sub-band, f s is the discrete sampling frequency, T s =1 / f s is the discrete sampling cycle time, θ n' represents the initial phase value of the n'th sub-band, m=1...M is the mth phase of the discrete multiphase signal, S' k (nMT s ) represents the discrete M-phase signal of the k-th de-FDM processing branch;

[0018] The center frequencies of the K de-FDM processing branches are The center frequency is used to generate the down-converted carrier signal, which is expressed as:

[0019]

[0020] in, is the frequency control word of the carrier signal corresponding to the kth de-FDM processing branch, is the M-phase carrier signal;

[0021] Perform down-conversion processing on each multi-phase signal to obtain a multi-phase frequency conversion signal, which is expressed as:

[0022]

[0023] in, is the M-phase frequency conversion signal of the k-th de-FDM processing branch.

[0024] In some embodiments, the multi-phase filtering module performs multi-phase filtering and sampling reduction on the multi-phase frequency conversion signal, including:

[0025] The kth de-FDM processing branch integrates the multi-phase frequency conversion signal into a single-phase signal, which is expressed as:

[0026]

[0027] Each branch uses the center frequency as 2L1-order filter For the single-phase signal Filtering is performed to filter out the N' sub-band signals of interest to the kth de-FDM processing branch, and obtain the first-level de-FDM signal, which is expressed as:

[0028]

[0029] in, is the frequency control word of the n'th first-stage de-FDM signal of the kth de-FDM processing branch, A (k-1)·N'+n' is the signal amplitude of the n'th first-stage de-FDM signal of the kth de-FDM processing branch, θ (k-1)·N'+n' is the initial phase of the n'th first-stage de-FDM signal of the kth de-FDM processing branch, It is the first-stage de-FDM signal of the k-th de-FDM processing branch.

[0030] In some embodiments, the fine de-FDM module performs fine frequency conversion on the first-stage de-FDM signal by finely dividing the frequency band channel, including:

[0031] Based on the first-stage de-FDM signal, the center frequencies of the N' sub-band channels in the k-th de-FDM processing branch are Generate the down-converted carrier signal, expressed as:

[0032]

[0033] Perform N'-way down-conversion on the first-stage de-FDM signal to obtain the second-stage de-FDM signal:

[0034]

[0035] Output N' down-converted second-stage de-FDM signals as fine frequency conversion signals, expressed as:

[0036]

[0037] in, is the frequency control word of the n'th second-stage de-FDM signal of the kth de-FDM processing branch, A (k-1)·N'+n' is the signal amplitude of the n'th second-stage de-FDM signal of the kth de-FDM processing branch, θ (k-1)·N'+n' is the initial phase of the n'th second-stage de-FDM signal of the kth de-FDM processing branch.

[0038] In some embodiments, the low-pass filtering module uses parameter symmetry design and resource time division multiplexing to perform low-pass filtering on the fine frequency conversion signal, including:

[0039] The low-pass filter uses a D-group 2L2-order even-symmetric Hamming window low-pass filter The length of each filter group is l, D×l=L2; the fine frequency conversion signal is cached, and a total of 2L2 second-level de-FDM signals are cached. Data, the cached sub-band signal data is added end to end to obtain the cached signal data x i ,i=1...L2;

[0040] Sampling frequency f s / data rate value ratio is kept no higher than 1, and an even symmetric Hamming window low-pass filter group is used. Time-sharing data x i , i=1...L2 performs complex multiplication, multiplexing l complex multipliers on L2 length data x under D sampling clocks i , i=1...L2 performs filtering as follows:

[0041]

[0042] For each of the K de-FDM processing branches, there are N', a total of N = K·N' fine frequency conversion second-stage de-FDM signals After time division multiplexing filtering, we get:

[0043]

[0044] Wherein, k=1...K, n'=1...N'.

[0045] In a second aspect, the present invention provides an ultra-wideband receiving channelization processing device, comprising a plurality of de-FDM processing branches, each of the de-FDM processing branches comprising a broadband de-FDM module, a polyphase filtering module, a plurality of fine de-FDM modules and a plurality of low-pass filtering modules;

[0046] The broadband de-FDM module is used to perform multi-phase frequency conversion on the received signal by roughly dividing the frequency band channel to obtain a multi-phase frequency conversion signal;

[0047] The multiphase filtering module is used to perform multiphase filtering and downsampling on the multiphase frequency conversion signal to obtain a first-level de-FDM signal;

[0048] The fine de-FDM module is used to perform fine frequency conversion on the first-stage de-FDM signal by finely dividing the frequency band channel to obtain a fine frequency conversion signal;

[0049] The low-pass filtering module is used to perform low-pass filtering on the fine frequency conversion signal by adopting parameter symmetry design and resource time division multiplexing method.

[0050] In a third aspect, the present invention provides an electronic device, comprising:

[0051] at least one processor; and a memory communicatively coupled to the at least one processor;

[0052] The memory stores instructions that can be executed by the at least one processor, and the at least one processor executes the instructions stored in the memory, so that the at least one processor performs the method.

[0053] In a fourth aspect, the present invention provides a computer-readable storage medium, wherein the computer-readable storage medium is used to store instructions, and when the instructions are executed, the above method is implemented.

[0054] In a fifth aspect, the present invention provides a computer program product, which, when called by a computer, enables the computer to execute the above method.

[0055] In summary, due to the adoption of the above technical solution, the beneficial effects of the present invention are:

[0056] 1. Excellent filtering performance. The present invention adopts a two-stage frequency division filtering architecture of a broadband de-FDM module + a multi-phase filtering module and a fine de-FDM module + a time division multiplexing low-pass filtering module. In several de-FDM processing branches, the first stage frequency division filtering uses multi-phase integration and then down-conversion processing on the ultra-wideband signal, and the second stage frequency division filtering uses an even symmetric Hamming window low-pass filter to restore the multi-path sub-band signal. By adopting a two-stage frequency division filtering architecture, it is possible to achieve excellent gain flatness within the 3dB bandwidth of the filter, reduce the filter order, and reduce resource consumption. Compared with the traditional ultra-wideband signal de-FDM using a bandpass filter, the performance of each filter in the two-stage frequency division filtering architecture is better, and it can adapt to frequency division multiplexing signals with a larger bandwidth, significantly improving the performance of the de-FDM output signal.

[0057] 2. Low resource complexity. The two-stage frequency division architecture and low-pass filter module in the present invention adopt an even-symmetric time-division multiplexing design to reduce the multiplier resources used. In the first stage, multi-phase integration is used to reduce the data rate and then the first filtering is performed. In addition, the second stage adopts an even-symmetric Hamming window low-pass filter to reuse the same group of multipliers within k sampling clocks, which can further reduce the use of multipliers. Compared with traditional parallel filtering calculations, under limited resources, the two-stage frequency division filtering architecture reduces computational complexity and saves resources.

[0058] 3. Wide application scope. The present invention performs two-stage FDM demultiplexing on ultra-wideband signals based on the ultra-wideband receiving channelization processing method, thereby achieving demodulation and recovery of ultra-wideband signals. FDM technology is not only applicable to wireless communications, but also to television broadcasting, satellite communication systems, data transmission systems and other fields. BRIEF DESCRIPTION OF THE DRAWINGS

[0059] Figure 1 This is a schematic diagram of an ultra-wideband receiving channelization processing device provided by an embodiment of the present invention.

[0060] Figure 2 2 is a schematic diagram of an even-symmetric Hamming window low-pass filter according to an embodiment of the present invention.

[0061] Figure 3 A schematic structural diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0062] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings herein can be arranged and designed in various different configurations.

[0063] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention as claimed, but rather merely represents selected embodiments of the present invention. All other embodiments derived by persons of ordinary skill in the art based on the embodiments of the present invention without creative effort are intended to fall within the scope of protection of the present invention.

[0064] See Figure 1 An embodiment of the present invention provides an ultra-wideband receiving channelization processing method, comprising:

[0065] Several frequency-division multiplexing (FDM) processing branches are used to process the received signals of each frequency band. The processing of the FDM processing branches is as follows:

[0066] The broadband de-FDM module roughly divides the received signal into frequency band channels and performs multi-phase frequency conversion to obtain a multi-phase frequency conversion signal;

[0067] The multiphase filtering module performs multiphase filtering and downsampling on the multiphase frequency conversion signal to obtain a first-level de-FDM signal;

[0068] The fine de-FDM module performs fine frequency conversion on the first-stage de-FDM signal by finely dividing the frequency band channel to obtain a fine frequency conversion signal;

[0069] The low-pass filtering module adopts parameter symmetry design and resource time division multiplexing method to perform low-pass filtering on the fine frequency conversion signal.

[0070] The specific instructions are as follows:

[0071] Divide the received signal bandwidth into multiple non-overlapping frequency bands. The specific process is as follows:

[0072] The received signal is an ultra-wideband signal, which is expressed as The total bandwidth of the ultra-wideband signal S(t) is B, and there are N sub-bands in total, f i is the center frequency of the i-th subband. The received signal is roughly divided into K signal paths based on the center frequency, with equal spacing between the center frequencies. These paths correspond to K parallel de-FDM processing branches. Each de-FDM processing branch focuses on N' subbands around the center frequency, totaling K · N' = N subbands.

[0073] In some embodiments, the broadband de-FDM module uses down-conversion processing and multi-phase processing to down-convert the received signal according to the center frequency to obtain a zero-IF multi-phase frequency conversion signal. Specifically:

[0074] Frequency division multiplexing is used, with a total of K de-FDM processing branches. The k-th de-FDM processing branch corresponds to N' sub-bands, which are expressed as:

[0075]

[0076] For the sub-band signal S' of the kth de-FDM processing branch k (t) The discrete multiphase signal is obtained by discrete sampling processing, which is expressed as:

[0077]

[0078] Among them, A n' Indicates the signal amplitude of the n'th sub-band, kw n' =f n' f s The frequency control word representing the discrete polyphase signal of the n'th sub-band, f s is the discrete sampling frequency, T s =1 / f s is the discrete sampling cycle time, θ n' represents the initial phase value of the n'th sub-band, m=1...M is the mth phase of the discrete multiphase signal, S' k (nMT s ) represents the discrete M-phase signal of the k-th de-FDM processing branch.

[0079] The center frequencies of the K de-FDM processing branches are The center frequency is used to generate the down-converted carrier signal, which is expressed as:

[0080]

[0081] in, is the frequency control word of the carrier signal corresponding to the kth de-FDM processing branch, is the M-phase carrier signal.

[0082] Perform down-conversion processing on each multi-phase signal to obtain a multi-phase frequency conversion signal, which is expressed as:

[0083]

[0084] in, is the M-phase frequency conversion signal of the k-th de-FDM processing branch.

[0085] In some embodiments, the polyphase filtering module uses polyphase integration and low-pass filtering. Specifically:

[0086] The kth de-FDM processing branch integrates the multi-phase frequency conversion signal into a single-phase signal, which is expressed as:

[0087]

[0088] Each branch uses the center frequency as 2L1-order filter For the single-phase signal Filtering is performed to filter out the N' sub-band signals of interest to the kth de-FDM processing branch, and obtain the first-level de-FDM signal, which is expressed as:

[0089]

[0090] in, is the frequency control word of the n'th first-stage de-FDM signal of the kth de-FDM processing branch, A (k-1)·N'+n' is the signal amplitude of the n'th first-stage de-FDM signal of the kth de-FDM processing branch, θ (k-1)·N'+n' is the initial phase of the n'th first-stage de-FDM signal of the kth de-FDM processing branch, It is the first-stage de-FDM signal of the k-th de-FDM processing branch.

[0091] After the polyphase filtering module, the K-channel first-stage de-FDM signal obtained is a zero-IF broadband signal, the sampling rate is reduced to 1 / M of the original, and the bandwidth is reduced to 1 / K of the original.

[0092] In some embodiments, the fine de-FDM module uses de-FDM multiplexing to perform multi-channel fine down-conversion processing on the broadband signal. Specifically:

[0093] Based on the first-stage de-FDM signal, the center frequencies of the N' sub-band channels in the k-th de-FDM processing branch are Generate the down-converted carrier signal, expressed as:

[0094]

[0095] Perform N'-way down-conversion on the first-stage de-FDM signal to obtain the second-stage de-FDM signal:

[0096]

[0097] Output N' down-converted second-stage de-FDM signals as fine frequency conversion signals, expressed as:

[0098]

[0099] in, is the frequency control word of the n'th second-stage de-FDM signal of the kth de-FDM processing branch, A (k-1)·N'+n' is the signal amplitude of the n'th second-stage de-FDM signal of the kth de-FDM processing branch, θ (k-1)·N'+n' is the initial phase of the n'th second-stage de-FDM signal of the kth de-FDM processing branch.

[0100] In some embodiments, see Figure 2 ,The low-pass filtering module adopts time division multiplexing method for filtering processing.

[0101] Specifically:

[0102] The low-pass filter uses a D-group 2L2-order even-symmetric Hamming window low-pass filter The length of each filter group is l, D×l=L2; the fine frequency conversion signal is cached, and a total of 2L2 second-level de-FDM signals are cached. Data, the cached sub-band signal data is added end to end to obtain the cached signal data x i ,i=1...L2;

[0103] Sampling frequency f s / data rate value ratio is kept no higher than 1, and an even symmetric Hamming window low-pass filter group is used. Time-sharing data x i , i=1...L2 performs complex multiplication, multiplexing l complex multipliers on L2 length data x under D sampling clocks i , i=1...L2 performs filtering as follows:

[0104]

[0105] For each of the K de-FDM processing branches, there are N', a total of N = K·N' fine frequency conversion second-stage de-FDM signals After time division multiplexing filtering, we get:

[0106]

[0107] Wherein, k=1...K, n'=1...N'.

[0108] The following example is used for a specific analysis: Taking a communication system as an example, the input ultra-wideband signal bandwidth is 1GHz (100 consecutive FDM signals with 10MHz intervals) and the sampling rate is 1.6GHz (represented by a 4-phase signal with a sampling rate of 400MHz). It is evenly divided into 5 de-FDM processing branches, and each de-FDM processing branch performs two-stage frequency division multiplexing channelization processing. The broadband de-FDM module down-converts the center frequencies of each de-FDM processing branch (-400MHz, -200MHz, 0MHz, 200MHz, and 400MHz) to generate multiphase frequency-converted signals corresponding to the corresponding center frequencies. The polyphase filtering module performs four-phase integration on the ultra-wideband signal and then filters it separately, generating a single-phase FDM signal with a 400MHz sampling rate and 200MHz bandwidth as the first-stage de-FDM signal. The fine de-FDM module down-converts the first-stage de-FDM signal to generate 20 zero-IF broadband signals. The low-pass filtering module uses a 160th-order even-symmetric Hamming window low-pass filter to time-division-multiplex the 400MHz sampling rate signal. Two multipliers are multiplexed 40 times at a 10MHz clock, resulting in 10MHz sub-band signals. The five ultra-wideband signals undergo this processing, resulting in a total of 100 sub-band signal outputs.

[0109] After testing, it is found that the present invention has the advantages of good passband filtering effect, low resource complexity and wide application range in the de-FDM of ultra-wideband signals, which solves the problem of poor passband filtering effect and high resource complexity of traditional channelization methods in ultra-wideband communication systems.

[0110] Based on the same technical concept, such as Figure 1 As shown, an embodiment of the present invention provides an ultra-wideband receiving channelization processing device, comprising a plurality of de-FDM processing branches, each of which comprises a wideband de-FDM module, a polyphase filtering module, a plurality of fine de-FDM modules and a plurality of low-pass filtering modules;

[0111] The broadband de-FDM module is used to perform multi-phase frequency conversion on the received signal by roughly dividing the frequency band channel to obtain a multi-phase frequency conversion signal;

[0112] The multiphase filtering module is used to perform multiphase filtering and downsampling on the multiphase frequency conversion signal to obtain a first-level de-FDM signal;

[0113] The fine de-FDM module is used to perform fine frequency conversion on the first-stage de-FDM signal by finely dividing the frequency band channel to obtain a fine frequency conversion signal;

[0114] The low-pass filtering module is used to perform low-pass filtering on the fine frequency conversion signal by adopting parameter symmetry design and resource time division multiplexing method.

[0115] As for the specific processing methods of each functional module in the above device, reference can be made to the specific description of the above method embodiment, which will not be repeated here.

[0116] Based on the same technical concept, an embodiment of the present invention further provides an electronic device that can implement the ultra-wideband receiving channelization processing method provided in the above embodiment of the present invention. In one embodiment, the electronic device can be a server, or a terminal device or other electronic device. Figure 3 As shown, the electronic device may include:

[0117] At least one processor, and a memory connected to the at least one processor. The embodiment of the present invention does not limit the specific connection medium between the processor and the memory. Figure 3 The example in this article is that the processor and memory are connected via a bus. Figure 3 The connections between the other components are shown in bold lines, which are only for illustration and not intended to be limiting. The bus can be divided into address bus, data bus, control bus, etc. Figure 3 The processor is represented by a single thick line, but this does not mean that there is only one bus or only one type of bus. Alternatively, the processor can also be called a controller, without any limitation on the name.

[0118] In an embodiment of the present invention, the memory stores instructions that can be executed by at least one processor. The at least one processor can execute the ultra-wideband reception channelization processing method discussed above by executing the instructions stored in the memory.

[0119] Among them, the processor is the control center of the device, which can use various interfaces and lines to connect the various parts of the entire control device, and monitor the device as a whole by running or executing instructions stored in the memory and calling data stored in the memory, the various functions of the device and processing data.

[0120] In an optional design, the processor may include one or more processing units, and the processor may integrate an application processor and a modem processor, wherein the application processor primarily processes the operating system, user interface, and application programs, and the modem processor primarily processes wireless communications. It is understood that the modem processor may not be integrated into the processor. In some embodiments, the processor and memory may be implemented on the same chip, or in some embodiments, they may be implemented on separate chips.

[0121] The processor can be a general-purpose processor, such as a CPU, a digital signal processor, an application-specific integrated circuit, a field-programmable gate array or other programmable logic device, a discrete gate or transistor logic device, or a discrete hardware component, and can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of the present invention. A general-purpose processor can be a microprocessor or any conventional processor. The steps of the ultra-wideband receive channelization processing method disclosed in the embodiments of the present invention can be directly implemented and executed by a hardware processor, or by a combination of hardware and software modules within the processor.

[0122] As a non-volatile computer-readable storage medium, memory can be used to store non-volatile software programs, non-volatile computer executable programs and modules. Memory can include at least one type of storage medium, for example, can include flash memory, hard disk, multimedia card, card-type memory, random access memory (Random Access Memory, RAM), static random access memory (Static Random Access Memory, SRAM), programmable read-only memory (Programmable Read Only Memory, PROM), read-only memory (Read Only Memory, ROM), electrically erasable programmable read-only memory (Electrically Erasable Programmable Read-Only Memory, EEPROM), magnetic memory, disk, optical disk, etc. Memory is any other medium that can be used to carry or store desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory in the embodiment of the present invention can also be a circuit or any other device that can realize a storage function, for storing program instructions and / or data.

[0123] By designing and programming a processor, the code corresponding to the ultra-wideband receive channelization processing method described in the aforementioned embodiment can be embedded in the chip, thereby enabling the chip to execute the steps of the method in the aforementioned embodiment during operation. Designing and programming a processor is well known to those skilled in the art and will not be further described here.

[0124] Based on the same inventive concept, an embodiment of the present invention further provides a storage medium storing computer instructions. When the computer instructions are executed on a computer, the computer executes the ultra-wideband receiving channelization processing method discussed above.

[0125] In some optional embodiments, the present invention also provides various aspects of an ultra-wideband reception channelization processing method, which can also be implemented in the form of a program product, which includes program code. When the program product is run on an apparatus, the program code is used to enable the control device to execute the steps of an ultra-wideband reception channelization processing method according to various exemplary embodiments of the present invention described above in this specification.

[0126] It should be noted that although several units or subunits of the device are mentioned in the detailed description above, this division is merely exemplary and not mandatory. In fact, according to an embodiment of the present invention, the features and functions of two or more units described above can be embodied in one unit. Conversely, the features and functions of a unit described above can be further divided into multiple units to be embodied. In addition, although the operations of the method of the present invention are described in a specific order in the accompanying drawings, this does not require or imply that these operations must be performed in this specific order, or that all the operations shown must be performed to achieve the desired results. Additionally or alternatively, certain steps can be omitted, multiple steps can be combined into one step, and / or one step can be decomposed into multiple steps.

[0127] It will be understood by those skilled in the art that embodiments of the present invention may be provided as methods, systems, or computer program products. Thus, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware. Furthermore, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0128] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as a combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a server, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the process in the flowchart and / or block diagram. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0129] Program code for performing the operations of the present invention may be written using any combination of one or more programming languages, including object-oriented programming languages ​​such as Java, C++, and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user's computing device, partially on the user's device, as a stand-alone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0130] Where a remote computing device is involved, the remote computing device may be connected to the user computing device through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computing device (e.g., through the Internet using an Internet service provider).

[0131] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0132] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0133] The foregoing description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Those skilled in the art will readily appreciate that various modifications and variations of the present invention are possible. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention are intended to be within the scope of protection of the present invention.

Claims

1. A method for processing ultra-wideband receiving channelization, characterized in that: include: Several de-FDM processing branches are used to process the received signals of each frequency band. The processing of the de-FDM processing branches is as follows: The broadband de-FDM module roughly divides the received signal into frequency band channels and performs multi-phase frequency conversion to obtain a multi-phase frequency conversion signal; The multiphase filtering module performs multiphase filtering and downsampling on the multiphase frequency conversion signal to obtain a first-level de-FDM signal; The fine de-FDM module performs fine frequency conversion on the first-stage de-FDM signal by finely dividing the frequency band channel to obtain a fine frequency conversion signal; The low-pass filtering module adopts parameter symmetry design and resource time division multiplexing method to perform low-pass filtering on the fine frequency conversion signal.

2. The method for ultra-wideband receiving channelization processing according to claim 1, wherein: The broadband de-FDM module performs multi-phase frequency conversion on the received signal of the corresponding frequency band by roughly dividing the frequency band channel, including: Frequency division multiplexing is used, with a total of K de-FDM processing branches. The k-th de-FDM processing branch corresponds to N' sub-bands, which are expressed as: For the sub-band signal S' of the kth de-FDM processing branch k (t) The discrete multiphase signal is obtained by discrete sampling processing, which is expressed as: Among them, A n' Indicates the signal amplitude of the n'th sub-band, kw n' =f n' / f s The frequency control word representing the discrete polyphase signal of the n'th sub-band, f s is the discrete sampling frequency, T s =1 / f s is the discrete sampling cycle time, θ n' represents the initial phase value of the n'th sub-band, m=1...M is the mth phase of the discrete multiphase signal, S' k (nMT s ) represents the discrete M-phase signal of the k-th de-FDM processing branch; The center frequencies of the K de-FDM processing branches are The center frequency is used to generate the down-converted carrier signal, which is expressed as: in, is the frequency control word of the carrier signal corresponding to the kth de-FDM processing branch, is the M-phase carrier signal; Perform down-conversion processing on each multi-phase signal to obtain a multi-phase frequency conversion signal, which is expressed as: in, is the M-phase frequency conversion signal of the k-th de-FDM processing branch.

3. The method for ultra-wideband receiving channelization processing according to claim 2, wherein: The multi-phase filtering module performs multi-phase filtering and sampling reduction on the multi-phase frequency conversion signal, including: The kth de-FDM processing branch integrates the multi-phase frequency conversion signal into a single-phase signal, which is expressed as: Each branch uses the center frequency as 2L1-order filter For the single-phase signal Filtering is performed to filter out the N' sub-band signals of interest to the kth de-FDM processing branch, and obtain the first-level de-FDM signal, which is expressed as: in, is the frequency control word of the n'th first-stage de-FDM signal of the kth de-FDM processing branch, A (k-1)·N'+n' is the signal amplitude of the n'th first-stage de-FDM signal of the kth de-FDM processing branch, θ (k-1)·N'+n' is the initial phase of the n'th first-stage de-FDM signal of the kth de-FDM processing branch, It is the first-stage de-FDM signal of the k-th de-FDM processing branch.

4. The method for ultra-wideband receiving channelization processing according to claim 3, wherein: The fine de-FDM module performs fine frequency conversion on the first-stage de-FDM signal by finely dividing the frequency band channel, including: Based on the first-stage de-FDM signal, the center frequencies of the N' sub-band channels in the k-th de-FDM processing branch are Generate the down-converted carrier signal, expressed as: Perform N'-way down-conversion on the first-stage de-FDM signal to obtain the second-stage de-FDM signal: Output N' down-converted second-stage de-FDM signals as fine frequency conversion signals, expressed as: in, is the frequency control word of the n'th second-stage de-FDM signal of the kth de-FDM processing branch, A (k-1)·N'+n' is the signal amplitude of the n'th second-stage de-FDM signal of the kth de-FDM processing branch, θ (k-1)·N'+n' is the initial phase of the n'th second-stage de-FDM signal of the kth de-FDM processing branch.

5. The method for ultra-wideband receiving channelization processing according to claim 4, wherein: The low-pass filtering module uses parameter symmetry design and resource time division multiplexing to perform low-pass filtering on the fine frequency conversion signal, including: The low-pass filter uses a D-group 2L2-order even-symmetric Hamming window low-pass filter The length of each filter group is l, D×l=L2; the fine frequency conversion signal is cached, and a total of 2L2 second-level de-FDM signals are cached. Data, the cached sub-band signal data is added end to end to obtain the cached signal data x i ,i=1...L2; Sampling frequency f s / The data rate value is kept no higher than 1, and an even symmetric Hamming window low-pass filter group is used. Time-sharing data x i , i=1...L2 performs complex multiplication, multiplexing l complex multipliers on L2 length data x under D sampling clocks i , i=1...L2 performs filtering as follows: For each of the K de-FDM processing branches, there are N', a total of N = K·N' fine frequency conversion second-stage de-FDM signals After time division multiplexing filtering, we get: Wherein, k=1...K, n'=1...N'.

6. An ultra-wideband receiving channelization processing device, characterized in that: It includes several de-FDM processing branches, each of which includes a broadband de-FDM module, a polyphase filtering module, multiple fine de-FDM modules and multiple low-pass filtering modules; The broadband de-FDM module is used to perform multi-phase frequency conversion on the received signal by roughly dividing the frequency band channel to obtain a multi-phase frequency conversion signal; The multiphase filtering module is used to perform multiphase filtering and downsampling on the multiphase frequency conversion signal to obtain a first-level de-FDM signal; The fine de-FDM module is used to perform fine frequency conversion on the first-stage de-FDM signal by finely dividing the frequency band channel to obtain a fine frequency conversion signal; The low-pass filtering module is used to perform low-pass filtering on the fine frequency conversion signal by adopting parameter symmetry design and resource time division multiplexing method.

7. An electronic device, characterized in that: include: at least one processor; and a memory communicatively coupled to the at least one processor; The memory stores instructions that can be executed by the at least one processor, and the at least one processor executes the method according to any one of claims 1 to 5 by executing the instructions stored in the memory.

8. A computer-readable storage medium, characterized in that The computer-readable storage medium is used to store instructions, and when the instructions are executed, the method according to any one of claims 1 to 5 is implemented.

9. A computer program product, characterized in that When the computer program product is called by a computer, the computer is caused to execute the method according to any one of claims 1 to 5.

Images