Metal grid, forming method thereof and back-illuminated image sensor chip

Abstract

The invention discloses a metal grating and a forming method thereof, and aims to solve the problem of optical crosstalk. The metal grating comprises a dielectric layer forming an outer layer structure, and a metal layer which is at least coated on the side wall and filled in the metal grating. The forming method comprises the following steps of: forming a mask layer on a substrate and forming a groove in the mask layer; depositing a dielectric layer on the inner wall of the groove; depositing a metal layer to fill the residual space of the groove and cover the peripheral region to form a laminated structure; and finally, removing the laminated structure part and the mask layer part outside the groove so as to limit the metal grating. Through the formed metal grating, optical crosstalk can be effectively reduced, and the imaging quality and the quantum efficiency are improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a metal grid and a forming method thereof, and a back-illuminated image sensor chip. Background Art

[0002] With the increasing demand for image quality in mobile devices, security monitoring, medical imaging and other fields, the performance optimization of image sensor chips has become a research hotspot. Image sensor chips are mainly divided into two types: front-side illuminated (FSI) and back-side illuminated (BSI). Compared with FSI image sensors, BSI image sensors place the photosensitive area (such as the photodiode) on the back of the chip, allowing the incident light to reach the photosensitive area without passing through structures such as metal wiring layers and transistors, thereby significantly improving the photon capture efficiency and quantum efficiency, especially in low-light conditions. Therefore, BSI image sensor chips are gradually becoming mainstream technology and are widely used in various imaging devices.

[0003] A BSI image sensor chip typically contains multiple pixel units, each of which houses an image sensor (e.g., a photodiode) for converting light signals into electrical signals. Other functional units, such as logic circuits, are also integrated on the silicon substrate of the wafer, forming an interconnect structure on the front side of the silicon chip. When photons strike the photosensitive area of ​​a BSI image sensor chip, the image sensor generates an electrical signal (e.g., current) proportional to the intensity of the incident light.

[0004] However, with the trend of increasing pixel density, the problem of optical crosstalk between adjacent pixel units has become increasingly prominent. Optical crosstalk refers to the scattering or leakage of light incident on one pixel unit to adjacent pixel units, resulting in signal aliasing, which reduces image clarity, contrast, and color fidelity, seriously affecting image quality. To suppress optical crosstalk, isolation structures are usually formed between pixel units, among which metal grids are a commonly used and effective method. Metal grids form an opaque metal barrier between pixels, preventing light from propagating between adjacent pixels.

[0005] Existing back-illuminated metal grid (BMG) structures, for example, in some traditional solutions, the upper half of the metal grid structure may contain a translucent oxide material. While this design can achieve a certain degree of isolation, due to the light transmittance of the oxide material, some light may still pass through the upper portion of the grid and enter adjacent pixels, resulting in insufficient suppression of light crosstalk between pixels, which in turn affects the final imaging performance. In addition, the metal material itself has a certain absorption of light of specific wavelengths, which may reduce the overall quantum efficiency of the sensor to a certain extent.

[0006] Therefore, there is an urgent need to develop a new metal grid structure and its formation method to more effectively suppress optical crosstalk between pixels while minimizing the absorption of incident light, thereby improving the comprehensive imaging performance and quantum efficiency of BSI image sensor chips. Summary of the Invention

[0007] The technical problem addressed by this invention is to overcome the shortcomings of existing metal grid structures in suppressing optical crosstalk in back-illuminated image sensor chips, as well as the potential process complexity and impact on quantum efficiency that may arise during their formation. For example, due to material selection or structural design, some conventional metal grid structures may allow some light to pass through or bypass the grid, causing crosstalk between pixels. Alternatively, the metal material may excessively absorb incident light, affecting the sensor's photosensitivity.

[0008] In order to solve the above technical problems, the present invention provides a new type of metal grid structure.

[0009] According to one aspect of the present invention, a metal grid is provided. The metal grid is suitable for being disposed on a substrate of a back-illuminated image sensor chip and isolating pixel units. The metal grid includes: a dielectric layer forming an outer layer structure of the metal grid; and a metal layer, which is coated by the dielectric layer at least in the sidewall direction and fills the inner region defined by the dielectric layer.

[0010] In some embodiments, the dielectric layer is an atomic layer deposited oxide.

[0011] In some embodiments, the metal layer comprises tungsten.

[0012] In some embodiments, the critical dimension of the metal grid is 50 nm to 300 nm.

[0013] Another aspect of the present invention provides a back-illuminated image sensor chip including the metal grid.

[0014] According to another aspect of the present invention, a method for forming a metal grid is provided. The method comprises the following steps:

[0015] Step 1: forming a mask layer on the substrate of the back-illuminated image sensor chip;

[0016] Step 2: forming at least one trench in the mask layer, wherein the at least one trench extends to a predetermined depth;

[0017] Step 3: depositing a dielectric layer on an inner wall of at least one trench;

[0018] Step 4: depositing a metal layer on the dielectric layer so that the metal layer fills the remaining space in the at least one trench after the dielectric layer is formed, and the metal layer and the dielectric layer also cover the area of ​​the mask layer outside the at least one trench, thereby forming a stacked structure.

[0019] Step 5: Remove the portion of the stacked structure located outside the at least one trench and the mask layer outside the at least one trench to define a metal grid composed of a dielectric layer and a metal layer at the original position of the at least one trench, and make the bottom of the metal grid contact or adjacent to the substrate.

[0020] In some embodiments, in step 1, the thickness of the mask layer is 2000 angstroms to 10000 angstroms.

[0021] In some embodiments, in step two, the step of forming at least one groove includes: photolithography of the mask layer using a first photolithography mask and a first photoresist to form a first photoresist pattern that defines the position of at least one groove; and etching the mask layer based on the first photoresist pattern to form at least one groove.

[0022] In some embodiments, in step 2, the first photoresist is a negative photoresist.

[0023] In some embodiments, in step 2, a critical dimension of the at least one trench formed is 50 nm to 300 nm.

[0024] In some embodiments, in step three, the dielectric layer is formed by an atomic layer deposition process.

[0025] In some embodiments, in step four, the metal layer comprises tungsten.

[0026] In some embodiments, in step five, the removal operation includes: photolithography of the stacked structure using a second photolithography mask and a second photoresist to form a second photoresist pattern that protects the stacked structure in an area within at least one groove; and etching based on the second photoresist pattern to remove portions of the stacked structure and the mask layer that are not protected by the second photoresist pattern.

[0027] In some embodiments, in step five, the second photoresist is a positive photoresist.

[0028] In some embodiments, in step five, the second photolithography mask and the first photolithography mask are the same mask.

[0029] In some embodiments, in step five, the mask layer is removed so that the substrate is exposed in the vicinity of the metal grid.

[0030] As described above, the metal grid and its forming method and the back-illuminated image sensor chip of the present invention have the following beneficial effects:

[0031] 1. Significantly Improved Optical Crosstalk: The metal layer, as the primary light blocker, effectively prevents light from propagating between adjacent pixel units. The dielectric layer encapsulating the metal layer, particularly the highly conformal oxide layer formed using atomic layer deposition, ensures the quality of the metal fill and the integrity of the metal grid sidewalls, further enhancing optical isolation.

[0032] 2. Improved imaging quality: By effectively suppressing optical crosstalk, the image clarity, contrast, and color reproduction accuracy can be improved, thereby enhancing the overall imaging performance of the back-illuminated image sensor chip.

[0033] 3. Optimizing quantum efficiency: Compared to some traditional grid structures containing thicker light-transmitting materials, the structure proposed in this invention focuses on utilizing the efficient light-blocking properties of metal and, by precisely controlling the thickness of the dielectric layer, can minimize the absorption or unnecessary scattering of effective incident light, thereby helping to maintain or improve the quantum efficiency of the sensor.

[0034] 4. Process Compatibility and Simplification: The formation method proposed in this invention is highly compatible with existing semiconductor manufacturing processes (such as photolithography, etching, atomic layer deposition, and metal deposition). In particular, in some embodiments, by cleverly utilizing the same mask with different photoresists (negative for grooving, positive for protection) to transfer key patterns, mask management can be simplified, manufacturing costs can be reduced, and process stability and alignment accuracy can be improved.

[0035] 5. Structural stability and reliability: The dielectric layer covering the metal layer can protect the metal layer from subsequent process or environmental influences, thereby improving the chemical stability and long-term reliability of the metal grid.

[0036] In summary, the present invention provides a metal grid with novel structure and superior performance and a method for forming the same, which can effectively solve the problems existing in the prior art and is of great significance for improving the performance of back-illuminated image sensor chips. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 Shown is a schematic diagram of the process flow of the present invention;

[0038] Figure 2 Shown is a schematic diagram of forming a mask layer according to the present invention;

[0039] Figure 3 Schematic diagram showing forming at least one trench in a mask layer according to the present invention;

[0040] Figure 4 It is a schematic diagram showing the sequential formation of a first oxide layer and a metal layer according to the present invention;

[0041] Figure 5 Shown is a schematic diagram of forming a metal grid according to the present invention. DETAILED DESCRIPTION

[0042] The following describes the embodiments of the present invention through specific examples. Those skilled in the art will readily understand the other advantages and benefits of the present invention from the disclosure herein. The present invention may also be implemented or applied through various other specific embodiments, and the details in this specification may be modified or altered based on different viewpoints and applications without departing from the spirit of the present invention.

[0043] See also Figure 5 The present invention discloses a metal grid, which is suitable for being arranged on a substrate 101 of a back-illuminated image sensor chip and isolating pixel units. The metal grid includes: a dielectric layer 104, which forms an outer layer structure of the metal grid;

[0044] In some embodiments, dielectric layer 104 is an atomic layer deposited oxide. The oxide layer formed using the atomic layer deposition (ALD) process has excellent conformality and thickness uniformity, and can form a high-quality film even on the inner walls of structures with high aspect ratios. This is crucial for the reliability of subsequent metal filling and the electrical isolation performance of the metal grid, while also ensuring effective coverage of the metal layer 105.

[0045] The metal layer 105 is covered by the dielectric layer 104 at least in the sidewall direction and fills the inner region defined by the dielectric layer 104 .

[0046] In some embodiments, the metal layer 105 comprises tungsten. Tungsten (W), a commonly used metal material, has good conductivity, a high melting point, good filling properties, and compatibility with semiconductor processes. It is suitable for filling trench structures with high aspect ratios. It also has excellent visible light blocking properties, effectively preventing light leakage. In other embodiments, the metal layer 105 may also be made of other well-known metal materials.

[0047] In some embodiments, the critical dimension of the metal grid is between 50 nanometers and 300 nanometers. This critical dimension range can meet the requirements of current and future high-pixel density image sensors, effectively isolating pixels while minimizing the area occupied by the metal grid, thereby helping to improve the fill factor of the photosensitive area of ​​the image sensor.

[0048] This metal grid composed of a dielectric layer 104 covering a metal layer 105 can prevent the metal layer 105 from directly reacting with other materials or environments that may be exposed in subsequent processes, such as oxidation or corrosion, through the dielectric layer 104, thereby improving the stability and reliability of the metal grid. More importantly, the metal layer 105, as the core light-blocking part, can effectively prevent the propagation of light between adjacent pixels and significantly reduce optical crosstalk. The presence of the dielectric layer 104 also helps to improve the interface properties between the metal layer 105 and the substrate 101 (if in direct contact) or the surrounding medium, which may have a positive effect on reducing interface defects and improving electrical isolation. The resulting grid structure can effectively improve the imaging clarity, contrast and color fidelity of the image sensor.

[0049] The present invention also discloses a back-illuminated image sensor chip, comprising any of the aforementioned metal grids, wherein the metal grid is disposed on the chip's substrate 101. Applying this metal grid to a back-illuminated image sensor chip significantly improves the chip's overall performance, particularly by suppressing pixel crosstalk, thereby achieving higher-quality image output. The grid structure also helps improve the sensor's quantum efficiency, particularly at small pixel sizes.

[0050] See also Figure 1 The present invention also discloses a method for forming a metal grid, the metal grid being used for a back-illuminated image sensor chip, the method comprising the following steps:

[0051] Step 1: forming a mask layer 103 on the substrate 101 of the back-illuminated image sensor chip. The material of the mask layer 103 can be an oxide such as silicon dioxide, forming a Figure 2 Before forming the mask layer 103 , other film structures (such as a pad oxide layer 102 ) may be formed on the substrate 101 .

[0052] In some embodiments, in step 1, the thickness of the mask layer 103 is 2000 angstroms to 10000 angstroms. The mask layer 103 in this thickness range can provide sufficient depth support for the subsequently formed trenches, while also facilitating process control and ensuring that the subsequent metal grid has sufficient physical height to achieve effective optical isolation.

[0053] Step 2: forming at least one trench in the mask layer 103, wherein the at least one trench extends to a predetermined depth, forming a Figure 3 The structure shown.

[0054] In some embodiments, in step 2, forming at least one trench includes: performing photolithography on the mask layer 103 using a first photolithography mask and a first photoresist to form a first photoresist pattern defining the location of the at least one trench; and etching the mask layer 103 based on the first photoresist pattern to form the at least one trench. Standard photolithography and etching processes can precisely define the geometric shape and location of the trench in the mask layer 103, laying the foundation for the subsequent precise construction of the metal grid.

[0055] In some embodiments, in step 2, the first photoresist is a negative photoresist. When patterning with a negative photoresist, the photoresist in the exposed area is retained, while the unexposed area is removed, which is suitable for forming a pattern of a trench opening.

[0056] In some embodiments, in step 2, the critical dimension of the at least one trench formed is 50 nanometers to 300 nanometers. Precisely controlling the critical dimension of the trench is crucial to the optical isolation effect of the final metal grid and its impact on the pixel aperture ratio. This range helps achieve effective isolation at high pixel density.

[0057] Step 3: depositing a dielectric layer 104 on the inner wall of at least one trench.

[0058] In some embodiments, in step three, the dielectric layer 104 is formed using an atomic layer deposition process. The atomic layer deposition process can control the growth of thin films with atomic-level precision, ensuring that a highly conformal and uniformly thick dielectric layer 104 can be formed on the inner walls of complex trenches, including the sidewalls and bottom. This is crucial for the reliable filling of the subsequent metal layer 105 and the performance consistency of the entire grid structure.

[0059] Step 4: Deposit a metal layer 105 on the dielectric layer 104 so that the metal layer 105 fills the remaining space in at least one trench after the dielectric layer 104 is formed, and the metal layer 105 and the dielectric layer 104 also cover the area of ​​the mask layer 103 outside the at least one trench, together forming a stacked structure, forming a Figure 4 The structure shown.

[0060] In some embodiments, in step 4, the metal layer 105 comprises tungsten. Filling the metal with tungsten using methods such as chemical vapor deposition (CVD) or physical vapor deposition (PVD) can ensure efficient filling of high aspect ratio trenches and form a dense metal barrier layer.

[0061] Step 5: Remove the portion of the stacked structure located outside the at least one trench and the mask layer 103 outside the at least one trench, so as to define a metal grid composed of the dielectric layer 104 and the metal layer 105 at the original position of the at least one trench, and make the bottom of the metal grid contact or be adjacent to the substrate 101, so as to form a metal grid. Figure 5 The structure shown.

[0062] In some embodiments, in step five, the removal operation includes: performing photolithography on the stacked structure using a second photolithography mask and a second photoresist to form a second photoresist pattern protecting the stacked structure in an area within at least one trench; and performing etching based on the second photoresist pattern to remove portions of the stacked structure and mask layer 103 not protected by the second photoresist pattern. This step precisely defines the metal grid area to be retained through photolithography, and then removes excess material, including the stacked material outside the trench and mask layer 103, through etching, to obtain an independent metal grid structure.

[0063] In some embodiments, in step 5, the second photoresist is a positive photoresist. When patterning with a positive photoresist, the photoresist in the exposed areas is removed, while the unexposed areas are retained. This is suitable for protecting the grid structure filled in the trench while exposing the surrounding material to be removed.

[0064] In some embodiments, in step 5, the second photolithography mask is the same as the first photolithography mask. Using the same reticle for two photolithography operations (one with a negative resist to form the trenches, and one with a positive resist to protect the filled grid) can significantly simplify the process flow, reduce reticle production costs and management complexity, and also help improve alignment accuracy between different photolithography steps.

[0065] In some embodiments, in step five, the mask layer 103 is removed, exposing the substrate 101 in the vicinity of the metal grid. Completely removing the mask layer 103 outside the trench allows the final metal grid structure to be formed directly on the substrate 101 or very close to the substrate 101 (e.g., formed on the pad oxide layer 102 on the substrate 101). This structural design may be more conducive to controlling the optical path or facilitating subsequent process steps or device integration.

[0066] The metal grid structure formed by the above method can effectively block stray light between pixels, thereby significantly reducing optical crosstalk and improving the signal-to-noise ratio and dynamic range of the image sensor. The introduction of the dielectric layer 104 not only protects the metal layer 105 and improves the interface characteristics, but also may have a certain regulatory effect on light of specific wavelengths. The entire process flow is highly compatible with existing semiconductor manufacturing technology and can be easily integrated into the manufacturing process of BSI image sensor chips, with good industrial prospects. Compared with the traditional BMG structure, the structure and formation method proposed in the present invention can more effectively balance optical isolation performance, quantum efficiency and manufacturing cost through precise material selection and structural design.

[0067] It should be noted that the illustrations provided in this embodiment are only used to schematically illustrate the basic concept of the present invention. Therefore, the illustrations only show components related to the present invention and are not drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component can be changed at will, and the component layout type may also be more complicated.

[0068] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the present invention. Anyone skilled in the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by one of ordinary skill in the art without departing from the spirit and technical principles disclosed herein are intended to be covered by the claims of the present invention.

Claims

1. A metal grille, characterized in that: The metal grid is suitable for being disposed on the substrate of the back-illuminated image sensor chip and isolating pixel units, and the metal grid includes: a dielectric layer, formed as an outer structure of the metal grid; and The metal layer is covered by the dielectric layer at least in a sidewall direction and fills an inner region defined by the dielectric layer.

2. The metal grid according to claim 1, characterized in that: The dielectric layer is an atomic layer deposited oxide.

3. The metal grid according to claim 1 or 2, characterized in that: The metal layer includes tungsten.

4. The metal grid according to claim 1, characterized in that: The critical dimension of the metal grid is 50 nanometers to 300 nanometers.

5. A back-illuminated image sensor chip, characterized in that: The metal grid according to any one of claims 1 to 4, wherein the metal grid is disposed on a substrate of the chip.

6. A method for forming a metal grid for a back-illuminated image sensor chip, characterized in that: include: Step 1: forming a mask layer on the substrate of the back-illuminated image sensor chip; Step 2: forming at least one trench in the mask layer, wherein the at least one trench extends to a predetermined depth; Step 3: depositing a dielectric layer on the inner wall of the at least one trench; Step 4: depositing a metal layer on the dielectric layer so that the metal layer fills the remaining space in the at least one trench after the dielectric layer is formed, and the metal layer and the dielectric layer also cover the area of ​​the mask layer outside the at least one trench, together forming a stacked structure; Step 5: Remove the portion of the stacked structure located outside the at least one trench and the mask layer in the at least one trench outside area to define the metal grid composed of the dielectric layer and the metal layer at the original position of the at least one trench, and make the bottom of the metal grid contact or adjacent to the substrate.

7. The method for forming a metal grid according to claim 6, wherein: In step 1, the thickness of the mask layer is 2000 angstroms to 10000 angstroms.

8. The method for forming a metal grid according to claim 6 or 7, wherein: In step two, the step of forming the at least one groove includes: photolithography of the mask layer using a first photolithography mask and a first photoresist to form a first photoresist pattern that defines the position of the at least one groove; and etching the mask layer based on the first photoresist pattern to form the at least one groove.

9. The method for forming a metal grid according to claim 8, wherein: In step 2, the first photoresist is a negative photoresist.

10. The method for forming a metal grid according to claim 6, wherein: In step 2, the critical dimension of the at least one trench formed is 50 nanometers to 300 nanometers.

11. The method for forming a metal grid according to claim 6, wherein: In step three, the dielectric layer is formed by an atomic layer deposition process.

12. The method for forming a metal grid according to claim 6, wherein: In step four, the metal layer includes tungsten.

13. The method for forming a metal grid according to claim 9, wherein: In step five, the removal operation includes: photolithography of the stacked structure using a second photolithography mask and a second photoresist to form a second photoresist pattern that protects the stacked structure in an area within the at least one groove; and etching based on the second photoresist pattern to remove the portion of the stacked structure and the mask layer portion that is not protected by the second photoresist pattern.

14. The method for forming a metal grid according to claim 13, wherein: In step five, the second photoresist is a positive photoresist.

15. The method for forming a metal grid according to claim 14, wherein: In step five, the second photolithography mask and the first photolithography mask are the same mask.

16. The method for forming a metal grid according to claim 6, wherein: In step five, the mask layer is removed so that the substrate is exposed in the vicinity of the metal grid.

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