Multi-set parallel coordinated control method and device for active power filtering devices

Abstract

The invention discloses a multi-set parallel coordinated control method and device for active power filtering devices, and the method comprises the steps: obtaining a control target voltage / current; according to the control target voltage / current, a harmonic current instruction is obtained through closed-loop control, and a clock synchronization signal is obtained according to the real-time phase of the bus voltage; obtaining a harmonic current sub-instruction corresponding to each active power filtering device according to the harmonic current instruction; and controlling each active power filtering device to synchronously output harmonic current according to the harmonic current sub-instruction and the clock synchronization signal. According to the invention, the problem of unbalanced output caused by scattered sampling and open-loop control when multiple sets of active power filtering devices are operated in parallel can be improved.

Description

Technical Field

[0001] The present invention belongs to the field of power systems and power electronics, and particularly relates to a method and device for controlling multiple sets of parallel coordinated active power filter devices. Background Art

[0002] In power systems, the fundamental cause of harmonics is the presence of nonlinear components, such as power electronic switches, arc furnaces, and transformer cores. Generally speaking, various nonlinear loads are the largest sources of harmonics. When a sinusoidal voltage is applied to a nonlinear load, the current flowing through the load is not linearly related to the applied voltage, resulting in a non-sinusoidal current and the generation of harmonics. The main hazards of harmonics include:

[0003] 1) Reduce the system capacity of transformers, circuit breakers, cables, etc.;

[0004] 2) Accelerate equipment aging, shorten equipment service life, or even damage equipment;

[0005] 3) endangering production safety and stability, causing equipment to malfunction;

[0006] 4) Waste of electricity.

[0007] With the advancement of power electronics technology, harmonic control solutions using power electronic converters have emerged, namely active power filters (APFs). The core component of an APF is a controllable converter valve, whose output voltage and current are highly controllable, effectively managing power system harmonics. Limited by the current and capacity of a single APF, many applications require multiple APFs operating in parallel to meet greater harmonic compensation requirements.

[0008] However, in traditional methods, to achieve parallel operation of multiple APFs, each APF control unit needs to independently collect the voltage and current of the control target, resulting in repeated sampling. Each APF also needs to be equipped with a sampling device, wasting hardware resources. At the same time, due to the open-loop control method, the sampling accuracy of each sampling device has certain deviations, resulting in errors in the harmonic control of each APF and uneven harmonic output. Therefore, it is necessary to propose a simple and effective method to improve the above problems and achieve balanced output when multiple APFs are operated in parallel. Summary of the Invention

[0009] The purpose of the present invention is to provide a method and device for coordinated control of multiple sets of active power filter devices in parallel, so as to improve the output imbalance problem caused by distributed sampling and open-loop control when multiple sets of active power filter devices are operated in parallel.

[0010] In order to achieve the above object, the solution of the present invention is:

[0011] A method for coordinated control of multiple parallel active power filter devices, comprising:

[0012] Get the control target voltage / current;

[0013] According to the control target voltage / current, a harmonic current instruction is obtained by adopting closed-loop control, and a clock synchronization signal is obtained according to the real-time phase of the bus voltage;

[0014] Obtaining a harmonic current sub-command corresponding to each active power filter device according to the harmonic current command;

[0015] According to the harmonic current sub-command and the clock synchronization signal, each active power filter device is controlled to synchronously output the harmonic current.

[0016] Wherein, obtaining the control target current includes:

[0017] Obtain the current of each harmonic load branch;

[0018] The currents of the harmonic load branches are summed to obtain a control target current.

[0019] Wherein, obtaining the control target current includes:

[0020] Obtain the main transformer trunk current and the branch current where each active power filter device is located;

[0021] The control target current is obtained by subtracting the sum of the branch currents where the active power filter devices are located from the main transformer trunk current.

[0022] Wherein, obtaining the harmonic current sub-instruction corresponding to each active power filter device according to the harmonic current instruction includes:

[0023] The number of active power filter devices actually put into parallel operation is obtained, and the harmonic current sub-instructions corresponding to each active power filter device are evenly distributed according to the harmonic current instructions.

[0024] Wherein, each active power filter device synchronously outputs harmonic current according to the harmonic current sub-instruction and the clock synchronization signal, including:

[0025] Each active power filter device generates a harmonic current instantaneous value instruction according to the harmonic current sub-instruction and the clock synchronization signal, performs closed-loop feedback tracking based on the actual current of the active power filter device to generate a trigger pulse, and controls the converter valve of the active power filter device to output the harmonic current.

[0026] A multi-set parallel coordinated control device for active power filter devices, comprising:

[0027] A voltage / current acquisition module is configured to acquire a control target voltage / current;

[0028] a harmonic current instruction acquisition module configured to obtain a harmonic current instruction using closed-loop control according to the control target voltage / current;

[0029] A clock synchronization signal acquisition module is configured to obtain a clock synchronization signal according to the real-time phase of the bus voltage;

[0030] a harmonic current sub-command acquisition module configured to obtain a harmonic current sub-command corresponding to each active power filter device according to the harmonic current command; and

[0031] The control module is configured to control each active power filter device to synchronously output harmonic current according to the harmonic current sub-instruction and the clock synchronization signal.

[0032] The voltage / current acquisition module acquires the control target current, including:

[0033] Obtain the current of each harmonic load branch;

[0034] The currents of the harmonic load branches are summed to obtain a control target current.

[0035] The voltage / current acquisition module acquires the control target current, including:

[0036] Obtain the main transformer trunk current and the branch current where each active power filter device is located;

[0037] The control target current is obtained by subtracting the sum of the branch currents where the active power filter devices are located from the main transformer trunk current.

[0038] The harmonic current sub-command acquisition module obtains the harmonic current sub-command corresponding to each active power filter device according to the harmonic current command, including:

[0039] The number of active power filter devices actually put into parallel operation is obtained, and the harmonic current sub-instructions corresponding to each active power filter device are evenly distributed according to the harmonic current instructions.

[0040] The control module controls each active power filter device to synchronously output harmonic current according to the harmonic current sub-instruction and the clock synchronization signal, including:

[0041] Each active power filter device generates a harmonic current instantaneous value instruction according to the harmonic current sub-instruction and the clock synchronization signal, performs closed-loop feedback tracking based on the actual current of the active power filter device to generate a trigger pulse, and controls the converter valve of the active power filter device to output the harmonic current.

[0042] A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor; characterized in that when the processor executes the computer program, the steps of the aforementioned method for coordinated control of multiple sets of parallel active power filter devices are implemented.

[0043] A computer-readable storage medium stores a computer program; when the computer program is executed by a processor, the steps of the aforementioned method for coordinated control of multiple sets of parallel active power filter devices are implemented.

[0044] After adopting the above scheme, the present invention addresses the problem that when multiple sets of active power filter devices are operated in parallel and the output of multiple filter devices is difficult to balance when compensating for the same control target, a coordinated control unit is used to sample the control target voltage or current, and a closed-loop control strategy is adopted. Each filter device does not need to be sampled separately, which reduces the number of target voltage and current sampling devices of the active power filter device sub-control unit. At the same time, since the harmonic control accuracy of the closed-loop control is higher than that of the open-loop control, the compensation error caused by the difference in characteristics of multiple sampling devices and the open-loop control is avoided; at the same time, the present invention realizes the synchronization of the harmonic instructions of the multiple filter devices based on the harmonic phase synchronization technology, ensures the consistency of the harmonic current output of the multiple filter devices, and realizes the parallel balanced output of the multiple active power filter devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 This is the main wiring diagram of the active power filter device application scenario;

[0046] Figure 2 This is a communication architecture diagram of the active power filter device coordination control unit and sub-control units;

[0047] Figure 3 It is a schematic diagram of the coordinated control principle of multiple sets of active power filter devices. DETAILED DESCRIPTION

[0048] The present invention provides a method for coordinated control of multiple sets of parallel active power filter devices, comprising:

[0049] Get the control target voltage / current;

[0050] According to the control target voltage / current, a harmonic current instruction is obtained by adopting closed-loop control, and a clock synchronization signal is obtained according to the real-time phase of the bus voltage;

[0051] Obtaining a harmonic current sub-command corresponding to each active power filter device according to the harmonic current command;

[0052] According to the harmonic current sub-command and the clock synchronization signal, each active power filter device is controlled to synchronously output the harmonic current.

[0053] Wherein, obtaining the control target current includes:

[0054] Obtain the current of each harmonic load branch;

[0055] The currents of the harmonic load branches are summed to obtain a control target current.

[0056] Wherein, obtaining the control target current includes:

[0057] Obtain the main transformer trunk current and the branch current where each active power filter device is located;

[0058] The control target current is obtained by subtracting the sum of the branch currents where the active power filter devices are located from the main transformer trunk current.

[0059] Wherein, obtaining the harmonic current sub-instruction corresponding to each active power filter device according to the harmonic current instruction includes:

[0060] The number of active power filter devices actually put into parallel operation is obtained, and the harmonic current sub-instructions corresponding to each active power filter device are evenly distributed according to the harmonic current instructions.

[0061] Wherein, each active power filter device synchronously outputs harmonic current according to the harmonic current sub-instruction and the clock synchronization signal, including:

[0062] Each active power filter device generates a harmonic current instantaneous value instruction according to the harmonic current sub-instruction and the clock synchronization signal, performs closed-loop feedback tracking based on the actual current of the active power filter device to generate a trigger pulse, and controls the converter valve of the active power filter device to output the harmonic current.

[0063] A multi-set parallel coordinated control device for active power filter devices, comprising:

[0064] A voltage / current acquisition module is configured to acquire a control target voltage / current;

[0065] a harmonic current instruction acquisition module configured to obtain a harmonic current instruction using closed-loop control according to the control target voltage / current;

[0066] A clock synchronization signal acquisition module is configured to obtain a clock synchronization signal according to the real-time phase of the bus voltage;

[0067] a harmonic current sub-command acquisition module configured to obtain a harmonic current sub-command corresponding to each active power filter device according to the harmonic current command; and

[0068] The control module is configured to control each active power filter device to synchronously output harmonic current according to the harmonic current sub-instruction and the clock synchronization signal.

[0069] The voltage / current acquisition module acquires the control target current, including:

[0070] Obtain the current of each harmonic load branch;

[0071] The currents of the harmonic load branches are summed to obtain a control target current.

[0072] The voltage / current acquisition module acquires the control target current, including:

[0073] Obtain the main transformer trunk current and the branch current where each active power filter device is located;

[0074] The control target current is obtained by subtracting the sum of the branch currents where the active power filter devices are located from the main transformer trunk current.

[0075] The harmonic current sub-command acquisition module obtains the harmonic current sub-command corresponding to each active power filter device according to the harmonic current command, including:

[0076] The number of active power filter devices actually put into parallel operation is obtained, and the harmonic current sub-instructions corresponding to each active power filter device are evenly distributed according to the harmonic current instructions.

[0077] The control module controls each active power filter device to synchronously output harmonic current according to the harmonic current sub-instruction and the clock synchronization signal, including:

[0078] Each active power filter device generates a harmonic current instantaneous value instruction according to the harmonic current sub-instruction and the clock synchronization signal, performs closed-loop feedback tracking based on the actual current of the active power filter device to generate a trigger pulse, and controls the converter valve of the active power filter device to output the harmonic current.

[0079] The technical solutions and beneficial effects of the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments.

[0080] Existing active power filter devices, when operating in parallel, rely on open-loop control due to a lack of effective coordinated control methods. This sampling error can lead to uneven output across the filter devices and low control accuracy. In light of this, the present invention utilizes centralized sampling, closed-loop control, and phase synchronization technologies to reduce the number of target voltage and current sampling circuits within the active power filter sub-control units, improve harmonic control accuracy, and achieve balanced, synchronized output from multiple active power filter devices in parallel.

[0081] Figure 1This is a schematic diagram of the main wiring of an active power filter application scenario. The power grid supplies power to m load branches through a 220kV / 35kV transformer. Harmonics exist in the load current, so n active power filter devices are installed on the same busbar to control the load harmonics.

[0082] Figure 2 This is a communication architecture diagram of the active power filter device coordination control unit and sub-control unit. The diagram adopts a master-slave communication architecture, that is, the coordination control unit is the master and the sub-control unit is the slave. The master and the slave exchange control instructions and operating status through communication. The communication method can be optical fiber Ethernet communication or other methods. The communication rate and delay meet the requirements of the control system.

[0083] In this embodiment, the functions of the coordination control device are mainly realized by the coordination control unit, such as Figure 3 As shown, the coordinated control unit includes a control target sampling link, a harmonic phase synchronization link, a target harmonic control link, and a harmonic current instruction distribution link, and the sub-control unit includes a harmonic current instruction generation link and a harmonic current tracking control link; the coordinated control unit and the sub-control units use communication to realize the interaction of control instructions and operating status, and the harmonic phase synchronization link is used to realize synchronous control between the coordinated control unit and each sub-control unit.

[0084] First, the control target sampling link centrally collects and controls the target voltage or current to realize the function of the voltage / current acquisition module; the target harmonic control link uses a deviation-based closed-loop control method to generate the total harmonic current instructions of all APFs, and generates a clock synchronization signal according to the real-time phase of the bus voltage to which all APFs are connected, which is used for phase synchronization of each set of APF sub-control units, and comprehensively realizes the functions of the harmonic current instruction acquisition module and the clock synchronization signal acquisition module; the instruction distribution link distributes the harmonic current amplitude instruction in combination with the actual number of APFs in operation. Usually, the load rate of each APF can be set to be consistent, and the instructions are distributed in proportion according to the capacity of all normally operating APFs, and the harmonic current amplitude instruction value and the clock synchronization signal are sent to each APF sub-module control unit in combination with the clock synchronization signal.

[0085] Secondly, each APF submodule control unit receives the harmonic current amplitude command value and clock synchronization signal issued by the coordination control unit, generates a harmonic current instantaneous value command, and generates a trigger pulse for the converter valve through closed-loop feedback tracking of the actual current. The converter valve finally outputs the required harmonic current.

[0086] Among them, there are two ways to obtain the control target current, that is, the total load current, direct method and indirect method. The direct method refers to collecting the current of each harmonic load branch and summing them to obtain the total load current; the indirect method refers to collecting the current of the main transformer trunk line and each APF branch, and then using the trunk line current to subtract the sum of the currents of each APF branch to obtain the total load current.

[0087] Among them, a deviation-based closed-loop control method is adopted to generate the total harmonic current instructions of all APFs, that is, the deviation between the control target voltage / current target value and the actual measured value is calculated, and a logical operation is performed according to the deviation to obtain the total harmonic current instructions of all APFs. The instructions can adjust the current of each APF to achieve the adjustment of the control target voltage / current, forming a closed loop of the signal to reduce the deviation and make the deviation meet the control requirements.

[0088] An embodiment of the present invention further provides another computer device, comprising a processor and a memory configured to store a computer program that can be run on the processor; wherein, when the processor is configured to run the computer program, the method steps in the aforementioned embodiment are executed.

[0089] In practical applications, the processor includes a field-programmable gate array (FPGA), and the processor may be a central processing unit (CPU) or a digital signal processor (DSP). It is understood that for different devices, the electronic components used to implement the above-mentioned processor functions may also be other, and the embodiments of the present invention are not specifically limited thereto.

[0090] The above-mentioned memory can be a volatile memory (volatile memory), such as a random-access memory (RAM); or a non-volatile memory (non-volatile memory), such as a read-only memory (ROM), a flash memory, a hard disk (HDD) or a solid-state drive (SSD); or a combination of the above types of memory, and provides instructions and data to the processor.

[0091] In an exemplary embodiment, the present invention further provides a computer-readable storage medium for storing a computer program.

[0092] Optionally, the computer-readable storage medium can be applied to any one of the methods in the embodiments of the present invention, and the computer program enables the computer to execute the corresponding processes implemented by the processor in each method in the embodiments of the present invention. For the sake of brevity, they are not repeated here.

[0093] In the several embodiments provided by the present invention, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely schematic. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as: multiple units or components can be combined, or can be integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the components shown or discussed can be through some interfaces, and the indirect coupling or communication connection of the devices or units can be electrical, mechanical or other forms.

[0094] It will be understood by those skilled in the art that the embodiments of the present invention may be provided as methods, systems, or computer program products. Therefore, the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Furthermore, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code. The solutions in the embodiments of the present invention may be implemented in various computer languages, for example, the object-oriented programming language Java and the interpreted scripting language JavaScript.

[0095] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowcharts and / or block diagrams, as well as combinations of processes and / or blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowcharts and / or block diagrams. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0096] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0097] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 The steps for the function specified in one or more boxes.

[0098] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present invention.

[0099] Obviously, those skilled in the art may make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if such changes and modifications fall within the scope of the claims and their equivalents, the present invention is intended to include such changes and modifications.

Claims

1. A method for coordinated control of multiple parallel active power filter devices, characterized by: include, Get the control target voltage / current; According to the control target voltage / current, a harmonic current instruction is obtained by adopting closed-loop control, and a clock synchronization signal is obtained according to the real-time phase of the bus voltage; Obtaining a harmonic current sub-command corresponding to each active power filter device according to the harmonic current command; According to the harmonic current sub-command and the clock synchronization signal, each active power filter device is controlled to synchronously output the harmonic current.

2. The method according to claim 1, wherein: Get the control target current, including, Obtain the current of each harmonic load branch; The currents of the harmonic load branches are summed to obtain a control target current.

3. The method according to claim 1, wherein: Get the control target current, including, Obtain the main transformer trunk current and the branch current where each active power filter device is located; The control target current is obtained by subtracting the sum of the branch currents where the active power filter devices are located from the main transformer trunk current.

4. The method according to claim 1, wherein: According to the harmonic current instruction, a harmonic current sub-instruction corresponding to each active power filter device is obtained, include, The number of active power filter devices actually put into parallel operation is obtained, and the harmonic current sub-instructions corresponding to each active power filter device are evenly distributed according to the harmonic current instructions.

5. The method according to claim 1, wherein: Each active power filter device synchronously outputs harmonic current according to the harmonic current sub-command and the clock synchronization signal, including: Each active power filter device generates a harmonic current instantaneous value instruction according to the harmonic current sub-instruction and the clock synchronization signal, performs closed-loop feedback tracking based on the actual current of the active power filter device to generate a trigger pulse, and controls the converter valve of the active power filter device to output the harmonic current.

6. A parallel coordinated control device for multiple sets of active power filter devices, characterized by: include, A voltage / current acquisition module is configured to acquire a control target voltage / current; a harmonic current instruction acquisition module configured to obtain a harmonic current instruction using closed-loop control according to the control target voltage / current; A clock synchronization signal acquisition module is configured to obtain a clock synchronization signal according to the real-time phase of the bus voltage; a harmonic current sub-command acquisition module, configured to obtain a harmonic current sub-command corresponding to each active power filter device according to the harmonic current command; as well as, The control module is configured to control each active power filter device to synchronously output harmonic current according to the harmonic current sub-instruction and the clock synchronization signal.

7. The device according to claim 6, characterized in that: The voltage / current acquisition module acquires the control target current, including: Obtain the current of each harmonic load branch; The currents of the harmonic load branches are summed to obtain a control target current.

8. The device according to claim 6, wherein: The voltage / current acquisition module acquires the control target current, including: Obtain the main transformer trunk current and the branch current where each active power filter device is located; The control target current is obtained by subtracting the sum of the branch currents where the active power filter devices are located from the main transformer trunk current.

9. The device according to claim 6, wherein: The harmonic current sub-command acquisition module obtains the harmonic current sub-command corresponding to each active power filter device according to the harmonic current command. include, The number of active power filter devices actually put into parallel operation is obtained, and the harmonic current sub-instructions corresponding to each active power filter device are evenly distributed according to the harmonic current instructions.

10. The device according to claim 6, wherein: The control module controls each active power filter device to synchronously output harmonic current according to the harmonic current sub-instruction and the clock synchronization signal, including: Each active power filter device generates a harmonic current instantaneous value instruction according to the harmonic current sub-instruction and the clock synchronization signal, performs closed-loop feedback tracking based on the actual current of the active power filter device to generate a trigger pulse, and controls the converter valve of the active power filter device to output the harmonic current.

11. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor; characterized in that: When the processor executes the computer program, the steps of the method for coordinated control of multiple sets of parallel active power filter devices according to any one of claims 1 to 5 are implemented.

12. A computer-readable storage medium storing a computer program; characterized in that: When the computer program is executed by a processor, the steps of the method for coordinated control of multiple sets of parallel active power filter devices according to any one of claims 1 to 5 are implemented.

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