Layered iterative parallel computing method and device for load flow sparse equation of multiple leading edge surfaces

Abstract

The invention relates to a hierarchical iterative parallel computing method and device for a load flow sparse equation of multiple leading edge surfaces, and the method comprises the steps: distributing different numbers of computing resources for each branch and each node of a Jacobian matrix parallel hierarchical elimination tree according to the structural characteristics of the Jacobian matrix parallel hierarchical elimination tree; according to the allocated computing resources, taking a branch subordinate to a root node of the Jacobian matrix parallel hierarchical elimination tree as a unit, and carrying out sub-matrix computing on nodes in parallel from a lower-layer node to an upper-layer node; storing a Jacobian sub-matrix obtained by sub-matrix calculation, and storing an LU decomposition and contribution sub-matrix of a node dense sub-matrix obtained by LU decomposition of the sub-matrix; and superposing the contribution sub-matrix calculated by the lower-layer node to the corresponding node of the upper layer, and synchronously updating the data in the Jacobian sub-matrix. The power flow equation matrix decomposition efficiency can be improved, and the power flow calculation effectiveness is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of tidal current calculation, and in particular to a hierarchical iterative parallel calculation method for tidal current sparse equations on multiple frontier surfaces. Background Art

[0002] Power flow calculation is a very important analytical calculation for power systems. It calculates the electrical quantities of the power system under steady-state operation, including active power, reactive power, and voltage distribution in the power grid, based on the power system's wiring method, parameters, and operating conditions. Power flow calculation is also the basis for system safety, stability, and reliability analysis, and is used to study various issues raised in system planning and operation. For planned power systems, power flow calculation can verify whether the proposed power system planning scheme can meet the requirements of various operating modes; for operating power systems, power flow calculation can predict whether various load changes and changes in network structure will endanger system safety, whether the voltage of all buses in the system is within the allowable range, whether various components in the system (lines, transformers, etc.) will be overloaded, and what preventive measures should be taken in advance when overload is likely to occur.

[0003] Existing literature (Nwankpa C, Johnson J, Nagvajara P, et al.FPGA hardware results for power system computation[C] / / 2009 IEEE / PES Power Systems Conference and Exposition.0[2023-09-26].DOI:10.1109 / PSCE.2009.4839953.) proposes a power flow calculation FPGA system based on the Newton-Raphson method by collecting data from the real-time SCADA system network and telemetry transmission. The solution strategy for the linear equations is the matrix LU decomposition method, which adopts the PCI pipeline bus architecture and uses FPGA hardware to reduce the pivot search time and accelerate the LU decomposition.

[0004] This solution uses the Newton-Raphson method to solve power flow. When calculating the matrix decomposition of the sparse power flow equations, it employs a conventional serial approach. However, power flow calculations in power systems typically require both timeliness and accuracy, often requiring solutions for networks with thousands of dimensions. When faced with large-scale power grid power flow calculations, especially those requiring high timeliness, this approach suffers from computational delays and low timeliness, making it difficult to meet the power grid's requirements for fast response and high accuracy in power flow calculations. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide a multi-frontal tidal current sparse equation hierarchical iterative parallel calculation method and device, which can improve the effectiveness of tidal current calculation.

[0006] The technical solution adopted by the present invention to solve the technical problem is to provide a hierarchical iterative parallel calculation method for power flow sparse equations on multiple frontier surfaces, including the following steps:

[0007] According to the structural characteristics of the Jacobi matrix parallel hierarchical elimination tree, different amounts of computing resources are allocated to each branch and each node of the Jacobi matrix parallel hierarchical elimination tree;

[0008] According to the allocated computing resources, the sub-matrix calculations are performed on the nodes in parallel from the lower nodes to the upper nodes, taking the branches under the root node of the Jacobi matrix parallel hierarchical elimination tree as the unit;

[0009] The Jacobian submatrix obtained by calculating the submatrix is ​​stored, and the LU decomposition and contribution submatrix of the node dense submatrix obtained by LU decomposition of the submatrix are stored;

[0010] The contribution sub-matrix calculated by the lower-level nodes is superimposed on the corresponding nodes in the upper layer, and the data in the Jacobian sub-matrix is ​​updated synchronously.

[0011] The method allocates different amounts of computing resources to each branch and each node of the Jacobi matrix parallel hierarchical elimination tree based on the structural characteristics of the Jacobi matrix parallel hierarchical elimination tree, including a forward search processing stage and a reverse search processing stage. The forward search processing stage searches from the root node of the Jacobi matrix parallel hierarchical elimination tree to the lower layer, and is used to allocate an estimated value of the number of node sub-matrix computing resources to all nodes of the Jacobi matrix parallel hierarchical elimination tree; the reverse search processing stage starts from the end node of the Jacobi matrix parallel hierarchical elimination tree and searches upward, and is used to perform number allocation of node sub-matrix computing resources and modify the resource quantity.

[0012] The forward search processing stage specifically includes:

[0013] When the address pointer of the root node is not empty, repeat the following process:

[0014] Search each node in the hierarchical elimination tree in turn, obtain the child node number of the root node, and save it to the child node number register;

[0015] Determine whether the current root node is a supernode. If the current root node is not a supernode, record the resources required by the current root node and save the value in the child node number register to the node resource allocation register. If the current root node is a supernode, save the starting node address of the supernode to the supernode address register according to the current root node number from the supernode linked list.

[0016] Traverse all supernodes and repeat the following process: take out the current supernode number from the supernode number register and save it to the supernode number register, save the value in the supernode number register to the node resource register, take out the address of the next supernode from the supernode pointer register and save it to the supernode address register;

[0017] Complete the resource allocation of the current root node, search for the next node, save the currently searched root node number to the leaf node number register, save the current root node address to the leaf node address register, and update the value in the root node address register to the address pointer of the next root node.

[0018] The reverse search processing stage specifically includes:

[0019] Point the resource allocation address of the leaf node found in the forward search processing phase to the cell address where the new resource is to be inserted, connect the newly added resource allocation address to the node resource allocation linked list at the current leaf node number, and update the resource quantity register required by the node at the current address;

[0020] Determine the number of child nodes of the parent node of the current node, save the parent node address of the current leaf node from the parent node register to the parent node address register, and take out the number of children of the parent node from the child node number register and save it to the child node number register of the parent node;

[0021] When the value in the parent node address register is not empty, the following process is executed in a loop:

[0022] Point the node resource allocation address pointer register at the current leaf node address to the current cell address where the new resource is to be inserted, and save the offset address of the current leaf node linked list to the starting address register of the resource required by the current node;

[0023] Find the resource number of the child node of the current leaf node, take out the number of child nodes of the leaf node, save it to the child node number register of the leaf node, take out the first address of the child node of the leaf node from the child node linked list address pointer linked list register, and save it to the child node address register of the leaf node; traverse all the child nodes of the leaf node and repeat the following first sub-process:

[0024] The first sub-process includes:

[0025] Take out the child node number and save it to the child node number register of the leaf node, then find the resource allocation number of each child node in turn; save the node resource allocation starting address of the current child node to the child node resource address register of the leaf node, and save the resource quantity of the child node to the child node resource quantity register of the leaf node; traverse each resource of the child node and repeat the following second sub-process:

[0026] The second sub-process includes:

[0027] Write the value in the child node number register of the leaf node into the resource number register at the parent node address; save the starting address of the resource required by the current node to the address pointer register of the previous resource, and update the starting address of the resource required by the current node to the current cell address of the new resource to be inserted; increase the address pointed to by the next resource address pointer register of the current node by 1;

[0028] Find the next child node address of the leaf node and save it to the child node address register of the leaf node to complete the child node resource numbering of all leaf nodes;

[0029] Update the search order, continue searching toward the upper node of the current leaf node, save the parent node number of the current leaf node from the parent node number register to the leaf node number register, and save the parent node address of the current node to the parent node address register.

[0030] The sub-matrix calculation for the node includes column element calculation, and the column element calculation specifically includes:

[0031] Save the address of the first row of the non-zero element of the submatrix linked list of the i-th node into the submatrix row number address register, save the number of non-zero elements of the i-th node submatrix from the column element number register into the i-th node dimension register, and then save the value in the i-th node dimension register as the dimension of the submatrix into the submatrix dimension register;

[0032] Take out the first address of the column list of the i-th node from the Jacobi matrix column list address pointer register and save it to the column node address register; save the address of the first column of the non-zero element of the lower triangular matrix L decomposed by the i-th child node from the lower triangular matrix address pointer register to the lower triangular matrix L column address register; save the submatrix address of the i-th node to the Jacobi submatrix address register;

[0033] Traverse the sub-matrix dimensions and repeat the following process:

[0034] Set the read and write burst length of the memory, pull high the read valid signal of the memory, set the read data counter to the loop count of 1, 2, and 3, perform the memory read operation from the address of the first element of the current node column stored in the column node address register, and save the data to the data bus. When the value of the read data counter is 1 and 2, save the data on the data bus to the sub-matrix data register respectively;

[0035] Save the column element row number value at the address in the column node address register to the sub-matrix row number register;

[0036] The write address of the current Jacobi submatrix data is saved in the Jacobi data address register; the first column data of the Jacobi submatrix is ​​saved in the submatrix cell pointed to by the address in the Jacobi data address register, the row number of the Jacobi submatrix data is recorded, the submatrix row number is saved in the submatrix node row number register, and the column element address pointer of the current matrix points to the next non-zero element and is saved in the column node address register;

[0037] The row number written into the lower triangular matrix L is stored in the submatrix node row number register, the submatrix row node number address of the i-th node is the value in the submatrix row number address register, and the value in the submatrix dimension register is saved to the dimension register; the write address of the lower triangular matrix L is positioned as the value in the column address register of the lower triangular matrix L, and the Jacobi submatrix data is written into the lower triangular matrix L data register; the Jacobi submatrix row number is written into the row register of the lower triangular matrix L; the write address of the lower triangular matrix L is shifted down one unit;

[0038] After the traversal is completed, the column data of the Jacobian submatrix of the i-th node is obtained, and the first column of the Jacobian submatrix is ​​written into the first column of the lower triangular matrix L;

[0039] Update the column address pointer register of the lower triangular matrix L to point to the write address of the next column data.

[0040] The sub-matrix calculation for the node includes row element calculation, and the row element calculation specifically includes:

[0041] The address of the first element of the i-th row is taken from the row address pointer register of the upper triangular matrix U and saved to the row address register of the upper triangular matrix U. The node data counter is initialized and the number of row elements of the i-th node is saved to the row element number register. When the value of the node data counter is less than the value in the row element number register, the following process is repeated:

[0042] The starting row address of the i-th node is saved in the row node address register, the memory read / write burst length is set, and the memory read valid signal is pulled high; the read data counter is set to 1, 2, and 3 loop counts, and a memory read operation is performed from the address of the first element of the current node row stored in the row node address register, and the data is saved to the data bus. When the value of the read data counter is 1 and 2, the data on the data bus is saved to the sub-matrix data register respectively. When the value of the read data counter is 3, the data on the data bus is saved to the Jacobian sub-matrix column label register;

[0043] Save the column index value of the current sub-matrix target column to the target column register. If the sub-matrix column index value is the same as the value in the target column register, execute the following process:

[0044] The Jacobi submatrix starting address plus the offset address of the Jacobi submatrix data to be written is saved in the Jacobi data address register, and the Jacobi submatrix data is written into the submatrix pointed to by the Jacobi data address register;

[0045] The column number of the first row of data written to the upper triangular matrix U is stored in the submatrix row node number register. The write address of the upper triangular matrix U is positioned as the value in the upper triangular matrix U row address register. The Jacobi submatrix data is written to the upper triangular matrix U data register. The Jacobi submatrix column number is written to the column register of the upper triangular matrix U. The write address of the upper triangular matrix U is shifted down one unit.

[0046] After completing the above process, we can obtain the Jacobian submatrix row data of the i-th node and write the first row of the Jacobian submatrix into the first row of the upper triangular matrix U.

[0047] Update the row offset address pointer register of the upper triangular matrix U to point to the next row write address.

[0048] The Jacobian submatrix obtained by submatrix calculation is stored, and the LU decomposition and contribution submatrix of the node dense submatrix obtained by LU decomposition of the submatrix are stored. Specifically, a node submatrix address register is set to store the storage address of each node submatrix; each subnode is set to a submatrix storage linked list to store the intermediate submatrix decomposition results in the calculation process, and the submatrix storage linked list includes a dense submatrix register, an LU decomposition register, and a contribution submatrix register; wherein the dense submatrix includes three subsidiary registers, the first subsidiary register and the second subsidiary register respectively store the row label value and the column label value of the non-zero row in the current column of the dense submatrix, and the third subsidiary register stores the dimension of the dense submatrix; the LU decomposition register stores the result of LU decomposition of each node, and the contribution submatrix register stores the contribution value matrix of the current node to other nodes in the upper layer.

[0049] The step of superimposing the contribution submatrix calculated by the lower layer nodes onto the corresponding nodes in the upper layer and synchronously updating the data in the Jacobian submatrix specifically includes:

[0050] Traverse all rows and columns of the contribution submatrix and repeat the following process:

[0051] The storage address of the contribution sub-matrix is ​​saved in the contribution sub-matrix address register, and then the contribution sub-matrix data is taken from the contribution sub-matrix address of the LU sub-matrix register and saved in the contribution sub-matrix data register;

[0052] Take the corresponding contribution submatrix row number and column number from the Jacobi submatrix row number register, and save them to the Jacobi row register and Jacobi column register respectively;

[0053] Add the value in the contribution sub-matrix data register to the cell pointed to by the Jacobi row register and the Jacobi column register; save the address of the first row of non-zero elements whose row number is the value in the Jacobi row register from the Jacobi row address pointer register to the Jacobi row address register, and save the column number at the address in the Jacobi row address register to the Jacobi column number register;

[0054] The number of row elements in the Jacobian matrix at the address in the Jacobian row address register is saved in the Jacobian row element number register;

[0055] Initialize the Jacobi element number counter. When the value in the Jacobi column number register is not equal to the value in the Jacobi column register, and the value in the Jacobi data element number counter is less than the value in the Jacobi row element number register, execute the following process:

[0056] Update the current Jacobian row address register, save the column number value of the next Jacobian element in the current row to the Jacobian column number register, and update the Jacobian element number counter;

[0057] At the address in the Jacobi row address register, historical data is retrieved from the Jacobi data register and saved in the Jacobi historical data register; the value of the contribution sub-matrix is ​​added to the current Jacobi matrix, and the new value is saved in the new Jacobi data register; the value in the new Jacobi data register is saved in the Jacobi data register.

[0058] The technical solution adopted by the present invention to solve the technical problem is to provide a hierarchical iterative parallel computing device for power flow sparse equations on multiple frontier surfaces, comprising:

[0059] A node resource allocation calculation module is used to allocate different amounts of computing resources to each branch and each node of the Jacobi matrix parallel hierarchical elimination tree according to the structural characteristics of the Jacobi matrix parallel hierarchical elimination tree;

[0060] The node sub-matrix parallel decomposition module is used to perform sub-matrix calculations on nodes in parallel from lower nodes to upper nodes based on the allocated computing resources and with the branches under the root node of the Jacobi matrix parallel hierarchical elimination tree as the unit;

[0061] The Jacobian submatrix linked list calculation module is used to store the Jacobian submatrix obtained by submatrix calculation, and store the LU decomposition and contribution submatrix of the node dense submatrix obtained by LU decomposition of the submatrix;

[0062] The superposition calculation module is used to superimpose the contribution sub-matrix calculated by the lower-level nodes to the corresponding nodes in the upper layer, and synchronously update the data in the Jacobian sub-matrix.

[0063] The technical solution adopted by the present invention to solve its technical problem is: to provide an FPGA-based power flow parallel computing system, including the above-mentioned multi-frontal power flow sparse equation hierarchical iterative parallel computing device.

[0064] The technical solution adopted by the present invention to solve its technical problem is: providing a computer-readable storage medium on which a computer program is stored, and when the computer program is executed by a processor, the steps of the hierarchical iterative parallel calculation method of the tidal current sparse equations on multiple frontier surfaces are implemented.

[0065] Beneficial effects

[0066] Due to the adoption of the above-mentioned technical solution, the present invention has the following advantages and positive effects compared with the prior art: the present invention allocates different amounts of computing resources to each branch and each node, and then based on the allocated computing resources, performs sub-matrix calculations on the node sub-matrices in parallel from the lower-level nodes to the upper-level nodes, and based on the calculation results, superimposes the contribution sub-matrix calculated by the lower-level nodes to the corresponding nodes in the upper level, and synchronously updates the Jacobian matrix. This method can achieve the highest degree of parallel execution when solving the sparse equation group of large-scale network current flow, speed up the calculation time of traditional matrix decomposition, reduce the time of solving the equation group in a serial manner, speed up the efficiency of the current equation matrix decomposition, and improve the effectiveness of current calculation. BRIEF DESCRIPTION OF THE DRAWINGS

[0067] Figure 1 Flowchart of the hierarchical iterative parallel calculation method for power flow sparse equations on multiple frontier surfaces according to the first embodiment of the present invention;

[0068] Figure 2 1. It is a schematic diagram of the hierarchical relationship of the parallel computing nodes of the multi-frontal equation group in the first embodiment of the present invention;

[0069] Figure 3 1 is a schematic diagram of the node submatrix LU decomposition and contribution matrix linked list structure in the first embodiment of the present invention;

[0070] Figure 4 Schematic diagram of the superposition of node contribution submatrices on upper-level nodes in the first embodiment of the present invention;

[0071] Figure 5 1 is a diagram showing the corresponding relationship between the node submatrix LU decomposition result and the Jacobi LU decomposition in the first embodiment of the present invention;

[0072] Figure 6 is a flowchart of computing resource allocation of sub-matrix nodes in the first embodiment of the present invention;

[0073] Figure 7 1 is a schematic diagram of a linked list storage structure for node resource allocation in the first embodiment of the present invention;

[0074] Figure 8 1 is a block diagram of a multi-frontal power flow sparse equation hierarchical iterative parallel computing device according to a second embodiment of the present invention;

[0075] Figure 9 4 is a schematic diagram of an FPGA-based power flow parallel computing system according to a third embodiment of the present invention. DETAILED DESCRIPTION

[0076] Below in conjunction with specific embodiment, further set forth the present invention.Should be understood that these embodiments are only used to illustrate the present invention and are not used in limiting the scope of the present invention.In addition, should be understood that after reading the content taught by the present invention, those skilled in the art can make various changes or modifications to the present invention, and these equivalent forms fall equally within the scope limited by the appended claims of the application.

[0077] The first embodiment of the present invention relates to a multi-frontal sparse power flow equation hierarchical iterative parallel calculation method, such as Figure 2 As shown, this method allocates resources to each node in the parallel hierarchical elimination tree that generates the original Jacobian matrix. The subtree composed of all descendant nodes of the root node in the tree can be calculated in parallel (in the box), and all descendant branches of the same node are assigned to the same sub-matrix calculation module (sub_matrix_compute, SMC). After the calculation in the solid box is completed, the matrix decomposition iterative calculation is performed layer by layer from the end node to the upper layer, and the contribution results are gradually accumulated to the upper root node. The circle represents the super node with the same structure, and finally the decomposition of the entire Jacobian matrix is ​​completed, which speeds up the solution of the power flow calculation.

[0078] In the Jacobian matrix parallel hierarchical elimination tree, this embodiment first determines the branches composed of all descendant nodes of each root node, performs parallel resource allocation, and independently calculates the matrix decomposition of the nodes in each branch set in each sub-matrix calculation module. When the calculation of each node is completed, the contribution value of the current node to other nodes in the upper layer is accumulated to the corresponding node, and the judgment is performed at the root node. When all branches are calculated, the contribution values ​​of the node sub-matrices calculated in the lower layer are superimposed. Each node in the tree represents a dense sub-matrix, which is composed of all non-zero column elements of the Jacobian matrix in the column where the node number is located, and is recorded as sub_jacoby_matrix. Figure 1 As shown, this embodiment specifically includes the following steps:

[0079] Step 1: Allocate different amounts of computing resources to each branch and each node of the Jacobian matrix parallel hierarchical elimination tree according to the structural characteristics of the Jacobian matrix parallel hierarchical elimination tree.

[0080] The resource allocation process of this embodiment includes a forward search process and a backward search process. First, the search starts from the root node and moves downwards. Each time a lower-level node is found to be the root node, the nodes in the subtree consisting of all the descendant nodes of the root node are assigned to the submatrix calculation module SMC. The number of independent submatrix calculation modules required is equal to the number of the lowest-level subtrees in the hierarchical elimination tree.

[0081] The node_SMC_id register stores the SMC number assigned to each node in the tree. This reduces computational resource consumption at the end nodes of the hierarchical elimination tree, allowing fewer resources to be allocated to solving the dense submatrix decomposition. As computation progresses toward the root node, the contributions of each lower node to the upper node are accumulated. When the root node is reached, the computation is completed using the computational resources of all the root node's child subtrees.

[0082] like Figure 6 As shown, according to the block structure of the matrix and the number of nodes in each sub-matrix, as well as the structural characteristics of the Jacobian matrix parallel hierarchical elimination tree, different amounts of computing resources are allocated to each branch and each node. The number of the sub-matrix calculation module SMC is stored in the node resource allocation list, and the corresponding sub-matrix block data is allocated to the corresponding computing module for parallel computing. The scale of the computing task in the hierarchical elimination tree gradually increases from the lower nodes to the upper nodes. When the root node in the hierarchical elimination tree is calculated, the required computing resources are the sum of all branches. The specific implementation process is as follows:

[0083] Set the node_resource register to store the number of sub-matrix calculation module resources required for each node, and start searching from the root node root_node_id. First, take out the address of the root node from the child node number first address pointer register head_child_id and save it to the root_node_addr register, root_node_addr←head_child_id[root_node_id]. The following process is divided into a forward search processing stage and a reverse search processing stage. The forward search processing stage searches from the root node of the Jacobi matrix parallel hierarchical elimination tree to the lower layer, which is used to allocate the estimated value of the number of node sub-matrix calculation resources to all nodes of the Jacobi matrix parallel hierarchical elimination tree. The reverse search processing stage starts from the end node of the Jacobi matrix parallel hierarchical elimination tree and searches upward to perform the number allocation and resource quantity correction of the node sub-matrix calculation resources.

[0084] The forward search processing phase process is as follows:

[0085] When the address pointer of the root node is not null, that is, root_node_addr≠null, repeat the following process:

[0086] Search each node in the hierarchical elimination tree in turn, obtain the child node number of the root node and save it to the child node number register root_child_num, that is, root_child_num←num_child[root_node_id].

[0087] Determine whether the current root node root_node_addr is a super node, take out the super node identifier of the current node from the super node identifier register super_node_num, save it to the sub_node_num register, that is, sub_node_num←super_node_num[root_node_id], and then determine whether it is a super node.

[0088] If the super node identifier is 0, that is, sub_node_num=0, it means that the current root node is not a super node. Record the resources required by the current root node and save the value in the child node number register to the node resource allocation register node_resource, that is, node_resource[root_node_id]←root_child_num.

[0089] If the supernode ID is greater than 0, that is, sub_node_num>0, it means that the current root node is a supernode, and resources are allocated to all nodes in the supernode set. According to the current root node number root_node_id in the supernode linked list super_node, the starting node address of the supernode is saved to the supernode address register sub_node_addr, that is, sub_node_addr←super_node[root_node_id].

[0090] Set the supernode counter cnt_sub_node from 1 to the number of supernodes sub_node_node, traverse all supernodes, and repeat the following process:

[0091] The current supernode number is taken out from the supernode number register sup_node_id and saved into the supernode number register sub_node_id, i.e., sub_node_id←sup_node_id[sub_node_addr]; the value in the supernode number register is saved into the node resource register node_resource, i.e., node_resource[sub_node_id]←sub_node_id; the address of the next supernode is taken out from the supernode pointer register subnode_down_ptr and saved into the supernode address register sub_node_addr, i.e., sub_node_addr←subnode_down_ptr[sub_node_addr].

[0092] The above completes the resource allocation of the current root node. Then the search continues for the next node. The currently searched root node ID root_node_id is saved to the leaf node ID register leaf_node_id, that is, leaf_node_id←root_node_id. The current root node address root_node_addr is saved to the leaf node address register leaf_node_addr, that is, leaf_node_addr←root_node_addr. The root node address register root_node_addr is updated, that is, root_node_addr←down_ptr[root_node_addr]. When the value in the root node address register root_node_addr is empty, the loop ends; otherwise, the loop continues.

[0093] After the above process is completed, the estimated value of the resource allocation quantity has been completed for all nodes in the hierarchical elimination tree. The reverse search processing phase starts from the current end node.

[0094] The reverse search processing phase proceeds as follows:

[0095] When the address pointer of the root node in the forward search processing phase is null, that is, root_node_addr=null, the process of the reverse search processing phase begins, starting from the last leaf node and searching the upper nodes layer by layer, and calculating the resource number value and resource quantity correction value of each node.

[0096] like Figure 7 As shown, the register node_SMC_num[31:0][2(n-1)-1:0] representing the number of resources allocated to each node is set, node_SMC_id represents the resource allocation linked list address pointer register of each node, the first address of the linked list is the value in the register node_SMC_addr, and the data unit of each resource in the linked list consists of three parts. The SMC_up_ptr and SMC_down_ptr address pointer registers represent the address pointers of the previous and next resources of the current resource respectively, the SMC_id register represents the current resource number, and the current_SMC_addr register represents the cell address of the new resource to be inserted in the linked list.

[0097] The resource allocation address of the leaf node leaf_node_addr searched in the forward search processing phase is pointed to the cell address current_SMC_addr where the new resource is to be inserted, that is, node_SMC_id[leaf_node_addr]←current_SMC_addr, and the currently added resource allocation address is connected to the node resource allocation linked list node_SMC_id at the current leaf node number leaf_node_id. The offset address is node_SMC_addr+leaf_node_id, SMC_up_ptr[current_SMC_addr]←node_SMC_addr+leaf_node_id, and the resource quantity register SCM_id required for the node at the current address is updated, that is, SMC_id[current_SMC_addr]←SMC_id[current_SMC_addr]+1.

[0098] Determine the number of child nodes of the parent node of the current node, save the parent node address of the current leaf node from the parent node register parent_id to the parent node address register parent_node_addr, that is, parent_node_addr←parent_id[leaf_node_addr], take out the number of children of the parent node from the child node number register num_child and save it to the parent node child node number register paren_child_num, that is, parent_child_num←num_child[parent_node_id].

[0099] When the value in the parent node address register parent_node_addr is not empty, the following process is executed in a loop:

[0100] The node resource allocation address pointer register node_SMC_id at the current leaf node address points to the current cell address current_SMC_addr where the new resource is to be inserted, that is, node_SMC_id[leaf_node_addr]←current_SMC_addr, and the offset address node_SMC_addr+leaf_node_id of the current leaf node linked list is saved to the starting address register SMC_start_addr of the resource required by the current node, that is, SMC_start_addr←node_SMC_addr+leaf_node_id.

[0101] Find the resource SMC number of the child node of the current leaf node, first take out the number of child nodes of the leaf node, save it to the leaf node child node number register leaf_child_num, that is, leaf_child_num←num_child[leaf_node_id], take out the first address of the child node of the leaf node from the child node list address pointer list register head_child_id, and save it to the leaf node child node address register leaf_child_addr, that is, leaf_child_addr←head_child_id[leaf_node_id]; set the child node number counter cnt_child_num from 1 to leaf_child_num, traverse all child nodes of the leaf node, and repeat the following sub-process 1:

[0102] Sub-process 1: Take out the child node number and save it to the leaf node's child node number register leaf_child_id, that is, leaf_child_id←child_id[leaf_child_addr], and then find the resource allocation number of each child node in turn. Save the node resource allocation starting address of the current child node to the leaf node's child node resource address register leaf_child_SMC_addr, that is, leaf_child_SMC_addr←node_SMC_id[leaf_child_id], and save the number of resources of the child node to the leaf node's child node resource number register leaf_child_SMC_num, that is, leaf_child_SMC_num←node_SMC_num[leaf_child_id]. Search the resource number for each resource of the child node, set the resource counter cnt_SMC_num from 1 to the total number of child node resources leaf_child_SMC_num, and repeat the following sub-process 2:

[0103] Sub-process 2: Write the value in the leaf node's child node ID register, leaf_child_SMC_id, to the resource ID register, SMC_id, at the parent node's address, current_SMC_addr, i.e., SMC_id[current_SMC_addr] ← leaf_child_SMC_id. Save the starting address, SMC_start_addr, of the resource required by the current node to the previous resource's address pointer register, SMC_up_ptr, i.e., SMC_up_ptr[current_SMC_addr] ← SMC_start_addr. Then, update the current address, current_SMC_addr, to the new starting address, i.e., SMC_start_addr ← current_SMC_addr. Increment the address pointed to by the next resource address pointer register, SMC_down_ptr, of the current node, i.e., SMC_down_ptr[current_SMC_addr] ← current_SMC_addr + 1. At this point, the resource ID of the first child is complete, and Sub-process 2 ends.

[0104] Next, the address of the next child node of the leaf node is found and saved in the leaf node's child node address register leaf_child_addr, i.e. leaf_child_addr←down_ptr[leaf_child_addr]. At this point, the child node resource numbering of all leaf nodes is completed, and sub-process 1 ends.

[0105] Then, the search order is updated and the search continues toward the parent node of the current leaf node. The parent node ID of the current leaf node is saved from the parent node ID register parent_id to the leaf node ID register leaf_node_id, i.e. leaf_node_id←parent_id[leaf_node_id]. At the same time, the parent node address of the current node is saved to the parent node address register parent_node_addr, i.e. parent_node_addr←parent_id[leaf_node_id].

[0106] At this point, the resource allocation of all nodes in the hierarchical elimination tree is completed through the above forward search processing stage and reverse search processing stage.

[0107] Step 2: Based on the allocated computing resources, the sub-matrix calculations are performed on the nodes in parallel from the lower nodes to the upper nodes, taking the branches under the root node of the Jacobi matrix parallel hierarchical elimination tree as the unit.

[0108] This step is based on the row-compressed storage format and column list of the Jacobian matrix, starting from the last leaf node of the hierarchical elimination tree and working its way up to the nodes in the upper layer. For each node, the dense submatrix sub_jacoby_matrix consisting of the non-zero elements in the corresponding column of the Jacobian column list is first calculated. The first column of the submatrix is ​​the non-zero column element in the list, and the first row is the corresponding row element in the row-compressed storage. The row and column numbers of sub_jacoby_matrix are the row numbers of the non-zero column elements.

[0109] The following is the sub-matrix calculation process of the i-th node, which includes two parts: the column element calculation part and the row element calculation part.

[0110] The column element calculation process is as follows:

[0111] The address of the first non-zero element in the submatrix linked list of the i-th node is saved to the submatrix row number address register row_id_addr, that is, row_id_addr ← sub_matrix_row_addr[i]. The number of non-zero elements in the i-th node submatrix is ​​saved from the column element number register jacoby_col_num to the i-th node dimension register sub_dimention_i, that is, sub_dimention_i ← jacoby_col_num[i]. Then, the value in the i-th node dimension register is saved as the submatrix dimension to the submatrix dimension register sub_matrix_dimention[i], that is, sub_matrix_dimention[i] ← sub_dimention_i. The node submatrix is ​​a square matrix with a dimension of sub_matrix_row.

[0112] Take the first address of the column list of the i-th node from the Jacobian matrix column list address pointer register head_jacoby_colptr and save it to the column node address register node_col_addr, that is, node_col_addr←head_jacoby_colptr[i]. Save the address of the first column of the non-zero element of the lower triangular matrix L decomposed by the i-th child node from the lower triangular matrix address pointer register L_col_ptr to the lower triangular matrix L column address register L_col_addr, that is, L_col_addr←L_col_ptr[i]. Save the sub-matrix address of the i-th node to the Jacobian sub-matrix address register sub_jacoby_matrix_addr, that is, sub_jacoby_matrix_addr←sub_matrix_node[i].

[0113] Set the submatrix row number counter cnt_row from 1 to the submatrix dimension sub_dimention_i to traverse, and repeat the following process:

[0114] Set the read and write burst length of the synchronous dynamic random access memory (SDRAM), that is, burst_length←12, pull up the read valid signal of SDRAM, that is, R_SDRAM_sig←1, set the read data counter to the loop count of 1, 2, and 3, perform the SDRAM read operation from the address of the first element of the current node column stored in the column node address register, and save the data to the data bus RW_SDRAM. When the value of the read data counter is 1 and 2, that is, cnt_t=1 and 2, the data on the data bus is saved to the sub-matrix data register sub_jacoby_data, that is, sub_jacoby_data[63:32]←RW_SDRAM, sub_jacoby_data[31:0]←RW_SDRAM.

[0115] The column element row number value at the address node_col_addr in the column node address register is saved to the sub-matrix row number register sub_jacoby_row, that is, sub_jacoby_row←row_num[node_col_addr]. Next, the Jacobian data is saved to the sub-matrix sub_jacoby_matrix.

[0116] The write address of the current Jacobian sub-matrix data is saved to the Jacobian data address register jacoby_data_addr, that is, jacoby_data_addr←sub_jacoby_matrix_add+(sub_jacoby_row-1)×sub_dimention_i+1. Save the first column data sub_jacoby_data of the Jacobian submatrix to the submatrix cell pointed to by the address in the Jacobian data address register jacoby_data_addr, that is, sub_jacoby_matrix[jacoby_data_addr]←sub_yacoby_data, record the row number of the Jacobian submatrix data, save the submatrix row number sub_jacoby_row to the submatrix node row number register sub_matrix_row_id, that is, sub_matrix_row_id[row_id_addr]←sub_jacoby_row, and point the column element address pointer of the current matrix to the next non-zero element and save it to the column node address register node_col_addr, that is, node_col_addr←down_ptr[node_col_addr].

[0117] Next, the data in the first column of the Jacobian submatrix is ​​synchronously written to the first column of the lower triangular matrix L. The row number written to the lower triangular matrix L is stored in the submatrix node row number register sub_matrix_row_id. The submatrix row node number address of the i-th node is the value in the submatrix row number address register row_id_addr. The value in the submatrix dimension register (i.e., the dimension of the i-th submatrix) is saved in the dimension register sub_dimention, i.e., sub_dimention←sub_matrix_dimention[i]. The write address for locating the lower triangular matrix L is the value in the lower triangular matrix L column address register L_col_addr. The Jacobian submatrix data sub_jacoby_data is written to the lower triangular matrix L data register L_data, i.e., L_data[L_col_addr]←sub_jacoby_data. The Jacobian submatrix row number sub_jacoby_row is written to the row register L_row of the lower triangular matrix L, i.e., L_row[L_col_addr]←sub_jacoby_row. Finally, the write address of the lower triangular matrix L is shifted down by one unit, that is, L_col_addr←L_col_addr+1.

[0118] At this point, the column data of the Jacobian submatrix sub_jacoby_matrix of the i-th node has been calculated, and the first column of the submatrix is ​​written into the first column of the lower triangular matrix L.

[0119] Finally, the column address pointer register L_row_ptr of the lower triangular matrix L is updated to point to the write address L_col_addr of the next column data, that is, L_row_ptr[i+1]←L_col_addr.

[0120] The row element calculation process is as follows:

[0121] Take the address of the first element of the i-th row from the row address pointer register U_row_ptr of the upper triangular matrix U and save it to the row address register U_row_addr of the upper triangular matrix U, that is, U_row_addr←U_row_addr[i]. Set the node data counter cnt_col←0, and save the number of row elements of the i-th node to the row element number register node_row_num, that is, node_row_num←jacoby_row_ptr[i+1]-jacoby_row_ptr[i]. When the value of the node data counter cnt_col is less than the value in the row element number register, repeat the following process:

[0122] First, save the starting row address of node i to the row node address register node_row_addr, that is, node_row_addr←jacoby_row_ptr[i], set the SDRAM read and write burst length, that is, burst_length←12, and pull high the SDRAM read valid signal, that is, R_SDRAM_sig←1. Set the read data counter to 1, 2, and 3 loop counts, perform the SDRAM read operation from the current node row head element address in the row node address register, and save the data to the data bus RW_SDRAM. When the value of the read data counter is 1 and 2, that is, cnt_t=1 and 2, the data on the data bus is saved to the sub_jacoby_data register, that is, sub_jacoby_data[63:32]←RW_SDRAM, sub_jacoby_data[31:0]←RW_SDRAM, respectively. When the value of the read data counter is 3, that is, cnt_t=3, the data on the data bus is saved to the Jacobian submatrix column label register sub_jacoby_col, that is, sub_jacoby_col←RW_SDRAM.

[0123] Save the column index value of the current sub-matrix target column to the target column register target_col, that is, target_col←sub_matrix_row_id[cnt_col+1]. If the sub-matrix column index value sub_jacoby_co is the same as the target column index value in the target column register, execute the following process:

[0124] The Jacobian submatrix starting address sub_jacoby_matrix_addr plus the offset address cnt_col+2 of the Jacobian submatrix data to be written are saved to the Jacobian data address register jacoby_data_addr, that is, jacoby_data_addr←sub_jacoby_matrix_addr+ cnt_col+2, and the Jacobian submatrix data sub_jacoby_data is written to the submatrix pointed to by the Jacobian data address register jacoby_data_addr, that is, sub_jacoby_matrix[jacoby_data_addr]←sub_jacoby_data, and then the node data counter cnt_col←cnt_col+1 is updated.

[0125] Next, the first row of the Jacobian submatrix data is synchronously written to the first row of the upper triangular matrix U. The column number of the first row of the upper triangular matrix U is stored in the submatrix row node number register sub_matrix_row_id. The write address of the upper triangular matrix U is located with the value in the upper triangular matrix U row address register U_row_addr. The Jacobian submatrix data sub_jacoby_data is written to the upper triangular matrix U data register U_data, that is, _data[U_row_addr]←sub_jacoby_data. The Jacobian submatrix column number sub_jacoby_col is written to the column register U_col of the upper triangular matrix U, that is, U_col[U_row_addr]←sub_jacoby_col. Finally, the write address U_row_addr of the upper triangular matrix U is shifted down one unit, that is, U_row_addr←U_row_addr+1.

[0126] At this point, the Jacobian submatrix sub_jacoby_matrix row data of the i-th node has been calculated, and the first row of the submatrix is ​​written to the first row of the upper triangular matrix U.

[0127] Finally, update the row offset address pointer register U_row_ptr of the upper triangular matrix U to point to the next row write address u_row_addr, that is, U_row_ptr[i+1]←u_row_addr.

[0128] At this point, the Jacobian sub-matrix sub_jacoby_matrix can be calculated through the above column element calculation process and row element calculation process.

[0129] Step 3: Store the Jacobian submatrix obtained by calculating the submatrix, and store the LU decomposition and contribution submatrix of the node dense submatrix obtained by LU decomposition of the submatrix.

[0130] This step uses the Figure 3The node sub-matrix LU decomposition and contribution matrix linked list structure shown are specifically as follows: the node sub-matrix address register sub_matrix_node[31:0][2(n-1)-1:0] is set to store the storage address of each node sub-matrix, where n represents the number of nodes, and sub_matrix_node[i] points to the storage address of the first element of the dense sub-matrix sub_jacoby_matrix formed by the i-th node. Each child node sets a submatrix storage linked list to store the intermediate submatrix decomposition results during the calculation process. This submatrix storage linked list includes the dense submatrix register sub_jacoby_matrix, the LU decomposition register sub_matrix_LU, and the contribution submatrix register sub_matrix_contribution. The dense submatrix sub_jacoby_matrix contains three subsidiary registers: the first subsidiary register sub_matrix_row_id and the second subsidiary register sub_matrix_col_id store the row and column index values ​​of the current non-zero row in the dense submatrix, respectively. The third subsidiary register sub_matrix_dimension[2(n-1)-1:0] stores the dimension of the dense submatrix. The LU decomposition register sub_matrix_LU stores the result of the LU decomposition of each node. The contribution submatrix register sub_matrix_contribution stores the contribution value matrix of the current node to other nodes in the upper layer. The sub_matrix_row_addr register stores the row number starting address of the i-th node.

[0131] Step 4: Superimpose the contribution sub-matrix calculated by the lower-level nodes to the corresponding nodes in the upper layer, and synchronously update the data in the Jacobian sub-matrix.

[0132] like Figure 4 As shown in , it represents the cumulative contribution of the calculated submatrix results to the related nodes in the upper layer. For node i, the contribution values ​​of all descendant nodes of node i to node i need to be accumulated into the original Jacobian matrix. The accumulated and updated Jacobian matrix value is saved in the update_jacoby register. When performing matrix decomposition at each node, the most recently accumulated value in the update_jacoby register needs to be used for the next matrix decomposition.

[0133] This step adds the contribution submatrix sub_matrix_contriburion calculated by the lower-level node i to the upper-level node to the corresponding upper-level node, completing the numerical update of the Jacobian matrix. The dimension of the contribution submatrix of the lower-level node i to the upper-level node is the dimension of the Jacobian submatrix sub_jacoby_matrix - 1.

[0134] The dimension of the Jacobian submatrix of node i is taken from the submatrix dimension register sub_matrix_dimention and saved to the sub_dimention register, i.e., sub_dimention←sub_matrix_dimention[i]. The dimension of the contribution submatrix is ​​calculated and saved to contri_dimention←sub_dimention-1. The storage address of the LU submatrix after submatrix decomposition of the i-th node is taken from the submatrix address pointer register sub_matrix_node and saved to the sub_LU_addr register, i.e., sub_LU_addr←sub_matrix_node[i].

[0135] Set the row number counter row_i of the submatrix from 2 to the contributing submatrix dimension contri_dimention and traverse the column number counter col_j of the submatrix from 2 to the contributing submatrix dimension contri_dimention, and repeat the following process:

[0136] First, the storage address of the contribution sub-matrix is ​​saved to the contribution sub-matrix address register contri_addr, that is, contri_addr←(row_i-1)×contri_dimention+col_j, and then the contribution sub-matrix data is taken from the contribution sub-matrix address contri_addr of the LU sub-matrix register sub_matrix_LU and saved to the contribution sub-matrix data register contri_data, that is, contri_data←sub_matrix_LU[contri_addr].

[0137] Next, find the corresponding row and column numbers in the Jacobian matrix affected by the contributing submatrix. Take the corresponding contributing submatrix row number and column number from the Jacobian submatrix row number register sub_matrix_row_id and save them to the Jacobian row register jacoby_row_i and the Jacobian column register jacoby_col_j, respectively, that is, jacoby_row_i ← sub_matrix_row_id[row_i], jacoby_col_j ← sub_matrix_row_id[col_j].

[0138] Then, the value in the contribution submatrix data register contri_data is added to the cell pointed to by the value in the Jacobian row register jacoby_row_i and the Jacobian column register jacoby_col_j. First, the address of the first non-zero element in the row numbered by the value in the Jacobian row register jacoby_row_i is saved from the Jacobian row address pointer register jacoby_row_ptr to the Jacobian row address register jacoby_row_addr, that is, jacoby_row_addr←jacoby_row_ptr[jacoby_row_i]. The column number at the row address in the Jacobian row address register jacoby_row_addr is saved to the Jacobian column number register jacoby_col_id, that is, jacoby_col_id←jacob_col[jacoby_row_addr].

[0139] The number of row elements in the Jacobian matrix whose row number is the address in the Jacobian row address register jacoby_row_i is saved to the Jacobian row element number register jacoby_row_num, that is, jacoby_row_num←jacoby_row_ptr[jacoby_row_i+1]-jacoby_row_ptr[jacoby_row_i].

[0140] Set the Jacobian element number counter cnt_col to 0. When the value in the Jacobian column number register jacoby_col_id is not equal to the value in the Jacobian column register jacoby_col_j, and the value in the Jacobian data number counter cnt_col is less than the value in the Jacobian row element number register jacoby_row_num, execute the following process:

[0141] Update the current Jacobian row address register, i.e., jacoby_row_addr ← jacoby_row_addr + 1. Save the column number of the next Jacobian element in the current row to the Jacobian column number register, jacoby_col_id, i.e., jacoby_col_id ← jacoby_col [jacoby_row_addr]. Update the Jacobian element counter, i.e., cnt_col ← cnt_col + 1. At this point, the location jacoby_row_addr where the contributing submatrix is ​​written to the Jacobian matrix has been found.

[0142] The historical data at the address in the Jacobi row address register jacoby_row_addr is retrieved from the Jacobi data register jacoby_data and saved to the Jacobi historical data register old_jacoby_data, i.e., old_jacoby_data←jacoby_data[jacoby_row_addr]. The value of the contribution submatrix contri_data is added to the current Jacobi matrix and the new value is saved to the new Jacobi data register new_jacoby_data, i.e., new_jacoby_data←old_jacoby_data+contri_data. Finally, the value in the new Jacobi data register is saved to the Jacobi data register jacoby_data, i.e., jacoby_data[jacoby_row_addr]←new_jacoby_data.

[0143] At this point, the numerical superposition update process of the contribution sub-matrix to the original Jacobian matrix is ​​completed.

[0144] like Figure 5 As shown in the figure, when performing the local Jacobian matrix LU decomposition at child node k, the first row of the calculated sub_matrix_LU is the kth row of the upper triangular matrix U, and the first column of sub_matrix_LU is the lower half of the kth column of the lower triangular matrix L. When all nodes in the parallel hierarchical elimination tree are calculated in parallel from the end to the upper layer, the LU decomposition of the original Jacobian matrix is ​​also calculated synchronously, which can speed up the efficiency of solving the system of equations in power flow calculations.

[0145] It is not difficult to find that the present invention allocates different amounts of computing resources to each branch and each node through a hierarchical iterative parallel computing mode of matrix nodes, performs matrix decomposition on the node sub-matrices in parallel from the lower nodes to the upper nodes, and finally, through the sub-matrix linked list, superimposes the contribution sub-matrix calculated by the lower nodes to the corresponding nodes in the upper layer, and synchronously updates the Jacobian matrix. This method can achieve the highest degree of parallel execution when solving sparse equations for large-scale network power flow, speed up the calculation time of traditional matrix decomposition, reduce the time of solving equations in serial mode, speed up the efficiency of power flow equation matrix decomposition, and improve the effectiveness of power flow calculation.

[0146] The second embodiment of the present invention relates to a multi-frontal sparse power flow equation hierarchical iterative parallel computing device, such as Figure 8 As shown, including:

[0147] A node resource allocation calculation module is used to allocate different amounts of computing resources to each branch and each node of the Jacobi matrix parallel hierarchical elimination tree according to the structural characteristics of the Jacobi matrix parallel hierarchical elimination tree;

[0148] The node sub-matrix parallel decomposition module is used to perform sub-matrix calculations on nodes in parallel from lower nodes to upper nodes based on the allocated computing resources and with the branches under the root node of the Jacobi matrix parallel hierarchical elimination tree as the unit;

[0149] The Jacobian submatrix linked list calculation module is used to store the Jacobian submatrix obtained by submatrix calculation, and store the LU decomposition and contribution submatrix of the node dense submatrix obtained by LU decomposition of the submatrix;

[0150] The superposition calculation module is used to superimpose the contribution sub-matrix calculated by the lower-level nodes to the corresponding nodes in the upper layer, and synchronously update the data in the Jacobian sub-matrix.

[0151] The node resource allocation calculation module includes a forward search unit and a reverse search unit. The forward search unit searches from the root node of the Jacobi matrix parallel hierarchical elimination tree to the lower layer, and is used to allocate an estimated value of the number of node sub-matrix calculation resources to all nodes of the Jacobi matrix parallel hierarchical elimination tree; the reverse search unit starts from the end node of the Jacobi matrix parallel hierarchical elimination tree to the upper layer, and is used to allocate the number of node sub-matrix calculation resources and correct the resource quantity.

[0152] When the forward search unit performs processing, it includes:

[0153] When the address pointer of the root node is not empty, repeat the following process:

[0154] Search each node in the hierarchical elimination tree in turn, obtain the child node number of the root node, and save it to the child node number register;

[0155] Determine whether the current root node is a supernode. If the current root node is not a supernode, record the resources required by the current root node and save the value in the child node number register to the node resource allocation register. If the current root node is a supernode, save the starting node address of the supernode to the supernode address register according to the current root node number from the supernode linked list.

[0156] Traverse all supernodes and repeat the following process: take out the current supernode number from the supernode number register and save it to the supernode number register, save the value in the supernode number register to the node resource register, take out the address of the next supernode from the supernode pointer register and save it to the supernode address register;

[0157] Complete the resource allocation of the current root node, search for the next node, save the currently searched root node number to the leaf node number register, save the current root node address to the leaf node address register, and update the value in the root node address register to the address pointer of the next root node.

[0158] When the reverse search unit performs processing, it includes:

[0159] Point the resource allocation address of the leaf node searched in the forward search unit to the cell address where the new resource is to be inserted, connect the newly added resource allocation address to the node resource allocation linked list at the current leaf node number, and update the resource quantity register required by the node at the current address;

[0160] Determine the number of child nodes of the parent node of the current node, save the parent node address of the current leaf node from the parent node register to the parent node address register, and take out the number of children of the parent node from the child node number register and save it to the child node number register of the parent node;

[0161] When the value in the parent node address register is not empty, the following process is executed in a loop:

[0162] Point the node resource allocation address pointer register at the current leaf node address to the current cell address where the new resource is to be inserted, and save the offset address of the current leaf node linked list to the starting address register of the resource required by the current node;

[0163] Find the resource number of the child node of the current leaf node, take out the number of child nodes of the leaf node, save it to the child node number register of the leaf node, take out the first address of the child node of the leaf node from the child node linked list address pointer linked list register, and save it to the child node address register of the leaf node; traverse all the child nodes of the leaf node and repeat the following first sub-process:

[0164] The first sub-process includes:

[0165] Take out the child node number and save it to the child node number register of the leaf node, then find the resource allocation number of each child node in turn; save the node resource allocation starting address of the current child node to the child node resource address register of the leaf node, and save the resource quantity of the child node to the child node resource quantity register of the leaf node; traverse each resource of the child node and repeat the following second sub-process:

[0166] The second sub-process includes:

[0167] Write the value in the child node number register of the leaf node into the resource number register at the parent node address; save the starting address of the resource required by the current node to the address pointer register of the previous resource, and update the starting address of the resource required by the current node to the current cell address of the new resource to be inserted; increase the address pointed to by the next resource address pointer register of the current node by 1;

[0168] Find the next child node address of the leaf node and save it to the child node address register of the leaf node to complete the child node resource numbering of all leaf nodes;

[0169] Update the search order, continue searching toward the upper node of the current leaf node, save the parent node number of the current leaf node from the parent node number register to the leaf node number register, and save the parent node address of the current node to the parent node address register.

[0170] The node sub-matrix parallel decomposition module includes a column element calculation unit, and the column element calculation unit includes:

[0171] Save the address of the first row of the non-zero element of the submatrix linked list of the i-th node into the submatrix row number address register, save the number of non-zero elements of the i-th node submatrix from the column element number register into the i-th node dimension register, and then save the value in the i-th node dimension register as the dimension of the submatrix into the submatrix dimension register;

[0172] Take out the first address of the column list of the i-th node from the Jacobi matrix column list address pointer register and save it to the column node address register; save the address of the first column of the non-zero element of the lower triangular matrix L decomposed by the i-th child node from the lower triangular matrix address pointer register to the lower triangular matrix L column address register; save the submatrix address of the i-th node to the Jacobi submatrix address register;

[0173] Traverse the sub-matrix dimensions and repeat the following process:

[0174] Set the read and write burst length of the memory, pull high the read valid signal of the memory, set the read data counter to the loop count of 1, 2, and 3, perform the memory read operation from the address of the first element of the current node column stored in the column node address register, and save the data to the data bus. When the value of the read data counter is 1 and 2, save the data on the data bus to the sub-matrix data register respectively;

[0175] Save the column element row number value at the address in the column node address register to the sub-matrix row number register;

[0176] The write address of the current Jacobi submatrix data is saved in the Jacobi data address register; the first column data of the Jacobi submatrix is ​​saved in the submatrix cell pointed to by the address in the Jacobi data address register, the row number of the Jacobi submatrix data is recorded, the submatrix row number is saved in the submatrix node row number register, and the column element address pointer of the current matrix points to the next non-zero element and is saved in the column node address register;

[0177] The row number written into the lower triangular matrix L is stored in the submatrix node row number register, the submatrix row node number address of the i-th node is the value in the submatrix row number address register, and the value in the submatrix dimension register is saved to the dimension register; the write address of the lower triangular matrix L is positioned as the value in the column address register of the lower triangular matrix L, and the Jacobi submatrix data is written into the lower triangular matrix L data register; the Jacobi submatrix row number is written into the row register of the lower triangular matrix L; the write address of the lower triangular matrix L is shifted down one unit;

[0178] After the traversal is completed, the column data of the Jacobian submatrix of the i-th node is obtained, and the first column of the Jacobian submatrix is ​​written into the first column of the lower triangular matrix L;

[0179] Update the column address pointer register of the lower triangular matrix L to point to the write address of the next column data.

[0180] The node sub-matrix parallel decomposition module includes a row element calculation unit, and the row element calculation unit includes:

[0181] The address of the first element of the i-th row is taken from the row address pointer register of the upper triangular matrix U and saved to the row address register of the upper triangular matrix U. The node data counter is initialized and the number of row elements of the i-th node is saved to the row element number register. When the value of the node data counter is less than the value in the row element number register, the following process is repeated:

[0182] The starting row address of the i-th node is saved in the row node address register, the memory read / write burst length is set, and the memory read valid signal is pulled high; the read data counter is set to 1, 2, and 3 loop counts, and a memory read operation is performed from the address of the first element of the current node row stored in the row node address register, and the data is saved to the data bus. When the value of the read data counter is 1 and 2, the data on the data bus is saved to the sub-matrix data register respectively. When the value of the read data counter is 3, the data on the data bus is saved to the Jacobian sub-matrix column label register;

[0183] Save the column index value of the current sub-matrix target column to the target column register. If the sub-matrix column index value is the same as the value in the target column register, execute the following process:

[0184] The Jacobi submatrix starting address plus the offset address of the Jacobi submatrix data to be written is saved in the Jacobi data address register, and the Jacobi submatrix data is written into the submatrix pointed to by the Jacobi data address register;

[0185] The column number of the first row of data written to the upper triangular matrix U is stored in the submatrix row node number register. The write address of the upper triangular matrix U is positioned as the value in the upper triangular matrix U row address register. The Jacobi submatrix data is written to the upper triangular matrix U data register. The Jacobi submatrix column number is written to the column register of the upper triangular matrix U. The write address of the upper triangular matrix U is shifted down one unit.

[0186] After completing the above process, we can obtain the Jacobian submatrix row data of the i-th node and write the first row of the Jacobian submatrix into the first row of the upper triangular matrix U.

[0187] Update the row offset address pointer register of the upper triangular matrix U to point to the next row write address.

[0188] The Jacobian submatrix linked list calculation module stores the Jacobian submatrix obtained by submatrix calculation, and stores the LU decomposition and contribution submatrix of the node dense submatrix obtained by submatrix LU decomposition. The sub_matrix_node[31:0][2(n-1)-1:0] register is set to store the storage address of each node submatrix, n represents the number of nodes, and sub_matrix_node[i] represents the storage address of the first element of the dense submatrix composed of the i-th node; each subnode sets a submatrix storage linked list to store the intermediate submatrix decomposition results in the calculation process, and the submatrix storage linked list includes a dense submatrix register, an LU decomposition register and a contribution submatrix register; wherein, the dense submatrix includes three subsidiary registers, the first subsidiary register and the second subsidiary register respectively store the row label value and the column label value of the current column non-zero row in the dense submatrix, and the third subsidiary register stores the dimension of the dense submatrix; the LU decomposition register stores the result after LU decomposition of each node, and the contribution submatrix register stores the contribution value matrix of the current node to other nodes in the upper layer.

[0189] The superposition calculation module superimposes the contribution submatrix calculated by the lower layer node to the corresponding node in the upper layer, and synchronously updates the data in the Jacobian submatrix, specifically including:

[0190] Traverse all rows and columns of the contribution submatrix and repeat the following process:

[0191] The storage address of the contribution sub-matrix is ​​saved in the contribution sub-matrix address register, and then the contribution sub-matrix data is taken from the contribution sub-matrix address of the LU sub-matrix register and saved in the contribution sub-matrix data register;

[0192] Take the corresponding contribution submatrix row number and column number from the Jacobi submatrix row number register, and save them to the Jacobi row register and Jacobi column register respectively;

[0193] Add the value in the contribution sub-matrix data register to the cell pointed to by the Jacobi row register and the Jacobi column register; save the address of the first row of non-zero elements whose row number is the value in the Jacobi row register from the Jacobi row address pointer register to the Jacobi row address register, and save the column number at the address in the Jacobi row address register to the Jacobi column number register;

[0194] The number of row elements in the Jacobian matrix at the address in the Jacobian row address register is saved in the Jacobian row element number register;

[0195] Initialize the Jacobi element number counter. When the value in the Jacobi column number register is not equal to the value in the Jacobi column register, and the value in the Jacobi data element number counter is less than the value in the Jacobi row element number register, execute the following process:

[0196] Update the current Jacobian row address register, save the column number value of the next Jacobian element in the current row to the Jacobian column number register, and update the Jacobian element number counter;

[0197] At the address in the Jacobi row address register, historical data is retrieved from the Jacobi data register and saved in the Jacobi historical data register; the value of the contribution sub-matrix is ​​added to the current Jacobi matrix, and the new value is saved in the new Jacobi data register; the value in the new Jacobi data register is saved in the Jacobi data register.

[0198] The third embodiment of the present invention relates to a power flow parallel computing system based on FPGA, such as Figure 9 As shown, the hierarchical iterative parallel computing device for power flow sparse equations including multiple frontier surfaces of the second embodiment.

[0199] The fourth embodiment of the present invention relates to a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the hierarchical iterative parallel calculation method for multi-frontal power flow sparse equations of the first embodiment.

[0200] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware. Furthermore, the present application may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage and optical storage) containing computer-usable program code.

[0201] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0202] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture including an instruction method, which is implemented in the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0203] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 The steps for the function specified in one or more boxes.

[0204] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any modifications or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present invention should be included in the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be based on the scope of protection of the claims.

Claims

1. A hierarchical iterative parallel computation method for sparse power flow equations on multiple frontiers, characterized by: The following steps are involved: According to the structural characteristics of the Jacobi matrix parallel hierarchical elimination tree, different amounts of computing resources are allocated to each branch and each node of the Jacobi matrix parallel hierarchical elimination tree; According to the allocated computing resources, the sub-matrix calculations are performed on the nodes in parallel from the lower nodes to the upper nodes, taking the branches under the root node of the Jacobi matrix parallel hierarchical elimination tree as the unit; The Jacobian submatrix obtained by calculating the submatrix is ​​stored, and the LU decomposition and contribution submatrix of the node dense submatrix obtained by LU decomposition of the submatrix are stored; The contribution sub-matrix calculated by the lower-level nodes is superimposed on the corresponding nodes in the upper layer, and the data in the Jacobian sub-matrix is ​​updated synchronously.

2. The multi-frontal sparse power flow equation hierarchical iterative parallel calculation method according to claim 1 is characterized in that: The method allocates different amounts of computing resources to each branch and each node of the Jacobi matrix parallel hierarchical elimination tree based on the structural characteristics of the Jacobi matrix parallel hierarchical elimination tree, including a forward search processing stage and a reverse search processing stage. The forward search processing stage searches from the root node of the Jacobi matrix parallel hierarchical elimination tree to the lower layer, and is used to allocate an estimated value of the number of node sub-matrix computing resources to all nodes of the Jacobi matrix parallel hierarchical elimination tree; the reverse search processing stage starts from the end node of the Jacobi matrix parallel hierarchical elimination tree to the upper layer, and is used to perform number allocation of node sub-matrix computing resources and modify the resource quantity.

3. The hierarchical iterative parallel calculation method for sparse power flow equations on multiple frontier surfaces according to claim 2 is characterized in that: The forward search processing stage specifically includes: When the address pointer of the root node is not empty, repeat the following process: Search each node in the hierarchical elimination tree in turn, obtain the child node number of the root node, and save it to the child node number register; Determine whether the current root node is a supernode. If the current root node is not a supernode, record the resources required by the current root node and save the value in the child node number register to the node resource allocation register. If the current root node is a supernode, save the starting node address of the supernode to the supernode address register according to the current root node number from the supernode linked list. Traverse all supernodes and repeat the following process: take out the current supernode number from the supernode number register and save it to the supernode number register, save the value in the supernode number register to the node resource register, take out the address of the next supernode from the supernode pointer register and save it to the supernode address register; Complete the resource allocation of the current root node, search for the next node, save the currently searched root node number to the leaf node number register, save the current root node address to the leaf node address register, and update the value in the root node address register to the address pointer of the next root node.

4. The hierarchical iterative parallel computing method for sparse power flow equations on multiple frontier surfaces according to claim 2, characterized in that: The reverse search processing stage specifically includes: Point the resource allocation address of the leaf node found in the forward search processing phase to the cell address where the new resource is to be inserted, connect the newly added resource allocation address to the node resource allocation linked list at the current leaf node number, and update the resource quantity register required by the node at the current address; Determine the number of child nodes of the parent node of the current node, save the parent node address of the current leaf node from the parent node register to the parent node address register, and take out the number of children of the parent node from the child node number register and save it to the child node number register of the parent node; When the value in the parent node address register is not empty, the following process is executed in a loop: Point the node resource allocation address pointer register at the current leaf node address to the current cell address where the new resource is to be inserted, and save the offset address of the current leaf node linked list to the starting address register of the resource required by the current node; Find the resource number of the child node of the current leaf node, take out the number of child nodes of the leaf node, save it to the child node number register of the leaf node, take out the first address of the child node of the leaf node from the child node linked list address pointer linked list register, and save it to the child node address register of the leaf node; traverse all the child nodes of the leaf node and repeat the following first sub-process: The first sub-process includes: Take out the child node number and save it to the child node number register of the leaf node, then find the resource allocation number of each child node in turn; save the node resource allocation starting address of the current child node to the child node resource address register of the leaf node, and save the resource quantity of the child node to the child node resource quantity register of the leaf node; traverse each resource of the child node and repeat the following second sub-process: The second sub-process includes: Write the value in the child node number register of the leaf node into the resource number register at the parent node address; save the starting address of the resource required by the current node to the address pointer register of the previous resource, and update the starting address of the resource required by the current node to the current cell address of the new resource to be inserted; increase the address pointed to by the next resource address pointer register of the current node by 1; Find the next child node address of the leaf node and save it to the child node address register of the leaf node to complete the child node resource numbering of all leaf nodes; Update the search order, continue searching toward the upper node of the current leaf node, save the parent node number of the current leaf node from the parent node number register to the leaf node number register, and save the parent node address of the current node to the parent node address register.

5. The hierarchical iterative parallel computing method for sparse power flow equations on multiple frontier surfaces according to claim 1, characterized in that: The sub-matrix calculation for the node includes column element calculation, and the column element calculation specifically includes: Save the address of the first row of the non-zero element of the submatrix linked list of the i-th node into the submatrix row number address register, save the number of non-zero elements of the i-th node submatrix from the column element number register into the i-th node dimension register, and then save the value in the i-th node dimension register as the dimension of the submatrix into the submatrix dimension register; Take out the first address of the column list of the i-th node from the Jacobi matrix column list address pointer register and save it to the column node address register; save the address of the first column of the non-zero element of the lower triangular matrix L decomposed by the i-th child node from the lower triangular matrix address pointer register to the lower triangular matrix L column address register; save the submatrix address of the i-th node to the Jacobi submatrix address register; Traverse the sub-matrix dimensions and repeat the following process: Set the read and write burst length of the memory, pull high the read valid signal of the memory, set the read data counter to the loop count of 1, 2, and 3, perform the memory read operation from the address of the first element of the current node column stored in the column node address register, and save the data to the data bus. When the value of the read data counter is 1 and 2, save the data on the data bus to the sub-matrix data register respectively; Save the column element row number value at the address in the column node address register to the sub-matrix row number register; The write address of the current Jacobi submatrix data is saved in the Jacobi data address register; the first column data of the Jacobi submatrix is ​​saved in the submatrix cell pointed to by the address in the Jacobi data address register, the row number of the Jacobi submatrix data is recorded, the submatrix row number is saved in the submatrix node row number register, and the column element address pointer of the current matrix points to the next non-zero element and is saved in the column node address register; The row number written into the lower triangular matrix L is stored in the submatrix node row number register, the submatrix row node number address of the i-th node is the value in the submatrix row number address register, and the value in the submatrix dimension register is saved to the dimension register; the write address of the lower triangular matrix L is positioned as the value in the column address register of the lower triangular matrix L, and the Jacobi submatrix data is written into the lower triangular matrix L data register; the Jacobi submatrix row number is written into the row register of the lower triangular matrix L; the write address of the lower triangular matrix L is shifted down one unit; After the traversal is completed, the column data of the Jacobian submatrix of the i-th node is obtained, and the first column of the Jacobian submatrix is ​​written into the first column of the lower triangular matrix L; Update the column address pointer register of the lower triangular matrix L to point to the write address of the next column data.

6. The hierarchical iterative parallel computing method for sparse power flow equations on multiple frontier surfaces according to claim 1, characterized in that: The sub-matrix calculation for the node includes row element calculation, and the row element calculation specifically includes: The address of the first element of the i-th row is taken from the row address pointer register of the upper triangular matrix U and saved to the row address register of the upper triangular matrix U. The node data counter is initialized and the number of row elements of the i-th node is saved to the row element number register. When the value of the node data counter is less than the value in the row element number register, the following process is repeated: The starting row address of the i-th node is saved in the row node address register, the memory read / write burst length is set, and the memory read valid signal is pulled high; the read data counter is set to 1, 2, and 3 loop counts, and a memory read operation is performed from the address of the first element of the current node row stored in the row node address register, and the data is saved to the data bus. When the value of the read data counter is 1 and 2, the data on the data bus is saved to the sub-matrix data register respectively. When the value of the read data counter is 3, the data on the data bus is saved to the Jacobian sub-matrix column label register; Save the column index value of the current sub-matrix target column to the target column register. If the sub-matrix column index value is the same as the value in the target column register, execute the following process: The Jacobi submatrix starting address plus the offset address of the Jacobi submatrix data to be written is saved in the Jacobi data address register, and the Jacobi submatrix data is written into the submatrix pointed to by the Jacobi data address register; The column number of the first row of data written to the upper triangular matrix U is stored in the submatrix row node number register. The write address of the upper triangular matrix U is positioned as the value in the upper triangular matrix U row address register. The Jacobi submatrix data is written to the upper triangular matrix U data register. The Jacobi submatrix column number is written to the column register of the upper triangular matrix U. The write address of the upper triangular matrix U is shifted down one unit. After completing the above process, we can obtain the Jacobian submatrix row data of the i-th node and write the first row of the Jacobian submatrix into the first row of the upper triangular matrix U. Update the row offset address pointer register of the upper triangular matrix U to point to the next row write address.

7. The multi-frontal sparse power flow equation hierarchical iterative parallel calculation method according to claim 1, characterized in that: The Jacobian submatrix obtained by submatrix calculation is stored, and the LU decomposition and contribution submatrix of the node dense submatrix obtained by LU decomposition of the submatrix are stored. Specifically, a node submatrix address register is set to store the storage address of each node submatrix; each subnode is set to a submatrix storage linked list to store the intermediate submatrix decomposition results in the calculation process, and the submatrix storage linked list includes a dense submatrix register, an LU decomposition register, and a contribution submatrix register; wherein the dense submatrix includes three subsidiary registers, the first subsidiary register and the second subsidiary register respectively store the row label value and the column label value of the non-zero row in the current column of the dense submatrix, and the third subsidiary register stores the dimension of the dense submatrix; the LU decomposition register stores the result of LU decomposition of each node, and the contribution submatrix register stores the contribution value matrix of the current node to other nodes in the upper layer.

8. The hierarchical iterative parallel computing method for sparse power flow equations on multiple frontier surfaces according to claim 1, characterized in that: The step of superimposing the contribution submatrix calculated by the lower layer nodes onto the corresponding nodes in the upper layer and synchronously updating the data in the Jacobian submatrix specifically includes: Traverse all rows and columns of the contribution submatrix and repeat the following process: The storage address of the contribution sub-matrix is ​​saved in the contribution sub-matrix address register, and then the contribution sub-matrix data is taken from the contribution sub-matrix address of the LU sub-matrix register and saved in the contribution sub-matrix data register; Take the corresponding contribution submatrix row number and column number from the Jacobi submatrix row number register, and save them to the Jacobi row register and Jacobi column register respectively; Add the value in the contribution sub-matrix data register to the cell pointed to by the Jacobi row register and the Jacobi column register; save the address of the first row of non-zero elements whose row number is the value in the Jacobi row register from the Jacobi row address pointer register to the Jacobi row address register, and save the column number at the address in the Jacobi row address register to the Jacobi column number register; The number of row elements in the Jacobian matrix at the address in the Jacobian row address register is saved in the Jacobian row element number register; Initialize the Jacobi element number counter. When the value in the Jacobi column number register is not equal to the value in the Jacobi column register, and the value in the Jacobi data element number counter is less than the value in the Jacobi row element number register, execute the following process: Update the current Jacobian row address register, save the column number value of the next Jacobian element in the current row to the Jacobian column number register, and update the Jacobian element number counter; At the address in the Jacobi row address register, historical data is retrieved from the Jacobi data register and saved in the Jacobi historical data register; the value of the contribution sub-matrix is ​​added to the current Jacobi matrix, and the new value is saved in the new Jacobi data register; the value in the new Jacobi data register is saved in the Jacobi data register.

9. A hierarchical iterative parallel computing device for sparse power flow equations on multiple frontiers, characterized by: include: A node resource allocation calculation module is used to allocate different amounts of computing resources to each branch and each node of the Jacobi matrix parallel hierarchical elimination tree according to the structural characteristics of the Jacobi matrix parallel hierarchical elimination tree; The node sub-matrix parallel decomposition module is used to perform sub-matrix calculations on nodes in parallel from lower nodes to upper nodes based on the allocated computing resources and with the branches under the root node of the Jacobi matrix parallel hierarchical elimination tree as the unit; The Jacobian submatrix linked list calculation module is used to store the Jacobian submatrix obtained by submatrix calculation, and store the LU decomposition and contribution submatrix of the node dense submatrix obtained by LU decomposition of the submatrix; The superposition calculation module is used to superimpose the contribution sub-matrix calculated by the lower-level nodes to the corresponding nodes in the upper layer, and synchronously update the data in the Jacobian sub-matrix.

10. A FPGA-based power flow parallel computing system, characterized in that: A hierarchical iterative parallel computing device for power flow sparse equations with multiple frontier surfaces as described in claim 9.

11. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the hierarchical iterative parallel calculation method for the multi-frontal power flow sparse equations as described in any one of claims 1 to 8 are implemented.

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