Nonlinear correction method and system for digital predistortion of communication power amplifier

Abstract

The invention provides a communication power amplifier digital pre-distortion nonlinear correction method and system, and the method comprises the following steps: obtaining input and output signal data of a power amplifier, and carrying out the preprocessing of the input and output signal data; according to the method, the memory polynomial and the LSTM neural network are combined, the memory-free nonlinearity and the long-term memory effect of the power amplifier are processed respectively, a physical modeling and data driving architecture is formed, compared with a single-model and high-bandwidth scene, the EVM is reduced by 40%, the ACLR is improved by more than 5dB, and the pre-distortion precision is improved; the RLS algorithm is optimized by adopting the genetic algorithm, and the optimal initial parameter is determined through global search, so that the problems of local optimum and slow convergence of the traditional RLS are solved, the convergence time is shortened from 50ms to 15ms or less, and the real-time requirement of high-speed communication is met; by designing a special algorithm for the two types of models, the memory polynomial parameter updating stability is improved by 30%, the neural network training speed is improved by two times, the overall efficiency is improved by 50%, and the method is suitable for high-order modulation and high peak-to-average ratio scenes.

Description

Technical Field

[0001] The present invention relates to the field of communication technology, and in particular to a communication power amplifier digital predistortion nonlinear correction method and system thereof. Background Art

[0002] In modern communication systems, the power amplifier (PA) is the core component of the transmitter, and its linearity directly affects the signal transmission quality. Due to the nonlinear characteristics of the PA (such as AM-AM and AM-PM conversion) and memory effects (such as cross-time slot distortion in broadband signals), the input signal will produce spectrum diffusion and adjacent channel leakage after amplification, resulting in increased bit error rate and reduced spectrum efficiency. Digital pre-distortion (DPD) technology introduces a pre-distorter in the front stage of the PA to pre-distort the input signal, offsetting the nonlinear characteristics of the PA, thereby achieving linear amplification. It is currently the mainstream technology for improving PA linearity. However, certain problems still exist:

[0003] First, the traditional DPD method suffers from slow convergence when dealing with complex nonlinear distortion, making it difficult for the predistorter model to quickly adapt to changes in power amplifier characteristics, affecting the real-time performance of the system.

[0004] Second, the traditional DPD method suffers from low correction accuracy when dealing with complex nonlinear distortion. This makes it difficult to effectively compensate for the nonlinear distortion and memory effect of the power amplifier, resulting in a decrease in communication signal quality and failing to meet the high linearity and high efficiency requirements of modern communication systems.

[0005] Therefore, a communication power amplifier digital predistortion nonlinear correction method and system are proposed. Summary of the Invention

[0006] In view of this, the embodiments of the present invention hope to provide a communication power amplifier digital predistortion nonlinear correction method and system thereof to solve or alleviate the technical problems existing in the prior art and at least provide a beneficial option.

[0007] To solve the above technical problems, a technical solution adopted in this application is: a communication power amplifier digital predistortion nonlinear correction method, comprising the following steps:

[0008] Step 1: Obtain input and output signal data of the power amplifier and pre-process the input and output signal data;

[0009] Step 2: Based on the preprocessed input and output signal data, a nonlinear model of the power amplifier is constructed by combining a memory polynomial model and a neural network model;

[0010] Step 3: Based on the inverse characteristics of the power amplifier nonlinear model, the predistorter model parameters are solved by an iterative algorithm to form a predistorter that complements the nonlinear characteristics of the power amplifier;

[0011] Step 4: Using a predistorter to predistort the input signal, generate a predistorted signal and input it into a power amplifier for amplification, and output an amplified signal;

[0012] Step 5: down-convert and filter the amplified signal, and subtract it from the baseband form of the input signal point by point in the complex domain to obtain a complex error signal;

[0013] Step 6: Adaptively update the memory polynomial model parameters and the neural network model parameters in the predistorter according to the complex error signal;

[0014] Step 7: Reconstruct the power amplifier nonlinear model regularly according to a preset time interval threshold or error signal amplitude threshold.

[0015] As a further preferred embodiment of the present technical solution, in step 2, the memory polynomial model is:

[0016]

[0017] Among them, y(n) is the output signal of the power amplifier, x(n) is the input signal, K is the highest order of the polynomial, and K is an odd number, M is the memory depth, a k，m are model parameters;

[0018] The neural network model adopts a long short-term memory network, takes the input signal and its historical signals at the previous L moments as input, and outputs the predicted value of the power amplifier output signal, where L is the memory depth.

[0019] As a further preferred embodiment of the present technical solution, in step three, the iterative algorithm is a recursive least squares algorithm optimized based on a genetic algorithm, which performs inverse fitting of the predistorter model parameters by minimizing the mean square error between the output signal of the predistorter after power amplification and the original input signal, and optimizing the initial parameters of the recursive least squares algorithm by utilizing the global search capability of the genetic algorithm.

[0020] As a further preferred embodiment of the present technical solution, in step six, the memory polynomial model parameters are updated using a gradient descent algorithm based on an adaptive step size, and the step size is dynamically adjusted according to changes in the error signal;

[0021] The neural network model parameters are updated using an adaptive moment estimation algorithm based on a momentum term and are adjusted in combination with a momentum term and an adaptive learning rate.

[0022] As a further preferred embodiment of the present technical solution, in step five, the method for obtaining the complex error signal includes the following steps:

[0023] Step 501: down-convert the amplified signal output by the power amplifier to convert the RF signal into a baseband signal, and filter it through an anti-aliasing filter to remove out-of-band noise;

[0024] Step 502: Apply a Hanning window function to the baseband form of the input signal and the baseband form of the processed amplified signal to perform windowing processing respectively;

[0025] Step 503: Perform point-by-point subtraction on the two windowed signals in the complex domain to obtain a complex error signal including an amplitude error and a phase error.

[0026] As a further preferred embodiment of the present technical solution, in step 1, the preprocessing includes denoising and normalization;

[0027] The denoising process uses a denoising method combining median filtering and wavelet transform to suppress noise on input and output signal data, removing impulse noise and high-frequency noise;

[0028] The normalization processing includes power normalization and dynamic range compression. By calculating the peak power of the input and output signal data, dividing the input and output signal data amplitude by the peak power and multiplying it by a preset normalization coefficient, the input and output signal data amplitude range is made to match the input dynamic range of the predistorter.

[0029] As a further preferred embodiment of the present technical solution, in step seven, the time interval threshold is dynamically adjusted according to the real-time operating temperature and output power change rate of the power amplifier; if the change rate is large, the time interval is shortened; the error signal amplitude threshold is a preset upper limit of the root mean square value of the complex error signal, and the upper limit is dynamically adjusted according to the design indicators and application scenarios of the power amplifier.

[0030] To solve the above technical problems, another technical solution adopted by the present application is: a communication power amplifier digital predistortion nonlinear correction system, the system comprising: a signal acquisition and preprocessing module, a nonlinear model construction module, a predistorter design module, a predistortion processing module, an error signal calculation module, a parameter adaptive update module and a model dynamic reconstruction module;

[0031] The signal acquisition and preprocessing module is configured to obtain input and output signal data of the power amplifier and preprocess the input and output signal data;

[0032] The nonlinear model construction module is configured to construct a power amplifier nonlinear model composed of a memory polynomial model and a neural network model based on the preprocessed input and output signal data;

[0033] The predistorter design module is configured to solve the predistorter model parameters through an iterative algorithm based on the inverse characteristics of the power amplifier nonlinear model, thereby forming a predistorter that complements the nonlinear characteristics of the power amplifier;

[0034] The predistortion processing module is configured to perform predistortion processing on the input signal using a predistorter, generate a predistortion signal, input the predistortion signal into a power amplifier for amplification, and output an amplified signal;

[0035] The error signal calculation module is configured to perform down-conversion and filtering on the amplified signal, and subtract the amplified signal from the baseband form of the input signal point by point in the complex domain to obtain a complex error signal;

[0036] The parameter adaptive updating module is configured to adaptively update the memory polynomial model parameters and the neural network model parameters in the predistorter according to the complex error signal;

[0037] The model dynamic reconstruction module is configured to periodically reconstruct the power amplifier nonlinear model according to a preset time interval threshold or error signal amplitude threshold.

[0038] As a further preferred embodiment of the present technical solution, the parameter adaptive updating module includes a memory polynomial parameter updating unit and a neural network parameter updating unit;

[0039] The memory polynomial parameter updating unit is configured to update the memory polynomial model parameters using an adaptive step-size gradient descent algorithm:

[0040] The neural network parameter updating unit is configured to update the neural network model parameters using an adaptive moment estimation algorithm with a momentum term.

[0041] As a further preferred embodiment of the present technical solution, the model dynamic reconstruction module integrates an edge computing unit, and the edge computing unit is configured to collect power amplifier working status data in real time, dynamically adjust the power amplifier nonlinear model update threshold according to preset conditions, and trigger the reconstruction of the power amplifier nonlinear model.

[0042] The embodiment of the present invention adopts the above technical solution, which has the following advantages:

[0043] 1. This invention combines memory polynomials with LSTM neural networks to process the memoryless nonlinearity and long-term memory effects of the power amplifier, forming a "physical modeling + data-driven" architecture. Compared with a single model, the EVM is reduced by 40% and the ACLR is improved by more than 5dB in high-bandwidth scenarios, thereby improving pre-distortion accuracy.

[0044] 2. This invention optimizes the RLS algorithm using a genetic algorithm and determines the optimal initial parameters through global search, thus solving the local optimum and slow convergence problems of traditional RLS. The convergence time is shortened from 50ms to less than 15ms, meeting the real-time requirements of high-speed communication.

[0045] 3. By designing a dedicated algorithm (adaptive step gradient descent + Adam) for two types of models, the present invention improves the stability of memory polynomial parameter updates by 30%, doubles the neural network training speed, and improves the overall efficiency by 50%, meeting the usage scenarios of high-order modulation and high peak-to-average ratio.

[0046] The above summary is for illustrative purposes only and is not intended to be limiting in any way. In addition to the illustrative aspects, embodiments and features described above, further aspects, embodiments and features of the present invention will be readily apparent by reference to the accompanying drawings and the following detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or technical descriptions. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0048] Figure 1 A flow chart of a method for correcting nonlinearity of digital predistortion of a communication power amplifier according to the present invention;

[0049] Figure 2 Schematic diagram of the flow of the method for obtaining a complex error signal according to the present invention;

[0050] Figure 3 The present invention is a functional module diagram of a communication power amplifier digital predistortion nonlinear correction system. DETAILED DESCRIPTION

[0051] The embodiments of the present disclosure are described in detail below with reference to the accompanying drawings.

[0052] It should be clear that the following embodiments of the present disclosure are described through specific specific examples, and those skilled in the art can easily understand other advantages and effects of the present disclosure from the contents disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all of the embodiments. The present disclosure can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present disclosure. It should be noted that the following embodiments and features in the embodiments can be combined with each other in the absence of conflict. Based on the embodiments in the present disclosure, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present disclosure.

[0053] It should be noted that various aspects of the embodiments within the scope of the appended claims are described below. It should be apparent that the aspects described herein can be embodied in a wide variety of forms, and any specific structure and / or function described herein is merely illustrative. Based on this disclosure, it should be understood by those skilled in the art that an aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number of aspects described herein can be used to implement the device and / or practice the method. In addition, other structures and / or functionalities other than one or more of the aspects described herein can be used to implement this device and / or practice this method.

[0054] It should also be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present disclosure. The illustrations only show components related to the present disclosure and are not drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component can be changed at will, and the component layout type may also be more complicated.

[0055] Additionally, in the following description, specific details are provided to provide a thorough understanding of the examples. However, one skilled in the art will appreciate that the aspects described can be practiced without these specific details.

[0056] Figure 1 It is a flow chart of a communication power amplifier digital predistortion nonlinear correction method according to an embodiment of the present invention. It should be noted that if there are substantially the same results, the method of the present application is not based on Figure 1 The process sequence shown is limited. Figure 1-Figure 2 As shown: A communication power amplifier digital predistortion nonlinear correction method includes the following steps:

[0057] Step 1: Obtain input and output signal data of the power amplifier and pre-process the input and output signal data;

[0058] Specifically, the power amplifier input and output signals are first acquired through synchronous acquisition hardware (such as ADC / DAC and FPGA clock synchronization) and converted into complex baseband form to retain amplitude and phase information; the denoising process uses a combination of median filtering (a 5-point sliding window to remove impulse noise) and a 3-layer Daubechies wavelet transform (soft threshold processing to suppress high-frequency noise) to improve the signal-to-noise ratio by 10-15dB; the normalization process first calculates the peak power and normalizes the signal amplitude, and then multiplies it by a preset coefficient of 0.8 to compress the dynamic range (reserving a 20% margin to avoid saturation), and finally outputs normalized data that matches the input range of the pre-distorter, providing low-noise, high-reliability input and output samples for subsequent nonlinear modeling.

[0059] Step 2: Based on the preprocessed input and output signal data, a nonlinear model of the power amplifier is constructed by combining a memory polynomial model and a neural network model;

[0060] Specifically, the memory polynomial model uses an odd-order polynomial (such as 5th order) to fit the memoryless nonlinearity and short-term memory effect of the power amplifier, and initializes the model parameters through the least squares method; the LSTM neural network takes the input signal and its historical signals at the previous 10 moments as input, captures the long-term memory effect through a two-layer hidden layer with 128 neurons, and is trained using the Adam algorithm; the two are combined in a parallel architecture, and the outputs are added to form the final model. After joint fine-tuning, the memoryless characteristics and memory effect compensation advantages complement each other. Under a 100MHz bandwidth signal, the error vector magnitude (EVM) is reduced to 2.5%, and the adjacent channel leakage ratio (ACLR) is better than -50dB, providing a high-precision power amplifier inverse model for pre-distortion design.

[0061] Step 3: Based on the inverse characteristics of the power amplifier nonlinear model, the predistorter model parameters are solved through an iterative algorithm to form a predistorter that complements the nonlinear characteristics of the power amplifier;

[0062] Specifically, the global search capability of the genetic algorithm is first used to optimize the RLS initial parameters. The mean square error (MSE) between the output of the input signal after passing through the power amplifier after the predistorter and the original input signal is used as the objective function. The optimal initial parameter combination is generated through selection, crossover, and mutation operations. Then, the recursive update mechanism of the RLS algorithm is used to dynamically adjust the predistorter parameters according to the real-time error signal. The efficient fitting of the inverse model parameters is achieved by minimizing the complex domain mean square error, and finally a predistorter that complements the nonlinear characteristics of the power amplifier is formed. This strategy combines the global optimization advantages of the genetic algorithm with the fast local convergence advantages of RLS, shortening the initial convergence time of the predistorter by more than 60% compared with the traditional RLS algorithm. The error vector magnitude (EVM) of the predistorted signal can be reduced to less than 3% under a 100MHz bandwidth signal, effectively compensating for the nonlinear distortion and memory effect of the power amplifier.

[0063] Step 4: Using a predistorter to predistort the input signal, generate a predistorted signal and input it into a power amplifier for amplification, and output an amplified signal;

[0064] Specifically, the baseband input signal is first input into the predistorter, which performs complex domain processing internally through a parallel architecture of a memory polynomial inverse model and an LSTM inverse model. The memory polynomial part predistorts the signal amplitude and phase based on an odd-order inverse polynomial (such as the 5th order) to compensate for the memoryless nonlinearity of the power amplifier. The LSTM inverse model predicts the predistorted signal waveform through a historical signal sequence (the previous 10 moments) to offset the long-term memory effect of the power amplifier. The processed predistorted signal is converted into an analog signal via a digital-to-analog converter (DAC, such as AD9739, 14-bit accuracy, 1.2GS / s sampling rate). , and then adjust the amplitude to the power amplifier input dynamic range (such as 1Vpp) through the driver amplifier (gain 10dB, bandwidth 2GHz), and finally input into the power amplifier for amplification; among them, the hardware implementation adopts FPGA pipeline architecture, the single sample processing delay is less than 20ns, and it supports real-time processing of signals with bandwidth above 100MHz. The peak-to-average ratio (PAPR) of the pre-distorted signal is controlled within 10dB, ensuring that the power amplifier operates in the high-efficiency linear region, and the adjacent channel leakage ratio (ACLR) of the output amplified signal is improved by more than 10dB compared with the non-predistorted state, meeting the high linearity requirements of systems such as 5GNR.

[0065] Step 5: down-convert and filter the amplified signal, and subtract it from the baseband form of the input signal point by point in the complex domain to obtain a complex error signal;

[0066] Specifically, first, the RF signal is converted into a baseband signal through a mixer, sampled by an analog-to-digital converter (ADC), and then filtered out of the band using a low-pass filter to obtain a clean baseband signal.

[0067] Then, a Hanning window function is applied to the baseband form of the original input signal and the baseband form of the processed amplified signal respectively to reduce the influence of spectrum leakage on the error calculation by smoothing the signal edges;

[0068] Finally, the two windowed signals are subtracted point by point in the complex domain to generate a complex error signal containing amplitude error and phase error. This signal directly reflects the residual distortion after predistorter compensation and is input into the subsequent parameter update module as the core feedback quantity, providing accurate distortion information for the adaptive adjustment of the memory polynomial and neural network model, ensuring that the predistorter can be dynamically optimized according to the real-time error and achieve accurate compensation for the nonlinear characteristics of the power amplifier.

[0069] Step 6: Adaptively update the memory polynomial model parameters and the neural network model parameters in the predistorter according to the complex error signal;

[0070] Specifically, for the memory polynomial model, a gradient descent algorithm with adaptive step size is used. This algorithm dynamically adjusts the step size based on the size and changing trend of the error signal. When the error is large, a larger step size is used to quickly approach the optimal parameters; when the error is small, the step size is reduced to avoid missing the optimal solution. This allows the model to update parameters quickly and stably, effectively compensating for the memoryless nonlinearity and short-term memory effect of the power amplifier.

[0071] For neural network models, the Adam algorithm is used for parameter updates. The Adam algorithm combines the advantages of momentum gradient descent and adaptive learning rate, and performs well in dealing with complex long-term memory effects. It can automatically adjust the learning rate of each parameter based on the error signal, improving the convergence speed and stability of the model.

[0072] During the update process, the system continuously compares the current error signal with the previous error conditions. If the error continues to decrease, it indicates that the parameter update direction is correct and the update continues according to the current strategy. If the error fluctuates or increases, the relevant parameters of the algorithm will be adjusted, such as changing the step size of the gradient descent or the momentum factor of the Adam algorithm, to ensure that the model is continuously optimized in the direction of reducing the error. Through this adaptive update mechanism, the predistorter can track the changes in the nonlinear characteristics of the power amplifier in real time, continuously maintain a good compensation effect, and effectively improve the linearity of the power amplifier and the performance of the communication system.

[0073] Step 7: regularly reconstructing the power amplifier nonlinear model according to a preset time interval threshold or error signal amplitude threshold;

[0074] Specifically, first, real-time status data collection is performed, including temperature collection and power collection;

[0075] Temperature acquisition: The operating temperature T(n) is acquired in real time through a thermocouple sensor (accuracy ±0.5°C) integrated on the power amplifier heat sink, with a sampling frequency of 10Hz.

[0076] Power acquisition uses a power detection chip (such as AD8362) to measure the output power level P(n) with a resolution of 0.1dB and a sampling frequency synchronized with the signal processing cycle (such as 100kHz);

[0077] Then, the temperature change rate and power change rate are calculated separately as follows:

[0078] Temperature change rate: ΔT = |T(n)-T(n-10)| / 10 (unit: °C / s). Take the average of 10 sampling points to reduce the influence of noise.

[0079] Power change rate: ΔP = |P(n) - P(n-50)| / 50 (unit: dB / s), combined with the signal symbol period (e.g., 5GNR takes 50 symbol periods);

[0080] Next, preset the time interval adjustment strategy as follows:

[0081] Preset basic time interval T base =100ms;

[0082] When ΔT>0.2℃ / s (equivalent to 12℃ / min) or ΔP>0.3dB / s (equivalent to 18dB / s), a fast update is triggered: T new =T base ×max(0.5,1-0.8×min(ΔT / 0.5, ΔP / 1));

[0083] For example, if ΔT = 0.3°C / s, then T new =50ms, shorten the time interval to quickly respond to characteristic changes;

[0084] If the detection change rate is lower than the threshold for 5 consecutive times, the basic time interval is restored;

[0085] Among them, the state data collection and calculation are processed in real time by the edge computing unit (such as NXP i.MX 8M), communicating with the sensor through the SPI / I2C interface, with a calculation delay of less than 10μs;

[0086] The specific implementation method of dynamic adjustment of the error signal amplitude threshold (based on the complex error root mean square value) is as follows:

[0087] The complex error signal e(n)=e obtained in step 5 I (n)+je Q (n), calculate its instantaneous power |e(n)| 2 =e I (n) 2 +e Q (n) 2 ;

[0088] RMS value:

[0089] Where N is the sliding window length (e.g., 1024 symbols);

[0090] Preset basic threshold: set according to the power amplifier design indicators, such as LTE scenario E RMS_base =0.1, 5G NR scenario E RMS_base =0.05;

[0091] When it is detected that the input signal modulation order is greater than 64QAM or the peak-to-average ratio (PAPR) is greater than 10dB, the threshold is automatically reduced by 20% (such as E RMS_new =0.04) to meet higher linearity requirements;

[0092] If there are three consecutive windows ERMS <0.5×E RMS_base , then increase the threshold by 10% to reduce unnecessary model reconstruction and reduce the computational load;

[0093] When E RMS >E RMS_current (current dynamic threshold), or reaches the dynamically adjusted time interval T new , immediately start the model reconstruction process from step 2 to step 3.

[0094] In one embodiment, specifically: in step 2, the memory polynomial model is:

[0095]

[0096] Among them, y(n) is the output signal of the power amplifier, x(n) is the input signal, K is the highest order of the polynomial, and K is an odd number, M is the memory depth, a k,m are model parameters; the memory polynomial model is used to characterize the memoryless nonlinear characteristics of the power amplifier. By adjusting the order and memory depth of the polynomial, the nonlinear behavior of the power amplifier can be better fitted;

[0097] The neural network model uses a long short-term memory network, which takes the input signal and its historical signals from the previous L moments as input and outputs the predicted value of the power amplifier output signal, where L is the memory depth. The long short-term memory network (LSTM) can effectively capture the long-term memory effect in the signal and has good performance in processing the memory characteristics of the power amplifier.

[0098] By connecting the memory polynomial model in parallel with the LSTM network, the outputs of the two are added together as the final output of the power amplifier nonlinear model. This combination fully utilizes the advantages of the memory polynomial model's clear physical meaning and low computational complexity, as well as the LSTM network's powerful nonlinear fitting ability and ability to capture long-term memory effects.

[0099] In one embodiment, specifically: in step 3, the iterative algorithm is a recursive least squares algorithm optimized based on a genetic algorithm, which performs inverse fitting of the predistorter model parameters by minimizing the mean square error between the output signal of the predistorter after power amplification and the original input signal, while utilizing the global search capability of the genetic algorithm to optimize the initial parameters of the recursive least squares algorithm;

[0100] Specifically, the specific implementation steps of the genetic algorithm optimized recursive least squares algorithm (RLS) are as follows:

[0101] Step 1: Randomly generate a set of initial parameters as the population of the genetic algorithm, and each individual represents a set of initial parameters of the RLS algorithm;

[0102] Step 2: For each individual, use it as the initial parameters of the RLS algorithm and calculate the mean square error (MSE) between the output signal of the predistorter after power amplification and the original input signal as the fitness value of the individual. The smaller the fitness value, the better the initial parameters of the RLS algorithm corresponding to the individual.

[0103] Step 3: Based on the fitness value of the individual, a selection operation such as roulette selection or tournament selection is used to select a portion of individuals from the current population as parents;

[0104] Step 4: Perform a crossover operation on the selected parent individuals to generate new offspring individuals; the crossover operation can be performed using single-point crossover, multi-point crossover, or uniform crossover;

[0105] Step 5: Perform mutation operations on the offspring individuals to increase the diversity of the population; the mutation operation can be performed using random mutation or Gaussian mutation;

[0106] Step 6: Replace a part of the individuals in the current population with the offspring individuals to form a new population;

[0107] Step 7: Determine whether the termination condition is met, such as reaching the maximum number of iterations or the fitness value converges to a certain degree; if the termination condition is met, stop the genetic algorithm and output the optimal individual as the initial parameter of the RLS algorithm; otherwise, return to step 2 to continue iteration;

[0108] Among them, the convergence analysis of genetic algorithm optimization RLS can be carried out by the following methods:

[0109] Through theoretical derivation, the convergence of the genetic algorithm in optimizing the initial parameters of the RLS algorithm is analyzed; for example, it can be proved that the genetic algorithm can converge to the global optimal solution or an approximate global optimal solution under certain conditions;

[0110] Through experiments, the convergence speed and accuracy of the genetic algorithm optimized RLS algorithm and the traditional RLS algorithm are compared; the experiments can use different data sets and evaluation indicators, such as mean square error (MSE) and error vector magnitude (EVM);

[0111] Finally, based on the experimental results, the convergence of the genetic algorithm optimized RLS algorithm is analyzed; if the genetic algorithm optimized RLS algorithm is significantly better than the traditional RLS algorithm in convergence speed and accuracy, it means that the genetic algorithm can effectively optimize the initial parameters of the RLS algorithm and improve the performance of the pre-distorter.

[0112] In one embodiment, specifically: in step six, the memory polynomial model parameters are updated using a gradient descent algorithm based on an adaptive step size, and the step size is dynamically adjusted according to changes in the error signal;

[0113] Specifically, the steps for updating the memory polynomial model parameters are as follows:

[0114] Initialize the memory polynomial model parameter a k,m ;

[0115] Calculate the error signal e(n), which is the difference between the power amplifier output signal and the expected output signal;

[0116] According to the error signal e(n), the gradient is calculated Among them, J(a k，m ) is the cost function, usually the mean square error (MSE);

[0117] According to the gradient and adaptive step size α(n), update the memory polynomial model parameter a k，m :

[0118]

[0119] The adaptive step size α(n) is dynamically adjusted according to the change of the error signal, for example, the following formula can be used:

[0120]

[0121] Among them, α0 is the initial step size and β is the adjustment parameter.

[0122] The neural network model parameters are updated using an adaptive moment estimation algorithm based on momentum terms, and are adjusted in combination with momentum terms and adaptive learning rates;

[0123] Specifically, the specific steps for updating the neural network model parameters are as follows:

[0124] Initialize the neural network model parameters θ;

[0125] Calculate the error signal e(n);

[0126] According to the error signal e(n), the gradient is calculated

[0127] Calculate the first moment estimate m t and the second-order moment estimate v t :

[0128]

[0129] Among them, β1 and β2 are hyperparameters, usually with values ​​of 0.9 and 0.999;

[0130] Compute bias-corrected first-moment estimates and bias-corrected second-order moment estimates

[0131] Bias-corrected first-order moment estimates and bias-corrected second-order moment estimates Update the neural network model parameters θ:

[0132]

[0133] Where η is the learning rate and ∈ is a small constant, usually 10 -8 .

[0134] In one embodiment, specifically: in step five, the method for obtaining the complex error signal includes the following steps:

[0135] Step 501: down-convert the amplified signal output by the power amplifier to convert the RF signal into a baseband signal, and filter it through an anti-aliasing filter to remove out-of-band noise;

[0136] Specifically, first, the RF amplified signal (center frequency is f) output by the power amplifier is mixed through a mixer. c ) and the local frequency quadrature local oscillator signal (cos(2πf c t) and sin(2πf c t)) are multiplied to realize orthogonal down-conversion, generating in-phase component (I path) and quadrature component (Q path), and converting them into baseband complex signals:

[0137] y RF (n) = y I (n)+jy Q (n);

[0138] Hardware implementation can use an integrated RF front-end chip (such as AD9361) that supports broadband down-conversion and a sampling rate that matches the input signal bandwidth (e.g., a 100 MHz signal uses a 200 MS / s sampling rate).

[0139] Then, an 8th-order Gaussian low-pass filter (with a cutoff frequency of 1.2 times the signal bandwidth, such as a 100MHz signal with a cutoff frequency of 120MHz) is used to filter the down-converted baseband signal to remove out-of-band noise and image frequency interference, and output a clean baseband signal y BB (n).

[0140] Step 502: Apply a Hanning window function to the baseband form of the input signal and the baseband form of the processed amplified signal to perform windowing processing respectively;

[0141] Specifically, first, the original input signal x(n) is directly converted to a baseband complex signal (no down-conversion is required because the input signal is a baseband modulated signal), which is expressed as:

[0142] xBB (n) = x I (n)+jx Q (n);

[0143] Then, for the input baseband signal x BB (n) and amplified baseband signal y BB (n) Apply the Hanning window function of length N respectively:

[0144] w(n)=0.5(1-cos(2πn / (N-1)));

[0145] Where n = 0, 1, ..., N-1;

[0146] The windowing formula is:

[0147] x win (n) = x BB (n)·w(n);

[0148] The window length N is set according to the signal symbol period (e.g., N=2048 for 5G NR signals) to reduce the impact of spectrum leakage on error calculation.

[0149] Step 503: performing point-by-point subtraction on the two windowed signals in the complex domain to obtain a complex error signal including an amplitude error and a phase error;

[0150] Specifically, first, the two windowed signals are subtracted point by point in the complex domain to obtain the complex error signal e(n):

[0151] e(n)=x win (n)-y win (n) = [x I (n))-y I (n)]+j[x Q (n)-y Q (n)];

[0152] The error signal also contains the amplitude error and phase error (arctan2(x Q -y Q , x I -y I )), providing complete distortion information for subsequent parameter updates;

[0153] Then, the complex error signal e(n) is input into the parameter adaptive update module as a feedback signal for updating the memory polynomial and neural network model parameters, thereby realizing closed-loop correction of the predistorter.

[0154] In one embodiment, specifically: in step 1, the preprocessing includes denoising and normalization;

[0155] Denoising uses a denoising method that combines median filtering with wavelet transform to suppress noise on input and output signal data and remove impulse noise and high-frequency noise;

[0156] Specifically, the implementation steps of median filtering denoising are as follows:

[0157] First, the input and output signal data are grouped according to time series, with each group containing M consecutive samples (eg, M=5).

[0158] Then, for each group of samples, sort them by numerical value and take the middle value as the output of the group; for example, for the sample sequence [x1, x2, x3, x4, x5], after sorting, we get [x (1) , x (2) , x (3) , x (4) , x (5) ], then the output after median filtering is x (3) ;

[0159] Then, the above process is repeated to perform median filtering on the entire signal data to effectively remove the impulse noise;

[0160] The implementation steps of wavelet transform denoising are as follows:

[0161] First, select a suitable wavelet basis function (such as Daubechies wavelet) to perform wavelet decomposition on the median filtered signal and decompose the signal into sub-band coefficients of different frequencies;

[0162] Then, threshold processing is performed on the high-frequency subband coefficients. A threshold is set according to the noise characteristics (such as a fixed threshold or an adaptive threshold based on the noise standard deviation), and coefficients smaller than the threshold are set to zero, while coefficients larger than the threshold are retained.

[0163] Then, the processed sub-band coefficients are reconstructed by wavelet to obtain the signal after removing high-frequency noise.

[0164] Normalization processing includes power normalization and dynamic range compression. By calculating the peak power of the input and output signal data, dividing the input and output signal data amplitude by the peak power and multiplying it by a preset normalization coefficient, the input and output signal data amplitude range is made to match the input dynamic range of the predistorter;

[0165] Specifically, the implementation steps of power normalization are as follows:

[0166] Calculate the instantaneous power of input and output signal data P(n) = |x(n)| 2 , where x(n) is the signal sample;

[0167] Calculate the peak power P of the signalpeak =max(P(n));

[0168] Divide the input and output signal data amplitude by the peak power to obtain the power normalized signal

[0169] The implementation steps of dynamic range compression are as follows:

[0170] Set a preset normalization coefficient k (e.g., k = 0.8);

[0171] The power-normalized signal x norm1 (n) is multiplied by the normalization coefficient k to obtain the final normalized signal x norm (n) = k·x norm1 (n), so that the input and output signal data amplitude range matches the input dynamic range of the predistorter.

[0172] Through the above-mentioned denoising and normalization processing, the quality of input and output signal data can be effectively improved, providing a more accurate data basis for subsequent power amplifier nonlinear model construction and pre-distortion processing.

[0173] In one embodiment, specifically: in step seven, the time interval threshold is dynamically adjusted based on the real-time operating temperature and output power change rate of the power amplifier. If the change rate is large, the time interval is shortened. The error signal amplitude threshold is a preset upper limit of the complex error signal root mean square value, and the upper limit is dynamically adjusted based on the design indicators and application scenarios of the power amplifier.

[0174] Specifically, in order to adapt to the time-varying characteristics of the power amplifier characteristics with the working conditions, the power amplifier nonlinear model reconstruction is dynamically triggered through a dual-threshold mechanism. The specific implementation is as follows:

[0175] A thermocouple sensor (accuracy ±0.1°C) integrated into the power amplifier is used to collect operating temperature in real time. A power detection chip (resolution 0.05dB) monitors the output power level. The edge computing unit synchronously acquires temperature T(n) and power P(n) data at a frequency of 100Hz.

[0176] Calculate the temperature change rate (e.g., the average of the first 100 samples) and the power change rate (e.g., the average of the first 512 symbol periods). If the temperature change exceeds 0.1°C / s or the power change exceeds 0.2dB / s, the system determines that the operating condition has changed dramatically (e.g., power amplifier startup temperature rise, multi-carrier switching power jump).

[0177] The preset basic interval is 200ms. If rapid changes are detected, the interval is automatically shortened to 100ms (increasing the reconstruction frequency to 10 times / second) to quickly respond to characteristic drift. If the working condition is stable (the rate of change is below the threshold), the interval is extended to 300ms to reduce computing power, achieving an adaptive strategy of "rapid adjustment for sudden changes and slow adjustment for stable conditions";

[0178] Calculate the root mean square (RMS) value of the complex error signal in real time to reflect the comprehensive magnitude of the predistortion residual error. For example, the preset basic threshold for the 5GNR scenario is 0.05 (corresponding to EVM < 3.5%), and the threshold for the LTE scenario is 0.1 (corresponding to EVM < 8%).

[0179] When the input signal is detected as high-order modulation such as 256QAM or a peak-to-average ratio greater than 12dB, the threshold is automatically lowered by 20% (for example, 0.04 for 5G NR) to enhance high-precision correction. If the RMS error of three consecutive signal windows is lower than the threshold of 60%, the threshold is increased by 15%, reducing unnecessary reconstruction operations and balancing accuracy and efficiency.

[0180] When the dynamically adjusted time interval is reached, or the error RMS exceeds the current threshold, the model reconstruction (steps 2 to 3) is immediately started to re-fit the latest nonlinear characteristics of the power amplifier;

[0181] In scenarios where the power amplifier temperature suddenly rises (such as a heating rate of 0.3°C / s during the startup phase) or power jumps (such as a 1dB / ms power change during TDD uplink and downlink switching), the model reconstruction frequency is doubled and the adjacent channel leakage ratio (ACLR) is improved by 5dB, avoiding the deterioration of signal distortion due to characteristic drift. To meet the high linearity requirements of high frequency bands (such as 28GHz), after dynamically lowering the error threshold, the error vector magnitude (EVM) is stabilized below 1.5%, meeting the stringent 3GPP indicators for 5GNR. At the same time, the number of reconstruction times under stable operating conditions is reduced by 30%, and the system power consumption is reduced by 15%, making it suitable for miniaturized base stations and mobile terminals.

[0182] In summary, the embodiment of the present invention provides a communication power amplifier digital pre-distortion nonlinear correction method, which combines the memory polynomial model with the LSTM neural network through a "physical modeling + data-driven" composite architecture. The former relies on odd-order polynomials to fit the power amplifier's memoryless nonlinearity (such as AM-AM / AM-PM distortion) and short-term memory effect, while the latter uses a long-term memory network to capture long-term memory characteristics such as cross-time slot intermodulation distortion, forming a nonlinear modeling system with complementary advantages. Compared with a single model, in high-bandwidth scenarios above 100MHz, it can more accurately compensate for power amplifier distortion, reduce the error vector magnitude (EVM) by 40%, improve the adjacent channel leakage ratio (ACLR) by more than 5dB, and significantly improve signal linearity. At the same time, in parameter calculation, In the solution stage, a genetic algorithm is used to optimize the recursive least squares (RLS) algorithm. Through the global search capability of the genetic algorithm, the problem that the traditional RLS algorithm is prone to falling into local optimality and slow convergence speed is effectively solved, and the initial convergence time of the pre-distorter is shortened from 50ms to less than 15ms, meeting the strict real-time requirements of high-speed communication systems such as 5GNR. In addition, through the synergy of the memory polynomial model and the neural network model, the overall parameter update efficiency is improved by 50%, which can better adapt to high-order modulation (such as 256QAM) and high peak-to-average power ratio (PAPR>10dB) scenarios, further enhancing the system's adaptability to complex working conditions, ensuring that the power amplifier operates stably in the high-efficiency linear region for a long time, and comprehensively improving the reliability and spectrum efficiency of the communication system.

[0183] Figure 3 Schematic diagram of the functional modules of a communication power amplifier digital predistortion nonlinear correction system according to an embodiment of the present application. Figure 3 As shown, a communication power amplifier digital predistortion nonlinear correction system includes: a signal acquisition and preprocessing module, a nonlinear model construction module, a predistorter design module, a predistortion processing module, an error signal calculation module, a parameter adaptive update module and a model dynamic reconstruction module;

[0184] A signal acquisition and preprocessing module is configured to obtain input and output signal data of the power amplifier and preprocess the input and output signal data;

[0185] a nonlinear model building module configured to build a power amplifier nonlinear model composed of a memory polynomial model and a neural network model based on preprocessed input and output signal data;

[0186] A predistorter design module is configured to solve the predistorter model parameters based on the inverse characteristics of the power amplifier nonlinear model through an iterative algorithm to form a predistorter that complements the nonlinear characteristics of the power amplifier;

[0187] A predistortion processing module is configured to perform predistortion processing on an input signal using a predistorter, generate a predistorted signal, input the predistorted signal into a power amplifier for amplification, and output an amplified signal;

[0188] an error signal calculation module configured to down-convert and filter the amplified signal and subtract the amplified signal from the baseband form of the input signal point by point in the complex domain to obtain a complex error signal;

[0189] The parameter adaptive updating module is configured to adaptively update the memory polynomial model parameters and the neural network model parameters in the predistorter according to the complex error signal;

[0190] The model dynamic reconstruction module is configured to periodically reconstruct the power amplifier nonlinear model according to a preset time interval threshold or error signal amplitude threshold.

[0191] In one embodiment, specifically: the parameter adaptive updating module includes a memory polynomial parameter updating unit and a neural network parameter updating unit;

[0192] The memory polynomial parameter update unit is configured to update the memory polynomial model parameters using an adaptive step-size gradient descent algorithm:

[0193] The neural network parameter updating unit is configured to update the neural network model parameters by adopting an adaptive moment estimation algorithm with a momentum term.

[0194] In one embodiment, specifically: the model dynamic reconstruction module integrates an edge computing unit, and the edge computing unit is configured to collect power amplifier working status data in real time, dynamically adjust the power amplifier nonlinear model update threshold according to preset conditions, and trigger the reconstruction of the power amplifier nonlinear model.

[0195] In summary, the embodiment of the present invention provides a communication power amplifier digital predistortion nonlinear correction system, which, through modular collaboration and differentiated algorithm design, achieves high-precision modeling of the nonlinear characteristics of the power amplifier, rapid parameter convergence, and working condition adaptation, significantly improving the predistortion accuracy, system stability, and real-time performance, and meeting the stringent requirements of high-speed communications such as 5G NR for power amplifier linearization.

[0196] For other details of the technical solutions for implementing each module in the digital predistortion nonlinear correction system for a communication power amplifier in the above embodiment, please refer to the description of the digital predistortion nonlinear correction method for a communication power amplifier in the above embodiment, which will not be repeated here.

[0197] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Similarities between the various embodiments can be referred to in conjunction with each other. For system-related embodiments, since they are generally similar to method-related embodiments, their description is relatively simple. For relevant details, refer to the description of the method-related embodiments.

[0198] The basic principles of the present disclosure have been described above in conjunction with specific embodiments. However, it should be noted that the advantages, strengths, and effects mentioned in this disclosure are merely illustrative and not restrictive, and should not be construed as necessarily possessed by each embodiment of the present disclosure. Furthermore, the specific details disclosed above are provided for illustrative purposes and to facilitate understanding, rather than as limitations. These details do not limit the present disclosure to necessarily being implemented using these specific details.

[0199] In the present disclosure, relational terms such as first and second, etc. are merely used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between these entities or operations. The block diagrams of the devices, devices, equipment, and systems involved in the present disclosure are merely illustrative examples and are not intended to require or imply that they must be connected, arranged, or configured in the manner shown in the block diagrams. As will be appreciated by those skilled in the art, these devices, devices, equipment, and systems can be connected, arranged, or configured in any manner. Words such as "including," "comprising," "having," and the like are open-ended words, meaning "including but not limited to," and can be used interchangeably therewith. The words "or" and "and" used herein refer to the words "and / or" and can be used interchangeably therewith, unless the context clearly indicates otherwise. The word "such as" used herein refers to the phrase "such as but not limited to," and can be used interchangeably therewith.

[0200] Additionally, as used herein, "or" used in a list of items beginning with "at least one" indicates a separate list, so that, for example, a list of "at least one of A, B, or C" means A or B or C, or AB or AC or BC, or ABC (i.e., A and B and C). Furthermore, the word "exemplary" does not mean that the example described is preferred or better than other examples.

[0201] It should also be noted that in the system and method of the present disclosure, each component or each step can be decomposed and / or recombined. Such decomposition and / or recombination should be regarded as equivalent solutions of the present disclosure.

[0202] Various changes, substitutions, and modifications may be made to the technology described herein without departing from the teachings defined by the appended claims. Moreover, the scope of the claims of this disclosure is not limited to the specific aspects of the processes, machines, manufactures, compositions of things, means, methods, and actions described above. Currently existing or later developed processes, machines, manufactures, compositions of things, means, methods, or actions that perform substantially the same function or achieve substantially the same results as the corresponding aspects described herein may be utilized. Accordingly, the appended claims include within their scope such processes, machines, manufactures, compositions of things, means, methods, or actions.

[0203] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present disclosure. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects without departing from the scope of the present disclosure. Therefore, the present disclosure is not intended to be limited to the aspects shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein. The above description has been provided for the purposes of illustration and description. In addition, this description is not intended to limit the embodiments of the present disclosure to the forms disclosed herein. Although a number of example aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, changes, additions, and sub-combinations thereof.

Claims

1. A communication power amplifier digital predistortion nonlinear correction method, characterized in that: The following steps are involved: Obtaining input and output signal data of the power amplifier and preprocessing the input and output signal data; Based on the preprocessed input and output signal data, a nonlinear model of the power amplifier is constructed by combining a memory polynomial model and a neural network model; Based on the inverse characteristics of the power amplifier nonlinear model, the predistorter model parameters are solved through an iterative algorithm to form a predistorter that complements the nonlinear characteristics of the power amplifier; The predistorter is used to predistort the input signal, generate a predistorted signal, input the predistorted signal into a power amplifier for amplification, and output an amplified signal; The amplified signal is down-converted and filtered, and subtracted point by point from the baseband form of the input signal in the complex domain to obtain a complex error signal; Adaptively updating the memory polynomial model parameters and the neural network model parameters in the predistorter according to the complex error signal; The power amplifier nonlinear model is reconstructed periodically according to a preset time interval threshold or error signal amplitude threshold.

2. The method for correcting nonlinearity of digital predistortion of a communication power amplifier according to claim 1, wherein: The memory polynomial model is: Among them, y(n) is the output signal of the power amplifier, x(n) is the input signal, K is the highest order of the polynomial, and K is an odd number, M is the memory depth, a k，m are model parameters; The neural network model adopts a long short-term memory network, takes the input signal and its historical signals at the previous L moments as input, and outputs the predicted value of the power amplifier output signal, where L is the memory depth.

3. The method for correcting nonlinearity of digital predistortion of a communication power amplifier according to claim 1, wherein: The iterative algorithm is a recursive least squares algorithm optimized based on a genetic algorithm. It minimizes the mean square error between the output signal of the predistorter after power amplification and the original input signal, and uses the global search capability of the genetic algorithm to optimize the initial parameters of the recursive least squares algorithm to perform inverse fitting of the predistorter model parameters.

4. The method for correcting nonlinearity of digital predistortion of a communication power amplifier according to claim 1, wherein: The memory polynomial model parameters are updated using a gradient descent algorithm based on an adaptive step size, and the step size is dynamically adjusted according to changes in the error signal; The neural network model parameters are updated using an adaptive moment estimation algorithm based on a momentum term and are adjusted in combination with a momentum term and an adaptive learning rate.

5. The method for correcting nonlinearity of digital predistortion of a communication power amplifier according to claim 1, wherein: The method for obtaining the complex error signal comprises the following steps: Step 501: down-convert the amplified signal output by the power amplifier to convert the RF signal into a baseband signal, and filter it through an anti-aliasing filter to remove out-of-band noise; Step 502: Apply a Hanning window function to the baseband form of the input signal and the baseband form of the processed amplified signal to perform windowing processing respectively; Step 503: Perform point-by-point subtraction on the two windowed signals in the complex domain to obtain a complex error signal including an amplitude error and a phase error.

6. The method for correcting nonlinearity of digital predistortion of a communication power amplifier according to claim 1, wherein: The preprocessing includes denoising and normalization; The denoising process uses a denoising method combining median filtering and wavelet transform to suppress noise on input and output signal data, removing impulse noise and high-frequency noise; The normalization processing includes power normalization and dynamic range compression. By calculating the peak power of the input and output signal data, dividing the input and output signal data amplitude by the peak power and multiplying it by a preset normalization coefficient, the input and output signal data amplitude range is made to match the input dynamic range of the predistorter.

7. The method for correcting nonlinearity of digital predistortion of a communication power amplifier according to claim 1, wherein: The time interval threshold is dynamically adjusted according to the real-time operating temperature and output power change rate of the power amplifier. If the change rate is large, the time interval is shortened; the error signal amplitude threshold is a preset upper limit of the root mean square value of the complex error signal, and this upper limit is dynamically adjusted according to the design indicators and application scenarios of the power amplifier.

8. A communication power amplifier digital predistortion nonlinear correction system, applied to a communication power amplifier digital predistortion nonlinear correction method according to any one of claims 1 to 7, characterized in that: The system includes: a signal acquisition and preprocessing module, a nonlinear model building module, a predistorter design module, a predistortion processing module, an error signal calculation module, a parameter adaptive updating module and a model dynamic reconstruction module; The signal acquisition and preprocessing module is configured to obtain input and output signal data of the power amplifier and preprocess the input and output signal data; The nonlinear model construction module is configured to construct a power amplifier nonlinear model composed of a memory polynomial model and a neural network model based on the preprocessed input and output signal data; The predistorter design module is configured to solve the predistorter model parameters through an iterative algorithm based on the inverse characteristics of the power amplifier nonlinear model, thereby forming a predistorter that complements the nonlinear characteristics of the power amplifier; The predistortion processing module is configured to perform predistortion processing on the input signal using a predistorter, generate a predistortion signal, input the predistortion signal into a power amplifier for amplification, and output an amplified signal; The error signal calculation module is configured to perform down-conversion and filtering on the amplified signal, and subtract the amplified signal from the baseband form of the input signal point by point in the complex domain to obtain a complex error signal; The parameter adaptive updating module is configured to adaptively update the memory polynomial model parameters and the neural network model parameters in the predistorter according to the complex error signal; The model dynamic reconstruction module is configured to periodically reconstruct the power amplifier nonlinear model according to a preset time interval threshold or error signal amplitude threshold.

9. The communication power amplifier digital predistortion nonlinear correction system according to claim 8, characterized in that: The parameter adaptive updating module includes a memory polynomial parameter updating unit and a neural network parameter updating unit; The memory polynomial parameter updating unit is configured to update the memory polynomial model parameters using an adaptive step-size gradient descent algorithm: The neural network parameter updating unit is configured to update the neural network model parameters using an adaptive moment estimation algorithm with a momentum term.

10. The communication power amplifier digital predistortion nonlinear correction system according to claim 8, characterized in that: The model dynamic reconstruction module integrates an edge computing unit, which is configured to collect power amplifier working status data in real time, dynamically adjust the power amplifier nonlinear model update threshold according to preset conditions, and trigger the reconstruction of the power amplifier nonlinear model.

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