Self-adaptive multi-mode PWM (Pulse Width Modulation) controller

By designing an adaptive multi-mode PWM controller, the problem that the existing PWM controller cannot adapt to multiple modes is solved, and efficient conversion under different load conditions is achieved. It is suitable for high-performance, low standby power consumption and low-cost offline flyback converters.

CN120729256APending Publication Date: 2025-09-30GUANGZHOU LICHI MICRO-ELECTRONICS TECH CO LTD
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Patent Information

Application Number
CN202510659836.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-05-21
Publication Date
2025-09-30

AI Technical Summary

Technical Problem

Existing PWM controllers cannot adapt to multiple modes and have low conversion efficiency.

Method used

An adaptive multi-mode PWM controller was designed, which includes a control core, a clock circuit, a PWM signal generation circuit, a feedback circuit, a power supply circuit, a protection circuit and a communication interface circuit. The multi-mode circuit switches the operating mode under different load conditions, including QR mode, PFM mode and CCM mode, to optimize the conversion efficiency.

Benefits of technology

It achieves high conversion efficiency under different load conditions and is suitable for offline flyback converter applications with high performance, low standby power consumption and low cost.

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Abstract

The adaptive multi-mode PWM controller comprises a control core, a clock circuit, a PWM signal generation circuit, a feedback circuit, a power supply circuit, a protection circuit, a multi-mode circuit and a communication interface circuit, by setting a multi-mode circuit, the integrated circuit works in a QR mode of high input voltage under a normal load condition, works in a PFM mode and performs valley bottom switching to improve efficiency when the load is reduced, and works in a fixed frequency CCM mode under a low line input voltage when the integrated circuit is in a heavy load, so that higher conversion efficiency can be obtained in a whole load range. The off-line flyback converter is applicable to off-line flyback converters with high performance, low standby power consumption and low cost.
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Description

Technical Field

[0001] The present invention relates to the technical field of PWM controllers, in particular to an adaptive multi-mode PWM controller. Background Art

[0002] Pulse-width modulation (PWM) is a well-known method for controlling analog circuits using the digital outputs of a microprocessor. It is a method of digitally encoding analog signal levels. Digitally controlling analog circuits can significantly reduce system cost and power consumption. Many microcontrollers include PWM controllers. However, existing PWM controllers cannot adapt to multiple modes and have low conversion efficiency. Therefore, we propose an adaptive multi-mode PWM controller to address the aforementioned issues. Summary of the Invention

[0003] The object of the present invention is to provide an adaptive multi-mode PWM controller to solve the problems raised in the above background technology.

[0004] To achieve the above object, the present invention provides the following technical solutions:

[0005] An adaptive multi-mode PWM controller includes a control core, a clock circuit, a PWM signal generation circuit, a feedback circuit, a power supply circuit, a protection circuit, a multi-mode circuit, and a communication interface circuit. The multi-mode circuit includes a QR mode, a PFM mode, and a CCM mode. The control core is connected to the clock circuit, which is connected to the PWM signal generation circuit, which is connected to the feedback circuit, which is connected to the power supply circuit, which is connected to the protection circuit, and which is connected to the communication interface circuit. The control core is a digital signal processor. The clock circuit provides a stable clock signal for the controller. The PWM signal generation circuit can generate a PWM signal with a specific duty cycle and frequency according to the instructions of the control core. , composed of a counter and a comparator; the feedback circuit is used to collect multiple information such as the output voltage and output current of the output signal, and feed it back to the control core; the power supply circuit provides a stable power supply for each module of the controller to ensure the normal operation of the controller, including a voltage stabilizing chip, a filter capacitor and multiple components; the protection circuit includes an overcurrent protection module, an overvoltage protection module, an undervoltage protection module, a reverse connection protection circuit, and an overheating protection module to detect abnormal conditions in the system; the multi-mode circuit operates in the QR mode of high-voltage input voltage under normal load conditions, and operates in the PFM mode when the load is reduced, and performs valley switching to improve efficiency. Under low-line input voltage, the integrated circuit operates in a fixed-frequency CCM mode under heavy load; the communication interface circuit is used to realize communication between the controller and other devices.

[0006] As a further solution of the present invention: the clock circuit includes a crystal oscillator, an oscillation circuit, a frequency division circuit and a clock buffer. The crystal oscillator can generate a stable high-frequency oscillation signal to provide a clock reference for the entire circuit system; the oscillation circuit works in conjunction with the crystal oscillator to amplify and shape the weak signal generated by the crystal oscillator to make it a clock signal that meets the requirements; the frequency division circuit is used to divide the high-frequency clock signal output by the crystal oscillator into various required low-frequency clock signals; the clock buffer is used to enhance the driving capability of the clock signal to ensure that the clock signal can be stably transmitted to each circuit module that requires a clock.

[0007] As a further solution of the present invention: the PWM signal generation circuit includes a timer, a comparator and a register, the timer is used to generate a periodic clock signal and set the period of the PWM signal; the comparator is used to compare the count value of the timer with a set comparison value; the register is used to store the initial value of the timer, the comparison value and other parameters, which are set through software or external circuits to control the frequency and duty cycle of the PWM signal.

[0008] As a further solution of the present invention: the comparator is used to compare the count value of the timer with a set comparison value, specifically including: when the count value of the timer is less than the comparison value, the output is a high level, and when the count value is greater than or equal to the comparison value, the output is a low level. The duty cycle of the PWM signal can be changed by changing the comparison value.

[0009] As a further solution of the present invention: the feedback circuit includes a sampling circuit, a feedback network, a comparison circuit and an adjustment circuit. The sampling circuit is used to extract a part of the signal from the output signal as the source of the feedback signal; the feedback network is composed of multiple components such as resistors, capacitors, and inductors, and processes and transforms the sampled feedback signal to make it meet the requirements of feedback to the input end; the comparison circuit compares the feedback signal with the input signal to generate an error signal; and the adjustment circuit adjusts the working state of the circuit according to the error signal generated by the comparison circuit.

[0010] As a further solution of the present invention: the power supply circuit includes an input circuit, a voltage transformation circuit, a rectifier circuit, a filter circuit, a voltage stabilizing circuit and an output circuit, the input circuit includes a power socket, a fuse and a filter capacitor; the voltage transformation circuit includes a transformer, the input power supply does not match the voltage required by the circuit, and voltage conversion is required through the transformer; the rectifier circuit includes a rectifier diode to convert AC power into DC power; the filter circuit includes a filter circuit and an inductor, the filter capacitor further filters out the ripple in the rectified DC voltage, making the output DC voltage smoother and more stable, the inductor and capacitor cooperate to form an LC filter circuit, which suppresses high-frequency noise and low-frequency ripple in the power supply; the voltage stabilizing circuit includes a voltage stabilizing chip to ensure that the output voltage remains stable within a certain range and is not affected by input voltage fluctuations and load changes; the output circuit includes an output interface to output the stable DC voltage to the load device to provide it with electrical energy.

[0011] As a further solution of the present invention: the overvoltage protection module includes a voltage-stabilizing diode and a varistor; the undervoltage protection module includes a voltage comparator, which compares the input voltage with a reference voltage. When the input voltage is lower than the set value, the comparator outputs a signal to trigger a protection action; the overcurrent protection module includes a sampling resistor and a current transformer; the overheating protection module includes a temperature sensor, which monitors key components in the circuit or the ambient temperature. When the temperature reaches the set value, the sensor outputs a signal to reduce the power or cut off the power supply through the control circuit; the reverse connection protection circuit includes a diode, which protects the circuit elements through the unidirectional guidance of the diode.

[0012] As a further solution of the present invention: the communication interface circuit includes a hardware circuit and an interface chip, the hardware circuit includes a signal conversion circuit, a level conversion circuit, a driving and receiving circuit; the interface chip includes a universal interface chip and a dedicated interface chip.

[0013] As a further solution of the present invention: the signal conversion circuit is responsible for converting different types of signals; the level conversion circuit converts one level into another to ensure that the signal can be correctly identified and processed; the driving and receiving circuit enhances the driving capability of the signal, enabling the signal to be transmitted over long distances on the transmission line without attenuation, while amplifying and shaping the received signal.

[0014] As a further solution of the present invention: the universal interface chip is responsible for implementing the universal serial bus protocol, supporting high-speed data transmission and plug-and-play functions between devices, and realizing long-distance differential signal transmission between multiple devices; the dedicated interface chip is targeted at specific communication protocols or devices and is used for controller local area network communication.

[0015] Compared with the prior art, the present invention has the following beneficial effects:

[0016] This adaptive multi-mode PWM controller utilizes a multi-mode circuit to operate in QR mode at high input voltage under normal load conditions. When the load decreases, it switches to PFM mode with valley switching to improve efficiency. At low line input voltage, the IC operates in CCM mode with a fixed frequency (65 kHz) under heavy load, achieving high conversion efficiency across the entire load range. This makes it suitable for offline flyback converter applications requiring high performance, low standby power consumption, and low cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 Schematic diagram of the structure of the present invention.

[0018] Figure 2 It is a structural diagram of the pin package in the present invention.

[0019] Figure 3 It is a structural diagram of the internal block diagram of the present invention.

[0020] Figure 4 It is a structural diagram of the PWM controller of the present invention. DETAILED DESCRIPTION

[0021] In one embodiment, Figure 1-Figure 4As shown, an adaptive multi-mode PWM controller includes a control core, a clock circuit, a PWM signal generation circuit, a feedback circuit, a power supply circuit, a protection circuit, a multi-mode circuit and a communication interface circuit. The multi-mode circuit includes a QR mode, a PFM mode and a CCM mode. The control core is connected to the clock circuit, the clock circuit is connected to the PWM signal generation circuit, the PWM signal generation circuit is connected to the feedback circuit, the feedback circuit is connected to the power supply circuit, the power supply circuit is connected to the protection circuit, and the protection circuit is connected to the communication interface circuit. The control core is a digital signal processor responsible for executing the control algorithm, calculating the required PWM signal duty cycle based on the input feedback signal and set value, and controlling the generation of the PWM signal. The clock circuit provides a stable clock signal for the controller to ensure that each module can work synchronously and determines the basic frequency of the PWM signal. The PWM signal generation circuit can generate a PWM signal with a specific duty cycle and frequency according to the instructions of the control core, and is composed of a counter and a comparator. Driven by a clock signal, the counter counts and compares it with a set comparison value. When the counter value reaches the comparison value, the output level flips, forming a PWM signal. The feedback circuit collects various information about the output signal, including the output voltage and output current, and feeds it back to the control core. Feedback elements include sensors, resistor divider networks, and current transformers. The power supply circuit provides stable power to each module of the controller to ensure normal operation. It includes voltage regulator chips and filter capacitors, converting the input power to a voltage level suitable for the controller and filtering out noise and ripple. The protection circuit includes an overcurrent protection module, an overvoltage protection module, an undervoltage protection module, a reverse connection protection circuit, and an overheating protection module to detect abnormal conditions in the system. When an abnormality occurs, timely protective measures are taken, such as shutting down the PWM output, to protect other components in the system from damage. Under normal load conditions, the multi-mode circuit operates in QR mode with a high-voltage input voltage. To minimize switching losses, the maximum switching frequency in QR mode is internally limited to 77 kHz. When the load decreases, the IC operates in PFM mode, performing valley switching to improve efficiency. At low line input voltages, the IC operates in CCM mode with a fixed frequency (65 kHz) under heavy loads. This allows for high conversion efficiency across the entire load range. The communication interface circuit is used to enable communication between the controller and other devices, such as data transmission with a host computer, receiving control commands, or sending system status information to the host computer.

[0022] The clock circuit includes a crystal oscillator, an oscillation circuit, a frequency division circuit, and a clock buffer. The crystal oscillator can generate a stable high-frequency oscillation signal, providing a clock reference for the entire circuit system. The oscillation circuit works in conjunction with the crystal oscillator to amplify and shape the weak signal generated by the crystal oscillator into a clock signal that meets the requirements. The frequency division circuit is used to divide the high-frequency clock signal output by the crystal oscillator into various required low-frequency clock signals. The clock buffer is used to enhance the driving capability of the clock signal to ensure that the clock signal can be stably transmitted to each circuit module that requires a clock.

[0023] The PWM signal generation circuit includes a timer, a comparator, and a register. The timer is used to generate a periodic clock signal and set the period of the PWM signal. It can be a hardware timer, such as a timer module in a microcontroller, or a dedicated timer chip. The comparator is used to compare the timer count value with a set comparison value. The register is used to store various parameters such as the timer's initial value and comparison value, which can be set through software or external circuits to control the frequency and duty cycle of the PWM signal.

[0024] The comparator is used to compare the timer count value with a set comparison value. Specifically, when the timer count value is less than the comparison value, the output is high, and when the count value is greater than or equal to the comparison value, the output is low. By changing the comparison value, the duty cycle of the PWM signal can be changed.

[0025] The feedback circuit includes a sampling circuit, a feedback network, a comparison circuit, and an adjustment circuit. The sampling circuit is used to extract a portion of the output signal as the source of the feedback signal. The feedback network is composed of multiple components such as resistors, capacitors, and inductors, and processes and transforms the sampled feedback signal to meet the requirements of feedback to the input terminal. The comparison circuit compares the feedback signal with the input signal to generate an error signal. The adjustment circuit adjusts the circuit's operating state based on the error signal generated by the comparison circuit to achieve the purpose of stabilizing the output or improving performance.

[0026] The power supply circuit includes an input circuit, a voltage conversion circuit, a rectifier circuit, a filter circuit, a voltage stabilizing circuit, and an output circuit. The input circuit includes a power socket, a fuse, and a filter capacitor. The power socket is used to connect to an external power supply to provide power input to the circuit. When the current in the circuit is too large, the fuse will melt, cutting off the circuit and protecting the circuit components. The filter capacitor is used to filter out high-frequency noise and spike pulses in the power input to make the input voltage more stable. The voltage conversion circuit includes a transformer. If the input power supply does not match the voltage required by the circuit, voltage conversion needs to be performed through the transformer. The rectifier circuit includes a rectifier diode to convert AC power into DC power. The filter circuit includes a filter circuit and an inductor. The filter capacitor further filters out ripples in the rectified DC voltage to make the output DC voltage smoother and more stable. The inductor and capacitor form an LC filter circuit to suppress high-frequency noise and low-frequency ripples in the power supply. The voltage stabilizing circuit includes a voltage stabilizing chip to ensure that the output voltage remains stable within a certain range and is not affected by input voltage fluctuations and load changes. The output circuit includes an output interface to output the stable DC voltage to the load device to provide it with power.

[0027] The overvoltage protection module includes a voltage-stabilizing diode and a varistor; the undervoltage protection module includes a voltage comparator that compares the input voltage with a reference voltage. When the input voltage is lower than the set value, the comparator outputs a signal to trigger the protection action; the overcurrent protection module includes a sampling resistor and a current transformer; the overheating protection module includes a temperature sensor that monitors key components in the circuit or the ambient temperature. When the temperature reaches the set value, the sensor outputs a signal to reduce or cut off the power supply through the control circuit; the reverse connection protection circuit includes a diode, which protects the circuit components through its unidirectional guidance.

[0028] The communication interface circuit includes a hardware circuit and an interface chip. The hardware circuit includes a signal conversion circuit, a level conversion circuit, and a driving and receiving circuit. The interface chip includes a general interface chip and a dedicated interface chip.

[0029] The signal conversion circuit is responsible for converting different types of signals; the level conversion circuit converts one level to another to ensure that the signal can be correctly identified and processed; the driving and receiving circuit enhances the driving capability of the signal, allowing the signal to be transmitted over long distances on the transmission line without attenuation, while amplifying and shaping the received signal;

[0030] The general interface chip is responsible for implementing the universal serial bus protocol, supporting high-speed data transmission and plug-and-play functions between devices, and realizing long-distance differential signal transmission between multiple devices; the dedicated interface chip is targeted at specific communication protocols or devices and is used for controller area network communication;

[0031] The present invention utilizes a multi-mode circuit. Under normal load conditions, the integrated circuit operates in QR mode with a high input voltage. When the load decreases, it operates in PFM mode and performs valley switching to improve efficiency. At low line input voltage, the integrated circuit operates in CCM mode with a fixed frequency (65 kHz) under heavy load, achieving high conversion efficiency across the entire load range. This makes it suitable for offline flyback converter applications requiring high performance, low standby power consumption, and low cost.

[0032] The above description is only a preferred specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any technician familiar with the technical field, within the technical scope disclosed by the present invention, who makes equivalent replacements or changes based on the technical solution and inventive concept of the present invention, should be covered by the scope of protection of the present invention.

Claims

1. An adaptive multi-mode PWM controller, characterized in that: The system includes a control core, a clock circuit, a PWM signal generating circuit, a feedback circuit, a power supply circuit, a protection circuit, a multi-mode circuit and a communication interface circuit. The multi-mode circuit includes a QR mode, a PFM mode and a CCM mode. The control core is connected to the clock circuit, the clock circuit is connected to the PWM signal generating circuit, the PWM signal generating circuit is connected to the feedback circuit, the feedback circuit is connected to the power supply circuit, the power supply circuit is connected to the protection circuit, and the protection circuit is connected to the communication interface circuit. The control core is a digital signal processor. The clock circuit provides a stable clock signal for the controller. The PWM signal generating circuit can generate a PWM signal with a specific duty cycle and frequency according to the instructions of the control core. The counter, comparator and control circuit are connected. Composition; the feedback circuit is used to collect multiple information such as the output voltage and output current of the output signal, and feed it back to the control core; the power supply circuit provides stable power supply for each module of the controller to ensure the normal operation of the controller, including voltage stabilizing chips, filter capacitors and multiple components; the protection circuit includes an overcurrent protection module, an overvoltage protection module, an undervoltage protection module, a reverse connection protection circuit, and an overheating protection module to detect abnormal conditions in the system; the multi-mode circuit operates in the QR mode of high-voltage input voltage under normal load conditions, and operates in the PFM mode when the load is reduced, and performs valley switching to improve efficiency. Under low-line input voltage, the integrated circuit operates in the fixed-frequency CCM mode when it is heavily loaded; the communication interface circuit is used to realize communication between the controller and other devices.

2. The adaptive multi-mode PWM controller according to claim 1, wherein: The clock circuit includes a crystal oscillator, an oscillation circuit, a frequency division circuit and a clock buffer. The crystal oscillator can generate a stable high-frequency oscillation signal to provide a clock reference for the entire circuit system; the oscillation circuit works in conjunction with the crystal oscillator to amplify and shape the weak signal generated by the crystal oscillator to make it a clock signal that meets the requirements; the frequency division circuit is used to divide the high-frequency clock signal output by the crystal oscillator into various required low-frequency clock signals; the clock buffer is used to enhance the driving capability of the clock signal to ensure that the clock signal can be stably transmitted to each circuit module that requires a clock.

3. The adaptive multi-mode PWM controller according to claim 1, wherein: The PWM signal generation circuit includes a timer, a comparator and a register. The timer is used to generate a periodic clock signal and set the period of the PWM signal; the comparator is used to compare the timer count value with a set comparison value; the register is used to store the timer's initial value, comparison value and other parameters, which are set through software or external circuits to control the frequency and duty cycle of the PWM signal.

4. The adaptive multi-mode PWM controller according to claim 3, wherein: The comparator is used to compare the count value of the timer with a set comparison value. Specifically, when the count value of the timer is less than the comparison value, the output is a high level; when the count value is greater than or equal to the comparison value, the output is a low level. By changing the comparison value, the duty cycle of the PWM signal can be changed.

5. The adaptive multi-mode PWM controller according to claim 1, wherein: The feedback circuit includes a sampling circuit, a feedback network, a comparison circuit and an adjustment circuit. The sampling circuit is used to extract a part of the signal from the output signal as the source of the feedback signal; the feedback network is composed of multiple components such as resistors, capacitors, and inductors, and processes and transforms the sampled feedback signal to make it meet the requirements of feedback to the input end; the comparison circuit compares the feedback signal with the input signal to generate an error signal; and the adjustment circuit adjusts the working state of the circuit according to the error signal generated by the comparison circuit.

6. The adaptive multi-mode PWM controller according to claim 1, wherein: The power supply circuit includes an input circuit, a voltage transformation circuit, a rectifier circuit, a filter circuit, a voltage stabilization circuit and an output circuit. The input circuit includes a power socket, a fuse and a filter capacitor; the voltage transformation circuit includes a transformer. The input power supply does not match the voltage required by the circuit, and voltage conversion needs to be performed through the transformer; the rectifier circuit includes a rectifier diode to convert AC power into DC power; the filter circuit includes a filter circuit and an inductor. The filter capacitor further filters out the ripple in the rectified DC voltage, making the output DC voltage smoother and more stable. The inductor and capacitor cooperate to form an LC filter circuit to suppress high-frequency noise and low-frequency ripple in the power supply; the voltage stabilization circuit includes a voltage stabilization chip to ensure that the output voltage remains stable within a certain range and is not affected by input voltage fluctuations and load changes; the output circuit includes an output interface to output the stable DC voltage to the load device to provide it with power.

7. The adaptive multi-mode PWM controller according to claim 1, wherein: The overvoltage protection module includes a voltage-stabilizing diode and a varistor; the undervoltage protection module includes a voltage comparator, which compares the input voltage with the reference voltage. When the input voltage is lower than the set value, the comparator outputs a signal to trigger the protection action; the overcurrent protection module includes a sampling resistor and a current transformer; The overheat protection module includes a temperature sensor that monitors key components in the circuit or the ambient temperature. When the temperature reaches a set value, the sensor outputs a signal to reduce power or cut off power through the control circuit; the reverse connection protection circuit includes a diode, which protects circuit components through the unidirectional guidance of the diode.

8. The adaptive multi-mode PWM controller according to claim 1, wherein: The communication interface circuit includes a hardware circuit and an interface chip. The hardware circuit includes a signal conversion circuit, a level conversion circuit, and a driving and receiving circuit. The interface chip includes a universal interface chip and a dedicated interface chip.

9. The adaptive multi-mode PWM controller according to claim 8, characterized in that: The signal conversion circuit is responsible for converting different types of signals; The level conversion circuit converts one level to another to ensure that the signal can be correctly identified and processed; the driving and receiving circuit enhances the driving capability of the signal, enabling the signal to be transmitted over a long distance on the transmission line without attenuation, while amplifying and shaping the received signal.

10. The adaptive multi-mode PWM controller according to claim 8, wherein: The universal interface chip is responsible for implementing the universal serial bus protocol, supporting high-speed data transmission and plug-and-play functions between devices, and realizing long-distance differential signal transmission between multiple devices; the dedicated interface chip is targeted at specific communication protocols or devices and is used for controller local area network communication.