Internet-of-things card and method for processing read / write command and submitting cache data of multi-page cache system in Internet-of-things card

Abstract

The invention relates to the technical field of Internet of Things cards, in particular to an Internet of Things card and a method for processing a read / write command and submitting cache data of a multi-page cache system in the Internet of Things card, and the method comprises the following steps: carrying out hash operation on a physical page address to be accessed by a write command to obtain a serial number of a table item of an address hash table; according to the serial number of the table item of the address hash table, the content of the table item of the address hash table is obtained from the address hash table, the content of the table item of the address hash table comprises the physical address of the cache page and the serial number of the table item of the cache mapping table, and whether the physical address of the cache page is consistent with the address of the physical page accessed by the write command or not is compared; if yes, cache mapping table item content is obtained from the cache mapping table according to the serial number of the cache mapping table item, the cache mapping table item content comprises a mapping physical address, a mapping state and cache data, the cache data is updated through data to be written in by the write command, and the mapping state is updated. According to the invention, the operation efficiency of the MCU system can be improved, so that the use experience of a user is improved.

Description

Technical Field

[0001] The present application relates to the technical field of Internet of Things cards, and in particular to an Internet of Things card and a method for processing read / write commands and submitting cached data in a multi-page cache system within the Internet of Things card. Background Art

[0002] The system in an IoT card is typically an MCU-based system. To improve system performance and Flash memory lifespan and reduce the number of Flash erase and write cycles, MCU-based systems often implement Flash page caching technology. Flash page caching is a technique used to optimize Flash page loading and operating performance. This page caching technology allocates space in the system's RAM cache to cache Flash page data. When the system writes to Flash, it first determines whether the write command matches the data in the RAM cache. If so, the data in the RAM cache is updated. If not, the data to be written to Flash is imported into the RAM cache, updating the data in the RAM cache. When the transaction is completed, or the related Flash write operation needs to be committed, the system writes the data in the RAM cache to Flash.

[0003] In a single-page cache system, a phenomenon similar to "page thrashing" can occur in some cases. This occurs when the system repeatedly executes Flash write commands on multiple pages, causing cache page data to be frequently imported and exported. This can cause the page cache hit rate to drop sharply, and the page cache's effectiveness is not fully realized. Therefore, the hit rate of a single-page cache is more dependent on the order in which Flash pages are written. To improve the Flash page hit rate and reduce "page thrashing," a common solution is to create multiple page caches in the system. This improves the write hit rate and optimizes cache performance.

[0004] In IoT systems, the use of multi-page cache technology can improve MCU operating efficiency and significantly extend the lifespan of Flash, thereby enhancing system stability. However, systems that support multi-page caches face the problem of determining cache hits—that is, determining whether the data being accessed is in the cache. In multi-page cache systems, determining whether the current access address is a hit requires multiple comparisons. MCUs typically lack the hardware for parallel comparisons, so multiple comparisons in certain operations must be performed serially. This results in a longer cache hit determination time and lower efficiency.

[0005] In addition, in MCU multi-page cache systems, there are generally a large number of read and write data operations. Each time these read and write commands are executed, it is necessary to determine whether the cache hits, which also has a significant impact on the performance of the entire system.

[0006] In addition, different existing comparison schemes require different numbers of comparisons, but all require multiple comparisons. For example, if the cache pages in the system are not processed, a search comparison method is generally used. In the case of a hit, the average number of comparisons is N / 2, and in the case of a miss, the number of comparisons is N, where N is the number of cache pages. For sorted cache pages, if a binary search method is used, the average number of comparisons is approximately log2N-1. The number of comparisons for hits and misses is not much different. In addition, sorting cache pages also consumes system time, and the sorting operation also reduces the efficiency of the entire system.

[0007] Therefore, how to improve the operating efficiency of the MCU system and thus enhance the user experience is a technical problem that those skilled in the art urgently need to solve. Summary of the Invention

[0008] The present application provides an Internet of Things card and a method for processing read / write commands and submitting cached data in a multi-page cache system within the Internet of Things card to improve the operating efficiency of the MCU system and thus enhance the user experience.

[0009] To solve the above technical problems, this application provides the following technical solutions:

[0010] A method for processing write commands of a multi-page cache system in an Internet of Things card comprises the following steps: step S110, performing a hash operation on the physical page address to be accessed by the write command to obtain the serial number of the address hash table entry; step S120, obtaining the address hash table entry content indicated by the serial number from the address hash table based on the obtained serial number of the address hash table entry, the address hash table entry content including the cache page physical address and the serial number of the cache mapping table entry, and comparing whether the cache page physical address is consistent with the physical page address accessed by the write command; step S130, if consistent, obtaining the cache mapping table entry content indicated by the serial number from the cache mapping table based on the serial number of the cache mapping table entry, the cache mapping table entry content including the mapped physical address, mapping status and cached data, updating the cached data of the cache mapping table entry content with the data to be written by the write command, and updating the mapping status of the cache mapping table entry content.

[0011] In the method for processing write commands of a multi-page cache system in an Internet of Things card as described above, preferably, step S110 includes the following steps: according to the Flash page size, removing a predetermined number of low-order bits in the physical page address to be accessed, and retaining the remaining high-order bits in the physical address to be accessed; according to the number of address hash table entries, selecting a predetermined number of low-order bits from the retained physical address to be accessed as the serial number of the address hash table entry.

[0012] The method for processing write commands of a multi-page cache system in an Internet of Things card as described above, wherein, preferably, further comprises the following steps: step S140, if inconsistent, determining whether the content of the address hash table entry is empty; step S150, if empty, selecting a cache page to be replaced from the cache according to the replacement strategy; step S160, if not empty, selecting the cache page indicated by the serial number of the cache mapping table entry as the cache page to be replaced; step S170, writing the cache data in the cache page to be replaced into Flash, and sending the write command to be replaced. The accessed physical page address is updated as the mapped physical address to the cache mapping table entry corresponding to the cache page; step S180, the physical page address to be accessed by the write command is updated as the cache page physical address to the address hash table entry indicated by the serial number of the address hash table entry, and the serial number of the cache mapping table entry corresponding to the cache page is used to update the serial number of the cache mapping table entry in the address hash table entry; step S190, the data to be written by the write command is written to the cache page to be replaced, and the mapping status in the corresponding cache mapping table entry is updated.

[0013] As described above, in the method for processing write commands of a multi-page cache system in an Internet of Things card, preferably, the size of the cache page used to cache data in the cache is an integer multiple of the Flash page size.

[0014] A method for processing a read command of a multi-page cache system in an Internet of Things card comprises the following steps: step S610, performing a hash operation on the physical page address to be accessed by the read command to obtain the serial number of the address hash table entry; step S620, obtaining the content of the address hash table entry indicated by the serial number from the address hash table based on the obtained serial number of the address hash table entry, the content of the address hash table entry including the physical address of the cache page and the serial number of the cache mapping table entry, and comparing whether the physical address of the cache page is consistent with the physical page address accessed by the read command; step S630, if they are consistent, obtaining the content of the cache mapping table entry indicated by the serial number from the cache mapping table based on the serial number of the cache mapping table entry, the content of the cache mapping table entry including the mapped physical address, mapping status and cached data, and reading the cached data.

[0015] In the method for processing read commands of a multi-page cache system in an Internet of Things card as described above, preferably, step S610 includes the following steps: according to the Flash page size, removing a predetermined number of low-order bits in the physical page address to be accessed, and retaining the remaining high-order bits in the physical address to be accessed; according to the number of address hash table entries, selecting a predetermined number of low-order bits from the retained physical address to be accessed as the serial number of the address hash table entry.

[0016] The method for processing read commands of a multi-page cache system in an Internet of Things card as described above further includes the following steps: Step S640 , if there is inconsistency, reading data from the Flash according to the physical page address to be accessed by the read command.

[0017] A method for submitting cache data in a multi-page cache system within an Internet of Things card comprises the following steps: step S710, writing cache data in the cache into Flash in response to a specified time / event; step S720, performing a hash operation on the corresponding mapped physical address in the cache mapping table to obtain the serial number of the address hash table entry; step S730, based on the obtained serial number of the address hash table entry, clearing the content of the address hash table entry indicated by the serial number in the address hash table, wherein the content of the address hash table entry includes the physical address of the cache page and the serial number of the cache mapping table entry; step S740, judging whether all valid cache data in the cache mapping table has been submitted based on the mapping status in the cache mapping table entry; if not all of the data has been submitted, continuing to step S710.

[0018] In the method for submitting cache data in a multi-page cache system within an Internet of Things card as described above, preferably, step S720 includes the following steps: according to the Flash page size, removing a predetermined number of low-order bits in the physical page address to be accessed, and retaining the remaining high-order bits in the physical address to be accessed; according to the number of address hash table entries, selecting a predetermined number of low-order bits from the retained physical address to be accessed as the serial number of the address hash table entry.

[0019] An Internet of Things card comprises an MCU, a cache, and Flash. The cache has two memories, one of which is used to store an address hash table, and the other is used to store a cache mapping table. The address hash table has N address hash table entries, each of which records a cache page physical address and a sequence number of a cache mapping table entry. The cache mapping table has M cache mapping table entries, each of which records a mapped physical address, a mapping state, and cached data. The cache page physical address in the address hash table entry and the mapped physical address in the cache mapping table entry mapped thereto are both mapped to the same Flash page. The MCU executes any of the methods described above.

[0020] Compared with the above background technology, the method for reading / writing command processing and cache data submission of the Internet of Things card and the multi-page cache system in the Internet of Things card provided by this application sets an address hash table and a cache mapping table, uses hash operation and address hash table to quickly determine whether the cache is hit, and synchronously updates the address hash table entries and the mapping relationship between the address hash table entries and the cache mapping table entries when the page is replaced. It can significantly improve the performance of determining cache hits, and in instructions that contain a large number of Flash accesses, it can greatly improve the execution speed of instructions, thereby improving the operating efficiency of the MCU system, and then improving the user experience. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments described in the present invention. For ordinary technicians in this field, other drawings can also be obtained based on these drawings.

[0022] Figure 1 This is a flowchart of a method for processing write commands in a multi-page cache system in an IoT card provided by this application;

[0023] Figure 2 This is a schematic diagram of the cache and Flash of the IoT card provided by this application;

[0024] Figure 3 This is a schematic diagram of the address hash table provided by this application;

[0025] Figure 4 It is a schematic diagram of the hash operation provided by this application;

[0026] Figure 5 is a schematic diagram of the cache mapping table provided by this application;

[0027] Figure 6 This is a flowchart of a method for processing read commands of a multi-page cache system in an IoT card provided by this application;

[0028] Figure 7 This is a flowchart of the method for submitting cache data in a multi-page cache system in an Internet of Things card provided by this application. DETAILED DESCRIPTION

[0029] The embodiments of the present invention are described in detail below. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention and are not to be construed as limiting the present invention.

[0030] Example 1

[0031] like Figure 1 As shown, the present application provides a method for processing a write command of a multi-page cache system in an IoT card, comprising the following steps:

[0032] Step S110: performing a hash operation on the physical page address to be accessed by the write command to obtain the serial number of the address hash table entry;

[0033] like Figure 2 As shown, the IoT card includes an MCU, a cache 110, and a Flash 120. For example, cache 110 is a RAM cache. Cache 110 has two memory locations: one for storing an address hash table and the other for storing a cache mapping table. Alternatively, cache 110 has one memory location for storing both the address hash table and the cache mapping table. The address hash table and the cache mapping table can be combined to form a single table.

[0034] like Figure 3 As shown, the address hash table has N address hash table entries, and the number of entries N can be configured according to actual conditions. Each address hash table entry records the cache page physical address and the serial number of the cache mapping table entry, where the cache page physical address is the page physical address of the Flash 120 page where the cache data corresponding to the serial number of the cache mapping table entry in the address hash table entry is mapped.

[0035] Each address hash table entry has a unique serial number, for example, 0, 1, 2˙˙˙N-1. After the IoT card receives a write command, the MCU performs a hash operation on the physical page address to be accessed by the write command to obtain the serial number of the address hash table entry. A hash operation is a mapping that can map data of any length to a fixed-length hash value.

[0036] In a page cache system, mapping is usually performed according to the page size of Flash 120. Generally, the size of a cache 110 page opened in the (RAM) cache 110 for caching data is an integer multiple of the Flash 120 page size.

[0037] like Figure 4 As shown, the Flash 120 page size is 512 bytes (ie 2 9 Byte, represented as 2 X Bytes), the Flash120 space address width is 32 bits, and the number of address hash table entries is 128 (i.e. 2 7 , expressed as 2 Y ) as an example to introduce that in this application, the physical page address to be accessed is converted into the serial number of the address hash table entry through hash operation.

[0038] First, the Flash 120 page size is 512 bytes (2 in binary notation). 9 bytes), according to the Flash120 page size (2 9 byte), remove the low-order bits (8, 7, 6, 5, 4, 3, 2, 1, 0) of the predetermined number of bits (9 bits) in the physical page address to be accessed, and retain the remaining high-order bits (31, 30, 29, ˙˙˙, 11, 10, 9) in the physical address to be accessed to obtain the physical page number. The low-order bits generally have no effect on distinguishing Flash 120 pages. Therefore, when performing a hash operation on the physical page address to be accessed, the low-order bits of the predetermined number of bits in the physical page address to be accessed are first removed.

[0039] Then, the number of address hash table entries is 128 (2 in binary notation). 7 ), according to the number of address hash table entries (2 7 ), select the low-order bits (15, 14, 13, 12, 11, 10, 9) of the predetermined number of bits (7 bits) from the retained physical address to be accessed, i.e., the physical page number, as the sequence number of the address hash table entry. Depending on the actual application scenario, other lower-order bits (16, 15, 14, 13, 12, 11, 10) of the predetermined number of bits (7 bits) may also be selected.

[0040] Step S120: Based on the obtained serial number of the address hash table entry, the content of the address hash table entry indicated by the serial number is obtained from the address hash table, where the content of the address hash table entry includes the cache page physical address and the serial number of the cache mapping table entry, and the cache page physical address is compared with the physical page address accessed by the write command to see whether they are consistent;

[0041] like Figure 2 As shown, after obtaining the serial number 2 of the address hash table entry by performing a hash operation on the physical page address to be accessed, the MCU accesses the address hash table through the serial number 2 of the address hash table entry, and can directly find an address hash table entry corresponding to the serial number 2, obtain the cache page physical address 101 and the serial number 1 of the cache mapping table entry recorded in the entry, and compare whether the cache page physical address 101 is consistent with the physical page address to be accessed. If the comparison is consistent, the cache 110 is hit, and if it is inconsistent, the cache 110 is missed.

[0042] The present application only needs to compare once whether the physical address of the cache page is consistent with the physical page address to be accessed to determine whether it hits cache 110, thereby avoiding traversing and comparing each cache page physical address in the cache mapping table through the physical page address to be accessed, and then quickly determining whether the current physical page address to be accessed hits cache 110.

[0043] Step S130: If they are consistent, then obtaining the cache mapping table entry content indicated by the serial number from the cache mapping table according to the serial number of the cache mapping table entry, the cache mapping table entry content including the mapped physical address, mapping status, and cached data, updating the cached data of the cache mapping table entry content with the data to be written by the write command, and updating the mapping status of the cache mapping table entry content;

[0044] If they are consistent, it can be determined that the write command hits cache 110, and cache 110 stores cache data that will be updated by the data to be written by the write command; and there is already a cache mapping table entry in the cache mapping table that is mapped to the address hash table entry with serial number 2, that is, the cache mapping table entry with serial number 1.

[0045] like Figure 5 As shown, the cache mapping table has M cache mapping table entries, and the number M of entries can be configured based on actual circumstances. Each cache mapping table entry records a mapping physical address, a mapping status, and cached data. The mapping status is a data set that represents the current state of cached data within the page cache system. In the current implementation, the mapping status may include a flag indicating whether the cached data is valid and a timestamp of cached data updates. When cached data is updated, the cached data is marked valid and the latest timestamp of the cached data is updated. The cached data is the latest cached data corresponding to the corresponding page physical address of Flash 120 in cache 110. Furthermore, the data items recorded in the cache mapping table entries may vary depending on different scenarios and implementations.

[0046] Each cache mapping table entry has a unique serial number, for example: 0, 1, 2˙˙˙M-1. By accessing the address hash table through the serial number of the address hash table entry, the address hash table entry corresponding to the serial number can be found. According to the serial number of the cache mapping table entry recorded in the address hash table entry, the cache mapping table entry corresponding to the serial number can be found by accessing the cache mapping table, and then the mapped physical address, mapping status and cached data recorded in the cache mapping table entry can be obtained. The cache mapping table entry records the status of each cache mapping page, the physical address of the Flash page mapped by the mapped physical address, and the cached data is the latest data corresponding to the Flash page. Furthermore, the data stored in the corresponding physical page address of Flash 120 can be accessed according to the mapped physical address.

[0047] Therefore, if they are consistent, the MCU accesses the corresponding entry in the cache mapping table through the serial number 1 of the cache mapping table entry, and updates the cache data recorded in the entry with the data to be written by the write command, and then updates the mapping status recorded in the entry, thereby completing the update of the cache data.

[0048] Step S140: If not, determine whether the content of the address hash table entry is empty;

[0049] If they are inconsistent, it can be determined that the write command misses cache 110, and the MCU needs to determine whether the entry content recorded in entry 2 in the address hash table is empty, that is, whether entry 2 records the cache page physical address and the serial number of the cache mapping table entry.

[0050] Step S150: If it is empty, select a cache page to be replaced from the cache according to the replacement strategy;

[0051] Taking the address hash table entry numbered 1 as an example, if the entry content recorded in the address hash table entry is empty, it means that there is no mapped page in entry 1. The MCU needs to select a cache page to be replaced from cache 110 based on the replacement strategy. The replacement strategy can be the LRU algorithm. The LRU (Least Recently Used) algorithm is a classic page replacement algorithm mainly used to manage the memory or cache of a computer system. The basic idea of ​​the LRU algorithm is to eliminate the page or data item that has not been used for the longest time.

[0052] In the cache mapping table, a cache mapping table entry is assigned to each cache page. Therefore, after the MCU selects the cache page to be replaced from the cache 110, the MCU knows the entry of the cache page in the cache mapping table and the serial number of the entry. For example, if the cache page corresponding to the cache mapping table entry with serial number 2 is selected, it can be known that the corresponding entry and the serial number of the entry are 2.

[0053] Step S160: If it is not empty, the cache page indicated by the serial number of the cache mapping table entry is selected as the cache page to be replaced;

[0054] If the content of the entry recorded in the entry 2 in the address hash table is not empty, it means that there is already a mapping page in the entry 2, that is, the cache page corresponding to the cache mapping table entry 1 specified by the serial number 1 of the cache mapping table recorded in the entry 2, and the cache page already has cache data recorded in it, and the cache page is selected as the cache page to be replaced.

[0055] This situation is a hash table conflict. In order to store the data to be written by the write command in the cache page, the MCU needs to write the data already stored in the cache page into Flash 120 to resolve the hash table conflict.

[0056] Step S170: write the cache data in the cache page to be replaced into the Flash, and update the physical page address to be accessed by the write command as the mapped physical address into the cache mapping table entry corresponding to the cache page;

[0057] After selecting the cache page to be replaced, the MCU writes the data already recorded in the cache page into Flash 120, thereby preparing the cache page for the data to be written by the write command. In addition, the MCU also uses the physical page address to be accessed by the write command as the new mapped physical address 101 and writes it into the entry 1 corresponding to the cache page to be replaced in the cache mapping table, thereby updating the entry 1 corresponding to the cache page to be replaced in the cache mapping table.

[0058] Step S180: Update the physical page address to be accessed by the write command as the physical address of the cache page into the address hash table entry indicated by the sequence number of the address hash table entry, and update the sequence number of the cache mapping table entry in the address hash table entry with the sequence number of the cache mapping table entry corresponding to the cache page;

[0059] The cache page physical address in the address hash table entry and the mapped physical address in the cache mapping table entry mapped thereto are both mapped to the same Flash 120 page, for example: Figure 2 As shown, the cache page physical address 101 in the address hash table entry with serial number 2 and the mapped physical address 101 in the cache mapping table entry with serial number 1 are both mapped to the same physical page 101 of Flash 120. Therefore, when the cache page is replaced, the MCU needs to ensure that the cache page physical address in the address hash table entry that is mapped to each other is consistent with the mapped physical address in the cache mapping table entry.

[0060] Therefore, the MCU also uses the physical page address to be accessed by the write command as the new cache page physical address 101, and updates it to the address hash table entry with serial number 2. The MCU also uses the serial number 1 of the entry corresponding to the cache page in the cache mapping table to update the serial number 1 of the cache mapping table entry in the address hash table entry with serial number 2, so as to map the address hash table entry with serial number 2 to the cache mapping table entry with serial number 1.

[0061] Step S190: writing the data to be written by the write command into the cache page to be replaced, and updating the mapping status in the corresponding cache mapping table entry;

[0062] After updating the mapping physical address in the cache mapping table and the cache page physical address in the address hash table, and updating the mapping relationship between the cache mapping table entry and the address hash table entry, the MCU writes the data to be written by the write command into the cache page to be replaced to cache the data to be written by the write command, and the MCU updates the mapping status in the corresponding table entry in the cache mapping table, and the update of the cache data is completed.

[0063] Example 2

[0064] like Figure 6As shown, the present application provides a method for processing a read command of a multi-page cache system in an IoT card, comprising the following steps:

[0065] Step S610: performing a hash operation on the physical page address to be accessed by the read command to obtain the serial number of the address hash table entry;

[0066] After receiving the read command, the MCU performs a hash operation on the physical page address to be accessed by the read command to obtain the serial number of the address hash table entry, wherein the hash operation method is the same as the hash operation method in the first embodiment.

[0067] Step S620: Based on the obtained serial number of the address hash table entry, the content of the address hash table entry indicated by the serial number is obtained from the address hash table, where the content of the address hash table entry includes the cache page physical address and the serial number of the cache mapping table entry, and the cache page physical address is compared with the physical page address accessed by the read command to see if they are consistent;

[0068] like Figure 2 As shown, after obtaining the serial number 2 of the address hash table entry by performing a hash operation on the physical page address to be accessed, the MCU accesses the address hash table through the serial number 2 of the address hash table entry, finds the address hash table entry corresponding to the serial number 2, obtains the cache page physical address 101 recorded in the entry and the serial number 1 of the cache mapping table entry, and compares whether the cache page physical address 101 is consistent with the physical page address to be accessed.

[0069] Step S630: If they are consistent, then obtain the cache mapping table entry content indicated by the serial number from the cache mapping table according to the serial number of the cache mapping table entry, the cache mapping table entry content including the mapped physical address, mapping status and cached data, and read the cached data;

[0070] If they match, it can be determined that the read command hits cache 110, and the data to be read by the read command is stored in cache 110. The MCU accesses the cache mapping table entry with sequence number 1 according to the sequence number 1 of the cache mapping table entry, obtains the cache mapping table entry content from the entry, which includes the mapped physical address, mapping status, and cached data, and reads the cached data from the entry, completing the data read.

[0071] Step S640: If not consistent, read data from the Flash according to the physical page address to be accessed by the read command;

[0072] If not, it can be determined that the read command misses the cache 110 and the data to be read by the read command is not stored in the cache 110. The MCU reads the data from the Flash 120 according to the physical page address to be accessed by the read command, and the data reading is completed.

[0073] Example 3

[0074] like Figure 7 As shown, the present application provides a method for submitting cache data in a multi-page cache system in an IoT card, comprising the following steps:

[0075] Step S710: In response to a specified time / event, write the cached data in the cache into the Flash;

[0076] In response to a specified time / event (for example, a predetermined time interval, a cache idle rate lower than a predetermined value, etc.), the MCU writes the cache data stored in cache 110 to the corresponding physical page address of Flash 120 according to the mapping physical address and mapping status (for example, whether it is valid) recorded in the cache mapping table entry.

[0077] Step S720: Perform a hash operation on the corresponding mapped physical address in the cache mapping table to obtain a sequence number of the address hash table entry;

[0078] The MCU performs a hash operation on the mapped physical address recorded in the corresponding entry in the cache mapping table of the data written into Flash 120 to obtain the serial number of the address hash table entry, wherein the hash operation method is the same as the hash operation method in the first embodiment.

[0079] Step S730: Clear the content of the address hash table entry indicated by the obtained serial number in the address hash table according to the serial number of the address hash table entry, where the content of the address hash table entry includes the physical address of the cache page and the serial number of the cache mapping table entry.

[0080] After calculating the serial number of the address hash table entry, the MCU clears the content of the address hash table entry indicated by the serial number in the address hash table, where the content of the address hash table entry includes the cache page physical address and the cache mapping table entry serial number, so that the entry in the address hash table is in an idle state.

[0081] Step S740: Determine whether all valid cache data in the cache mapping table is committed based on the mapping status in the cache mapping table entry.

[0082] After clearing the cache page physical address and the serial number of the cache mapping table entry in the corresponding table entry in the address hash table, the MCU can also determine whether all valid cache data in the cache mapping table are submitted based on the mapping status recorded in the cache mapping table entry. If not, continue with step S710; if all have been submitted, continue with step S750.

[0083] Step S750: Data submission is completed.

[0084] This application has been implemented on an IoT card. By setting an address hash table and a cache mapping table, hash operations and address hash tables are used to quickly determine whether a cache hit occurs. The address hash table entries and the mapping relationship between the address hash table entries and the cache mapping table entries are synchronously updated when the page is replaced. This can significantly improve the performance of determining cache hits, and can greatly improve the execution speed of instructions that involve a large number of accesses to Flash 120.

[0085] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above and that the invention can be embodied in other specific forms without departing from the spirit or essential characteristics of the invention. Therefore, the embodiments should be considered in all respects as illustrative and non-restrictive, and the scope of the invention is defined by the appended claims, not the foregoing description, and all variations within the meaning and range of equivalents of the claims are intended to be included therein. Any reference sign in a claim should not be construed as limiting the claim to which it relates.

[0086] In addition, it should be understood that although this specification is described in terms of implementation methods, not every implementation method contains only one independent technical solution. This narrative method of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment can also be appropriately combined to form other implementation methods that can be understood by those skilled in the art.

Claims

1. A method for processing write commands in a multi-page cache system in an Internet of Things card, characterized in that: The steps include: Step S110: performing a hash operation on the physical page address to be accessed by the write command to obtain the serial number of the address hash table entry; Step S120: Based on the obtained serial number of the address hash table entry, the content of the address hash table entry indicated by the serial number is obtained from the address hash table, where the content of the address hash table entry includes the cache page physical address and the serial number of the cache mapping table entry, and the cache page physical address is compared with the physical page address accessed by the write command to see whether they are consistent; Step S130: If they are consistent, the cache mapping table entry content indicated by the serial number is obtained from the cache mapping table according to the serial number of the cache mapping table entry. The cache mapping table entry content includes the mapping physical address, mapping status and cache data. The cache data of the cache mapping table entry content is updated with the data to be written through the write command, and the mapping status of the cache mapping table entry content is updated.

2. The method for processing write commands of a multi-page cache system in an Internet of Things card according to claim 1, characterized in that: Step S110 includes the following steps: According to the Flash page size, a predetermined number of low-order bits in the physical page address to be accessed are removed, and the remaining high-order bits in the physical address to be accessed are retained; According to the number of address hash table entries, a predetermined number of low-order bits are selected from the reserved physical addresses to be accessed as the serial numbers of the address hash table entries.

3. The method for processing write commands of a multi-page cache system in an Internet of Things card according to claim 1 or 2, characterized in that: The following steps are also included: Step S140: If not, determine whether the content of the address hash table entry is empty; Step S150: If it is empty, select a cache page to be replaced from the cache according to the replacement strategy; Step S160: If it is not empty, the cache page indicated by the serial number of the cache mapping table entry is selected as the cache page to be replaced; Step S170: write the cache data in the cache page to be replaced into the Flash, and update the physical page address to be accessed by the write command as the mapped physical address into the cache mapping table entry corresponding to the cache page; Step S180: Update the physical page address to be accessed by the write command as the physical address of the cache page into the address hash table entry indicated by the sequence number of the address hash table entry, and update the sequence number of the cache mapping table entry in the address hash table entry with the sequence number of the cache mapping table entry corresponding to the cache page; Step S190: Write the data to be written by the write command into the cache page to be replaced, and update the mapping status in the corresponding cache mapping table entry.

4. The method for processing write commands of a multi-page cache system in an Internet of Things card according to claim 1 or 2, characterized in that: The size of a cache page used to cache data in the cache is an integer multiple of the Flash page size.

5. A method for processing read commands of a multi-page cache system in an Internet of Things card, characterized in that: The steps include: Step S610: performing a hash operation on the physical page address to be accessed by the read command to obtain the serial number of the address hash table entry; Step S620: Based on the obtained serial number of the address hash table entry, the content of the address hash table entry indicated by the serial number is obtained from the address hash table, where the content of the address hash table entry includes the cache page physical address and the serial number of the cache mapping table entry, and the cache page physical address is compared with the physical page address accessed by the read command to see if they are consistent; Step S630: If they are consistent, then obtain the cache mapping table entry content indicated by the serial number from the cache mapping table according to the serial number of the cache mapping table entry, the cache mapping table entry content including the mapping physical address, mapping status and cache data, and read the cache data.

6. The method for processing read commands of a multi-page cache system in an Internet of Things card according to claim 5, characterized in that: Step S610 includes the following steps: According to the Flash page size, a predetermined number of low-order bits in the physical page address to be accessed are removed, and the remaining high-order bits in the physical address to be accessed are retained; According to the number of address hash table entries, a predetermined number of low-order bits are selected from the reserved physical addresses to be accessed as the serial numbers of the address hash table entries.

7. The method for processing read commands of a multi-page cache system in an Internet of Things card according to claim 5 or 6, characterized in that: The following steps are also included: Step S640: If there is no consistency, read data from the Flash according to the physical page address to be accessed by the read command.

8. A method for submitting cache data in a multi-page cache system in an Internet of Things card, characterized in that: The steps include: Step S710: In response to a specified time / event, write the cached data in the cache into the Flash; Step S720: Perform a hash operation on the corresponding mapped physical address in the cache mapping table to obtain a sequence number of the address hash table entry; Step S730: Clear the content of the address hash table entry indicated by the obtained serial number in the address hash table according to the serial number of the address hash table entry, where the content of the address hash table entry includes the physical address of the cache page and the serial number of the cache mapping table entry. Step S740: Determine whether all valid cache data in the cache mapping table is committed based on the mapping status in the cache mapping table entry. If not all are submitted, continue to step S710.

9. The method for submitting cache data in a multi-page cache system in an Internet of Things card according to claim 8, characterized in that: Step S720 includes the following steps: According to the Flash page size, a predetermined number of low-order bits in the physical page address to be accessed are removed, and the remaining high-order bits in the physical address to be accessed are retained; According to the number of address hash table entries, a predetermined number of low-order bits are selected from the reserved physical addresses to be accessed as the serial numbers of the address hash table entries.

10. An Internet of Things card, comprising: MCU, cache and Flash, characterized in that two memories are opened in the cache, one of which is used to store the address hash table and the other is used to store the cache mapping table; The address hash table has N address hash table entries, each of which records the physical address of the cache page and the serial number of the cache mapping table entry; The cache mapping table has M cache mapping table entries, each of which records a mapping physical address, a mapping state, and cache data; The cache page physical address in the address hash table entry and the mapped physical address in the cache mapping table entry mapped to it are both mapped to the same Flash page; The MCU executes the method according to any one of claims 1 to 9.

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