Circuit analysis generation and modification method based on form and logic separation

Abstract

The invention relates to the field of artificial intelligence, natural language processing and electronic design automation, in particular to a circuit analysis generation and modification method based on form and logic separation, comprising the following steps: step 1, a complete circuit generation process; 2, separating and analyzing logic and form; step 3, intelligently modifying an operator; and step 4, labeling-generating-modifying a system: step 1, converting a natural language to a DSL code, then converting the DSL code into a logic diagram structure, and finally generating a morphological layout and a complete circuit diagram. According to the method, a complete process from a natural language to DSL, a logic diagram, morphological layout and a final circuit is achieved, the intelligent degree of circuit analysis is improved, through morphological and logic decoupling, the generalization ability of circuit analysis is improved, the complete automatic process from natural language description to final circuit generation is achieved, meanwhile, efficient circuit modification and optimization are supported, and the method is suitable for popularization and application. The method also provides a modification operator, supports accurate circuit adjustment, and improves the design efficiency.

Description

Technical Field

[0001] The present invention relates to the fields of artificial intelligence, natural language processing and electronic design automation, and in particular to a circuit analysis, generation and modification method based on morphology and logic separation. Background Art

[0002] Currently, circuit analysis and generation methods mainly include: HDL (Verilog / VHDL)-based methods: users need to manually write code; deep learning-based circuit prediction: using methods such as graph neural networks (GNN) to learn circuit structures, but lacking support for modification and optimization; EDA tool-based rule modeling: usually relying on fixed rules, with low scalability and intelligence.

[0003] Current EDA tools face many challenges in circuit analysis, design, and modification: existing methods fail to provide a complete parsing process from natural language to circuit diagrams: traditional methods require manual writing of DSL code or direct editing of circuit diagrams, lacking natural language interaction, and existing automated methods mainly focus on circuit generation, but lack modification and optimization capabilities; logic and morphology are coupled and generalization capabilities are insufficient: existing methods usually mix circuit logic and physical morphology, making it difficult to adapt to circuits with different layout methods; lack of intelligent circuit modification methods: existing EDA tools mainly rely on manual adjustments or predefined rules, and lack support for automatic modification operators. Summary of the Invention

[0004] (1) Technical problems solved

[0005] In response to the shortcomings of the existing technology, the present invention provides a circuit analysis generation and modification method based on the separation of morphology and logic, which has the advantages of improving the intelligence of circuit analysis and supporting precise circuit adjustment through the provided modification operators, thereby solving the above-mentioned problems.

[0006] (2) Technical solution

[0007] To achieve the above object, the present invention provides the following technical solutions:

[0008] A circuit analysis generation and modification method based on morphology and logic separation includes the following steps:

[0009] Step 1: Complete circuit generation process;

[0010] Step 2: Separate analysis of logic and morphology;

[0011] Step 3: Intelligent modification of operators;

[0012] Step 4: Annotate-generate-modify system.

[0013] Preferably, the step 1 includes converting from natural language to DSL code, and then converting to a logical diagram structure, and finally generating a morphological layout and a complete circuit diagram.

[0014] Preferably, the step 2 includes logic analysis and morphological analysis, wherein the logic analysis is to process the functional relationship of the circuit, such as component connection and current flow, and the morphological analysis is to process the layout optimization of the circuit to ensure the rationality of the physical structure.

[0015] Preferably, the step three includes a logic modification operator and a morphology modification operator, wherein the logic modification operator is used to adjust the topology of the circuit, and the morphology modification operator is used to optimize component layout and improve wiring efficiency.

[0016] Preferably, the step four is marked as follows: defining the data structure of logic information and morphological information; generating: generating circuits based on DSL code and graph neural network; and modifying: providing intelligent modification tools to improve circuit design flexibility.

[0017] (3) Beneficial effects

[0018] Compared with the prior art, the present invention provides a circuit analysis generation and modification method based on the separation of morphology and logic, which has the following beneficial effects:

[0019] 1. This invention provides a complete process from natural language to DSL, logic diagram, morphological layout, and final circuit, improving the intelligence of circuit analysis. By decoupling morphology and logic, it enhances the generalization capability of circuit analysis and implements a complete automated process from natural language description to final circuit generation. It also supports efficient circuit modification and optimization. The method also provides modification operators to support precise circuit adjustment and improve design efficiency.

[0020] 2. The present invention can be widely used in EDA design tools, circuit analysis systems, intelligent circuit optimization and other fields to improve the intelligence level of electronic design. DETAILED DESCRIPTION

[0021] The following will be combined with the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0022] The present invention relates to a circuit analysis generation and modification method based on morphology and logic separation, comprising the following steps:

[0023] Step 1: Complete circuit generation process, including conversion from natural language to DSL code, then to logic diagram structure, and finally generating morphological layout and complete circuit diagram;

[0024] Step 2: Separate analysis of logic and morphology, including logic analysis and morphology analysis. Logic analysis deals with the functional relationships of the circuit, such as component connections and current flow, while morphology analysis optimizes the circuit layout to ensure a reasonable physical structure.

[0025] Step 3: Intelligent modification operators, including logic modification operators and morphology modification operators. The logic modification operator is used to adjust the topology of the circuit, and the morphology modification operator is used to optimize component layout and improve wiring efficiency.

[0026] Step 4: Annotation-Generation-Modification System, Annotation: Define the data structure of logical information and morphological information; Generation: Generate circuits based on DSL code and graph neural network; Modification: Provide intelligent modification tools to improve circuit design flexibility.

[0027] From natural language to final circuit generation, it includes natural language parsing: using NLP technology to parse user input and extract key information such as circuit components, connection relationships, parameters, etc.; DSL generation: based on the parsing results, generate circuit DSL code, using a structured description method to ensure DSL readability and executableness; logic diagram generation: generate a circuit topology diagram (adjacency matrix + component attributes) through DSL parsing, record the connection relationship between components, and form a logical network; morphological layout optimization: using GNN to learn circuit layout rules, generate an optimized physical layout, and combine EDA rules for final wiring adjustment.

[0028] This invention designs two types of modification operators to ensure the accuracy and controllability of modifications. The logical modification operator acts on the topology of the circuit, for example, "change the connection point of R1 from Q1 to Q2" → modify the DSL code or topology matrix; the morphological modification operator acts on the spatial layout of the circuit, for example, "move C1 to the right of Q1" → modify the component position to improve wiring optimization;

[0029] In the annotation-generation-modification system, the annotation layer includes: logical annotation: adjacency matrix, current flow, DSL code; morphological annotation: component location, grid layout; generation layer: logical layer → morphological layer → generate the final circuit diagram; modification layer: use modification operators for precise adjustment. The modification process includes: user input modification requirements, modification requirements are parsed, appropriate modification operators are called, modifications are applied, the logic or morphological layer is adjusted, and the circuit diagram is regenerated.

[0030] The beneficial effects of the present invention are as follows: the present invention improves the intelligence level of circuit analysis through the complete process from natural language to DSL, logic diagram, morphological layout, and final circuit, decouples morphology and logic, improves the generalization ability of circuit analysis, and realizes a complete automated process from natural language description to final circuit generation. At the same time, it supports efficient circuit modification and optimization. The method also provides a modification operator to support precise circuit adjustment and improve design efficiency. It can be widely used in EDA design tools, circuit analysis systems, intelligent circuit optimization and other fields to improve the intelligence level of electronic design.

[0031] While embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions, and variations may be made to these embodiments without departing from the principles and spirit of the invention, and that the scope of the invention is defined by the appended claims and their equivalents.

Claims

1. A circuit analysis generation and modification method based on separation of morphology and logic, characterized in that: The following steps are involved: Step 1: Complete circuit generation process; Step 2: Separate analysis of logic and morphology; Step 3: Intelligent modification of operators; Step 4: Annotate-generate-modify system.

2. The circuit analysis generation and modification method based on morphology and logic separation according to claim 1, characterized in that: The step 1 includes converting from natural language to DSL code, then converting to a logic diagram structure, and finally generating a morphological layout and a complete circuit diagram.

3. The circuit analysis generation and modification method based on morphology and logic separation according to claim 1, characterized in that: The second step includes logic analysis and morphological analysis, wherein the logic analysis is to process the functional relationship of the circuit, such as component connection and current flow, and the morphological analysis is to optimize the layout of the processing circuit to ensure the rationality of the physical structure.

4. The circuit analysis generation and modification method based on morphology and logic separation according to claim 1, characterized in that: The step three includes a logic modification operator and a morphology modification operator, wherein the logic modification operator is used to adjust the topology of the circuit, and the morphology modification operator is used to optimize component layout and improve wiring efficiency.

5. The circuit analysis generation and modification method based on morphology and logic separation according to claim 1 is characterized in that: The step 4 is marked as: defining the data structure of the logical information and the morphological information; Generate: Generate circuits based on DSL code and graph neural networks; Modification: Provides intelligent modification tools to improve circuit design flexibility.