Ceramic electronic component and method for manufacturing same

Abstract

A multilayer ceramic electronic component according to one embodiment of the present invention includes a main body including a capacitor portion in which a plurality of dielectric layers having ceramic as a main component and a plurality of internal electrode layers are laminated, all elements of Al or Cr, Fe, and Si are present in the capacitor portion, and at least one of these elements is deposited in the internal electrode layers.

Description

Technical Field

[0001] The present invention relates to a ceramic electronic component and a method for manufacturing the same. Background Art

[0002] As electronic devices become smaller, ceramic electronic components such as multilayer ceramic capacitors mounted in the electronic devices are also required to be further miniaturized.

[0003] A multilayer ceramic capacitor is a ceramic electronic component consisting of a main body comprising a capacitor structure formed by alternating multiple dielectric layers primarily composed of ceramic and multiple internal electrode layers. Methods for miniaturizing and increasing the capacitance of such ceramic electronic components include increasing the capacitance per layer by thinning the dielectric layers, and increasing the number of layers stacked within a given thickness by thinning the dielectric and internal electrode layers.

[0004] However, multilayer ceramic capacitors are typically manufactured by firing the dielectric layer and internal electrode layer together. Therefore, when the internal electrode layer becomes thinner, it is more likely to break due to thermal shock during firing, potentially reducing the continuity of the internal electrode layer. It is known that in ceramic electronic components such as multilayer ceramic capacitors, when the internal electrode layer has discontinuous areas, the portion of the dielectric layer adjacent to the discontinuous area of ​​the internal electrode is not applied with voltage during use and therefore does not contribute to the electrostatic capacitance. Furthermore, the relative area between the positive and negative electrodes decreases, which can also lead to a decrease in capacitance.

[0005] Therefore, to prevent a loss of continuity even when thinning the internal electrode layers, multilayer ceramic capacitors have been proposed (see Patent Documents 1 and 2). By forming internal electrode layers containing Ni and precious metals (elements), the multilayer ceramic capacitors described in Patent Documents 1 and 2 can suppress Ni grain growth during firing, preventing discontinuity in the internal electrode layers.

[0006] Prior art literature Patent Literature Patent Document 1: Japanese Patent Application Laid-Open No. 2007-242599 Patent Document 2: Japanese Patent Application Laid-Open No. 2010-153485 Summary of the Invention

[0007] Technical problem to be solved by the invention In the multilayer ceramic capacitors described in Patent Documents 1 and 2, the precious metals contained in the internal electrode layers are very expensive, potentially increasing product costs. Furthermore, Pt, Pd, and other metals are classified as rare metals, raising concerns about the depletion of natural resources.

[0008] The present invention has been made in view of the above-mentioned circumstances, and an object of the present invention is to provide a ceramic electronic component and a method for manufacturing the same, which can improve the continuity of the internal electrode layer even when the internal electrode layer is thinned.

[0009] Means for solving technical problems The present inventors have conducted intensive research to achieve the above-mentioned objectives and have discovered that, in a ceramic electronic component having a main body comprising a capacitor portion formed by laminating a plurality of dielectric layers primarily composed of ceramic and a plurality of internal electrode layers, if all of Al, Cr, Fe, and Si are present within the capacitor portion and at least one of these elements is precipitated within the internal electrode layers, a ceramic electronic component can be obtained that improves the continuity of the internal electrode layers even when the internal electrode layers are made thinner, thereby completing the present invention.

[0010] That is, the present invention includes the following aspects. [1] A ceramic electronic component, characterized in that: The main body includes a capacitor portion formed by alternately stacking a plurality of dielectric layers mainly composed of ceramic and a plurality of internal electrode layers. The capacitor portion includes Al or Cr, Fe and Si, At least one element selected from the group consisting of Al, Cr, Fe, and Si is precipitated in the internal electrode layer. [2] The ceramic electronic component according to method [1] is characterized in that: Fe is segregated at the interface between the dielectric layer and the internal electrode layer, when the capacitor portion contains Cr, Fe and Cr are segregated at the interface between the dielectric layer and the internal electrode layer, and Al or Cr, Fe and Si are segregated at the dielectric grain boundaries in the dielectric layer. [3] The ceramic electronic component according to method [1] or [2] is characterized in that: in the capacitor part, the total content of Al or Cr relative to the total of the main component metal elements of the internal electrode layer, Al or Cr, Fe and Si is not less than 0.001at% and not more than 10at%. [4] A ceramic electronic component according to any one of methods [1] to [3], characterized in that in the capacitor portion, the Fe content is greater than or equal to 0.001 at % and less than or equal to 10 at % relative to the total of the main component metal elements of the internal electrode layer, Al or Cr, Fe and Si. [5] A ceramic electronic component according to any one of methods [1] to [4], characterized in that in the capacitor portion, the Si content is greater than or equal to 0.001 at % and less than or equal to 10 at % relative to the total of the main component metal elements of the internal electrode layer, Al or Cr, Fe and Si. [6] The ceramic electronic component according to any one of aspects [1] to [5] is characterized in that the thickness of each of the plurality of dielectric layers and the plurality of internal electrode layers is 1 μm or less. [7] The ceramic electronic component according to any one of aspects [1] to [6], wherein the dielectric layer is formed of barium titanate. [8] The ceramic electronic component according to any one of aspects [3] to [5] is characterized in that the main component metal element is Ni. [9] A method for manufacturing a ceramic electronic component, comprising: forming a stacked unit by forming an internal electrode pattern on a dielectric green sheet, wherein the internal electrode pattern contains a main component metal element of an internal electrode layer, Al or Cr, Fe, and Si; a step of forming a pre-fired capacitor portion by stacking a plurality of the stacking units; and The step of firing the capacitor portion before firing to form the capacitor portion.

[10] The method for manufacturing a ceramic electronic component according to method [9] is characterized in that the internal electrode pattern is formed using a vacuum film forming process.

[11] The method for manufacturing a ceramic electronic component according to method [9] is characterized in that the internal electrode pattern is formed by a printing method.

[0022] Effects of the Invention The present invention achieves a ceramic electronic component with improved continuity of the internal electrode layers, even when the internal electrode layers are thinner. Furthermore, by precipitating at least one element selected from Al, Cr, Fe, and Si within the internal electrode layers, a ceramic electronic component with thin, highly continuous internal electrodes and excellent processing stability can be provided at low cost. Furthermore, the ceramic electronic component of the present invention does not use rare metals, thereby contributing to the sustainability of natural resources. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 This is a partial cross-sectional perspective view of a multilayer ceramic capacitor.

[0024] Figure 2 It is a cross-sectional view for explaining the continuity ratio of the internal electrode layer and the interface between the dielectric layer and the internal electrode layer.

[0025] Figure 3 This is a graph plotting the results of elemental analysis of the interfaces between the dielectric layer and the internal electrode layer of the multilayer ceramic capacitor produced in Example 1.

[0026] Figure 4 This is a graph plotting the results of elemental analysis of the interfaces between the dielectric layer and the internal electrode layer of the multilayer ceramic capacitor produced in Example 5. DETAILED DESCRIPTION

[0027] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

[0028] Multilayer Ceramic Capacitors A multilayer ceramic capacitor includes: a main body, which includes a capacitor portion formed by alternating multiple dielectric layers with ceramic as the main component and multiple internal electrode layers; and at least two external electrodes, which are formed on the surface of the main body in a manner that is separated from each other, and each external electrode is connected to a portion of the internal electrode layer led out from the capacitor portion.

[0029] The main body of the multilayer ceramic capacitor has a roughly rectangular parallelepiped shape, and the main body has an upper surface and a lower surface opposite to each other in the height direction, two end surfaces connected to the upper surface and the lower surface and opposite to each other in the length direction of the main body, and two side surfaces connected to the upper surface and the lower surface and opposite to each other in the width direction of the main body.

[0030] The stacking direction of the plurality of dielectric layers and the plurality of internal electrode layers in the multilayer ceramic capacitor may be the height direction of the body, the length direction of the body, the width direction of the body, or any other direction.

[0031] In the main body, the outermost layer in the stacking direction of the capacitor portion is configured with an internal electrode layer, and the internal electrode layer in the outermost layer of the capacitor portion is covered by a covering layer. The covering layer plays a role as a protection portion for protecting the capacitor portion consisting of a dielectric layer and an internal electrode layer. There is also a situation where the covering layer is configured in the relative upper surface and lower surface in the height direction of the main body, but according to the difference in the positional relationship between the main body and the stacking direction of the capacitor portion, there is also a situation where the covering layer is configured in addition to the upper surface and the lower surface. The covering layer can be a main component with a ceramic material. The material of the covering layer and the dielectric layer can be the same or different.

[0032] In the main body, a side edge portion is provided on the outside of the capacitor portion, perpendicular to the stacking direction of the capacitor portion. The internal electrode layer is not extended to the side edge portion, and the side edge portion functions as a protective portion for protecting the capacitor portion composed of the dielectric layer and the internal electrode layer. That is, the side edge portion is an area adjacent to the capacitor portion and on the outside of the capacitor portion when viewed from the stacking direction, and is an area where the internal electrode layer is not extended. There are also cases where the side edge portion exists on the side of the main body, but depending on the positional relationship between the main body and the stacking direction of the capacitor portion, and the position of the forming surface of the external electrode formed on the surface of the main body, there are also cases where the side edge portion exists on a surface different from the side, or there are also cases where the side edge portion exists on both the side and other surface sides. The side edge portion can be mainly composed of ceramic material. The material of the side edge portion and the dielectric layer can be the same or different. The side edge portion is an area where no electrostatic capacitance is generated.

[0033] In the main body, an end edge portion is provided on the outside of the capacitor portion, and the internal electrode is led out to the surface of the main body at this end edge portion. The end edge portion is an area adjacent to the capacitor portion and outside the capacitor portion when viewed from the stacking direction, and is an area where the internal electrode layer is led out. There are cases where the end edge portion exists on the end face side of the main body, but depending on the positional relationship between the main body and the capacitor portion in the stacking direction, and the position of the formation surface of the external electrode formed on the main body surface, there are also cases where the end edge portion exists on a face different from the end face, or there are also cases where the end edge portion exists on both the end face side and the other face side. If the surface of the main body where the internal electrode layer is led out is one face, the end edge portion exists in one place, and if the surface of the main body where the internal electrode layer is led out is two faces, the end edge portion exists in two places. The end edge portion can be mainly composed of ceramic material. The material of the end edge portion and the dielectric layer can be the same or different. Although parasitic capacitance may be generated between internal electrode layers led out to the same face in the end edge portion, it is basically an area that can be considered as not generating electrostatic capacitance.

[0034] Multiple internal electrode layers are each extended to an end edge portion and electrically connected to an external electrode disposed outside the end edge portion. The internal electrode layers may be extended to end edges located on opposite sides of the main body, or to end edges located on adjacent sides of the main body, or to different regions of the same end edge portion. As long as the external electrodes are spaced apart, they may extend from the surface of the main body where the end edge portion from which the internal electrode layers are extended to another adjacent surface of the main body.

[0035] Next, use Figure 1 The ceramic electronic component of the present invention will be described. Figure 1This is an example of a multilayer ceramic capacitor as a ceramic electronic component, and the present invention is not limited to this embodiment.

[0036] Figure 1 FIG. 1 is a partial cross-sectional perspective view of the multilayer ceramic capacitor 100 . Figure 1 The multilayer ceramic capacitor 100 illustrated in FIG. 1 includes a main body 10 having a substantially rectangular parallelepiped shape and external electrodes 20a and 20b spaced apart from each other and provided on both end surfaces of the main body 10. The main body 10 has an upper surface and a lower surface, respectively, that face each other in the vertical direction (Z-axis direction). The two surfaces other than the end surfaces, the upper surface, and the lower surface of the main body 10 are side surfaces.

[0037] exist Figure 1 In the multilayer ceramic capacitor 100 shown, the external electrodes 20a and 20b provided on the end surfaces extend on the upper surface, lower surface, and both side surfaces of the main body 10 in the stacking direction. However, the external electrodes 20a and 20b are spaced apart from each other. Figure 1 In the diagram, the X-axis (first direction) is the longitudinal direction of the main body 10 and is the direction in which the external electrodes 20a and 20b face each other. The Y-axis (second direction) is the width direction of the internal electrode layers. The Z-axis (third direction) is the stacking direction. The X-axis, Y-axis, and Z-axis directions are orthogonal to each other.

[0038] exist Figure 1 In the illustrated multilayer ceramic capacitor 100, the main body 10 has a structure in which dielectric layers 11 composed of a ceramic material that functions as a dielectric and internal electrode layers 12 are alternately stacked, with multiple dielectric layers 11 stacked with internal electrode layers 12 interposed therebetween. Some internal electrode layers 12 extend to an edge portion 16a, reaching the surface of the main body 10 where the external electrode 20a is provided, and are electrically connected to the external electrode 20a. Other internal electrode layers 12 extend to an edge portion 16b (not shown), reaching the surface of the main body 10 where the external electrode 20b is provided, and are electrically connected to the external electrode 20b. This ensures electrical continuity between the internal electrode layers 12 and either the external electrode 20a or the external electrode 20b.

[0039] The region where the internal electrode layer 12 connected to the external electrode 20a and the internal electrode layer 12 connected to the external electrode 20b face each other is a region where electrostatic capacitance is generated in the multilayer ceramic capacitor 100 and serves as a capacitance region. Figure 1 In the illustrated multilayer ceramic capacitor 100, this is shown as a capacitance region 14. The capacitance region 14 is a region where adjacent internal electrode layers 12 face each other and are connected to external electrodes 20a and 20b, which are different external electrodes. This region is one of the layers called dielectric layers 11.

[0040] In the main body 10, the areas from both side surfaces of the main body 10 to the internal electrode layer 12 are side edge portions 15. Figure 1 In the illustrated multilayer ceramic capacitor 100, side edge portion 15 exists in an outer region of the capacitor portion on the side surface of body 10. As described above, side edge portion 15 is a region where no electrostatic capacitance is generated.

[0041] In the multilayer ceramic capacitor 100 , the internal electrode layer 12 is arranged as the outermost layer in the stacking direction (Z-axis direction: third direction) of the capacitor portion, and the upper and lower surfaces of the capacitor portion are covered with the cover layer 13 .

[0042] The size of the multilayer ceramic capacitor 100 is not particularly limited and can be appropriately changed according to the intended use. For example, the size of the multilayer ceramic capacitor 100 is 0.25 mm in length, 0.125 mm in width, and 0.125 mm in height; or 0.4 mm in length, 0.2 mm in width, and 0.2 mm in height; or 0.6 mm in length, 0.3 mm in width, and 0.3 mm in height; or 1.0 mm in length, 0.5 mm in width, and 0.5 mm in height; or 3.2 mm in length, 1.6 mm in width, and 1.6 mm in height; or 4.5 mm in length, 3.2 mm in width, and 2.5 mm in height. For example, the size of the multilayer ceramic capacitor 100 can be length > width ≥ height, width > length ≥ height, height > length ≥ width, or height > width ≥ length.

[0043] Next, the materials and the like constituting each part of the ceramic electronic component of the present invention will be described in detail.

[0044] [Dielectric layer] The dielectric layer in the ceramic electronic component of the present invention is not particularly limited as long as it is composed mainly of ceramics, and may be appropriately selected according to the properties required of the ceramic electronic component. Examples of dielectric layers include those composed mainly of a ceramic material having a perovskite structure represented by the general formula ABO3. Furthermore, the perovskite structure contains ABO3 deviating from the stoichiometric composition. 3-α Here, α in the formula represents the deviation from the stoichiometric ratio. In the following description, α is omitted.

[0045] Examples of ceramic materials having a perovskite structure represented by the general formula ABO3 that form the dielectric layer include BaTiO3 (barium titanate), CaZrO3 (calcium zirconate), CaTiO3 (calcium titanate), SrTiO3 (strontium titanate), BaTiO3 (calcium titanate), and the like. 1-x-y Ca x Sr y Ti 1-z Zr zO3 (0≤x≤1, 0≤y≤1, 0≤z≤1), etc. Among them, barium titanate (BaTiO3) is preferably used as the main component.

[0046] The thickness of each dielectric layer is not particularly limited, and is, for example, 0.05 μm to 5 μm, or 0.1 μm to 3 μm, or 0.2 μm to 1 μm.

[0047] [Internal electrode layer] The internal electrode layers in the ceramic electronic component of the present invention are primarily composed of metal. The metal contained in the internal electrode layers preferably contains nickel (Ni) as the primary component element. As used herein, "primary component element" refers to the element with the highest atomic percentage (at%). By using nickel as the primary component element in the internal electrode layers, the use of expensive materials such as precious metals can be reduced, thereby lowering the manufacturing cost of the multilayer ceramic capacitor.

[0048] The internal electrode layers contain at least one element selected from Al, Cr, Fe, and Si as an accessory element. The inclusion of the accessory element prevents the formation of oxides of the main metal element alone, and instead produces oxides containing a mixture of the main metal element and the accessory element. This suppresses diffusion of the main metal element into the dielectric layer, improving the continuity of the internal electrode layers.

[0049] The thickness of each internal electrode layer is not particularly limited, and is, for example, 0.01 μm to 5 μm, or 0.05 μm to 3 μm, or 0.1 μm to 1 μm.

[0050] In particular, the ceramic electronic component of the present invention improves the continuity of the internal electrode layers even when the internal electrode layers are thinned. Therefore, the multiple internal electrode layers can fully exhibit the effects of the invention by each layer having a thickness of 1 μm or less.

[0051] The number of stacked internal electrode layers is, for example, 10 to 5000, 50 to 4000, or 100 to 3000.

[0052] [External electrodes] The material of the external electrodes in the ceramic electronic component of the present invention is not limited as long as it is conductive. Examples of materials for the external electrodes include metals such as copper (Cu), nickel (Ni), tin (Sn), palladium (Pd), platinum (Pt), silver (Ag), and gold (Au), or alloys containing any of these as primary components.

[0053] The external electrode may have multiple layers or may be provided with a plating layer on the surface. Examples of the plating layer include Ni plating, Sn plating, and Cu plating. The external electrode may be a laminated body formed by laminating multiple plating layers.

[0054] [Cover layer and side edge portion] The materials of the cover layer and side edges of the ceramic electronic component of the present invention are not limited, as long as they have high electrical insulation properties and low permeability to degrading factors such as moisture. From the perspectives of achieving uniform shrinkage during firing and relieving internal stress in the ceramic electronic component, the cover layer and side edges are preferably made of the same material as the dielectric layer.

[0055] <Elements contained in the capacitor section of the main body> The main body of the ceramic electronic component of the present invention contains Al or Cr, Fe, and Si. By containing these elements, the continuity of the internal electrode layer of the ceramic electronic component of the present invention is improved even when the internal electrode layer is thinned.

[0056] The reason why the continuity of the internal electrode layer is improved is that Cr and Fe, or Fe, segregate at the interface between the dielectric layer and the internal electrode layer, while Al or Cr, Fe and Si segregate at the dielectric grain boundaries in the dielectric layer, and at the same time, at least one element selected from Al, Cr, Fe and Si is precipitated within the internal electrode layer.

[0057] use Figure 2 The interface between the dielectric layer and the internal electrode layer, and the dielectric grain boundary in the dielectric layer will be described. Figure 2 This is a cross-sectional view of the capacitor portion of a ceramic electronic component. Figure 2 As shown, interface 19 between dielectric layer and internal electrode layer refers to the boundary between dielectric layer 11 and internal electrode layer 12. In addition, dielectric grain boundary in dielectric layer refers to the boundary between crystal grains (dielectric grains) of the material constituting dielectric layer 11.

[0058] [Interface between dielectric layer and internal electrode layer] The capacitor portion of the ceramic electronic component of the present invention exhibits significant effects by segregating Cr and Fe, or Fe, at the interface between the dielectric layer and the internal electrode layer. Specifically, Cr and Fe coexist, or Fe exists alone, at the interface between the dielectric layer and the internal electrode layer.

[0059] Elements present at the interface between the dielectric layer and the internal electrode layer can contribute to improving the diffusion barrier performance of the interface. In this case, by the presence of multiple elements and their composite formation, the physical properties change compared to the individual elements, and the diffusion barrier performance of the interface can be more effectively demonstrated. Fe is an element that can improve the diffusion barrier performance of the interface. In addition, Cr and Fe are a combination that can further improve the barrier performance by composite formation. Therefore, by the presence of Fe at the interface between the dielectric layer and the internal electrode layer, or the presence of Cr and Fe in composite formation, the diffusion of metal elements constituting the internal electrode layer into the dielectric layer can be hindered, resulting in the suppression of fracture of the internal electrode layer. As described above, whether Fe is present alone at the interface between the dielectric layer and the internal electrode layer, or Cr and Fe are composited and present at the interface between the dielectric layer and the internal electrode layer, the effect of suppressing fracture of the internal electrode layer can be demonstrated, and the continuity of the internal electrode layer can be improved.

[0060] [Dielectric grain boundaries in dielectric layers] Furthermore, in the capacitor portion of the ceramic electronic component of the present invention, Al or Cr, Fe, and Si are segregated at the dielectric grain boundaries within the dielectric layer. Specifically, Al, Fe, and Si, or Cr, Fe, and Si, coexist at the dielectric grain boundaries within the dielectric layer. The interaction between these elements can produce significant effects compared to the case where these elements exist alone.

[0061] Specifically, suppressing grain growth of dielectric particles during firing can suppress fracture of the internal electrode layer. The temperature range in which the grain growth inhibition effect is most pronounced varies depending on the element. Combinations of Al, Fe, and Si, or Cr, Fe, and Si, can be fired in a temperature range that inhibits grain growth, thereby improving the continuity of the internal electrode layer. Furthermore, ternary composite oxides of Al, Fe, and Si, or Cr, Fe, and Si, present at the dielectric grain boundaries within the dielectric layer, enhance insulation compared to oxides of the individual elements or binary composite oxides of two elements, thereby improving the insulation reliability of the dielectric layer as a whole.

[0062] [Internal electrode layer] At this point, the content of each element must be appropriately controlled; excessive or insufficient amounts will diminish the effect. To avoid this, the element can be added slightly above the appropriate amount, allowing the excess to precipitate and accumulate within the internal electrode layer, thereby utilizing it as a buffer. Specifically, at least one element selected from Al, Cr, Fe, and Si is precipitated within the internal electrode layer. If the material or processing conditions fluctuate, the buffer absorbs the excess if the amount exceeds the appropriate level, while the insufficient amount can be absorbed by the buffer, thereby maintaining the appropriate element content.

[0063] Furthermore, by incorporating at least one element selected from Al, Cr, Fe, and Si as an accessory element in the internal electrode, the formation of a single oxide of the main component metal element in the internal electrode layer can be avoided, and instead, an oxide containing a mixture of the main component metal element and the accessory element can be generated. This suppresses the diffusion of the main component metal element into the vicinity of the dielectric grain boundaries in the dielectric layer, increasing the proportion of the accessory element present at the dielectric grain boundaries. Consequently, the insulation at the dielectric grain boundaries can be improved, thereby enhancing the insulation reliability of the entire dielectric layer.

[0064] In the present invention, the presence of elements near the interface between the dielectric layer and the internal electrode layer can be determined using the following procedure for a multilayer ceramic capacitor 100, for example. First, a thin slice sample with a thickness of 50 to 100 nm and a principal surface parallel to the stacking direction (Z-axis: third direction) is removed from near the center of the body 10 of the multilayer ceramic capacitor 100 in the width direction (Y-axis direction: second direction), i.e., between 1 / 3 and 2 / 3 of the Y-axis dimension. Next, a scanning transmission electron microscope (STEM) equipped with an energy dispersive X-ray spectroscopy (EDS) detector is used to observe near the center of the thin slice sample, i.e., between 1 / 3 and 2 / 3 of the Z-axis and X-axis dimensions, to determine a field of view within which both the dielectric layer 11 and the internal electrode layer 12 can be observed. In addition, in the STEM image, the difference between the dielectric layer 11 and the internal electrode layer 12 can be identified by the difference in contrast (brightness and darkness). The dielectric layer 11 appears darker (black) and the internal electrode layer 12 appears brighter (white). Next, EDS is used to perform line analysis near the boundary between the dielectric layer 11 and the internal electrode layer 12, and the characteristic X-ray intensity of each metal element at each measurement location is measured. The measurement is performed under the conditions of an acceleration voltage of 200 kV, an electron beam diameter of 1.0 nm, and a measurement time of 20 minutes per measurement point. In addition, the measurement is repeated more than 5 times for one measurement point, and the average value of the specific X-ray intensity of each element obtained is used as the characteristic X-ray intensity of each element at the measurement point. The line analysis is carried out from the dielectric layer 11 side to the internal electrode layer 12 side, in the direction perpendicular to the boundary ( Figure 2 The measurement is performed in the A1 direction (in the A1 direction). Next, based on the obtained characteristic X-ray intensity of each element, a correction (ZAF correction) is applied to each measurement point, taking into account the effects of atomic number, absorption, and fluorescence excitation. The atomic percentage of each element at each measurement point is calculated and plotted against the measurement position. The resulting map allows the interface between the dielectric layer 11 and the internal electrode layer 12 to be identified, and the element(s) concentrated at that interface can be confirmed. Measurements are performed in three different fields of view, and the average value is used as the atomic percentage of each element.

[0065] In this specification, the interface between the dielectric layer and the internal electrode layer is defined as a surface formed by a collection of points where the atomic percentage of elements other than oxygen constituting the dielectric layer is equal to the atomic percentage of the primary metal element constituting the internal electrode layer. That is, in the above figure, the interface between the dielectric layer and the internal electrode layer includes points where the atomic percentage of elements other than oxygen constituting the dielectric layer is equal to the atomic percentage of the metal element constituting the internal conductor layer.

[0066] In this specification, "an element segregates at the interface between the dielectric layer and the internal electrode layer" means a peak near a point included in the interface between the dielectric layer and the internal electrode layer in the above figure. This peak refers to a peak that is at least 1.5 times higher than the average level. The area near the interface between the dielectric layer and the internal electrode layer can be, for example, a width of approximately 10 nm across the interface. Specifically, "an element segregates at the interface between the dielectric layer and the internal electrode layer" means that within a width of 10 nm across the interface, there is a point where the element's content is at least 1.5 times higher than the average content level of the element outside the 10 nm width. Furthermore, "an element does not segregate at the interface between the dielectric layer and the internal electrode layer" means that within a width of 10 nm across the interface, there is no point where the element's content is at least 1.5 times higher than the average content level of the element outside the 10 nm width. The average content level of the element outside the 10 nm width across the interface refers to the average content level of the element within a width of 10 to 20 nm on both sides of the interface.

[0067] The elements present near the dielectric grain boundaries in the dielectric layer can be confirmed by determining the field of view where the dielectric grains inside the dielectric layer 11 can be observed using the same method as above for a thin-film sample taken out from the main body 10 .

[0068] In this specification, a dielectric grain boundary in a dielectric layer refers to a boundary between a dielectric crystal grain and its surrounding grain boundary portion that can be identified by a difference in contrast when a cross section of the dielectric layer is viewed using a scanning electron microscope (SEM).

[0069] "Element segregation at the dielectric grain boundaries in the dielectric layer" refers to a state in which a peak is present near the dielectric grain boundaries in the above figure. The peak here refers to a peak that is at least 1.5 times higher than the average level. The vicinity of the dielectric grain boundaries can be, for example, a width of approximately 10 nm before and after the dielectric grain boundaries. That is, "segregation of a specific element at the dielectric grain boundaries forming the dielectric layer" refers to a point within a width of 10 nm before and after the grain boundaries where the content of the element is at least 1.5 times higher than the average content level of the element outside the 10 nm width before and after the grain boundaries. The average content level of the element outside the 10 nm width before and after the grain boundaries refers to the average content level of the element within a width of 10 nm to 20 nm on both sides of the grain boundaries.

[0070] To identify elements precipitated within the internal electrode layers, for example, a cross-section of the body 10 of the multilayer ceramic capacitor 100 is first milled near the center of the width direction (Y-axis direction: the second direction), i.e., between one-third and two-thirds of the Y-axis dimension, to produce a sample with an exposed XZ cross-section. The sample is then observed using a scanning electron microscope (SEM) equipped with an energy-dispersive X-ray spectroscopy (EDS) detector to determine a field of view that allows observation of both the dielectric layer 11 and the internal electrode layer 12. The magnification used can be appropriately selected depending on the sample size, for example, from 1,000x to 10,000x. EDS is then used for surface analysis, measuring the characteristic X-ray intensity of each metal element at each measurement location. Measurements are repeated five or more times at each measurement point, and the average of the specific X-ray intensities for each element is plotted as the characteristic X-ray intensity for that measurement point (to obtain an elemental surface distribution). The measurement was performed in three different fields of view. When a region in each field of view was observed where the ratio of the main component metal element of the internal electrode layer was relatively low and the accessory element existed in a dotted manner, it was determined that the accessory element was precipitated in the internal electrode layer.

[0071] In this specification, precipitation in the internal electrode layer means a state in which the accessory element is dispersed in the main component metal element of the internal electrode layer in the surface analysis of the SEM-EDS analysis as described above.

[0072] In the capacitor portion formed by laminating dielectric layers and internal electrode layers in the ceramic electronic component of the present invention, the total content of Al or Cr relative to the total of the main component metal elements of the internal electrode layers, Al or Cr, Fe and Si, is preferably 0.001 at % to 10 at %.

[0073] In the capacitor portion formed by laminating dielectric layers and internal electrode layers in the ceramic electronic component of the present invention, the Fe content is preferably 0.001 at % to 10 at % based on the total of the main component metal elements of the internal electrode layers, Al or Cr, Fe, and Si.

[0074] In the capacitor portion formed by laminating dielectric layers and internal electrode layers in the ceramic electronic component of the present invention, the Si content is preferably 0.001 at % to 10 at % based on the total of the main component metal elements of the internal electrode layers, Al or Cr, Fe, and Si.

[0075] Here, the content of metal elements in the capacitor portion formed by laminating dielectric layers and internal electrode layers can be determined, for example, for the multilayer ceramic capacitor 100 according to the following procedures 1 or 2. In both procedures 1 and 2, measurements are performed at three or more points, and the average value is used as the content. If the measurement results of procedures 1 and 2 are inconsistent, causing doubt, the determination is based on the measurement value of procedure 1.

[0076] Process 1: First, the capacitor portion of the body 10 of the multilayer ceramic capacitor 100, formed by laminating dielectric layers 11 and internal electrode layers 12, is cut, polished, or otherwise exposed through a cross-section perpendicular to the direction (X-axis direction: first direction) facing the external electrodes 20a and 20b, where the internal electrode layers 12 can be viewed. This cross-section is located near the center of the body 10 in the width direction (Y-axis direction: second direction) (a cross-section between 1 / 3 and 2 / 3 of the width dimension). Next, carbon is vapor-deposited on the exposed cross-section to create a measurement sample. Next, using a scanning electron microscope (SEM) equipped with an energy dispersive X-ray spectrometer (EDS) or a wavelength dispersive X-ray spectrometer (WDS), or an electron probe microanalyzer (EPMA), a surface analysis of the sample cross section was performed over a 300 × 300 μm area with a 1 μm step size at an observation magnification of 300x, an accelerating voltage of 7 kV, and an irradiation current of 50 nA. The total amount of each element was calculated as an atomic percentage.

[0077] Process 2: Prepare a measurement sample in the same manner as in Process 1. Analyze the resulting sample using laser ablation-inductively coupled plasma mass spectrometry (LA-ICP). The total amount of each element is calculated as an atomic percentage. Next, calculate the content of each element based on the obtained atomic percentages.

[0078] Furthermore, when the metal composition of the internal electrode paste used during manufacturing is known and the metal elements contained in the paste are not added to the dielectric layer, the above process can be omitted and the contents of the metal elements can be calculated based on the known composition.

[0079] <Method for Manufacturing Ceramic Electronic Components> The method for manufacturing a ceramic electronic component of the present invention includes, for example, a step of forming a stacking unit by forming an internal electrode pattern on a dielectric green sheet, wherein the internal electrode pattern contains a main component metal element of the internal electrode layer, Al or Cr, Fe and Si; a step of forming a pre-fired capacitor portion by stacking a plurality of stacking units; and a step of firing the pre-fired capacitor portion to form the capacitor portion.

[0080] [Preparation of Composition Powder for Dielectric Green Sheet] The composition powder used to produce the dielectric green sheet can be obtained, for example, by mixing various raw material powders containing the constituent elements at predetermined ratios and pre-firing (temporarily firing). Various additives such as sintering aids may be added to the raw material powders after mixing them at predetermined ratios, or various additives may be added to the pre-fired powder.

[0081] The method for mixing the raw material powders is not particularly limited, as long as the inclusion of impurities is suppressed and the powders are uniformly mixed. Either dry mixing or wet mixing can be employed. For example, wet mixing using a ball mill can be employed, using partially stabilized zirconia (PSZ) balls, stirring the mixture for approximately 8 to 60 hours in an organic solvent such as ethanol or water as a dispersion medium, followed by evaporation and drying of the dispersion medium. Particle size can also be adjusted by pulverization or by combining it with classification, as needed.

[0082] The conditions for calcining the mixed raw material powders are not particularly limited, as long as the various raw material powders react to produce the desired dielectric green sheet composition powder. One example is calcining in air at 800°C to 1100°C for 1 to 10 hours. The calcined powder can be processed into green sheets as is, but pulverization using a ball mill or stamp mill is preferred to obtain smooth green sheets from a uniform slurry and improve sinterability.

[0083] When a commercially available product can be used as the dielectric green sheet composition powder, the above-mentioned mixing and pre-firing of the raw material powders may not be performed, and the powder may be subjected to subsequent operations.

[0084] [Production of Dielectric Green Sheet] The dielectric green sheet can be produced by mixing dielectric green sheet composition powder, a binder, and a dispersion medium to prepare a slurry, molding the slurry into a sheet shape, and drying the sheet.

[0085] The binder is preferably one that maintains the shape of the dielectric green sheet and volatilizes without leaving any carbon residue during firing or a prior binder removal process. Examples of usable binders include polyvinyl alcohol, polyvinyl butyral, cellulose, urethane, and vinyl acetate. The amount of binder used is not particularly limited, but since it is removed in subsequent steps, it is preferable to minimize the amount of binder used while maintaining the desired formability and shape retention to reduce raw material costs.

[0086] The dispersion medium used is one that does not cause aggregation of the dielectric green sheet composition powder and the binder and can be easily removed by volatilization after sheet formation. Examples of usable dispersion media include water and alcohol solvents.

[0087] Components such as dispersants, plasticizers, and thickeners may be added to the slurry to adjust the slurry properties.

[0088] The method for mixing the dielectric green sheet composition powder with the binder and dispersion medium is not particularly limited as long as the incorporation of impurities can be prevented and the components can be uniformly mixed.

[0089] The prepared slurry can be formed into a sheet using conventional methods such as die coating or doctor blade methods. The resulting sheet can be dried to produce a dielectric green sheet. Alternatively, the prepared slurry can be applied to a substrate such as a PET (polyethylene terephthalate) film and dried to produce a dielectric green sheet laminated onto the substrate.

[0090] [Formation of stacked units by forming internal electrode patterns] In the method for manufacturing a ceramic electronic component of the present invention, a laminated unit is obtained by forming an internal electrode pattern on the dielectric green sheet obtained above, wherein the internal electrode pattern contains the main component metal elements of the internal electrode layer, Al or Cr, Fe, and Si.

[0091] As a method for forming the internal electrode pattern, a known method can be adopted. For example, the internal electrode pattern may be formed by a vacuum film forming process such as sputtering, or may be formed by printing.

[0092] When forming the internal electrode pattern by a vacuum film forming process such as sputtering, this can be performed using an alloy target containing the main component metal elements of the internal electrode layer, Al or Cr, Fe and Si, or by simultaneous sputtering using separate targets.

[0093] When the internal electrode pattern is formed by printing, for example, an internal electrode paste is prepared and the paste is printed on a dielectric green sheet.

[0094] (Preparation of internal electrode paste) An internal electrode paste containing the main metal elements of the internal electrode layers, Al or Cr, Fe, and Si, can be prepared, for example, by mixing metal powders containing the respective metal elements with a carrier using a three-roll mill. In addition to the essential metal components listed above, the internal electrode paste may also contain glass frit and dielectric green sheet composition powder.

[0095] The type and amount of the binder and solvent contained in the vehicle used are not particularly limited and may be appropriately selected in consideration of the viscosity of the internal electrode paste, ease of handling, and compatibility with the dielectric green sheet.

[0096] (Printing of internal electrode paste) Printing the internal electrode paste onto the dielectric green sheet can be performed, for example, using a screen mask with a predetermined internal electrode pattern. A lead pattern for extending the internal electrode layer is also printed on the dielectric green sheet. This lead pattern can be formed simultaneously with the internal electrode pattern or separately. If formed separately, for example, it can be performed using a screen mask with a predetermined lead pattern. The lead pattern can be formed using the internal electrode paste or by preparing a lead paste with a different composition, following the same process as the internal electrode paste.

[0097] When printing the paste for the internal electrode, the space that will become the side edge portion when forming the main body including the capacitor portion can be separated for printing. In addition, the space adjacent to the lead portion can be separated at the end edge portion around the lead portion for printing. The dielectric paste used to form the side edge portion or the end edge portion can be printed in these spaces. The dielectric paste used to form the side edge portion or the end edge portion can be a paste using the same raw material as the dielectric layer or a paste using a different raw material from the dielectric layer. In the case where the materials of the dielectric paste used to form the side edge portion and the end edge portion are the same, they can have the same composition or different compositions.

[0098] [Production of a Pressed Body Including an Unfired Capacitor Section] In the method for manufacturing a ceramic electronic component of the present invention, a plurality of the laminated units obtained above are stacked and press-bonded to obtain a press-bonded body including an unfired capacitor portion. In conventional methods for manufacturing multilayer ceramic capacitors, in order to form a press-bonded body by aggregating a plurality of unfired capacitor portions, the press-bonded body is singulated to form a plurality of pre-fired main bodies including the unfired capacitor portions, as described later.

[0099] The press-bonded structure can be obtained, for example, by stacking a predetermined number of stacked units each having an internal electrode pattern and a lead pattern, and then press-bonding the stacked units together. Lamination and press-bonding can be performed using conventional methods, such as a method in which the stacked units are heated and pressed in the stacking direction, thereby utilizing an adhesive for thermal compression bonding.

[0100] At this time, when the stacking units on which the internal electrode patterns and the lead patterns are formed are produced on the base material, the base material is peeled off and the stacking units are stacked.

[0101] During lamination and pressure bonding, additional green sheets, which will serve as covering portions when the multilayer ceramic capacitor is formed, may be added to either end of the stacking direction. In this case, the additional green sheets may have the same or a different composition as the dielectric green sheets on which the internal electrode patterns and lead patterns are formed. To ensure uniform shrinkage during firing, the additional green sheets preferably have the same or similar composition as the dielectric green sheets on which the internal electrode patterns and lead patterns are formed.

[0102] The pressed body obtained by the pressure-bonding is separated into individual pieces by a conventional method such as a dicing machine or laser cutting to form a capacitor unit before firing.

[0103] When the press-bonded body is singulated, in the case where the portion to become the side edge portion is not pre-formed, that is, in the case where there is no space provided to become the side edge portion, or in the case where printing to become the side edge portion is not performed, the portion located outside the portion to become the capacitor portion when viewed from the stacking direction and where the end edge portion including the lead portion of the internal electrode layer is not formed, the side edge portion is formed at this stage, and a pre-fired body including the capacitor portion before firing is obtained. The method for forming the side edge portion is not particularly limited and can be appropriately selected from conventional methods such as applying a paste for forming the side edge portion or attaching a sheet. The material and composition used to form the side edge portion may be the same as or different from the material and composition used to form the dielectric layer.

[0104] [Making the main body (firing the main body before firing)] In the method for manufacturing a ceramic electronic component of the present invention, the pre-singulated main body is fired to obtain a main body comprising a fired capacitor portion. The main body comprises: a capacitor portion formed by laminating dielectric layers and internal electrode layers; an end edge portion adjacent to the capacitor portion and including a lead portion extending from the internal electrode; a side edge portion adjacent to the capacitor portion and not including a lead portion; and a cover layer. The binder may be removed from the pre-singered molded body before firing. In this case, the binder removal and firing can be performed continuously using the same firing apparatus.

[0105] The binder removal and firing conditions can be appropriately set based on considerations such as the binder's volatilization temperature and content, the sinterability of the dielectric green sheet composition powder, and the heat and oxidation resistance of the metals contained in the internal electrode paste and lead portion paste. Examples of binder removal conditions include performing the process in a nitrogen (N2) atmosphere at a temperature of 200°C to 500°C for 5 to 20 hours.

[0106] It is also possible to form external electrodes on the main body before firing. In this case, after removing the binder from the pre-fired main body, a conductive paste is applied to the lead surface of the main body during firing, where a lead pattern is formed on the surface. Examples of methods for applying the conductive paste include printing and dipping. By completing the firing of the main body during firing, the external electrodes, formed by sintering the conductive paste, can be formed simultaneously with the main body.

[0107] For example, firing conditions for a main body including external electrodes include holding at 800°C to 1000°C for 10 minutes to 1 hour in a reducing atmosphere composed of a mixture of nitrogen (N2), hydrogen (H2), and water vapor (H2O), followed by firing at 1000°C to 1400°C for 10 minutes to 2 hours. Maintaining this temperature during firing allows for the production of a multilayer ceramic capacitor with high capacitance.

[0108] After firing, a reoxidation treatment may be performed by maintaining the temperature at 600°C to 1000°C in a nitrogen (N2) gas atmosphere or a low-oxygen atmosphere. Alternatively, rather than singulating the pressed body before firing and firing the resulting pre-fired main body, the pressed body may be fired without being singulated, and then subjected to reoxidation treatment if necessary, and then singulated to obtain a plurality of main bodies.

[0109] [Formation of External Electrodes] When forming external electrodes on the manufactured main body, a sintering process is performed after the conductor paste is attached to the lead surface of the main body. In this way, external electrodes can be formed on the main body to obtain a stacked ceramic capacitor. Examples of methods for attaching the conductor paste include printing and dipping. When forming external electrodes having multiple layers, a plating layer or the like can be provided on the surface. Examples of the plating layer include Ni plating, Sn plating, and Cu plating. The external electrode can also be a stacked body obtained by stacking multiple plating layers.

[0110] In addition, the present invention is not limited to the above-mentioned embodiment, and various changes can be made within the scope of the present invention.

[0111] For example, in the above-mentioned embodiment, a stacked ceramic capacitor is exemplified as the ceramic electronic component of the present invention. However, the ceramic electronic component of the present invention is not limited to the stacked ceramic capacitor. As long as it is an electronic component having a main body including a capacitor portion formed by stacking multiple dielectric layers and multiple internal electrode layers, it is included in the technical scope of the present invention.

[0112] Example Hereinafter, the present invention will be described in more detail with reference to Examples and the like, but the present invention is not limited to these Examples.

[0113] <Examples 1 to 3, 5 to 7> [Preparation of internal electrode paste] An internal electrode paste was prepared, using Ni as the main metal component of the internal electrode layer and containing at least one metal selected from Al, Cr, Fe, and Si as an auxiliary element. The types and contents of the auxiliary elements used are shown in Table 1. In Table 1, the contents are expressed as the atomic percentage (at%) of the element relative to the total amount of Ni and the auxiliary element.

[0114] The internal electrode paste is prepared by mixing Ni, metal powder serving as an accessory element, and a carrier using a three-roll mill.

[0115] [Formation of Internal Electrode Pattern and Lead Pattern] A dielectric green sheet containing BaTiO3 powder as a dielectric green sheet composition powder was prepared, and the internal electrode paste prepared above was printed on its surface to form an internal electrode pattern. The lead pattern was also printed using the internal electrode paste at the same time as the internal electrode pattern.

[0116] [Making the main body before firing] Thirteen layers of dielectric green sheets, each with internal electrode patterns and lead patterns, were stacked on a pre-prepared cover layer, and a cover layer was further stacked thereon. Next, they were pressed together at a pressure of approximately 190 MPa while being heated, resulting in a pre-fired assembly comprising the capacitor unit.

[0117] [Manufacturing of Multilayer Ceramic Capacitors] The resulting pressed body is cut into individual pieces to obtain a pre-fired main body, which is then heated to 300°C in a nitrogen atmosphere for debindering. The lead surface of the debindered main body, where the lead pattern is drawn, is immersed in a conductive paste containing nickel to form a precursor for the external electrode. Next, the debindered main body with the external electrode precursor formed is held at 800°C for 30 minutes in a so-called reducing-steam atmosphere, obtained by introducing water vapor into a reducing gas containing hydrogen in nitrogen. After this, it is fired at 1200°C for 2 hours. During the cooling process, it is held at 700°C for 1 hour in a nitrogen atmosphere and cooled to near room temperature to obtain a laminated ceramic capacitor.

[0118] The obtained multilayer ceramic capacitor had a substantially rectangular parallelepiped shape of 1.0 mm×0.5 mm in a plane perpendicular to the stacking direction of the main body, and the thickness of the dielectric layer was 0.6 μm.

[0119] [Table 1] <Examples 4 and 8> A multilayer ceramic capacitor was produced in the same manner as in Example 1 except that an internal electrode pattern was formed by sputtering using independent targets of the accessory elements and Ni shown in Table 1 and using the dielectric green sheet having the obtained internal electrode pattern and lead pattern formed thereon.

[0120] Comparative Example 1 A multilayer ceramic capacitor was obtained in the same manner as in Example 1 except that the internal electrode layer was composed of only Ni and no accessory elements were contained.

[0121] Comparative Examples 2 to 10 A multilayer ceramic capacitor was obtained in the same manner as in Example 1 except that the types and contents of the auxiliary elements used were as shown in Table 1.

[0122] <Evaluation of Multilayer Ceramic Capacitors> [Elemental Analysis of the Interface between Dielectric Layer and Internal Electrode Layer] Elemental analysis of the interface between the dielectric layer and the internal electrode layer was performed on the multilayer ceramic capacitors produced in Example 1 and Example 5. The analysis method was the method described in the above paragraph

[0050] . Figure 3 Graphs showing the analysis results of the multilayer ceramic capacitor of Example 1 are plotted. Figure 4 A graph showing the analysis results of the multilayer ceramic capacitor of Example 5 is plotted.

[0123] like Figure 3As shown, in the multilayer ceramic capacitor of Example 1, a peak of Fe is observed at a distance of 1.0 nm to 2.0 nm, indicating that Fe is segregated at the interface between the dielectric layer and the internal electrode layer.

[0124] In addition, if Figure 4 As shown, in the multilayer ceramic capacitor of Example 5, peaks of Fe and Cr are observed at a distance of 1.5 nm to 2.5 nm, indicating that Fe and Cr are segregated at the interface between the dielectric layer and the internal electrode layer.

[0125] [Confirmation of the interface between the dielectric layer and the internal electrode layer, and the dielectric grain boundary] The interfaces between the dielectric layers and the internal electrode layers of the multilayer ceramic capacitors produced in Examples 1 and 5 were examined. TEM-EDS analysis was performed on one sample at five points, fully inspecting the particles within a field of view of approximately 1 μm. The interfaces between the dielectric layers and the internal electrode layers and the dielectric grain boundaries were also observed at high magnification within a field of view of approximately 20 nm.

[0126] As a result, in the multilayer ceramic capacitor produced in Example 1, Fe was observed to be segregated at the interface between the dielectric layer and the internal electrode layer. Segregation of Al, Fe, and Si was also observed at the dielectric grain boundaries. Furthermore, Ni, a major component of the internal electrode layers, was also observed to be precipitated at the dielectric grain boundaries.

[0127] In the multilayer ceramic capacitor produced in Example 5, Cr and Fe were observed to segregate at the interface between the dielectric layer and the internal electrode layer. Segregation of Cr, Fe, and Si was also observed at the dielectric grain boundaries. Furthermore, Ni, a major component of the internal electrode layers, was also observed to precipitate at the dielectric grain boundaries.

[0128] [Confirmation of Precipitation in Internal Electrode Layer] The presence of precipitates in the internal electrode layers was confirmed for the multilayer ceramic capacitors produced in Examples 1 and 5. The confirmation method was the method described in the aforementioned paragraph

[0056] .

[0129] In the multilayer ceramic capacitor produced in Example 1, numerous segregants approximately several tens of nanometers in size were observed within the internal electrode layer. Comparison with the compositional surface distribution image revealed that these segregants were Al-Si-O and Si-O. Segregants containing Fe were also observed as other segregants.

[0130] In the multilayer ceramic capacitor produced in Example 1, numerous segregants approximately several tens of nanometers in size were observed within the internal electrode layer. Comparison with the compositional surface distribution image revealed that these segregants were Cr-Si-O and Si-O. Segregants containing Fe were also observed as other segregants.

[0131] [Continuity rate of internal electrode layer] The laminated ceramic capacitors prepared in Examples 1 to 8 and Comparative Examples 1 to 10 were polished from the side to expose the internal electrode layer, and observed with a microscope or the like at a magnification of 5000 to 10000 times. Figure 2 As shown, the length L0 of the observation portion was measured using a microscope scale or the like. Next, for each internal electrode layer, the lengths L1 to L4 of the electrode portion within L0 were measured and summed. ΣLn / L0 was calculated to determine the continuity rate for that layer. This was repeated for 30 layers, and the average value was determined. The results are shown in Table 1.

[0132] [Thickness of internal electrode layer] The thickness of the internal electrode layers of the multilayer ceramic capacitors produced in Examples 1 to 8 and Comparative Examples 1 to 10 was measured. Measurements were made using a scanning electron microscope (SEM) at 30 locations, and the average value was calculated. The results are shown in Table 1.

[0133] [Dielectric particle size] The dielectric particle size of the multilayer ceramic capacitors produced in Examples 1 to 8 and Comparative Examples 1 to 10 was measured. The multilayer ceramic capacitors were cut in the direction of stacking the dielectric layers and internal electrode layers and the cross-sections were observed using a scanning electron microscope (SEM). For each dielectric particle visible in the field of view, the maximum distance between two points on the surface (outline) was measured and the obtained value was divided by the observation magnification to determine the particle size. The particle size of at least 200 dielectric particles was measured, and the average of the obtained particle sizes was used as the dielectric particle size. The results are shown in Table 1.

[0134] <Inspection> It is found that the multilayer ceramic capacitors of Examples 1 to 8 have a significantly higher continuity rate of the internal electrode layers than the multilayer ceramic capacitors of Comparative Examples 1 to 10.

[0135] The multilayer ceramic capacitors of Examples 1 to 8 have smaller internal electrode layer thicknesses than those of Comparative Examples 1 to 10. The thickness of the internal electrode layers before firing was the same between the Examples and the Comparative Examples. Therefore, it is presumed that in the Comparative Examples, the internal electrode layers fractured during firing, and material in the fractured areas migrated to the unfractured areas, resulting in a thicker internal electrode layer. In contrast, in the Examples, fracture of the internal electrode layers during firing was suppressed, resulting in a thinner internal electrode layer.

[0136] Furthermore, it can be seen that the dielectric particles in the dielectric layers of the multilayer ceramic capacitors of Examples 1 to 8 have smaller particle sizes and suppressed dielectric particle growth compared to the multilayer ceramic capacitors of Comparative Examples 1 to 10. This result indicates that fracture of the internal electrode layers caused by dielectric particle growth is suppressed.

[0137] Furthermore, a comparison of Example 1 containing three accessory elements, Comparative Example 1 containing no accessory elements, Comparative Examples 2 to 5 containing one accessory element, and Comparative Examples 6 to 10 containing two accessory elements reveals that Example 1 significantly improves the continuity of the internal electrode layer by including three accessory elements. This is due to the interaction between the three metal elements.

[0138] Industrial applicability The present invention enables the realization of ceramic electronic components such as multilayer ceramic capacitors with high continuity of internal electrode layers, even when the internal electrode layers are thinned. Such ceramic electronic components, despite their compact size, exhibit high capacitance and are therefore suitable for use in high-frequency communication systems, such as mobile phones, resulting in significant industrial benefits.

[0139] Description of Reference Numerals 100 Multilayer ceramic capacitor, 10 body, 11 dielectric layer, 12 internal electrode layer, 13 cover layer, 14 capacitor region, 15 side edge, 16a end edge, 19 interface between dielectric layer and internal electrode layer, 20a, 20b external electrodes, A1 analysis direction.

Claims

1. A ceramic electronic component, characterized in that: The main body includes a capacitor portion formed by alternately stacking a plurality of dielectric layers mainly composed of ceramic and a plurality of internal electrode layers. The capacitor portion includes Al or Cr, Fe and Si, At least one element selected from the group consisting of Al, Cr, Fe, and Si is precipitated in the internal electrode layer.

2. The ceramic electronic component according to claim 1, wherein: Fe is segregated at the interface between the dielectric layer and the internal electrode layer. When the capacitor portion includes Cr, Fe and Cr are segregated at the interface between the dielectric layer and the internal electrode layer, and Al or Cr, Fe, and Si are segregated at the dielectric grain boundaries forming the dielectric layer.

3. The ceramic electronic component according to claim 1, wherein: In the capacitor portion, a total content of Al or Cr relative to a total of main component metal elements of the internal electrode layer, Al or Cr, Fe, and Si, is 0.001 at % or more and 10 at % or less.

4. The ceramic electronic component according to claim 1, wherein: In the capacitor portion, the content of Fe is not less than 0.001 at % and not more than 10 at % relative to the total of the main component metal elements of the internal electrode layer, Al or Cr, Fe, and Si.

5. The ceramic electronic component according to claim 1, wherein: In the capacitor portion, a content of Si is not less than 0.001 at % and not more than 10 at % relative to a total of main component metal elements of the internal electrode layer, Al or Cr, Fe, and Si.

6. The ceramic electronic component according to claim 1, wherein: The thickness of each of the plurality of dielectric layers and the plurality of internal electrode layers is 1 μm or less.

7. The ceramic electronic component according to claim 1, wherein: The dielectric layer is barium titanate.

8. The ceramic electronic component according to any one of claims 3 to 5, characterized in that: The main metal element is Ni.

9. A method for manufacturing a ceramic electronic component, characterized in that: include: forming a stacked unit by forming an internal electrode pattern on a dielectric green sheet, wherein the internal electrode pattern contains a main component metal element of an internal electrode layer, Al or Cr, Fe, and Si; a step of forming a pre-fired capacitor portion by stacking a plurality of the stacking units; and The step of firing the capacitor portion before firing to form the capacitor portion.

10. The method for manufacturing a ceramic electronic component according to claim 9, wherein: The internal electrode pattern is formed by a vacuum film forming process.

11. The method for manufacturing a ceramic electronic component according to claim 9, wherein: The internal electrode pattern is formed by a printing method.

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