Circuitry and method for regulating voltage thereof using dynamic decoupling capacitor

Abstract

The invention relates to a circuit system (1). The circuit system (1) comprises an energy storage power supply rail (12), a regulated power supply rail (14), a logic circuit (18) connected to the regulated power supply rail (14), where each of the energy storage power supply rail (12), the regulated power supply rail (14) and the logic circuit (18) is connected to a common ground (16), where a dynamic decoupling capacitor (10) connects the energy storage power supply rail (12) to the regulated power supply rail (14) and communicates with the logic circuit (18), wherein the dynamic decoupling capacitor (10) is configured to match the total charge of the injection current Idecap from the energy storage supply rail (12) with the total charge of the load current Iload provided to the logic circuit (18). A method of regulating a voltage by a regulating circuitry (1) is encompassed herein.

Description

Technical Field

[0001] The present invention generally relates to regulating voltage in circuits and, more particularly, to a method for achieving system voltage regulation using dynamic decoupling capacitors. Background Art

[0002] Complementary metal-oxide semiconductor (CMOS) circuits are widely used high-speed logic circuits in today's integrated circuits. However, their burst-idle-burst activity can cause significant voltage drops and overshoots in the power supply rails. Consequently, recovering from power-supply jitter can result in additional timing penalties during static timing analysis.

[0003] One method for mitigating voltage drops and overshoots in power rails is to use decoupling capacitors. Decoupling capacitors bypass transient currents, acting as localized energy storage and thus reducing transient currents in the power delivery network. However, traditional decoupling capacitors are passive and limited by voltage drop requirements for a specific current. Consequently, these traditional approaches have several drawbacks. For example, they require a large number of decoupling capacitors, consume significant space, and introduce instability issues into the regulated power rails. Furthermore, using analog-based active decoupling capacitors or analog decoupling capacitor multipliers does not provide high-speed response. Furthermore, separating power rails for burst-idle-burst components requires additional power rail routing resources. This approach does not address inherent device timing losses and also requires the use of level shifters or isolation cells in high-speed paths.

[0004] Here are some examples of prior art that attempt to solve the same problem:

[0005] US Patent No. 10972083B2 discloses a method for mitigating transient voltage drops on power lines of a power distribution network using on-chip decoupling capacitors within the network. The method includes the following steps: capacitively decoupling the power lines of the power distribution network using a first decoupling capacitor, the first decoupling capacitor being connected to the power lines and charged to a first voltage level to mitigate voltage drops on the power lines when the first voltage level has not dropped to a level equal to or below a drop threshold voltage level; precharging a second decoupling capacitor to a second voltage level greater than the first voltage level; determining the occurrence of a drop event in which the first voltage level drops to a level equal to or below the drop threshold voltage level; and, in response to determining the occurrence of the drop event, selectively connecting the precharged second decoupling capacitor to the power lines to apply a second voltage level to the power lines and providing a boost current to the power lines through discharge of the second decoupling capacitor. Existing technologies require additional components, such as a boost circuit, a high-voltage power rail or a negative power line, and drop prediction and detection circuitry. These additions can lead to increased cost, complexity, and power consumption. Furthermore, existing technologies are implemented at the functional circuit block level, lacking visibility into the internal activity of the blocks. Therefore, in this case, it becomes imperative to add voltage drop prediction and detection circuits.

[0006] Therefore, there remains a need for a circuit system and method that can address the aforementioned problems and shortcomings. The present invention provides a streamlined circuit system and method with dynamic decoupling capacitors, wherein the circuit system occupies a smaller area within a logic block and involves a reduced number of power rails for efficient voltage regulation. Furthermore, the present invention is implemented at the gate or cell level. This allows direct access to the module's internal active signals, eliminating the need for voltage drop prediction and detection circuitry. Summary of the Invention

[0007] In order to provide a basic understanding of certain aspects of the present invention, a brief summary of the present invention is given below. This summary is not an extensive overview of the present invention. Its sole purpose is to present some concepts of the present invention in a simplified form as a prelude to the more detailed description that will be presented later.

[0008] The object of the present invention is to provide a circuit system with a dynamic decoupling capacitor, which can be used for voltage stabilization and is implemented at the logic unit level.

[0009] Another object of the present invention is to provide a circuit system having a dynamic decoupling capacitor that is scalable and voltage-regulated according to the size of the circuit.

[0010] Another object of the present invention is to provide a simplified circuit system with a dynamic decoupling capacitor, thereby achieving the purpose of occupying only a small area in the logic circuit for the voltage stabilization function.

[0011] Another object of the present invention is to provide a voltage stabilization method that can solve the power supply jitter and timing loss caused by burst-idle-burst signal activities.

[0012] These objects can be achieved by following the teachings of the present invention. The present invention relates to a circuit system. The circuit system includes a reservoir power rail, a regulated power rail, and a logic circuit connected to the regulated power rail, wherein each of the reservoir power rail, the regulated power rail, and the logic circuit is connected to a common ground line, and is characterized by a dynamic decoupling capacitor connecting the reservoir power rail to the regulated power rail and communicating with the logic circuit, wherein the dynamic decoupling capacitor outputs an injection current I decap The total charge is proportional to the load current I supplied to the logic circuit. load The total charges match each other.

[0013] The present invention also relates to a method for regulating voltage in a circuit system using a dynamic decoupling capacitor. The method comprises the following steps: detecting input switching in a logic circuit, charging the dynamic decoupling capacitor from a storage power rail and discharging it to the main load of the logic circuit, then discharging the dynamic decoupling capacitor to zero and simultaneously charging the logic circuit, wherein the load current I load The charge and I decap The charges are the same, where I load The charge and I decap The charge is the integral of the corresponding current over time.

[0014] The foregoing and other objects, features, aspects and advantages of the present invention will become better understood by carefully reading the detailed description provided below and referring to the accompanying drawings as appropriate. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order that the above-mentioned features of the present invention may be understood in detail, a more particular description of the invention, briefly summarized above, may be made with reference to embodiments, some of which are illustrated in the accompanying drawings. It should be noted, however, that the drawings illustrate only typical embodiments of the invention and are therefore not to be considered limiting of its scope, as the invention may admit to other equally effective embodiments.

[0016] These and other features, benefits and advantages of the present invention will become apparent by reference to the following text and drawings, in which like reference numerals refer to like structure throughout the several views, and in which:

[0017] Figure 1 is a schematic diagram showing a circuit system for implementing a dynamic decoupling capacitor according to an embodiment of the present invention;

[0018] Figure 2A is a schematic diagram illustrating a charging phase of a dynamic decoupling capacitor according to an embodiment of the present invention;

[0019] Figure 2B is a schematic diagram illustrating a discharge phase of a dynamic decoupling capacitor according to an embodiment of the present invention;

[0020] Figure 3 is an example illustrating the implementation of two dynamic decoupling capacitors for voltage regulation in a circuit system; and

[0021] Figure 4 are graphs illustrating simulation results for two setups: (a) without dynamic decoupling capacitors and (b) with dynamic decoupling capacitors. DETAILED DESCRIPTION

[0022] As required, detailed embodiments of the present invention are disclosed herein; however, it should be understood that the disclosed embodiments are merely examples of the present invention and that the present invention can be implemented in various forms. Therefore, the specific structural and functional details disclosed herein should not be interpreted as limiting, but merely as the basis for the claims. It should be understood that the drawings and their detailed description are not intended to limit the present invention to the specific forms disclosed, but rather, the present invention will cover all modifications, equivalents, and alternatives that fall within the scope of the present invention as defined by the appended claims. As used throughout this application, the word "may" is used in a permissive sense (i.e., meaning possible), rather than a mandatory sense (i.e., meaning must). Similarly, the words "include," "including," and "includes" mean including, but not limited to. In addition, unless otherwise specified, the words "a" or "an" mean "at least one," and the word "plurality" means one or more. When abbreviations or technical terms are used, they represent the generally accepted meanings known in the art.

[0023] Hereinafter, with reference to the accompanying drawings, the present invention will be described by various embodiments, wherein the reference numerals used in the drawings correspond to similar elements throughout the specification. However, the present invention can be implemented in many different forms and should not be construed as being limited to the embodiments set forth herein. On the contrary, this embodiment is provided to make this disclosure thorough and complete and to fully convey the scope of the invention to those skilled in the art. In the following detailed description, values ​​and ranges are provided for various aspects of the described embodiments. These values ​​and ranges are considered to be examples only and are not intended to limit the scope of the claims. In addition, many materials are identified as being suitable for various aspects of implementation. These materials are considered to be exemplary and are not intended to limit the scope of the invention.

[0024] The present invention relates to a circuit system 1 and a method for regulating voltage in the circuit system 1 by integrating a dynamic decoupling capacitor 10, in particular to addressing the challenges posed by high-speed logic circuits with a burst-idle-burst active nature, which may cause significant voltage drops and overshoots in the power supply rails.

[0025] refer to Figure 1 2, the present invention will now be described in more detail. The accompanying drawings illustrate only a single grounded load in the circuit. Those skilled in the art will appreciate that, in actual implementation, the circuit is not limited to a single grounded load and can be significantly more complex, drawing current from both the rising and falling edges of a signal transition, and the currents drawn on these edges can differ from one another.

[0026] Figure 1 1 is a flow chart illustrating a circuit system 1 according to an embodiment of the present invention. The circuit system 1 includes an energy storage power rail 12, a regulated power rail 14, and a logic circuit 18 connected to the regulated power rail 14, wherein each of the energy storage power rail 12, the regulated power rail 14, and the logic circuit 18 is connected to a common ground line 16, and is characterized in that a dynamic decoupling capacitor 10 connects the energy storage power rail 12 to the regulated power rail 14 and communicates with the logic circuit 18, wherein the dynamic decoupling capacitor 10 is configured to inject a current I from the energy storage power rail 12. decap The total charge and the load current I supplied to the logic circuit 18 load More specifically, I decap is the current drawn from the energy storage rail 12 by the dynamic decoupling capacitor 10, and I load is the current drawn by the main load of the logic circuit 18.

[0027] According to an embodiment of the present invention, the dynamic decoupling capacitor 10 includes a charge pump-based architecture to facilitate charge transfer to or from the dynamic decoupling capacitor 10 to achieve voltage conversion and regulation within the circuit system 1 .

[0028] According to an embodiment of the present invention, dynamic decoupling capacitor 10 is scalable with logic circuit 18. Because the present invention targets the gate or cell level, gates or cells can be pre-built with built-in dynamic decoupling capacitor 10 to build a block. Therefore, dynamic decoupling capacitor 10 scales directly with the size of the block because it is integrated into the building gates or cells of the block. In other words, dynamic decoupling capacitor 10 can adjust its capacitance value according to the requirements of logic circuit 18, thereby providing flexibility, adaptability, and optimization during the circuit design process.

[0029] According to an embodiment of the present invention, logic circuit 18 is a CMOS logic circuit.

[0030] According to an embodiment of the present invention, a method for regulating a voltage in a circuit system 1 by means of a dynamic decoupling capacitor 10 comprises the following steps: detecting an input switch in a logic circuit 18, charging the dynamic decoupling capacitor 10 from the energy storage power rail 12 while discharging the main load of the logic circuit 18, and discharging the dynamic decoupling capacitor 10 to zero while charging the logic circuit 18, wherein the load current I load The charge and I decap The charges are the same, where I load The charge and I decap The charge is the integral of the corresponding current over time.

[0031] According to one embodiment of the present invention, the dynamic decoupling capacitor 10 is charged by an energy storage voltage supply 16 that is separate from the regulated power supply.

[0032] As described above, the dynamic decoupling capacitor 10 includes two operating phases, namely a charging phase and a discharging phase. The charging and discharging of the dynamic decoupling capacitor 10 is a dynamic process that occurs based on the changing current demand of the logic circuit 18.

[0033] Figure 2A is a diagram illustrating the charging phase of dynamic decoupling capacitor 10 according to an embodiment of the present invention. The charging phase occurs during idle periods (low or no activity) or when the current demand in logic circuit 18 decreases. During the charging phase, logic circuit 18 draws less current from regulated power rail 14 while its primary load is discharged. This creates a window for energy storage rail 12 to charge dynamic decoupling capacitor 10 for later use during the discharging phase.

[0034] Figure 2B is a diagram illustrating the discharge phase of the dynamic decoupling capacitor 10 according to an embodiment of the present invention. The discharge phase occurs during a burst phase (high activity) or when there is a high demand for current in the logic circuit 18. During the discharge phase, current will flow from the regulated power rail 14 to the logic circuit 18 to charge the primary load. To maintain current stability and minimize the voltage drop of the regulated power rail 14, when the logic circuit 18 requires current from the regulated power rail 14, the charge stored in the dynamic decoupling capacitor 10 will be discharged to provide the required current to the regulated power rail 14. It is worth noting that the amount of charge released from the dynamic decoupling capacitor 10 is the same as the amount of charge required by the logic circuit 18. When the charge injected into the logic circuit 18 is equal to the discharged charge of the dynamic decoupling capacitor 10 and the two processes occur simultaneously, the voltage of the regulated power rail 14 will experience zero drop.

[0035] According to an embodiment of the present invention, in a configuration where the energy storage rail 12 and the regulated power rail 14 have the same voltage, if the capacitance values ​​of the energy storage rail 12 and the regulated power rail 14 are the same, the charge stored in the dynamic decoupling capacitor 10 will be the same as the charge drained from the capacitor of the logic circuit 18. In other words, for a device where the dynamic decoupling capacitor 10 also functions as a capacitor for the logic circuit 18 and has the energy storage rail 12 tracking the regulated power rail 14, I decap Will be able to track I throughout the process load , and a wide range of voltages and temperatures.

[0036] In the following, reference will be made to Figures 3 and 4 Provide example of the present invention to explain in more detail. From this example, the advantages of the present invention can be more easily understood and put into practice. However, it should be understood that the following examples are not intended to limit the scope of the present invention in any way.

[0037] Example

[0038] Figure 3 is a schematic diagram showing an implementation of two dynamic decoupling capacitors 10 for regulating voltage in a circuit. In this implementation, current is drawn from both the rising and falling edges of signal transitions. One dynamic decoupling capacitor 10 is triggered by the positive edge of signal B, while the other dynamic decoupling capacitor 10 is triggered by the negative edge of signal B. This configuration allows the dynamic decoupling capacitors 10 to adjust the voltage by <n:0>and <m:0>the rising edge current consumption and the falling edge current consumption of the load capacitor. Furthermore, the signal B, which exhibits the highest correlation with the load current, is selected over the signal A as the trigger for the dynamic decoupling capacitor 10. This is because the signal B can be dynamically disconnected from the signal A under certain logic conditions. This configuration of the dynamic decoupling capacitor 10 is very effective in mitigating the sudden voltage drop in the regulated power supply rail 14 caused by the burst-idle-burst characteristics of the signal B. This is achieved by shifting all or most of the current profile of the burst-idle-burst from the regulated power supply rail 14 to the energy storage power rail 12.

[0039] Figure 4 FIG. 3 is a graph showing simulation results of two setups, (a) showing a configuration without the dynamic decoupling capacitor 10, and (b) showing a configuration with the dynamic decoupling capacitor 10. The simulation was performed using an idle-burst stimulus. According to the simulation results, the setup without the dynamic decoupling capacitor 10 exhibits voltage fluctuations at the regulated power supply rail 14, while the setup with the dynamic decoupling capacitor 10 exhibits a stable voltage without fluctuations at the regulated power supply rail 14.

[0040] The system 10 and method of the present invention effectively addresses the problems and shortcomings of existing solutions. For example, the present invention can mitigate voltage fluctuations to produce a more stable power rail and minimize power-induced jitter timing loss. This capability enables a particular system to operate at a higher data rate. Furthermore, the present invention provides a more streamlined circuit system 1 with the dynamic decoupling capacitor 10, which can enable a smaller area logic functional block in voltage regulation. Moreover, the dynamic decoupling capacitor 10 is an active capacitor, which is not as constrained by the voltage drop requirement of a particular current as a conventional passive decoupling capacitor.

[0041] Various modifications to these embodiments will be readily apparent to those skilled in the art, and the principles described herein can be applied to other embodiments without departing from the scope of the true innovation. Moreover, it is not intended to limit the scope of the presently described embodiments to the described implementations, but rather, the scope of the presently described embodiments is to be accorded the broadest scope available under the law. Figure 1 The description as set forth is not intended to be inferred, in any respect, beyond the scope of the patent covering the described embodiments. Accordingly, the application is not to be limited by the described embodiments implementing the principles and novel features set forth herein.

[0042] In the claims, as well as in the specification above, all transitional phrases such as "comprising," "including," "carrying," "having," "containing," "holding," "composed of," and the like are to be understood to be open-ended, i.e., to mean including but not limited to. Only the transitional phrases "consisting of and "consisting essentially of shall be closed or semi-closed transitional phrases, respectively, in contrast to the open-ended transitional phrases. Transitional phrases, alone or in combination, should not be construed to imply that any step is essential or required.

Claims

1. A circuit system (1), comprising: Energy storage power rail (12); Regulated power rail (14); a logic circuit (18), the logic circuit (18) being connected to the regulated power rail (14); wherein each of the energy storage power rail (12), the regulated power rail (14) and the logic circuit (18) is connected to a common ground line (16); Characterized in that a dynamic decoupling capacitor (10) connects the energy storage power rail (12) to the regulated power rail (14) and communicates with the logic circuit (18); The dynamic decoupling capacitor (10) is configured to inject the current I from the energy storage power rail (12) decap The total charge and the load current I supplied to the logic circuit (18) load matches the total charge.

2. The circuit system (1) of claim 1, wherein the dynamic decoupling capacitor (10) comprises a charge pump based architecture.

3. The circuit system (1) of claim 1, wherein the dynamic decoupling capacitor (10) is adjustable with the logic circuit (18).

4. The circuit system (1) of claim 1, wherein the logic circuit (18) is a complementary metal oxide semiconductor logic circuit.

5. A method for regulating a voltage in a circuit system (1) using a dynamic decoupling capacitor (10) according to claim 1, the method comprising the steps of: detecting input switching in a logic circuit (18); charging the dynamic decoupling capacitor (10) from the energy storage power rail (12) and discharging the primary load of the logic circuit (18); and discharging the dynamic decoupling capacitor (10) to zero while charging the logic circuit (18); The load current I load The charge and I decap have the same charge; wherein I load The charge and I decap The charge is the integral of the corresponding current over time.

6. The method of claim 5, wherein the dynamic decoupling capacitor (10) is charged from an energy storage power source (12) that is separate from the regulated power source (14).

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