Polarization code decoding optimization method and communication system

Abstract

The invention discloses a polarization code decoding optimization method and a communication system, and the method comprises the following steps: A1, optimizing a Gaussian approximation method, and calculating a reliability value of a polarization channel based on the optimized Gaussian approximation method; a2, when the first continuous elimination decoding fails, determining a first bit index set based on a reliability value, a log-likelihood ratio and a channel index value, carrying out single bit flipping decoding in sequence based on the sequence of the first bit index set, and if flipping cyclic redundancy check decoding is successful in a preset flipping decoding time threshold, ending decoding; otherwise, executing the step A3; a3, combining the polarization channels in pairs, determining a second bit index set, performing two bit flipping decoding in sequence based on the sorting of the second bit index set, and if flipping cyclic redundancy check decoding is successful in a preset flipping decoding time threshold, ending decoding; and otherwise, the decoding process is ended, so that the bit flipping decoding performance is effectively improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of channel coding, in particular to a polar code decoding optimization method and a communication system. BACKGROUND

[0002] In wireless communication and storage systems, channel coding technology is the key to ensure reliable transmission of information. For the conventional Gaussian approximation, the true distribution of the Log-Likelihood Ratio (LLR) at high Signal-to-Noise Ratio (SNR) presents a high degree of asymmetry, the tail probability deviates from the Gaussian model, and the LLR mean E[L i ]→+∞ for reliable channels, which invalidates the in the recursive formula when E[L i ]→+∞, because is extremely sensitive to the input close to 0. Therefore, the conventional Gaussian approximation has the problems of accuracy decline at high SNR and poor applicability for short code length. At the same time, the decoding performance of polar codes is highly dependent on the design of the decoding algorithm, among which the Successive Cancellation (SC) decoding is widely adopted due to its low complexity, but its serial decoding characteristics may lead to error propagation, especially at medium code length, which has a significant performance gap with the Maximum Likelihood (ML) decoding. To improve the performance of SC decoding, the bit flipping (SC-Flip) decoding technology is proposed, which core idea is to identify unreliable decoding bits and dynamically flip the decision values of these bits to correct the error propagation in the SC decoding process. The traditional SC-Flip decoding usually adopts a single bit flipping strategy, that is, after the first SC decoding fails, only one most likely error bit is selected for flipping and re-decoding, which has the characteristics of low complexity and easy implementation. However, the existing single bit flipping method still has the defects of weak error correction ability and poor adaptability. SUMMARY

[0003] The purpose of the present application is to solve the technical problem of improving the success rate of polar code decoding at high SNR and dynamic code length, and to propose a polar code decoding optimization method and a communication system.

[0004] The technical problem of the present application is solved by the following technical solution:

[0005] A polar code decoding optimization method, comprising the following steps:

[0006] A1, optimizing the Gaussian approximation method, and calculating the reliability value of the polar channel based on the optimized Gaussian approximation method;

[0007] A2, when the first continuous decoding failure is eliminated, a first bit index set is determined based on the reliability value, the log-likelihood ratio value and the channel index value, and single bit flip decoding is sequentially performed based on the order of the first bit index set, if the cyclic redundancy check decoding is successful within a preset flip decoding number threshold, the decoding is ended; otherwise, step A3 is performed;

[0008] A3, the polarization channels are combined two by two, and a second bit index set is determined, two bit flip decoding is sequentially performed based on the order of the second bit index set, if the cyclic redundancy check decoding is successful within a preset flip decoding number threshold, the decoding is ended; otherwise, the decoding process is ended.

[0009] In some embodiments, the following technical features are further included:

[0010] The optimization method of the Gaussian approximation method in step A1 is: the Gaussian approximation method is modified based on the signal-to-noise ratio and the code length.

[0011] In some embodiments, the following technical features are further included:

[0012] The Gaussian approximation method is modified when the code length is less than N1 and the SNR is greater than 3, and the modified calculation formula is:

[0013]

[0014] Wherein, N is the number of polarization channels, N1 is the reference code length that needs to be modified, SNR is the signal-to-noise ratio, E[L i ] is the standard Gaussian approximation calculation channel reliability, R[L i ] is the channel reliability value calculated by the modified Gaussian approximation method, and μ and are correction factors.

[0015] In some embodiments, the following technical features are further included:

[0016] The first bit index set in step A2 is determined by the following steps:

[0017] A21, the first flip weighting value is calculated based on the reliability value and the log-likelihood ratio value;

[0018] A22, the first bit index set of single bit flip decoding is determined based on the first flip weighting value and the channel index value.

[0019] In some embodiments, the following technical features are further included:

[0020] The preset flip decoding number threshold is determined by comprehensively considering the performance and the complexity of the bit flip decoding.

[0021] In some embodiments, the technical features further comprise:

[0022] The second bit index set in step A3 is determined by the following steps:

[0023] The polar channels are combined two by two, and the second flipping weight value is calculated based on the sum of reliability values, the sum of log-likelihood ratio values, and the sum of channel index values of the two-by-two combination, to determine a second bit index set of two-bit flipping decoding.

[0024] In some embodiments, the technical features further comprise:

[0025] The first flipping weight value in step A21 is calculated in the following specific manner:

[0026] Assuming that the number of information bits is K, and the length of the cyclic redundancy check is m; the reliability values of each sub-channel are calculated using the optimized Gaussian approximation as R i ; the absolute value of the log-likelihood ratio of each decoding bit obtained at the decoding end is |L i |, then the i-th information bit flipping weight value Fwv Ι (i) of single-bit flipping is calculated as:

[0027] Fwv Ι (i)=αR i +(1-α)|L i |

[0028] wherein i∈{1,2,...,K+m}, and α∈[0,1].

[0029] In some embodiments, the technical features further comprise:

[0030] The first bit index set in step A22 is determined in the following specific manner:

[0031] The set of first flipping weight values Fwv Ι is arranged in ascending order to obtain Fwv′ Ι , and the corresponding channel index value sorting Idx′ is obtained. The two adjacent information bit flipping weight values in the set of first flipping weight values Fwv′ Ι arranged in ascending order are Fwv Ι (i) and Fwv Ι (i+1), and if the values of the two are close, i.e.

[0032] |Fwv Ι (i)-Fwv Ι (i+1)|≤η

[0033] wherein, η is a threshold value triggering channel index value ordering; then, based on Idx'(i) and Idx'(i+1), the priority ordering of the flipped bits is performed, here, the information bit flipping of the channel index value ordered later is given priority; that is, if the channel index value of Idx'(i) is less than that of Idx'(i+1), then the order of the two in Idx' does not need to be exchanged, otherwise, the order of the channel index values of the two in Idx' needs to be exchanged; after each exchange, the Fwv Ι value of the adjacent two of Idx' is integrated, but the two that have been exchanged do not need to be exchanged any more, and the first bit index set obtained is:

[0034] Γ' = {Γ'1, Γ'2,..., Γ'K+m} K+m}

[0035] wherein, Γ'1 is the channel index value with the highest priority.

[0036] In some embodiments, the following technical features are further included:

[0037] The specific calculation method of the second flipping weight value is as follows:

[0038]

[0039] wherein, Fwv Π (i) is the flipping weight value of the ith combination, is the channel reliability value calculated by the modified Gaussian approximation method corresponding to the channel index i1, is the channel reliability value calculated by the modified Gaussian approximation method corresponding to the channel index i2, i1, i2 ∈ {1, 2,..., N}, i ∈ {1, 2,..., K+m}, α ∈ [0, 1], the corresponding channel index combination and ordering is Idx two .

[0040] In some embodiments, the following technical features are further included:

[0041] The specific confirmation method of the second bit index set is as follows:

[0042] The set of second flipping weight values Fwv Π is arranged in ascending order to obtain Fwv' Π , and the corresponding channel index value ordering Idx' two is obtained; assuming that the weight values of the two groups of information bit flipping are and If the weight values of the two are close, that is,

[0043]

[0044] The priority ranking of the two sets of information bits Φ1 and Φ2 needs to comprehensively consider the index values of the channels, and the sum of the channel index values in the combination is considered here, the sum of the channel index values of Φ1 is:

[0045]

[0046] wherein, and are two channel index values in the channel index set Φ1, the sum of the channel index values of Φ2 is:

[0047]

[0048] wherein, and are two channel index values in the channel index set Φ2, and the sum of and is compared to obtain the channel index set Φ1 and Φ2 and ranking, that is, if the channel index set Φ1 is ranked before Φ2, otherwise the channel index Φ2 is ranked before Φ1, the updating operation is performed in Idx' two , until all the rankings are comprehensively ranked according to the flipping weight values and the channel index values to obtain the second bit index set

[0049] The application also adopts the following technical solutions:

[0050] A communication system comprising an information bit generation module, a cyclic redundancy check encoding module, a polarization encoding module, a modulation module, and a decoding end, the information bit generation module is used to randomly generate information bits, the cyclic redundancy check encoding module, the polarization encoding module, the modulation module, and the decoding end sequentially perform cyclic redundancy check encoding, polarization encoding, binary phase shift keying modulation, and decoding on the information bits, wherein the decoding end decodes the information bits output by the decoding end based on the above method.

[0051] A computer readable medium storing a computer program, the computer program can be read to realize the above method.

[0052] The beneficial effects of the application compared with the prior art include:

[0053] The polar code decoding optimization method and the communication system provided by the application can realize multi-dimensional weighted ordering to improve the key error bit identification rate, realize Gaussian approximation optimization to improve the reliability calculation accuracy, realize dynamic weighted ordering to improve the error bit identification rate, and realize multi-order flip strategy to reduce error propagation, thereby overcoming the weak error correction ability and poor adaptability of the existing single bit flip method, and effectively improving the bit flip decoding performance.

[0054] Other advantages of the embodiments of the application will be further described below. BRIEF DESCRIPTION OF DRAWINGS

[0055] Figure 1 is a flowchart of a polar code decoding optimization method in the embodiments of the application;

[0056] Figure 2 is a flowchart of a polar code decoding optimization method in another embodiment of the application;

[0057] Figure 3 is a workflow block diagram of a communication system based on a polar code decoding optimization method;

[0058] Figure 4 is a performance simulation result schematic diagram of the method of the embodiments of the application and other bit flip methods when the polar code length N = 256;

[0059] Figure 5 is a performance simulation result schematic diagram of the method of the embodiments of the application and other bit flip methods when the polar code length N = 16;

[0060] Figure 6 is a performance simulation result schematic diagram of the method of the embodiments of the application and other bit flip methods when the polar code length N = 512. DETAILED DESCRIPTION

[0061] The application will be further described below by comparing with the drawings and combining with the preferred embodiments. It should be noted that the embodiments in the application and the features in the embodiments can be combined with each other without conflict.

[0062] It should be noted that the left, right, up, down, top, bottom and other orientation terms in the embodiments are only relative concepts or references to the normal use state of the product, and should not be considered as limiting.

[0063] Before introducing the embodiments of the present application, the ideas of the present application are briefly described:

[0064] Since the existing single bit flipping method is not enough to correct multiple errors, especially in high signal-to-noise ratio (SNR) or longer code length, the error propagation of multiple bits will significantly reduce the decoding success rate, and considering that using twice bit flipping may increase the complexity of decoding, therefore, for SC bit flipping decoding, the number of flipping and performance need to be considered comprehensively.

[0065] Embodiment one

[0066] The embodiments of the present application provide a polar code decoding optimization method, as shown in Figure 1 , comprising the following steps:

[0067] A1, optimizing the Gaussian approximation (GA) method, and calculating the reliability value of the polar channel based on the optimized Gaussian approximation method as one of the subsequent bit flipping index set reference indicators.

[0068] A2, when the first successive cancellation decoding fails, determining a first bit index set based on the reliability value, the log-likelihood ratio value and the channel index value, and sequentially performing single bit flipping decoding based on the ordering of the first bit index set, if the cyclic redundancy check decoding succeeds within a preset flipping decoding number threshold, the decoding is ended; otherwise, step A3 is performed. Specifically, step A2 includes the following contents:

[0069] For a Polar-SC (Polar-Successive Cancellation, a decoding algorithm of Polar code) flipping decoding of a bit, first, the calculation of the first flipping weight value is performed based on the reliability value and the LLR value (Log-Likelihood Ratio, log-likelihood ratio). Then, the first bit index set Γ′ Ι of single bit flipping decoding is determined based on the first flipping weight value and the channel index value. The flipping decoding of a single bit is sequentially performed based on the ordering of the first bit index set Γ′ Ι , if the intermediate CRC (Cyclic Redundancy Check, cyclic redundancy check) decoding succeeds, the decoding is ended, otherwise, the decoding of two bits is performed after T times of flipping decoding fail, wherein 0≤T≤T max , T max need to be determined comprehensively considering the performance and the complexity of flipping.

[0070] A3, combining the polarized channels two by two and determining a second bit index set, sequentially performing two bit flip decoding based on the ordering of the second bit index set, if the flip cyclic redundancy check decoding succeeds within a preset flip decoding number threshold, ending the decoding; otherwise ending the decoding process. Specifically, step A3 includes the following contents:

[0071] For two-bit Polar-SC flip decoding, first, the polarized channels are combined two by two, and then the second flip weight value is calculated based on the sum of the channel reliability, the sum of the LLR values, and the sum of the channel index values of the two-by-two combined channels, to determine the second bit index value set Γ' of the two-bit flip decoding Π , sequentially performing two-bit flip decoding, if the intermediate flip CRC decoding succeeds, ending the decoding, otherwise ending the decoding process after T times of flip decoding fail, where 0≤T≤T max , T max needs to be determined by considering the performance and the complexity of the flip.

[0072] Gaussian approximation is mainly suitable for AWGN (Additive White Gaussian Noise Channel) channel, under which Gaussian approximation greatly reduces the calculation amount. The standard Gaussian evolution assumes that the LLR of the polarized channel conforms to the Gaussian distribution, and the channel reliability is estimated by recursively calculating the mean value. The recursive calculation is as follows:

[0073]

[0074] wherein, is the Gaussian error function, is the inverse function of the Gaussian error function, and δ is the noise variance. In the standard Gaussian approximation, there are the following two problems:

[0075] a. Precision decline under high SNR (Signal-to-Noise Ratio): when E[L i ] is large, the calculation error is significant, resulting in inaccurate ordering and performance decline;

[0076] b. Poor applicability to short code length: when polarization is not complete, the Gaussian assumption deviates from the actual distribution, resulting in inaccurate ordering and performance decline;

[0077] Based on the above problems, in step A1, the Gaussian approximation method is optimized based on SNR and code length, specifically including the following steps:

[0078] The Gaussian approximation method based on channel reliability, when the code length is <N1 and the SNR is >3, the channel reliability value calculation is modified, and the modified calculation formula is as follows,

[0079]

[0080] where N is the number of polarized channels, N1 is the length of the code that needs to be corrected, which is obtained based on Monte Carlo simulation, and the value range is 0 < N1≤ 2048, SNR is the signal-to-noise ratio, the value range of SNR is from negative infinity to positive infinity, E[L i ] is the standard Gaussian approximation calculated channel reliability, R[L i ] is the improved Gaussian approximation calculated channel reliability value. μ and are correction factors, which are obtained by Monte Carlo simulation fitting. The higher the final R[L i ] value, the higher the corresponding channel reliability, otherwise the lower the channel reliability.

[0081] Further, in step A2, during the flipping of one bit, the precoding error of the decoding error can be effectively changed, because the determined flipping bit set has important significance, the single flipping bit set here comprehensively considers the channel reliability value, the LLR value of the information bit and the index value of the channel, and the specific process is as follows:

[0082] Assuming that the number of polarized channels is N, the number of information bits is K, and the length of CRC is m. The reliability of each subchannel is calculated by using the optimized Gaussian approximation R i . The absolute value of the LLR of each decoding bit obtained at the decoding end is |L i |, then the i-th information bit flipping weight value Fwv Ι (i) of a bit flipping is calculated as:

[0083] Fwv Ι (i) = αR i +(1-α)|L i |

[0084] where i∈{1,2,...,K+m}, α∈[0,1]. R i and L i represent the relative order of information bits. The smaller the value of Fwv Ι (i), the greater the probability of decoding error, that is, the highest priority of flipping. The first flipping weight value set Fwv Ι is sorted in ascending order to obtain Fwv′ Ι , and the corresponding channel index value sorting Idx′ is obtained. The flipping weight values of two adjacent information bits in the first flipping weight value set Fwv′ Ι sorted in ascending order are Fwv Ι(i) and Fwv Ι (i+1), if the values of both are close, i.e.

[0085] |Fwv Ι (i) and Fwv Ι (i+1) < η

[0086] where η is a threshold value triggering the reordering of channel index values. Then the priority ordering of the flipped bits needs to be done based on Idx'(i) and Idx'(i+1), here the channel index value ordering the later one is given a priority of flipping one information bit. That is, if Idx'(i) is smaller than Idx'(i+1), then no need to exchange the order of the two in Idx', otherwise the order of the two channel index values in Idx' needs to be exchanged. After each exchange, the Fwv Ι values of the two adjacent ones in Idx' are compared, but the two already exchanged ones do not need to be exchanged again. Suppose the final ordering of the channel index values is:

[0087] Γ' = {Γ'1, Γ'2,..., Γ'N} K+m}

[0088] where the flipped bit of channel index value Γ'1 has the highest priority, when flipping one information bit, if the CRC check is successful, then the decoding step is finished, otherwise the bits are flipped in the order of the set Γ' one by one, if the T times of one information bit flipping are all unsuccessful, then two bits flipping are considered to improve the decoding performance of the system.

[0089] In step A3, two bits flipping first need to combine the channel indexes two by two, and then consider the sum of the channel reliability, the sum of the LLR values of the information bits and the sum of the channel index values in each combination to determine the final flipping bit set and order, which is as follows:

[0090] For K+m information bits, the number of two-by-two combinations is:

[0091]

[0092] where K is the number of information bits, m is the length of CRC, and S is the number of flipped bits. At this time, the value of S is 2, so the above formula can be simplified as:

[0093]

[0094] In the above C combinations, the channel reliability, the LLR value and the channel index value corresponding to each combination of two index values are comprehensively sorted, which is as follows:

[0095] Assuming that the indexes of the two bits to be flipped in the ith combination in the C combination group are i1 and i2, the flipping weight value of the ith combination is calculated as follows:

[0096]

[0097] wherein Fwv Π (i) is the flipping weight value of the ith combination, is the channel reliability value calculated by the modified Gaussian approximation method corresponding to the channel index i1, is the channel reliability value calculated by the modified Gaussian approximation method corresponding to the channel index i2, i1, i2 ∈ {1, 2,..., N}, i ∈ {1, 2,..., K+m}, α ∈ [0, 1], the corresponding channel index combination and order are Idx two . The set of second flipping weight values Fwv Π is arranged in ascending order to obtain Fwv′ Π , and the corresponding channel index value order Idx′ two is obtained. Assuming that the flipping weight values of the two groups of information bits are and If the flipping weight values are close, i.e.

[0098]

[0099] the priority order of the two groups of information bits Φ1 and Φ2 needs to be considered comprehensively considering the channel index value. Here, the sum of the channel index values in the combination is considered comprehensively. The sum of the channel index values of Φ1 is:

[0100]

[0101] wherein and are two channel index values in the channel index set Φ1, and the sum of the channel index values of Φ2 is:

[0102]

[0103] wherein and are two channel index values in the channel index set Φ2, and the sum of and is compared to obtain the channel index set Φ1 and Φ2 order, i.e. if the channel index set Φ1 is sorted before Φ2, otherwise the channel index Φ2 is sorted before Φ1, and the update operation is performed in Idx′ two . Until all the orders are comprehensively sorted according to the flipping weight value and the channel index value, the final order value set is obtained. Finally according to the set Determine the two-bit set of each flip when flipping two bits, until the number of flips is T, end the loop.

[0104] Example two

[0105] As Figure 2 shown, a polar code decoding optimization method flow chart of an improved bit flipping strategy provided by the embodiment of the application, the method includes but is not limited to the following steps:

[0106] S0: initialize i1=1, i2=1.

[0107] S1: the receiving end performs the calculation channel reliability of the improved Gaussian approximation method, the LLR value of the receiving end.

[0108] S2: for the set of one-bit flipping, the channel reliability, LLR and channel index value of each decoding bit are obtained to obtain the priority flipping bit index set Γ' Ι .

[0109] S3: the received information is firstly subjected to SC decoding, when the SC first decoding fails, the corresponding decoding bit flipping is performed based on the bit index set Γ' Ι . The bit flipping is performed from the first in the set Γ' Ι , the number of i1 is increased by 1, i.e. i1=i1+1, every cycle. If the decoding result CRC check is successful, the decoding is ended, if i1>T and the CRC check fails, the subsequent two-bit flipping is performed.

[0110] S4: for the set of two-bit flipping, firstly all the index channels are subjected to two-by-two combination, then the bit index set Γ' Π is determined based on the channel reliability sum, LLR value sum and channel index value sum of all channels in the combination.

[0111] S5: the bit flipping is performed from the first in the set Γ' Π , the number of i2 is increased by 1, i.e. i2=i2+1, every cycle. If the decoding result CRC check is successful, the decoding is ended, if i2>T and the CRC check fails, the decoding flow is ended, and the decoding fails.

[0112] In order to make the embodiment of the application more clear and complete, the steps of the embodiment of the application are described in detail in combination with actual numerical values.

[0113] For the convenience of actual example, it is assumed that in the communication system, the code length N=16 of the example polar code is T=4. Figure 3For the communication system workflow block diagram based on the method of the embodiment of the application, including an information bit generation module, a cyclic redundancy check coding (CRC) module, a polar coding module, a modulation module, a decoding end, the length of the information bit K=8, the information bit of 0, 1 is randomly generated by the information bit generation module, and then the generated information bit is coded by the CRC module, the coding length of the CRC is m=4, therefore, the length of the information bit after the CRC coding is 12. The information bit after the CRC check is coded by the polar module to obtain the coding output with the code length N=16, and then modulated by the BPSK (Binary Phase Shift Keying, binary phase shift keying) module, and after passing through the AWGN channel, the decoding end (i.e. the receiving end) is coded. In the decoding end, the information bit output by the decoding end is decoded by using the polar code decoding optimization method proposed in the embodiment of the application. The positions of the frozen bits are 1, 2, 3 and 5, and the remaining positions, i.e. 4, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 and 16 are the positions of the information bits.

[0114] The embodiment of the application further provides a computer readable medium, which stores a computer program, characterized in that the computer program can be read to realize the method of the above-mentioned embodiment.

[0115] A. The channel reliability and the LLR calculation of the improved Gaussian method for step A1 in the embodiment one are as follows:

[0116] (1) Improved Gaussian calculation formula:

[0117]

[0118] (2) LLR calculation formula:

[0119]

[0120] Wherein, y represents the sequence received by the receiving end, δ 2 represents the variance of the Gaussian white noise

[0121] Suppose that the log-likelihood ratio of the receiving end is: L=[L1, L2,..., L N , and the corresponding example values are:

[0122] L=[0.3,-7.8,1.4,4.3,0.2,0.7,-3.8,-3.1,2.4,-1.8,1.6,-2.1,1.5,-5.8,-0.1,-0.4]

[0123] Suppose that the channel reliability value obtained by the improved Gaussian calculation formula is: R=[R1, R2,..., R N], and the corresponding example values ​​are:

[0124] R=[0.1,0.2,0.2,1.3,0.3,1.9,2.6,8.8,0.5,2.9,3.9,11.9,5.2,14.7,16.9,38.9]

[0125] Note: The channel reliability values ​​here are obtained through improved Gaussian calculation.

[0126] The channel index value is: Idx=[Idx1,Idx2,...,Idx N ], and its corresponding value is:

[0127] Idx=[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16]

[0128] B. For the flipped bit index set Γ′ in step S2 in embodiment 2 Ι The calculation is as follows:

[0129] (1) First calculate the flip weight value Fwv of each information bit Ι , assuming that α=0.1, then Fwv Ι (i) = αR i +(1-α)|L i |, so we can calculate,

[0130] FWf Ι =[4,0.82,3.68,3.67,2.21,1.91,1.83,3.08,1.87,6.69,1.78,4.25]

[0131] (2) Based on Fwv Ι And the channel index value is sorted comprehensively to obtain Γ′ Ι , the steps are as follows

[0132] a. First, Fwv Ι Sort the values ​​in ascending order and get,

[0133] FWf Ι ′=[0.82,1.78,1.83,1.87,1.91,2.21,3.08,3.67,3.68,4,4.25,6.69]

[0134] The corresponding channel index value is updated as:

[0135] Idx′=[6,15,11,13,10,9,12,8,7,4,16,14]

[0136] b. Based on Fwv′Ι and Idx′ are comprehensively sorted, at this time η=0.1, and Fwv′ I Compare two numbers to see if the difference between the two adjacent values ​​is ≤ 0.1. Therefore, in Fwv′ Ι Among the values ​​of and Idx′,

[0137] |Fwv′ Ι (8)-Fwv′ Ι (9)|≤0.1

[0138] At this time, Fwv′ Ι (8) The corresponding channel index value is Idx′(8)=8, Fwv′ Ι (9) The corresponding channel index value is Idx′(9)=7. At this time, Idx′(8)>Idx′(9), so the channel index values ​​of the two need to be exchanged, that is,

[0139]

[0140] After one adjustment, it meets the requirements, so the final Γ′ Ι for,

[0141] Γ′ Ι =[6,15,11,13,10,9,12,7,8,4,16,14]

[0142] C. The detailed example steps for step S3 in Example 2 are as follows:

[0143] If the first SC decoding fails, that is, after SC decoding, the decoded bits are subjected to CRC check. If the check fails, the bit value of the first index position of Γ′ is flipped. That is, when SC decoding reaches the 6th bit, the decoded bit is flipped and then subsequent decoding is performed until the last decoded bit. At this time, all decoded bits are subjected to CRC check again, and the value of i1 is increased by 1. If the check passes, the decoding is terminated. Otherwise, in the next SC decoding, the bit value of the second index position of Γ′ is flipped. That is, when SC decoding reaches the 15th bit, the decoded bit is flipped and then subsequent decoding is performed. And so on, until the CRC check succeeds or i1>T, the two-bit flip decoding is switched.

[0144] D. A detailed example of the two-bit flipping in step S4 in the second embodiment is as follows:

[0145] (1) First, the information bits are combined in pairs. The total number of combinations is:

[0146]

[0147] Therefore, there are 66 cases of two-by-two combinations here, and the following is a partial list of two-by-two combinations based on the channel index values of the information bits:

[0148] Idx two = [(4, 6), (4, 7), (4, 8),..., (15, 16)]

[0149] Note: This is only to illustrate the principle of combination, and it is not necessary to enumerate all the combination cases one by one. All the combination cases can be obtained by traversing the combination

[0150] (2) Calculate Fwv two based on the two-by-two combinations in Idx Π and comprehensively sort the channel index values to obtain Γ′ Π , as follows:

[0151] a. First, calculate the flipping weight value Fwv Π of each information bit. For the channel combination index (4, 6) of Fwv Π (1), we have

[0152] Fwv Π (1) = α(R4+R6) + (1-α)(|L4|+|L6|)

[0153] = 0.1×(1.3+1.9) + (1-0.1)×(|4.3|+|0.7|)

[0154] = 4.82

[0155] Similarly,

[0156] Fwv Π (2) = α(R4+R7) + (1-α)(|L4|+|L7|)

[0157] = 0.1×(1.3+2.6) + (1-0.1)×(|4.3|+|-3.8|)

[0158] = 7.68

[0159] …

[0160] Fwv Π (66) = α(R 15 +R 16 )+(1-α)(|L 15 |+|L 16 |)

[0161] = 0.1×(16.9+38.9) + (1-0.1)×(|-0.1|+|-0.4|)

[0162] =6.03

[0163] b. To Fwv Π Arrange the values ​​in ascending order and get,

[0164] Fwv′ Π =[4.68,6.03,...,7.68,...,8.15,8.16,....]

[0165] The corresponding channel index value is updated as follows:

[0166] Idx′ two =[(4,6),(15,16),....,(4,7),...,(6,12),(4,9),...]

[0167] Note: Fwv′ Π (15) = 8.15, Fwv′ Π (16) = 8.16, the corresponding channel index value is Idx′ two (15)=(6,12), Idx′ two (16)=(4,9), which is the flip weight value and the corresponding channel index value constructed for the convenience of explaining the subsequent steps later.

[0168] c. Based on Fwv′ Π and Idx′ two Perform comprehensive sorting, at this time η=0.1, and Fwv′ Π Compare two numbers to see if the difference between the two adjacent values ​​is ≤ 0.1. Therefore, in Fwv′ Ι Among the values ​​of Idx′

[0169] |Fwv′ Ι (15)-Fwv′ Ι (16)|≤0.1

[0170] At this time Idx′ two The sum of the channel combinations of (15) And Idx′ two The sum of the channel combinations of (16) therefore Therefore, it is necessary to exchange the channel index values ​​and flip weight values ​​of the two, that is,

[0171]

[0172] Assuming that after all adjustments, it meets the requirements, the final Γ′ Π for,

[0173] Γ′ Π=[(4,6),(15,16),....,(4,7),...,(4,9),(6,12),...]

[0174] d. Next, flip Γ′ during SC decoding Π The bit value of the first combined index position of , that is, when SC decoding reaches the 4th and 6th bits, the decoded bits are flipped and then subsequent decoding is performed until the last decoded bit. At this time, all decoded bits are CRC checked again, and the value of i2 is increased by 1. If the check passes, the decoding is terminated, otherwise Γ′ is flipped in the next SC decoding. Π The bit value of the second combined index position of , that is, when the SC is decoded to the 15th and 16th bits, the decoded bits are flipped before subsequent decoding. And so on, until the CRC check succeeds or i2>T, the decoding ends.

[0175] Figure 4 The simulation parameters of the result graph are set as follows: the length of the polar code N = 256, the length of the information bit K = 128, and the CRC generator polynomial g(x) = x 24 +x 23 +x 6 +x 5 +x+1, the coding length is m=24. The corresponding simulated SNR range is (-1,4), the step is 1dB, the number of simulated frames is 10000 frames, and the correction factor μ is 1.02. Finally, the embodiment method of the present invention ( Figure 4 Curve 4) and SC( Figure 4 Curve 1 in ), SC-flip-Gaussian decoding ( Figure 4 Curve 2 in ), SC-flip-LLR decoding ( Figure 4 The performance simulation comparison is carried out with curve 3 in the figure. The results are as follows Figure 4 shown. Figure 4-6 The horizontal axis Eb / N0 (dB) represents the simulated signal-to-noise ratio (SNR), and the vertical axis represents the BER (Bit Error Rate). The figure shows that the method proposed in this embodiment of the present invention outperforms the other two methods in achieving a lower bit error rate under different SNR conditions, meaning that more bits are successfully decoded, resulting in better decoding performance. This is because this method incorporates a correction factor into the Gaussian construction, overcoming the shortcomings of the standard Gaussian construction. Finally, by comprehensively considering channel reliability, LLR, and channel index values, a single and double bit-flipping strategy is implemented, effectively improving decoding performance.

[0176] Next, the decoding performance of different methods of short code (N=16) and long code (N=512) is simulated. The decoding performance of the short code is as follows: Figure 5The performance of the long code is shown as Figure 6 The performance simulation results of the curve 4 in the embodiments of the present application (and Figure 5 and Figure 6 ) and the curve 1 in the SC (and Figure 5 and Figure 6 ), the SC-flip-Gaussian decoding (and Figure 5 and Figure 6 ), and the SC-flip-LLR decoding (and Figure 5 and Figure 6 ) are shown in FIG. 1. The simulation frame number is 10000 frames. The related parameters for the short code simulation are as follows: ① the length of the polar code N = 16; ② the length of the information bits K = 8; ③ the length of the CRC m = 4, and the generator polynomial is g(x) = x 4 + x + 1; and ④ the correction factor μ = 1. The related parameters for the long code simulation are as follows: ① the length of the polar code N = 512; ② the length of the information bits K = 320; ③ the length of the CRC m = 24, and the generator polynomial is consistent with that used in Figure 4 ; and ④ the correction factor μ = 0.97. Figure 5 Figure 6 The horizontal coordinate of FIG. 1 is Eb / N0 (dB), and the vertical coordinate is BER. As can be seen from the comparison of FIG. 1, Figure 4 Figure 5 and Figure 6 , the embodiments of the present application are superior to the other two bit flipping methods in the short code and the long code, and have better decoding performance.

[0177] The three code lengths in Figure 4 , Figure 5 and Figure 6 are taken as examples. When Eb / N0 (dB) = 4, the corresponding BER data is counted to obtain the BER performance data and the performance improvement percentage data of different code lengths, as shown in Table 1. As can be seen from Table 1, compared with the SC-flip-Gaussian decoding, the BER performance of the embodiments of the present application is improved by 38.4%, 46.7% and 48.1% when the code length N = 16, N = 256 and N = 512, respectively. Compared with the SC-flip-LLR decoding, the BER performance of the embodiments of the present application is improved by 37.3%, 20% and 18.3% when the code length N = 16, N = 256 and N = 512, respectively.

[0178] Table 1

[0179]

[0180] ​​

[0181] Those skilled in the art will appreciate that embodiments of the present application can be readily used as a method, a system or a computer program product. Accordingly, the present application can take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application can take the form of a computer program product on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROMs, optical storage devices, etc.) embodying computer readable program code.

[0182] The present application is described in reference to the flowchart illustrations and / or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general purpose computer, special purpose computer, embedded processor or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart illustrations and / or block diagrams block or blocks. Figure 1 one or more functions specified in the flowchart illustrations and / or block diagrams block or blocks. Figure 1 means for carrying out each of the

[0183] These computer program instructions can also be stored in a computer- readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instructions which implement the function specified in the flowchart illustrations and / or block diagrams block or blocks. Figure 1 one or more functions specified in the flowchart illustrations and / or block diagrams block or blocks. Figure 1 means for carrying out each of the

[0184] These computer program instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart illustrations and / or block diagrams block or blocks. Figure 1 one or more functions specified in the flowchart illustrations and / or block diagrams block or blocks. Figure 1 means for carrying out each of the

[0185] The above further describes the present application in conjunction with specific / preferred embodiments, and cannot be deemed as limiting the specific implementation of the present application to these descriptions. For those skilled in the art to which the present application belongs, without departing from the concept of the present application, they can make several substitutions or variations to the described embodiments, and these substitutions or variations shall be deemed as falling within the protection scope of the present application. In the description of the present specification, the description of the terms "an embodiment", "some embodiments", "a preferred embodiment", "an example", "a specific example" or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are contained in at least one embodiment or example of the present application. In the present specification, the illustrative description of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner. In the case of not contradicting each other, those skilled in the art can combine and combine the different embodiments or examples described in the present specification and the features of the different embodiments or examples. Although the embodiments of the present application and their advantages have been described in detail, it should be understood that various changes, substitutions and modifications can be made herein without departing from the scope of protection of the patent application.

Claims

1. A polar code decoding optimization method, characterized in that: The steps include: A1. Optimize the Gaussian approximation method and calculate the reliability value of the polarized channel based on the optimized Gaussian approximation method. A2. When the first continuous elimination decoding fails, determine a first bit index set based on the reliability value, the log-likelihood ratio value, and the channel index value, and perform single bit flip decoding in sequence based on the order of the first bit index set. If the flipped cyclic redundancy check decoding succeeds within a preset flip decoding number threshold, then terminate the decoding. Otherwise, go to step A3; A3. The polarized channels are grouped in pairs to determine a second bit index set. Two-bit bit flip decoding is sequentially performed based on the order of the second bit index set. If the flipped cyclic redundancy check decoding succeeds within a preset flip decoding number threshold, the decoding process is terminated. Otherwise, the decoding process is terminated.

2. The method according to claim 1, wherein The optimization method of the Gaussian approximation method in step A1 is: when the code length is less than N1 and the SNR is greater than 3, the Gaussian approximation method is modified, and the modified calculation formula is: Where N is the number of polarized channels, N1 is the reference code length that needs to be corrected, SNR is the signal-to-noise ratio, E[L i ] is the channel reliability calculated by the standard Gaussian approximation, R[L i ] is the channel reliability value calculated by the modified Gaussian approximation method, μ and is the correction factor.

3. The method according to claim 1, wherein The first bit index set in step A2 is specifically determined by the following steps: A21. Calculating a first flip weighted value based on the reliability value and the log-likelihood ratio value; A22. Determine a first bit index set for single bit flip decoding based on the first flip weight value and the channel index value.

4. The method according to claim 1, wherein The second bit index set in step A3 is specifically determined by the following steps: The polarized channels are combined in pairs, and a second flip weighted value is calculated based on a sum of reliability values, a sum of log-likelihood ratio values, and a sum of channel index values ​​of the pairwise combinations to determine a second bit index set for two bit-flip decoding.

5. The method according to claim 3, wherein The specific calculation method of the first flip weighted value in step A21 is as follows: Assume that the number of information bits is K and the length of cyclic redundancy check is m; the reliability value of each subchannel is obtained by using the optimized Gaussian approximation to be R i The absolute value of the log-likelihood ratio of each decoded bit obtained at the decoding end is |L i |, then calculate the i-th information bit flip weighted value Fwv of a single bit flip Ι (i) is: Fwv Ι (i) = αR i +(1-α)|L i | Among them, i∈{1,2,...,K+m}, α∈[0,1].

6. The method according to claim 5, wherein The specific confirmation method of the first bit index set in step A22 is as follows: The first flip weighted value set Fwv Ι Fwv′ obtained by ascending order Ι , and obtain the corresponding channel index value sorting Idx′. The first flip weighted value set Fwv′ after the ascending order Ι The flip weights of two adjacent information bits are Fwv Ι (i) and Fwv Ι (i+1), if the two values ​​are close, that is, |Fwv Ι (i)-Fwv Ι (i+1)|≤η Where η is the threshold value for triggering the reordering of the channel index values; then, the priority of the flipped bits is sorted based on Idx′(i) and Idx′(i+1), and the channel index value with the lower order is flipped with priority; that is, if the channel index value of Idx′(i) is less than Idx′(i+1), the order of the two in Idx′ does not need to be swapped; otherwise, the order of the two channel index values ​​in Idx′ needs to be swapped; after each swap, the two adjacent Idx′s need to be Fwv Ι The comprehensive comparison of the values, but the two that have been swapped no longer need to be swapped, and the first bit index set obtained is: C′={C′1,C′2,...,C′ K+m } Among them, Γ1′ is the channel index value with the highest priority.

7. The method according to claim 4, wherein The specific calculation method of the second flip weighted value is as follows: Among them, Fwv Π (i) is the flip weight value of the i-th combination, is the channel reliability value calculated by the modified Gaussian approximation method corresponding to the channel index i1, is the channel reliability value calculated by the modified Gaussian approximation method for the channel index i2, i1, i2∈{1,2,...,N}, i∈{1,2,...,K+m}, α∈[0,1], and the corresponding channel index combination and sorting is Idx two .

8. The method according to claim 7, wherein The specific confirmation method of the second bit index set is as follows: The second flip weighted value set Fwv Π Arrange in ascending order to obtain Fwv′ Π , and get the corresponding channel index value sort Idx′ two ; Assume that the weighted values ​​of the two groups of information bit flips are and If the weighted values ​​of the two are close, Therefore, the priority sorting of the two information bit sets Φ1 and Φ2 requires comprehensive consideration of the channel index values. Here, the sum of the channel index values ​​in the combination is comprehensively considered. The sum of the channel index values ​​for Φ1 is: in, and are two channel index values ​​in the channel index set Φ1, and the sum of the channel index values ​​of Φ2 is: in, and are two channel index values ​​in the channel index set Φ2, so and The sum of Φ1 and Φ2 is compared to obtain the channel index set and sorting, that is, if Then sort the channel index set Φ1 before Φ2, otherwise sort the channel index Φ2 before Φ1. This update operation is performed on Idx′ two Until all the sorting is carried out according to the flip weight value and the channel index value, the second bit index set is obtained.

9. A communication system, characterized in that: The system includes an information bit generation module, a cyclic redundancy check encoding module, a polarization encoding module, a modulation module, and a decoding end, wherein the information bit generation module is used to randomly generate information bits, and the cyclic redundancy check encoding module, the polarization encoding module, the modulation module, and the decoding end sequentially perform cyclic redundancy check encoding, polarization encoding, binary phase shift keying modulation, and decoding on the information bits, wherein the decoding end decodes the information bits output by the decoding end based on the method according to any one of claims 1 to 8.

10. A computer-readable medium storing a computer program, characterized in that: The computer program can be read to implement the method according to any one of claims 1 to 8.

Images