Display device, photoelectric conversion device, and electronic equipment

Abstract

The invention provides a display device, a photoelectric conversion device, and an electronic apparatus. The display device includes: a substrate; a plurality of pixels arranged in a display area on the substrate; and a control circuit configured to control a signal to be supplied to the pixel, in which the display area includes a first area and a second area surrounding the first area, a part of the first area is provided as a third area whose position is changeable, the signal to be supplied to the pixel is controlled, and the second area surrounds the first area. The pixel is configured such that a display resolution of a fourth region, which is not the third region, of the first region becomes lower than a display resolution of the third region, and a display resolution of the second region is set to a value equal to or lower than the display resolution of the fourth region by a circuit configuration of the pixel.

Description

Technical Field

[0001] This invention relates to display devices, photoelectric conversion devices, and electronic equipment. Background Technology

[0002] Display devices, each equipped with either liquid crystal display elements or organic EL display elements, exist for various purposes, including large displays such as digital signage, medium-sized displays such as notebook computers or smartphones, and small displays used in XR devices. To improve display quality, the number of pixels in all display devices has been increased. However, this increase in pixel count leads to increased power consumption or an increased workload (operational load) on processing the displayed data. To address these issues, display control technologies have been actively developed.

[0003] Japanese Patent Application Publication No. 2013-117553 describes a display device comprising display elements arranged in two dimensions, wherein the display elements in the peripheral portion are larger than the display elements in the center, in order to reduce the number of pixels relative to the display area.

[0004] Japanese Patent Application Publication No. 2013-117553 describes a technique for reducing the number of pixels. Reducing the number of pixels can reduce the amount of display data (the data ultimately used for display). However, there is room for improvement in reducing the amount of data in areas with small pixels. Summary of the Invention

[0005] The present invention was made in view of the aforementioned problems, and the present invention provides a display device that further reduces the amount of display data (the data ultimately used for display).

[0006] The display device according to the present invention includes: a substrate; a plurality of pixels disposed in a display area on the substrate; and a control circuit configured to control a signal to be supplied to the pixels, wherein the display area includes a first area and a second area surrounding the first area, a portion of the first area is configured as a third area whose position is changeable, the signal to be supplied to the pixels is controlled such that the display resolution of a fourth area in the first area that is not the third area becomes lower than the display resolution of the third area, and the display resolution of the second area is set to a value equal to or lower than the display resolution of the fourth area by means of a circuit configuration of the pixels.

[0007] Other features of the invention will become clear from the following description of exemplary embodiments with reference to the accompanying drawings. Attached Figure Description

[0008] Figure 1 This is a schematic diagram illustrating an example of a display device;

[0009] Figure 2A and Figure 2B Each is a schematic diagram illustrating an example of a display area;

[0010] Figure 3A This is a schematic diagram illustrating an example of the arrangement of light-emitting elements;

[0011] Figure 3B This is a schematic diagram illustrating an example of the arrangement of sub-pixel circuits;

[0012] Figure 3C This is a schematic diagram illustrating an example of the arrangement of subpixels;

[0013] Figure 4A and Figure 4B Each is a circuit diagram illustrating an example of a basic configuration of a sub-pixel circuit;

[0014] Figure 5 This is a circuit diagram illustrating an example configuration of subpixel circuitry in a high-definition displayable area;

[0015] Figure 6 This is a circuit diagram illustrating an example configuration of subpixel circuitry in a low-resolution display area;

[0016] Figure 7 This is a circuit diagram illustrating a modified example of the configuration of sub-pixel circuitry in a low-resolution display area;

[0017] Figure 8A and Figure 8B Each is a timing diagram illustrating an example of writing and emitting light;

[0018] Figure 9A and Figure 9B Each is a circuit diagram illustrating an example configuration of a vertical scanning circuit;

[0019] Figure 10 This is a timing diagram illustrating an example of resolution control signals and scan control signals;

[0020] Figure 11 This is a schematic diagram showing a modified example of the display area;

[0021] Figure 12 This is a circuit diagram illustrating an example configuration of subpixel circuitry in a low-resolution display area;

[0022] Figure 13 This is a circuit diagram illustrating a modified example of the configuration of sub-pixel circuitry in a low-resolution display area;

[0023] Figure 14 This is a circuit diagram illustrating a modified example of the configuration of sub-pixel circuitry in a low-resolution display area;

[0024] Figure 15 This is a circuit diagram illustrating a modified example of the configuration of sub-pixel circuitry in a low-resolution display area;

[0025] Figure 16 This is a circuit diagram illustrating a modified example of the configuration of sub-pixel circuitry in a low-resolution display area;

[0026] Figure 17 This is a schematic diagram illustrating an example of a cross-section of a portion of a display device;

[0027] Figure 18 This is a schematic diagram showing an example of a cross-section of a pixel;

[0028] Figure 19 This is a schematic diagram illustrating an example of a display component;

[0029] Figure 20A This is a schematic diagram illustrating an example of a camera device;

[0030] Figure 20B This is a schematic diagram illustrating an example of electronic equipment;

[0031] Figure 21A and Figure 21B Each is a schematic diagram illustrating an example of an image display device;

[0032] Figure 22A and Figure 22B Each is a schematic diagram illustrating an example of eyeglasses; and

[0033] Figure 23A and Figure 23B Each is a schematic diagram illustrating an example of an image viewing device. Detailed Implementation

[0034] Example 1

[0035] Embodiment 1 of the present invention will now be described. Figure 1 This is a schematic diagram illustrating an example of a display device according to Embodiment 1. The display device 100 includes a substrate 101, a pixel array 102, a vertical scanning circuit 103, a signal output circuit 104, and a control circuit 105. The pixel array 102, the vertical scanning circuit 103, the signal output circuit 104, and the control circuit 105 are disposed on the substrate 101.

[0036] The pixel array 102 has a plurality of pixels 106. The area including the plurality of pixels 106 arranged therein serves as a display area for displaying an image. Each pixel 106 has a sub-pixel 107A for displaying red (R), a sub-pixel 107B for displaying green (G), and a sub-pixel 107C for displaying blue (B). Hereinafter, sub-pixels 107A to 107C are each referred to as sub-pixel 107 without distinction. Incidentally, each pixel 106 may have three or more sub-pixels 107. The size of each pixel 106 and the size of each sub-pixel 107 are not particularly limited. In Embodiment 1, the size of a pixel 106 and the size of a sub-pixel 107 vary depending on their position in the display area. Details will be described later.

[0037] The vertical scan circuit 103 and multiple sub-pixels 107 are interconnected via multiple scan lines 108 (vertical scan signal lines). The vertical scan circuit 103 switches between scan lines 108 for supplying scan signals (vertical scan signals) and scans (sequentially selects) the multiple sub-pixels 107 in a vertical direction (from top to bottom or from bottom to top). For example, the vertical scan circuit 103 is configured using a shift register for sequentially shifting (transmitting) a start pulse in synchronization with a clock pulse. The scan lines 108 include light emission control lines and write control lines, which will be described later.

[0038] The signal output circuit 104 and multiple sub-pixels 107 are interconnected via multiple signal lines 109 (horizontal scan signal lines). The signal output circuit 104 supplies a signal (horizontal scan signal or voltage) based on image data to the multiple signal lines 109, thereby supplying the signal to the sub-pixel 107 selected by the vertical scan circuit 103. As a result, the sub-pixel 107 selected by the vertical scan circuit 103 emits light according to the brightness of the image data. By sequentially emitting light from multiple sub-pixels 107 during scanning, an image is displayed.

[0039] The control circuit 105 controls the signals to be supplied to each pixel via the vertical scanning circuit 103 and the signal output circuit 104 based on image data, etc.

[0040] Figure 2A and Figure 2BEach is a schematic diagram illustrating an example of a display area according to Embodiment 1. The display area 200 includes a high-definition displayable area 201 and a low-definition display area 202 surrounding the high-definition displayable area 201. In Embodiment 1, a portion of the high-definition displayable area 201 is designated as a high-definition display area 203. For example, the area in which the user's gaze is directed when viewing the image can be designated as the high-definition display area 203 based on the detection result of a gaze detection unit used to detect the user's gaze. An area displaying a predetermined object, such as a human face or a traffic sign, in an image (video image) captured by the display unit (imaging unit) can be designated as the high-definition display area 203. An area designated based on an area designation unit having information specified by the image creator or user can be designated as the high-definition display area 203. Figure 2A As shown, a high-definition display area 203 can be set. Alternatively, as... Figure 2B As shown, multiple high-definition display areas 203 can be set. The position, size, and number of high-definition display areas 203 can be changed.

[0041] Incidentally, the high-definition display area 203 can be located at the display device 100 (control circuit 105), or it can be located at an external device of the display device 100 (e.g., an external device for generating image data to be displayed). A gaze detection unit, a camera unit, or a region designation unit can be located at the display device 100, or they can be external devices of the display device 100. There are no particular limitations on the method used to detect the gaze. For example, the gaze can be detected based on the positional relationship between the pupil and the Purkinje image in an image obtained by photographing the user's eyes. There are also no particular limitations on the method used to detect a predetermined object from the photographed image. For example, the predetermined object can be detected by template matching. Alternatively, the predetermined object can be detected by using a discrimination circuit with a learned model. The discrimination circuit, for example, assumes image data as input and coordinate data indicating the region of the predetermined object as output.

[0042] In embodiment 1, each sub-pixel 107 has one or more light-emitting elements. Figure 3A This is a schematic diagram illustrating an example of the arrangement of the light-emitting elements according to Embodiment 1. Figure 3AAs shown, a plurality of light-emitting elements 301 are uniformly arranged in a two-dimensional (matrix) manner. The light-emitting elements 301 are, for example, organic light-emitting elements. The plurality of light-emitting elements 301 include light-emitting elements for emitting red (R) light, light-emitting elements for emitting green (G) light, and light-emitting elements for emitting blue (B) light. A sub-pixel 107A of R has one or more light-emitting elements of R, and a sub-pixel 107B of G has one or more light-emitting elements of G, and a sub-pixel 107C of B has one or more light-emitting elements of B. With respect to each of R, G, and B, the size of the light-emitting region of the light-emitting element 301 is substantially equal to each other. The size of the light-emitting region of the light-emitting element 301 in R, G, and B can be set to be equal or can be set to be different. In each sub-pixel, it is more preferable to combine the light-emitting regions. In this document, the size of the light-emitting region can be the area of ​​the light-emitting region, and the area of ​​the light-emitting region can be, for example, the size of the opening in the pixel isolation layer. Furthermore, "substantially equal" includes "may vary within the range of manufacturing tolerances" and includes "substantially equal".

[0043] Figure 3BThis is a schematic diagram illustrating an example arrangement of the sub-pixel circuits (circuits of sub-pixel 107) according to Embodiment 1. In the high-definition displayable area 201, small sub-pixel circuits 311 are used to achieve high-definition display. In the low-definition display area 202, only the ability to perform low-definition display is necessary. For this purpose, large sub-pixel circuits 312 are used. The high-definition displayable area 201, including the small sub-pixel circuits arranged therein, is an area where the density of the sub-pixel circuits is higher than the density of the low-definition display area 202, and is an area where the spacing of the write transistors, described later, is smaller than the spacing of the low-definition display area 202. The density of the sub-pixel circuits can be estimated, for example, by the number of transistors per area in a planar view, and can also be estimated by the number of write transistors. The spacing of the write transistors can be the spacing in either the row direction or the column direction of the array direction of the light-emitting elements 301. The low-resolution display area 202, including the large sub-pixel circuits arranged therein, is a region where the density of the sub-pixel circuits is lower than that of the high-resolution display area 201, and where the spacing of the write transistors is larger than that of the high-resolution display area 201. The number of light-emitting elements 301 in the sub-pixel circuits 312 of the low-resolution display area 202 is greater than the number of light-emitting elements 301 in the sub-pixel circuits 311 of the high-resolution display area 201. In other words, when the number of light-emitting elements 301 connected to a sub-pixel circuit in the high-resolution display area is 1, the number of light-emitting elements 301 connected to a sub-pixel circuit in the low-resolution display area is 2 or more. Incidentally, it is only necessary that there exists a region where the number of light-emitting elements 301 in the sub-pixel circuits 312 of the low-resolution display area 202 is greater than the number of light-emitting elements 301 in the sub-pixel circuits 311 of the high-resolution display area 201. There may also be a region where the number of light-emitting elements 301 in the sub-pixel circuit 312 of the low-definition display area 202 is equal to the number of light-emitting elements 301 in the sub-pixel circuit 311 of the high-definition display area 201.

[0044] Figure 3CThis is a schematic diagram illustrating an example of the arrangement of subpixels in a displayed image according to Embodiment 1. In the low-resolution display area 202, a large subpixel 322 corresponding to the large subpixel circuit 312 is displayed. The control circuit 105 controls the supply of a signal (horizontal scan signal or voltage) corresponding to the image data to the adjacent subpixel circuit 311 individually in the high-resolution display area 203. For this purpose, a small subpixel 323 corresponding to the small subpixel circuit 311 is displayed. Then, the control circuit 105 controls the supply of the same signal (horizontal scan signal or voltage) corresponding to the image data to the adjacent subpixel circuit 311 in the area of ​​the high-resolution displayable area 201 that is not the high-resolution display area 203 (non-high-resolution display area 204). For this purpose, multiple subpixels corresponding to multiple subpixel circuits 311 are displayed as if they were a single subpixel. Incidentally, the size of the light-emitting area of ​​the subpixel in the low-resolution display area 202 may be the same as or different from the size of the light-emitting area in the area of ​​the non-high-resolution display area 204 that is displayed as a single subpixel. The size of the luminous area of ​​a subpixel in the low-resolution display area 202 can be larger than the size of the luminous area in the area displayed as a single subpixel in the non-high-resolution display area 204.

[0045] For reference Figures 3A to 3C The description is given by focusing on subpixel 107. However, each pixel 106 has multiple subpixels 107. Therefore, the same description as that for subpixel 107 also applies to pixel 106.

[0046] Therefore, by controlling the signal (horizontal scan signal or voltage) supplied to the pixels, the display resolution of the non-high-definition display area 204 is made lower than the display resolution of the high-definition display area 203. Then, using the pixel circuit configuration, the display resolution of the low-definition display area 202 is made equal to or lower than the display resolution of the non-high-definition display area 204. By dividing the display area into three or more regions and determining the display resolution of each region through circuit configuration and signal control, a display device can be provided that further reduces the amount of display data (the data ultimately used for display).

[0047] Figure 4A This is a circuit diagram illustrating an example of the basic configuration of sub-pixel 107 (sub-pixel circuit) according to Embodiment 1. Figure 4A As shown, sub-pixel 107 has a light-emitting element 301, a driving transistor 401, a writing transistor 402, a light-emitting control transistor 403, a first capacitor element 404, and a second capacitor element 405. Incidentally, the total number of transistors and capacitor elements and the combination of the conductivity types of the individual transistors are strictly speaking only an example and are not limited to this configuration.

[0048] One of the source and drain of the driving transistor 401 (the drain in this document) is connected to the first electrode of the light-emitting element 301. The other of the source and drain of the driving transistor 401 (the source in this document) is connected to one of the source and drain of the light-emitting control transistor 403 (the drain in this document). The other of the source and drain of the light-emitting control transistor 403 (the source in this document) is connected to a node supplied with a power supply voltage. Figure 4A In this configuration, the source of the light-emitting control transistor 403 is connected to the first power supply terminal 406 (hereinafter Vdd). The light-emitting control transistor 403 can be used as a switch to connect the source of the driving transistor 401 to Vdd 406. The second electrode of the light-emitting element 301 is connected to the second power supply terminal 407 (hereinafter Vss). One of the sources and drains of the write transistor 402 (hereinafter referred to as the source) is connected to the gate of the driving transistor 401, and the other of the sources and drains of the write transistor 402 (hereinafter referred to as the drain) is connected to the signal line 109. The write transistor 402 can be used as a switch to connect the gate of the driving transistor 401 to the signal line 109.

[0049] The gate of write transistor 402 is connected to write control line 408 in scan line 108. The gate of light-emitting control transistor 403 is connected to light-emitting control line 409 in scan line 108.

[0050] The first capacitor element 404 is connected between the gate of the driving transistor 401 and one of its source and drain terminals (referred to as the source in this document). The second capacitor element 405 is connected between one of the source and drain terminals of the driving transistor 401 (referred to as the source in this document) and Vdd 406. Both the first capacitor element 404 and the second capacitor element 405 are connected to the source of the driving transistor 401. The first capacitor element 404 and the second capacitor element 405 can each be a parasitic capacitance or a capacitor having a MIM (metal-insulator-metal) structure.

[0051] The following is an overview of the operation related to the light-emitting period of the light-emitting element 301. The driving transistor 401 supplies current from Vdd 406 to the light-emitting element 301, causing it to emit light. For example, the driving transistor 401 supplies current to the light-emitting element 301 corresponding to the voltage (horizontal scan signal) possessed by the signal line 109. Thus, the light-emitting element 301 emits light by current driving.

[0052] When the light-emitting element 301 emits light, the write transistor 402 responds to the scan signal (write control signal) to be applied to the gate from the vertical scan circuit 103 via the write control line 408 and is turned on. As a result, the write transistor 402 writes the voltage (horizontal scan signal) to be supplied from the signal output circuit 104 via the signal line 109 to the sub-pixel 107. The written voltage is applied to the gate of the drive transistor 401. The voltage (horizontal scan signal) supplied from the signal output circuit 104 will be described as Vsig below.

[0053] The light-emitting control transistor 403 responds to the scan signal (light-emitting control signal) supplied from the vertical scan circuit 103 via the light-emitting control line 409 and is in an on state. This allows current to be supplied from Vdd 406 to the drive transistor 401. As a result, it becomes possible to make the light-emitting element 301 emit light by driving the transistor 401. That is, the light-emitting control transistor 403 functions as a transistor for controlling the light-emitting and non-emitting states of the light-emitting element 301. Therefore, the switching operation of the light-emitting control transistor 403 can control the ratio of the light-emitting period and the non-emitting period of the light-emitting element 301. As a result, afterimages associated with the emission of the sub-pixel 107 can be reduced during the light-emitting period within one frame, which can improve image quality, especially when displaying moving images. It is also acceptable to control the ratio of light emission and non-emitting during one frame, thereby achieving so-called duty cycle control, or controlling the timing of light emission.

[0054] The brightness of the light-emitting element 301 can be changed by altering the amount of current flowing through the driving transistor 401. The capacitance between the first electrode (anode) and the second electrode (cathode) of the light-emitting element 301 is charged to a predetermined potential. A current corresponding to the potential difference flows through the light-emitting element 301. As a result, the light-emitting element 301 emits light with a predetermined brightness.

[0055] The threshold voltage of the driving transistor 401 may vary among the sub-pixels 107 due to manufacturing variations. When the same Vsig is written for multiple sub-pixels 107 of the same emission color, the amount of current flowing through the driving transistor 401 is different for each sub-pixel 107, causing variations in emission. Therefore, a so-called threshold correction operation is performed: before applying Vsig to the gate of the driving transistor 401, the threshold voltage of the driving transistor 401 is held in the first capacitor element 404 between the gate and source of the driving transistor 401. The threshold correction operation can reduce the variation in the amount of current in the driving transistor 401 in each sub-pixel 107.

[0056] Incidentally, the basic configuration of subpixel 107 can be... Figure 4B The configuration. In Figure 4BA reset transistor 410 is added. One of the source and drain of the reset transistor 410 is connected to the first electrode of the light-emitting element 301, and the other of the source and drain of the reset transistor 410 is connected to the third power supply terminal 411. The third power supply terminal 411 may be at the same potential as the second power supply terminal 407, or it may have the same potential as the second power supply terminal 407, or it may be grounded. The gate of the reset transistor 410 is connected to the vertical scanning circuit 103, so that the control signal from the vertical scanning circuit 103 controls the switching operation (ON (conducting) / OFF (not conducting)) of the reset transistor 410. When the reset transistor 410 is in the ON state, current does not flow through the light-emitting element 301, so the light-emitting element 301 does not emit light. Therefore, setting the reset transistor 410 can suppress unnecessary current flowing through the light-emitting element 301, which can suppress the reduction of the contrast of the displayed image.

[0057] Figure 5 This is a circuit diagram illustrating an example configuration of a small sub-pixel circuit 311 in a high-definition displayable area 201. Figure 5 The diagram shows a total of four sub-pixel circuits 311, consisting of two in the horizontal direction (row direction) and two in the vertical direction (column direction). Figure 5 In the original text, some components of the sub-pixel circuit 311 (such as the first capacitor element 404 and the second capacitor element 405) are omitted.

[0058] There is no particular limitation on the number of light-emitting elements 301 possessed by the sub-pixel circuit 311. Figure 5 In this circuit, a sub-pixel circuit 311 has a light-emitting element 301. For this purpose, signal lines 109a to 109d are (indirectly) connected to their respective adjacent light-emitting elements 301a to 301d. Signal line 109a is connected to the drain of the write transistor 402a corresponding to the light-emitting element 301a, and signal line 109b is connected to the drain of the write transistor 402b corresponding to the light-emitting element 301b. Similarly, signal line 109c is connected to the drain of the write transistor 402c corresponding to the light-emitting element 301c, and signal line 109d is connected to the drain of the write transistor 402d corresponding to the light-emitting element 301d. When signal lines are connected to transistors, once an electrical connection is established, connections can be made via other components. This also applies to other connections described below.

[0059] Incidentally, for ease of understanding, all signal lines 109a to 109d are described separately. However, light-emitting elements 301a and 301c are light-emitting elements 301 in the same column. Therefore, signal lines 109a and 109c connected to them are the same signal line 109. Similarly, light-emitting elements 301b and 301d are light-emitting elements 301 in the same column. Therefore, signal lines 109b and 109d connected to them are the same signal line 109.

[0060] exist Figure 5 In this configuration, two light-emitting control lines, 409ab and 409cd, are used. Light-emitting control line 409ab is (indirectly) connected to light-emitting elements 301a and 301b in the same row, and light-emitting control line 409cd is (indirectly) connected to light-emitting elements 301c and 301d in the same row. Light-emitting control line 409ab is connected to the gates of light-emitting control transistors 403a and 403b, which correspond to light-emitting elements 301a and 301b, respectively. Light-emitting control line 409cd is connected to the gates of light-emitting control transistors 403c and 403d, which correspond to light-emitting elements 301c and 301d, respectively.

[0061] exist Figure 5 In this configuration, two write control lines, 408ab and 408cd, are used. Write control line 408ab is indirectly connected to light-emitting elements 301a and 301b in the same row, and write control line 408cd is indirectly connected to light-emitting elements 301c and 301d in the same row. Write control line 408ab is connected to the gates of write transistors 402a and 402b, which correspond to light-emitting elements 301a and 301b, respectively. Write control line 408cd is connected to the gates of write transistors 402c and 402d, which correspond to light-emitting elements 301c and 301d, respectively.

[0062] The source of write transistor 402a is connected to the gate of drive transistor 401a corresponding to light-emitting element 301a, and the source of write transistor 402b is connected to the gate of drive transistor 401b corresponding to light-emitting element 301b. Similarly, the source of write transistor 402c is connected to the gate of drive transistor 401c corresponding to light-emitting element 301c. Then, the source of write transistor 402d is connected to the gate of drive transistor 401d corresponding to light-emitting element 301d.

[0063] Figure 6 This is a circuit diagram illustrating an example configuration of a large sub-pixel circuit 312 in a low-resolution display area 202. The number of light-emitting elements 301 possessed by the sub-pixel circuit 312 is not particularly limited. Figure 6 In this circuit, a sub-pixel circuit 312 has four light-emitting elements 301a to 301d that are close to each other. Figure 6In this context, one sub-pixel circuit 312 has the same size as the total of four sub-pixel circuits 311, two in the horizontal direction and two in the vertical direction, in the high-definition displayable area 201.

[0064] exist Figure 6 In, such as Figure 5 As in the example, two light-emitting control lines 409ab and 409cd are used. Incidentally, there is no particular limitation on the number of light-emitting control lines 409 possessed by the sub-pixel circuit 312. For example, one light-emitting control line 409 connected (indirectly) to the light-emitting elements 301a to 301d can be used. With this configuration, the light-emitting elements 301a to 301d can be lit simultaneously. Furthermore, by reducing the number of light-emitting control lines 409, power consumption can be reduced. Incidentally, although described in detail later, even when using two light-emitting control lines 409ab and 409cd, the light-emitting elements 301a to 301d can be lit simultaneously by the configuration of the vertical scan circuit 103 or by the switching operation in the vertical scan circuit 103.

[0065] exist Figure 6 In this configuration, a signal line 109 is indirectly connected to light-emitting elements 301a to 301d. Figure 6 In this design, a write transistor 402 is used. Therefore, the number of write control lines 408 used is also one, and the same write control line 408 is (indirectly) connected to the light-emitting elements 301a to 301d. Signal line 109 is connected to the drain of the write transistor 402, and the source of the write transistor 402 is connected to the gate of the drive transistors 401a to 401d corresponding to the light-emitting elements 301a to 301d, respectively. By reducing the number of signal lines 109 and write control lines 408, power consumption can be reduced.

[0066] Figure 7 This is a circuit diagram showing a modified example of the configuration of the large sub-pixel circuitry 312 in the low-resolution display area 202. Figure 7 In, such as Figure 6 As shown, one sub-pixel circuit 312 has the same size as the four sub-pixel circuits 311 in the high-definition displayable area 201, consisting of two horizontally × two vertically. Furthermore, in Figure 7 In, such as Figure 6 As in the example, two light-emitting control lines, 409ab and 409cd, are used.

[0067] exist Figure 7 In, such as Figure 6 As in the example, a signal line 109 is (indirectly) connected to the light-emitting elements 301a to 301d. However, the destination of the signal line 109 is... Figure 6 and Figure 7 They are different. In Figure 7 In, such as Figure 5 As in the example, two write control lines 408ab and 408cd and four write transistors 402a to 402d are used. Signal line 109 is connected to the drain of write transistors 402a to 402d.

[0068] Figure 5 and Figure 7 The number of write transistors 402, the number of light-emitting control transistors 403, the number of write control lines 408, and the number of light-emitting control lines 409 are identical to each other. By making the configuration of the large sub-pixel circuits 312 in the low-resolution display area 202 more similar to the configuration of the small sub-pixel circuits 311 in the high-resolution display area 201, the characteristics of the sub-pixel circuits 312 can be made more similar to those of the sub-pixel circuits 311. As a result, the change in display characteristics at the boundary between the low-resolution display area 202 and the high-resolution display area 201 can be mitigated.

[0069] Incidentally, among the multiple sub-pixel circuits 312 in the low-resolution display area 202, the signal lines 109 to be connected to the sub-pixel circuits 311 in the high-resolution display area 201 can be used in each sub-pixel circuit 312 arranged in a direction perpendicular to the high-resolution display area 201 (upward or downward). The sub-pixel circuits 312 arranged in a direction perpendicular to the high-resolution display area 201 can be understood as sub-pixel circuits 312 located horizontally within the area of ​​the high-resolution display area 201.

[0070] Therefore, the sub-pixel circuits 312 arranged in a direction perpendicular to the high-definition displayable area 201 can be configured as follows: Figure 5 In this configuration, the same signal (Vsig) corresponding to the image data is supplied to the light-emitting elements 301a to 301d of the sub-pixel circuit 312. This is achieved by configuring the sub-pixel circuit 312, which is arranged in a direction perpendicular to the high-definition displayable area 201, to... Figure 5 This configuration can reduce variations in the length (load capacity) of the signal lines 109 within the horizontal region of the high-definition displayable area 201. Furthermore, it can reduce variations in display characteristics within the high-definition displayable area 201, thereby improving the quality of the displayed image.

[0071] Figure 8A This is a timing diagram illustrating an example of timing for supplying write control signals and timing for supplying light emission control signals. Figure 8A This is a timing diagram corresponding to the sub-pixel circuits 311 in the multiple sub-pixel circuits 311 in the non-high-definition display area 204 that do not have a high-definition display area 203 in the row direction. Figure 8AIn this context, it is assumed that the same signal (Vsig) corresponding to the image data is supplied to the sub-pixel circuit 311 in the k-th row and the sub-pixel circuit 311 in the (k+1)-th row. Figure 8A During the same timing, write control signals are supplied to the sub-pixel circuit 311 of the k-th row and the sub-pixel circuit 311 of the (k+1)-th row.

[0072] Therefore, at the same timing, write control signals are supplied to the light-emitting elements 301 of multiple rows where high-definition display areas 203 are not present in the row direction. Similarly, the areas in the low-definition display areas 202 where high-definition display areas 203 are not present in the row direction can be controlled. By doing so, the supply of write control signals can be accelerated, and the decrease in frame rate due to the increase in the number of pixels can be suppressed. As a result, a higher frame rate becomes achievable.

[0073] Incidentally, light-emitting control signals can be supplied to multiple rows of light-emitting elements 301 that do not have a high-definition display area 203 in the horizontal direction at the same timing (time period). This also achieves a higher frame rate.

[0074] Figure 8B This is a timing diagram illustrating another example of the timing for supplying the write control signal and the timing for supplying the light control signal. Figure 8B This is a timing diagram corresponding to the sub-pixel circuit 311 of the multiple sub-pixel circuits 311 of the non-high-definition display area 204, which contains the sub-pixel circuit 311 of the high-definition display area 203 in the row direction. Figure 8B In this context, it is assumed that the same signal (Vsig) corresponding to the image data is supplied to the sub-pixel circuit 311 in the k-th row and the sub-pixel circuit 311 in the (k+1)-th row. When a high-definition display area 203 exists in the row direction, in order to perform high-definition display in the high-definition display area 203, the sub-pixel circuit 311 needs to be selected one row at a time. Therefore, in Figure 8B In this process, write control signals are supplied to the sub-pixel circuit 311 of row k and row k+1 at different timings. This also applies to the light emission control signal.

[0075] Figure 9A and Figure 9B Each of the above is a circuit diagram illustrating an example configuration of the vertical scan circuit 103. The vertical scan circuit 103 has a shift register 901 between the write control lines 408 for each row, allowing selection of multiple light-emitting elements 301 row by row. Furthermore, the vertical scan circuit 103 has multiple switch groups, each including switches 902 to 907. Each switch in switches 902 to 907 can, for example, use an NMOS transistor.

[0076] For rows where the high-definition display area 203 does not exist, such as Figure 9A As shown, control circuit 105 turns switches 902 to 904 on (conducting) and turns switches 905 to 907 off (not conducting). Figure 9A In this configuration, the write control line 408 of row k is not connected to the write control line 408 of row k+1 via shift register 901. Therefore, write control signals can be supplied to the write control lines 408 of row k and k+1 at the same timing.

[0077] For rows where there is a high-definition display area 203, such as Figure 9B As shown, control circuit 105 causes switches 902 to 904 to open (disconnect) and switches 905 to 907 to close (connect). Figure 9B In the process, after the write control signal is supplied to the write control line 408 of the kth row, the write control signal is supplied to the write control line 408 of the k+1th row at a timing delayed by the shift register 901.

[0078] Control circuit 105 uses, for example, a resolution control signal to control switches 902 to 907, which becomes on in rows where high-definition display areas 203 are present and off in rows where high-definition display areas 203 are not present. Incidentally, as described above, the setting of high-definition display areas 203 can be performed at the display device 100 (control circuit 105) or at an external device of the display device 100 (e.g., an external device for generating image data to be displayed). Control circuit 105 can analyze the image data to be displayed to detect or determine the high-definition display area, or obtain information about the high-definition display area from the metadata of the image data, or determine the high-definition display area based on information about the user's gaze.

[0079] Figure 10 This is a timing diagram showing an example of the waveforms of the resolution control signal and the scan control signal. (Example) Figure 10 As shown, in rows where there is no high-definition display area 203, scanning control signals are supplied sequentially in a multi-row manner, and in rows where there is a high-definition display area 203, scanning control signals are supplied sequentially row by row.

[0080] Incidentally, such as Figure 11As shown, the low-resolution display area 202 can be divided into an intermediate-resolution display area 1101 and a low-resolution display area 1102 surrounding the intermediate-resolution display area 1101. Through the circuit configuration of the pixels, the display resolution of the low-resolution display area 1102 is lower than that of the intermediate-resolution display area 1101. For example, each sub-pixel in the high-resolution display area 201 has one light-emitting element 301, and each sub-pixel in the intermediate-resolution display area 1101 has a total of four light-emitting elements 301, two horizontally × two vertically. Then, each sub-pixel in the low-resolution display area 1102 has a total of 16 light-emitting elements 301, four horizontally × four vertically.

[0081] Figure 12 This is a circuit diagram illustrating an example configuration of the sub-pixel circuitry in the low-resolution display area 1102. Besides the number of light-emitting elements 301... Figure 6 Besides the differences, Figure 12 and Figure 6 Basically the same. Figure 12 In this configuration, a signal line 109 is indirectly connected to 16 light-emitting elements 301. Figure 12 In, such as Figure 6 As in the example, a write transistor 402 is used. Signal line 109 is connected to the drain of write transistor 402, and the source of write transistor 402 is connected to 16 drive transistors 401 corresponding to 16 light-emitting elements 301 respectively.

[0082] Figure 13 This is a circuit diagram illustrating a modified example of the configuration of sub-pixel circuitry in the low-resolution display area 1102. Similarly, in Figure 13 In this configuration, a signal line 109 is indirectly connected to 16 light-emitting elements 301. Figure 13 In this configuration, two write transistors 402 are used. Signal line 109 is connected to the drain of each of the two write transistors 402. The source of one of the two write transistors 402 is connected to eight drive transistors 401 corresponding to the eight light-emitting elements 301 in the k-th and k+1-th rows, respectively. The source of the other write transistor 402 is connected to eight drive transistors 401 corresponding to the eight light-emitting elements 301 in the k+2-th and k+3-th rows, respectively.

[0083] Figure 14 This is a circuit diagram illustrating a modified example of the configuration of sub-pixel circuitry in the low-resolution display area 1102. Similarly, in Figure 14 In this configuration, a signal line 109 is indirectly connected to 16 light-emitting elements 301. Figure 14In this configuration, four write transistors 402 are used. Signal line 109 is connected to the drain of each of the four write transistors 402. The source of the first write transistor 402 is connected to the four driving transistors 401 corresponding to the four light-emitting elements 301 in the k-th row. The source of the second write transistor 402 is connected to the four driving transistors 401 corresponding to the four light-emitting elements 301 in the (k+1)-th row. The source of the third write transistor 402 is connected to the four driving transistors 401 corresponding to the four light-emitting elements 301 in the (k+2)-th row. The source of the fourth write transistor 402 is connected to the four driving transistors 401 corresponding to the four light-emitting elements 301 in the (k+3)-th row.

[0084] Figure 15 This is a circuit diagram illustrating a modified example of the configuration of sub-pixel circuitry in the low-resolution display area 1102. Similarly, in Figure 15 In this configuration, a signal line 109 is indirectly connected to 16 light-emitting elements 301. Figure 15 In this configuration, 16 write transistors 402 are used, each corresponding to one of the 16 light-emitting elements 301. Signal lines 109 are connected to the drains of the 16 write transistors 402.

[0085] Figure 16 This is a circuit diagram illustrating a modified example of the configuration of sub-pixel circuitry in the low-resolution display area 1102. Figure 16 In this configuration, two signal lines, 109-1 and 109-2, are used for 16 light-emitting elements. Figure 16 In this configuration, 16 write transistors 402 are used, each corresponding to one of the 16 light-emitting elements 301. Signal line 109-1 is connected to the drain of each of the eight write transistors 402 corresponding to the eight light-emitting elements 301 in the j-th and j+1-th columns, respectively. Signal line 109-2 is connected to the drain of each of the eight write transistors 402 corresponding to the eight light-emitting elements 301 in the j+2-th and j+3-th columns, respectively.

[0086] In other embodiments of the invention, a display device having a plurality of pixels arranged along row and column directions has a first set of signal lines and a second set of signal lines spaced at intervals greater than those of the first set of signal lines, and may also have a first set of control lines and a second set of control lines spaced at intervals greater than those of the first set of control lines. The display device has a display area, including a first area electrically connected to the first set of signal lines and the first set of control lines, and a second area connected to at least one of the second set of signal lines and the second set of control lines. The first area has a third area for receiving data with a high display resolution from the control unit (control circuit) of the display device, and a fourth area for receiving data with a display resolution lower than that of the third area. The third area may be set based on external information (e.g., information from user gaze detection) and will not be retained in a given location. Various embodiments of this specification may be combined unless they depart from the spirit of the invention.

[0087] Organic light-emitting elements

[0088] Next, an example of an organic light-emitting element that can be used in a display device according to Embodiment 1 will be described.

[0089] In the display device according to Embodiment 1, the organic light-emitting element has a first electrode, a second electrode, and an organic compound layer disposed between the electrodes. One of the first electrode and the second electrode is an anode, and the other is a cathode. In Embodiment 1, the organic compound layer can be a single layer or a laminate comprising multiple layers, as long as it has a light-emitting layer. In this context, when the organic compound layer is a laminate comprising multiple layers, in addition to the light-emitting layer, the organic compound layer can have a hole injection layer, a hole transport layer, an electron blocking layer, a hole / exciton blocking layer, an electron transport layer, and an electron injection layer, etc. Furthermore, the light-emitting layer can be a single layer or a laminate comprising multiple layers. When the light-emitting layer comprises multiple layers, a charge-generating layer can be included between the light-emitting layers. The charge-generating layer can include compounds with a lower LUMO than the LUMO of the hole transport layer. The LUMO of the charge-generating layer can be lower than the HOMO of the hole transport layer. In this context, the molecular orbital energy of the organic compound layer can be the molecular orbital energy of the organic compound with the largest weight ratio in the organic compound layer.

[0090] In Example 1, when an organic compound is included in the luminescent layer, the luminescent layer may be a layer comprising only the organic compound, or it may be a layer comprising organometallic complexes and other compounds. In this document, when the luminescent layer comprises organometallic complexes and other compounds, the organic compound may serve as the host or guest of the luminescent layer. Alternatively, the organic compound layer may serve as an auxiliary material that can be included in the luminescent layer. In this document, the host is the compound with the largest mass ratio among the compounds constituting the luminescent layer. Furthermore, the guest is the compound with a smaller mass ratio among the compounds constituting the luminescent layer than the host, and is the compound that bears the primary responsibility for luminescence. Additionally, the auxiliary material is a compound with a smaller mass ratio among the compounds constituting the luminescent layer than the host and that assists the guest in luminescence. Incidentally, the auxiliary material is also referred to as the second host. The host material may also be referred to as the first compound, and the auxiliary material may also be referred to as the second compound.

[0091] In this paper, if desired, organic compounds may be used in conjunction with conventionally known low-molecular-weight and high-molecular-weight hole-injectable or hole-transferable compounds, compounds to be used as the host, luminescent compounds, electron-injectable or electron-transferable compounds, etc.

[0092] As a hole-injectable and transportable material, a material with high hole mobility is preferred to facilitate the injection of holes from the anode and enable the injected holes to be transported to the light-emitting layer. Furthermore, to reduce film quality degradation (such as crystallization) in organic light-emitting devices, a material with a high glass transition temperature is preferred.

[0093] The electron-transportable material can be arbitrarily selected from materials capable of transporting electrons injected from the cathode to the light-emitting layer, and is chosen with consideration of factors such as the balance with the hole mobility of the hole-transportable material. The electron-transportable material is also preferably used in the hole-blocking layer.

[0094] Electron-injectable materials can be selected from any materials that allow for easy electron injection from the cathode, taking into account factors such as balance with hole injection capabilities. These materials can also be used in combination with electron transport materials.

[0095] Configuration of organic light-emitting elements

[0096] An organic light-emitting element is formed on a substrate by creating an insulating layer, a first electrode, an organic compound layer (which may be referred to as a functional layer), and a second electrode. A protective layer, a color filter, or a microlens may be disposed on the cathode. If a color filter is provided, a planarization layer can be disposed between the color filter and the protective layer. The planarization layer may be made of an acrylic resin or similar material. This also applies when the planarization layer is disposed between the color filter and the microlens.

[0097] substrate

[0098] Materials that can be used as substrates include quartz, glass, silicon wafers, resin, or metal. Furthermore, switching elements or wiring, such as transistors, are included on the substrate. An insulating layer (which may be referred to as an insulating film) may be included thereon. When a silicon wafer is used as the substrate, the active layer, source region, and drain region of the transistor are formed in the substrate. Furthermore, it is preferable that the transistors are densely arranged.

[0099] As an insulating layer, any material is acceptable, as long as it can form contact holes and ensure insulation from unconnected wiring so that wiring can be formed between the insulating layer and the first electrode. For example, resins such as polyimide, silicon oxide, or silicon nitride can be used.

[0100] electrode

[0101] Electrode pairs can be used as electrodes. These electrode pairs can be an anode (which may be called an anodic electrode) and a cathode (which may be called a cathode electrode). When an electric field is applied in the light-emitting direction of the organic light-emitting element, the electrode with the higher potential is the anode, and the other is the cathode. Alternatively, it can be said that the electrode used to supply holes to the light-emitting layer is the anode, and the electrode used to supply electrons to it is the cathode.

[0102] The work function is expected to be as large as possible with the constituent materials of the anode. For example, elemental metals such as gold, platinum, silver, copper, nickel, palladium, cobalt, selenium, vanadium, or tungsten can be used. Alternatively, alloys comprising mixtures of these or combinations thereof, or metal oxides such as tin oxide, zinc oxide, indium oxide, indium tin oxide (ITO), or indium zinc oxide can be used. Still alternatively, conductive polymers such as polyaniline, polypyrrole, or polythiophene can be used.

[0103] Electrode materials can be used alone or in combination with two or more of them. Furthermore, the anode may comprise a single layer or multiple layers.

[0104] When the electrode is used as a reflective electrode, materials such as chromium, aluminum, silver, titanium, tungsten, or molybdenum, or alloys thereof, or laminates thereof, can be used. These materials can also be used as reflective films that do not function as electrodes. Alternatively, when the electrode is used as a transparent electrode, oxide transparent conductive layers such as indium tin oxide (ITO) or indium zinc oxide, or other layers, can be used. However, the invention is not limited thereto. Photolithography can be used for electrode formation.

[0105] On the other hand, materials with low work functions are desired as constituent materials of the cathode. Examples include alkali metals such as lithium, alkaline earth metals such as calcium, or elemental metals such as aluminum, titanium, manganese, silver, lead, or chromium, or mixtures thereof. Alternatively, alloys of combinations of elemental metals can be used. For example, magnesium-silver, aluminum-lithium, aluminum-magnesium, silver-copper, or zinc-silver can be used. Metal oxides such as indium tin oxide (ITO) can also be used.

[0106] Electrode materials can be used alone or in combination with two or more of them. Furthermore, the cathode can have a single-layer configuration or a multi-layer configuration. Silver is preferred. To reduce silver aggregation, silver alloys are further preferred. Any alloy ratio is acceptable as long as it reduces silver aggregation. For example, silver:other metals can be 1:1 or 3:1, etc.

[0107] The cathode can be configured as a top emitting element using an oxide conductive layer such as ITO, or as a bottom emitting element using a reflective electrode such as aluminum (Al), and there are no particular limitations. The method used to form the cathode is not particularly limited. The use of DC and AC sputtering methods, etc., results in good film coverage and promotes a reduction in resistance, and is therefore preferred.

[0108] Pixel isolation layer

[0109] The pixel isolation layer is formed from a silicon nitride (SiN) film, a silicon oxynitride (SiON) film, or a silicon oxide (SiO) film using chemical vapor deposition (CVD). To increase the resistivity of the organic compound layer in the in-plane direction, the organic compound layer (especially the hole transport layer) is preferably deposited at a film thickness on the sidewalls of the pixel isolation layer. Specifically, deposition at the sidewall film thickness can be achieved by increasing the cone angle of the sidewalls of the pixel isolation layer or the film thickness of the pixel isolation layer and increasing the shielding effect during vacuum evaporation.

[0110] On the other hand, for the pixel isolation layer, it is preferable to adjust the sidewall cone angle or the film thickness of the pixel isolation layer to be sufficient to prevent gaps from forming in the protective layer formed thereon. No gaps are formed in the protective layer. This reduces the occurrence of defects in the protective layer. This reduces reliability degradation, such as the appearance of dark spots or poor conductivity of the second electrode.

[0111] By adjusting the cone angle of the sidewalls of the pixel isolation layer, charge leakage to adjacent pixels can be effectively suppressed. For example, a cone angle falling within at least 60 degrees and no greater than 90 degrees can achieve a sufficiently small reduction. The film thickness of the pixel isolation layer is expected to be at least 10 nm and no greater than 150 nm. Furthermore, the same effect can be obtained even when only pixel electrodes without a pixel isolation layer are configured. However, in this case, it is preferable to set the film thickness of the pixel electrode to be equal to or less than the film thickness of the organic layer, or to form the end of the pixel electrode into a positive cone shape of less than 60°, because this can reduce short circuits in the organic light-emitting element.

[0112] Organic compound layer (functional layer)

[0113] The organic compound layer can be formed as a single layer or as multiple layers. When the organic compound layer has multiple layers, it can be named according to its function as a hole injection layer, hole transport layer, electron blocking layer, light-emitting layer, hole blocking layer, electron transport layer, or electron injection layer. The organic compound layer mainly consists of organic compounds, but may also include inorganic atoms or inorganic compounds. For example, the organic compound layer may contain copper, lithium, magnesium, aluminum, iridium, platinum, molybdenum, or zinc. The organic compound layer can be disposed between the first electrode and the second electrode, and can be arranged in contact with the first electrode and the second electrode.

[0114] When an organic compound layer has multiple luminescent layers, it may have a charge-generating section between the first and second luminescent layers. The charge-generating section may be an organic compound with a minimum unoccupied molecular orbital energy (LUMO) of -5.0 eV or lower. This also applies when the organic compound layer has a charge-generating section between the second and third luminescent layers.

[0115] protective layer

[0116] A protective layer, such as an insulating film, can be provided on the second electrode. For example, by bonding a glass containing a desiccant to the second electrode, the penetration of water and the like into the organic compound layer can be reduced, which can reduce the occurrence of defective displays. Alternatively, as another embodiment, it is also acceptable to provide a passivation film such as silicon nitride on the cathode to reduce the penetration of water and the like into the organic compound layer. For example, it is also acceptable to transfer the obtained cathode to another chamber without breaking the vacuum after the cathode is formed; and to form a silicon nitride film with a thickness of 2 μm using a CVD method to obtain a protective layer. After deposition using a CVD method, a protective layer using an atomic layer deposition method (ALD method) can be provided. Although there are no limitations on the material used for the film using the ALD method, it can be silicon nitride, silicon oxide, or aluminum oxide, etc. Furthermore, silicon nitride can be formed on the film formed using the ALD method using a CVD method. The film formed by the ALD method can have a thinner film thickness than the film formed using the CVD method. Specifically, the membrane thickness can be 50% or less, and further 10% or less.

[0117] Color filters

[0118] Color filters can be disposed on the protective layer. For example, it is also acceptable to have color filters, taking into account the size of the organic light-emitting element, disposed on another substrate bonded to the substrate on which the organic light-emitting element is disposed; or to pattern the color filters on the protective layer shown above using photolithography. The color filters may include polymers.

[0119] planarization layer

[0120] A planarization layer may be included between the color filter and the protective layer. The planarization layer is provided to reduce unevenness in the underlying layer. The planarization layer may be referred to as a material resin layer without limiting its purpose. The planarization layer may include organic compounds and may be low molecular weight compounds or polymers, preferably polymers.

[0121] The planarization layer can be placed above and below the color filter, and its constituent materials can be the same or different. Specifically, polyvinylcarbazole resin, polycarbonate resin, polyester resin, ABS resin, acrylic resin, polyimide resin, phenolic resin, epoxy resin, silicone resin, or urea-formaldehyde resin may be mentioned.

[0122] microlenses

[0123] Display devices may have optical components such as microlenses on their light-emitting side. Microlenses may comprise acrylic resin or epoxy resin, etc. Microlenses may be designed to increase the amount of light to be extracted from the display device and to control the direction of the extracted light. Microlenses may have a hemispherical shape. When a microlens has a hemispherical shape, the tangent in contact with the hemisphere includes a tangent parallel to the insulating layer. The point of contact between the tangent and the hemisphere is the vertex of the microlens. The vertex of the microlens can also be similarly determined in a given cross-section. In other words, the tangent in the cross-section that contacts the hemisphere of the microlens includes a tangent parallel to the insulating layer, and the point of contact between the tangent and the hemisphere is the vertex of the microlens.

[0124] Furthermore, the midpoint of a microlens can be defined. In the cross-section of a microlens, consider a line segment between the completion points of an arc shape and the completion points of other arc shapes. The midpoint of this line segment can be referred to as the midpoint of the microlens. The cross-section used to distinguish between the vertex and the midpoint can be a cross-section perpendicular to the insulating layer.

[0125] The microlens includes a first surface with protrusions and a second surface opposite to the first surface. The second surface is preferably arranged closer to the functional layer side than the first surface. To achieve this configuration, the microlens needs to be formed on the display device. When the functional layer is an organic layer, processes that cause high temperatures during manufacturing are preferably avoided. Furthermore, assuming the second surface is arranged closer to the functional layer side than the first surface, the glass transition temperatures of all organic compounds constituting the organic layer are preferably 100°C or higher, and more preferably 130°C or higher.

[0126] Opposing substrate

[0127] The planarization layer may include a counter substrate. The counter substrate is disposed at a position opposite to the aforementioned substrate and is therefore referred to as a counter substrate. The constituent material of the counter substrate may be the same as that of the aforementioned substrate. When assuming the aforementioned substrate is a first substrate, the counter substrate may be a second substrate.

[0128] Organic layer

[0129] Organic compound layers constituting organic light-emitting elements (such as hole injection layers, hole transport layers, electron blocking layers, light-emitting layers, hole blocking layers, electron transport layers, or electron injection layers) are formed in the following ways.

[0130] The organic compound layer constituting the organic light-emitting element can be processed using dry methods such as vacuum evaporation, ionization vacuum evaporation, sputtering, or plasma. Alternatively, instead of dry processing, a wet processing method can be used to form the layer by dissolving it in a suitable solvent using known methods (e.g., spin coating, dip coating, casting, LB coating, or inkjet coating).

[0131] In this study, when the layer is formed using methods such as vacuum evaporation or solution coating, crystallization is unlikely to occur, resulting in excellent time stability. Alternatively, when deposition is achieved via coating, the layer can be formed by combining it with a suitable binder resin.

[0132] As adhesive resins, examples include polyvinylcarbazole resin, polycarbonate resin, polyester resin, ABS resin, acrylic resin, polyimide resin, phenolic resin, epoxy resin, silicone resin, or urea-formaldehyde resin. However, the present invention is not limited thereto.

[0133] Furthermore, the adhesive resin can be used alone, or as a homopolymer or copolymer in mixtures of two or more of them. Additionally, additives such as known plasticizers, antioxidants, and UV absorbers can be used in combination if desired.

[0134] Pixel circuit

[0135] The display device has pixel circuits connected to light-emitting elements. The pixel circuits can be active matrix types, each independently controlling the light emission of a first light-emitting element and a second light-emitting element. Active matrix circuits can be voltage-programmable or current-programmable. The display device has pixel circuits for each pixel. The pixel circuits can include light-emitting elements, transistors for controlling the brightness of the light-emitting elements, transistors for controlling the timing of light emission, capacitors for maintaining the gate voltage of the transistors controlling the brightness, and transistors for establishing a connection to GND without passing through the light-emitting elements.

[0136] The display device has a display area and a peripheral area arranged around the display area. Pixel circuitry is included in the display area, and display control circuitry is included in the peripheral area. The mobility of the transistors constituting the pixel circuitry may be less than the mobility of the transistors constituting the display control circuitry.

[0137] The slope of the current-voltage characteristic of the transistors constituting the pixel circuit can be less than the slope of the current-voltage characteristic of the transistors constituting the display control circuit. The slope of the current-voltage characteristic can be measured using the so-called Vg-Ig characteristic.

[0138] The transistors that make up the pixel circuit are transistors connected to light-emitting elements such as the first light-emitting element.

[0139] Pixels

[0140] Display devices have multiple pixels. Each pixel has subpixels that emit different colors from each other. Subpixels can have, for example, individual RGB emission colors.

[0141] Within a pixel, an area also known as the pixel aperture emits light. This area is the same as the first area. The pixel aperture can have a size of 15 μm or less, and can also have a size of 5 μm or greater. More specifically, 11 μm, 9.5 μm, 7.4 μm, or 6.4 μm are acceptable. The distance between subpixels (from center to center of adjacent subpixels) can be 10 μm or less. Specifically, 8 μm, 7.4 μm, or 6.4 μm or less are acceptable.

[0142] In a planar diagram, pixels can be arranged in known patterns. For example, striped arrangements, triangular arrangements (honeycomb arrangements), PenTile arrangements, or Bayer arrangements are acceptable. The shape of a subpixel in a planar diagram can be any known shape. Examples can include quadrilaterals such as rectangles or rhombuses, as well as hexagons. Of course, as long as the shape is not an exact figure but approximates a rectangle, it is included within the rectangle. Subpixel shapes and pixel arrays can be combined.

[0143] The use of the display device according to Embodiment 1

[0144] The display device according to Embodiment 1 can be used as a component of various equipment or devices. For example, it is used as a display device with a color filter for use with a white light source.

[0145] The apparatus having the display device according to Embodiment 1 can be an image information processing device, which has an image input unit for inputting image information from a surface CCD, a linear CCD, or a memory card, etc., and an information processing unit for processing the input information, and for displaying the input image at a display unit. The display unit can have the display device according to Embodiment 1.

[0146] Furthermore, the display unit of the camera device or inkjet printer can have the display device according to Embodiment 1. The display unit can have a touch panel function. The driving method of the touch panel function can be infrared radiation, electrostatic capacitance, resistive film, or electromagnetic induction, and there are no particular limitations. In addition, the display device can be used in the display unit of a multifunction printer.

[0147] Then, refer to Figure 17 This image shows an example cross-section of a portion of the display device of Embodiment 1. Incidentally, for ease of description, the foregoingly described elements may be given different reference numerals.

[0148] The display device includes a substrate 11, an insulating layer 14, and a light-emitting element 1700. The insulating layer 14 is located on the substrate 11. The light-emitting element 1700 is located on the insulating layer 14. In other words, the insulating layer 14 is located between the substrate 11 and the light-emitting element 1700.

[0149] The substrate 11 has a main surface ( Figure 17 The substrate 11 (the upper surface) includes a driving transistor 1701, a reset transistor 1764, and a light-emitting control transistor 1763 formed thereon. The substrate 11 can be formed of, for example, a P-type semiconductor. An N-type well region 13 is formed on the main surface side of the substrate 11 (i.e., the upper side of the substrate 11). Other regions in the substrate 11 besides the well region 13 become P-type semiconductor regions 12.

[0150] The substrate 11 has multiple impurity regions that serve as source or drain regions for transistors in the well region 13. The conductivity type of the impurity regions can be set to P-type for all regions, for example.

[0151] Conductive layers 1765, 1763G, and 1764G are disposed on the main surface (upper surface) of substrate 11. Conductive layer 1763G serves as the gate of light-emitting control transistor 1763. One of the P-type impurity regions serves as the source 1763S of light-emitting control transistor 1763, and another of the P-type impurity regions serves as the drain 1763D. Conductive layer 1765 serves as the gate of driving transistor 1761. The impurity region serving as the drain 1763D of light-emitting control transistor 1763 also serves as the source 1768 of driving transistor 1701. Furthermore, one of the other P-type impurity regions serves as the drain 1767 of driving transistor 1701.

[0152] Furthermore, the conductive layer 1764G serves as the gate of the reset transistor 1764. Additionally, the sludge region that serves as the source 1768 of the drive transistor 1701 also serves as the drain 1764D of the reset transistor 1764. Furthermore, one of the other P-type sludge regions serves as the source 1764S of the reset transistor 1764.

[0153] The substrate 11 also has a device isolation portion 1730 formed between adjacent pixels. As the device isolation portion 1730, STI (shallow trench isolation), LOCOS (local oxidation of silicon) isolation, or N-type diffusion layer isolation can be used, etc.

[0154] The light-emitting element has a cathode 1716, an organic light-emitting layer 1715, and an anode 1714. The cathode 1716 is electrically connected to a power line (not shown). The anode 1714 is electrically connected to the main terminal (drain) of a driving transistor 1701. The organic light-emitting layer 1715 is located between the cathode 1716 and the anode 1714. At the end of the anode 1714, a dam 1717 is arranged. The dam 1717 suppresses leakage of current flowing between the anode 1714 and the cathode 1716 to adjacent pixels.

[0155] Within the insulating layer 14, conductive patterns, electrodes for capacitor elements, and plugs are embedded. The insulating layer 14 can be, for example, silicon oxide. Each conductive pattern can be a wiring layer. For example, such as... Figure 17 As shown, the conductive pattern can have wiring WR1, wiring WR2 and wiring WR3.

[0156] Capacitor element 1705 has electrodes 1705a and 1705b, and capacitor element 1706 has electrodes 1706a and 1706b. In insulating layer 14, electrodes 1705a and 1706a can be arranged on the same insulating layer. Furthermore, electrodes 1705b and 1706b can also be arranged on the same insulating layer. Electrodes 1705a and 1705b are opposite to each other across the insulating layer. Furthermore, electrodes 1706a and 1706b are opposite to each other across the insulating layer. As a result, a capacitor element with a MIM (metal-insulator-metal) structure is formed.

[0157] Multiple plugs may be, for example, plug PL1, plug PL2, plug PL3, plug PL4, and plug PL5. All of the multiple plugs may have the same thickness, or may have different thicknesses, or may have partially the same thickness, or may have partially different thicknesses.

[0158] Plug PL1 can connect wiring WR1 to any of the transistor's terminals (gate, source, and drain). Plug PL2 can connect wiring WR1 and wiring WR2. The lower electrode of the capacitor element (1705 or 1706) can be connected to the drive transistor 1701 via plug PL3, wiring WR2, plug PL2, wiring WR1, and plug PL1. Furthermore, the upper electrode of the capacitor element (1705 or 1706) can be connected to wiring WR3 via plug PL5.

[0159] Wire WR3 can be connected to the transistor (in) via plug PL4, wiring WR2, plug PL2, wiring WR1, and plug PL1. Figure 17 (The middle part is any one of the drive transistor, current control transistor, and reset transistor) is connected. The anode 1714 can be connected to the drain 1767 of the drive transistor 1701 via plug PL6, wiring WR3, plug PL4, wiring WR2, plug PL2, wiring WR1, and plug PL1.

[0160] The plug can be manufactured in a different step than the wiring step, or it can be formed in the same step as the wiring to be arranged on the plug. For example, wiring WR2 and plug PL2 can be formed in the same step and can have the same material. Similarly, wiring WR3 and plug PL4 can be formed in the same step and can have the same material. Metallic elements such as copper, tungsten, aluminum, or titanium can be used to form the wiring and plug.

[0161] Therefore, by using a semiconductor substrate for the substrate and setting the transistors of each pixel as MOS transistors, a denser arrangement can be achieved compared to using thin-film transistors as transistors. Thus, by assuming that the display device of Embodiment 1 has a semiconductor substrate and that the transistors are configured as MOS transistors, higher resolution or a smaller size of the display device can be achieved.

[0162] Figure 18 This is a cross-sectional schematic diagram illustrating an example of a display device having an organic light-emitting element and a transistor to be connected to the organic light-emitting element. The transistor is an example of an active element. In this document, the transistor shown is an example of a thin-film transistor (TFT). However, a MOSFET utilizing a semiconductor substrate can be used. By using a MOSFET, transistors can be arranged in individual pixels within a smaller area.

[0163] Figure 18 This is an example of a pixel that is a component of the display device of Embodiment 1. The pixel has sub-pixels 10. These sub-pixels are divided into 10R, 10G, and 10B according to the light they emit. The emitted color can be distinguished by the wavelength emitted from the light-emitting layer, or the light emitted from the sub-pixels can be selectively transmitted or color-converted by a color filter, etc. Each sub-pixel has a reflective electrode 2 serving as a first electrode on the interlayer insulating layer 1, an insulating layer 3 covering the end of the reflective electrode 2, an organic compound layer 4 covering the second electrode and the insulating layer, a second electrode 5, a protective layer 6, and a color filter 7.

[0164] The interlayer insulating layer 1 may include transistor and capacitor elements in the underlying layer or within it. The transistor and the first electrode may be electrically connected to each other via contact holes, etc., not shown.

[0165] The insulating layer 3 is also referred to as a dam or pixel isolation film. The insulating layer 3 covers the end of the first electrode and is arranged around the first electrode. The portion without the insulating layer is in contact with the organic compound layer 4, becoming the light-emitting area.

[0166] The organic compound layer 4 has a hole injection layer 41, a hole transport layer 42, a first light-emitting layer 43, a second light-emitting layer 44, and an electron transport layer 45.

[0167] The second electrode 5 can be a transparent electrode, a reflective electrode, or a semi-transparent electrode.

[0168] Protective layer 6 reduces the penetration of moisture into the organic compound layer. Although the protective layer is shown as a single layer, it can be multiple layers. Each layer can be an inorganic compound layer or an organic compound layer.

[0169] Color filters 7 are classified as 7R, 7G, and 7B according to color. Color filters can be formed on a planarization film (not shown). Furthermore, a resin protective layer (not shown) can be included on the color filter. Alternatively, the color filter can be formed on a protective layer 6. Alternatively, the color filter can be disposed on opposing substrates such as a glass substrate and then bonded together.

[0170] Example 2

[0171] Figure 19 This is a schematic diagram illustrating an example of a display assembly according to Embodiment 2. The display device 1900 may have a touch panel 1903, a display panel 1905, a frame 1906, a circuit board 1907, and a battery 1908 between an upper cover 1901 and a lower cover 1909. Flexible printed circuits (FPCs) 1902 and 1904 are connected to the touch panel 1903 and the display panel 1905.

[0172] Display panel 1905 has the display device of Embodiment 1. Transistors are printed on circuit board 1907. Battery 1908 is not required unless the display component is used in a portable device, or even when the display component is used in a portable device, battery 1908 can be placed in a different location.

[0173] The display component according to embodiment 2 may include color filters having red, green, and blue. The color filters may be configured such that the red, green, and blue elements are arranged in a triangular pattern.

[0174] The display component according to Embodiment 2 can be used in the display section of a portable terminal. In this case, the display component can have both display and operation functions. Portable terminals include mobile phones such as smartphones, tablet computers, and head-mounted displays.

[0175] The display assembly according to Embodiment 2 can be used in the display section of a camera device, which includes an optical section having multiple lenses and an imaging element (image sensor) for receiving light that has passed through the optical section. The camera device may have a display section for displaying information acquired by the imaging element. Furthermore, the display section may be an external display section exposed to the camera device or a display section arranged in a viewfinder. The camera device may be a digital camera or a digital video camera.

[0176] Example 3

[0177] Figure 20AThis is a schematic diagram illustrating an example of a camera device according to Embodiment 3. The camera device 2000 may include a viewfinder 2001, a rear display 2002, an operation unit 2003, and a housing 2004. The viewfinder 2001 may have a display device according to Embodiment 1. In this case, the display device can display not only the image to be captured, but also environmental information or camera commands, etc. The environmental information may include the intensity of external light, the direction of external light, the speed of movement of the subject, or the possibility that the subject is obstructed by an object, etc.

[0178] The timing required for image capture is preferably a short duration. Therefore, it is best to display information as early as possible. Thus, display devices utilizing organic light-emitting elements (OLEDs) are preferred. This is because OLEDs have a fast response time. When high display speed is required, display devices utilizing OLEDs are preferable to liquid crystal displays (LCDs).

[0179] The imaging device 2000 has an optical section (not shown). This optical section has multiple lenses and forms an image on an imaging element housed in a housing 2004. The multiple lenses can be focused by adjusting their relative positions. This operation can also be performed automatically. The imaging device can also be referred to as a photoelectric conversion device. The photoelectric conversion device may not include sequential imaging, but may include methods for detecting differences with previous images or methods for cropping images from normally recorded images as imaging methods.

[0180] Example 4

[0181] Figure 20B This is a schematic diagram illustrating an example of an electronic device according to Embodiment 4. The electronic device 2010 has a display unit 2011, an operation unit 2012, and a housing 2013. The housing 2013 may have circuitry, a printed circuit board having the circuitry, a battery, and a communication unit.

[0182] The display unit 2011 may have the display device according to Embodiment 1. The operation unit 2012 may be a button or a response unit in the form of a touch panel. The operation unit may be a biometric identification unit for recognizing fingerprints and unlocking, etc. The electronic device having a communication unit may also be called a communication device. The electronic device may also have a camera function by including a lens and an imaging element. The image captured by the camera function is projected onto the display unit. As electronic device, smartphones or laptop personal computers may be mentioned.

[0183] Example 5

[0184] Figure 21A This is a schematic diagram illustrating an example of an image display device (monitor) according to Embodiment 5. Figure 21AThe image display device 2100 is a television monitor or a PC monitor, etc. The image display device 2100 has a frame 2101 and a display section 2102 surrounded by the frame 2101. The display section 2102 may have a display device according to Embodiment 1.

[0185] The image display device 2100 also includes a frame 2101 and a base 2103 for supporting the display unit 2102. The base 2103 is not limited to... Figure 21A For example, the lower part of frame 2101 can be used as a base.

[0186] Furthermore, the frame 2101 and the display unit 2102 can be bent. The radius of curvature can be at least 5000 mm and no more than 6000 mm.

[0187] Figure 21B This is a schematic diagram illustrating another example of an image display device according to Embodiment 6. Figure 21B The image display device 2110 is configured to be foldable and is a so-called foldable image display device. The image display device 2110 has a first display unit 2111, a second display unit 2112, a housing 2113, and a folding point 2114. The first display unit 2111 and the second display unit 2112 can have the display device according to Embodiment 1. The first display unit 2111 and the second display unit 2112 can be a single, seamless image display device. The first display unit 2111 and the second display unit 2112 can be separated at the folding point. The first display unit 2111 and the second display unit 2112 can display different images respectively, or the first display unit and the second display unit can display a single image.

[0188] Example 6

[0189] refer to Figure 22A and Figure 22B A description of an application example of the display device of Embodiment 1 will be given. This display device is applicable to systems, for example, wearable devices that can be installed as smart glasses, HMDs, or smart contact lenses. The camera device or display device used in this application example can be configured as a camera device capable of photoelectric conversion of visible light and a display device capable of emitting visible light.

[0190] Figure 22A The diagram shows glasses 2200 (smart glasses) according to an application example. A camera device 2202, such as a CMOS sensor or SPAD, is provided on the surface side of the lens 2201 of the glasses 2200. Furthermore, a display device 2204 according to Embodiment 1 is provided on the back side of the lens 2201.

[0191] The glasses 2200 also include a control device 2203. The control device 2203 serves as a power source for supplying power to the camera device 2202 and the display device 2204. Furthermore, the control device 2203 controls the operation of the camera device 2202 and the display device 2204. An optical system for focusing light onto the camera device 2202 is formed at the lens 2201.

[0192] Figure 22B The diagram illustrates glasses 2210 (smart glasses) according to an application example. Glasses 2210 has a control device 2212. A camera corresponding to a camera device 2202 and a display device 2214 corresponding to a display device 2204 are mounted on the control device 2212. An optical system is formed at a lens 2211 for projecting light emitted from the display device 2214 in the control device 2212 onto the lens 2211, and projecting an image onto the lens 2211. The control device 2212 serves as a power source for supplying power to the camera device and the display device 2214, and controls the operation of the camera device and the display device 2214.

[0193] The control device 2212 may include a gaze detection unit for detecting the wearer's gaze. Infrared radiation can be used to detect the gaze. An infrared emitting unit emits infrared light towards the eyes of a user carefully viewing the displayed image. A camera unit with a light receiving unit detects the reflected light from the eye, thereby obtaining an image of the eye. A light reduction component is provided to reduce the amount of light transmitted from the infrared emitting unit to the display unit in a planar view, thus reducing the degradation of the image display effect.

[0194] Detecting a user's gaze toward a displayed image from an image of the eye captured by an infrared camera. Given known methods can be applied to gaze detection using images captured of the eye. As an example, a gaze detection method based on the Purkinje image caused by the reflection of incident light at the cornea can be used.

[0195] More specifically, gaze detection processing based on the pupil-corneal reflection method is performed. Using the pupil-corneal reflection method, a gaze vector indicating the orientation (rotation angle) of the eyeball is calculated based on the pupil image and Purkinje image included in the captured image of the eyeball, thereby detecting the user's gaze.

[0196] The glasses 2210 include a camera device with a light receiving unit, and can control the displayed image of the display device based on the user's gaze information from the camera device.

[0197] Specifically, the display device 2214 determines a first display area and a second display area other than the first display area based on gaze information. The first and second display areas can be determined by the control device of the glasses 2210, or they can be received from an external control device. Within the display areas of the display device 2214, the display resolution of the first display area can be controlled to be higher than that of the second display area. In other words, the resolution of the second display area can be set lower than that of the first display area.

[0198] Furthermore, the display area includes a first display area and a second display area different from the first display area, and a high-priority area is determined from the first and second display areas based on viewing information. The first and second display areas can be determined by the control device of the display device, or they can be received from an external control device. The resolution of the high-priority area can be controlled to be higher than the resolution of other areas. In other words, the resolution of the relatively low-priority area can be set low.

[0199] Incidentally, AI can be used to determine the primary display area and areas with high priority. The AI ​​can be a model configured to estimate the angle of the line of sight from the eye and the distance to objects in front of the line of sight using images of the eye and the direction the eye is actually looking at those images as training data. The AI ​​program can be owned by the display device, the camera device, or an external device. In the case of an external device having the AI ​​program, transmission to the display device via communication is achieved.

[0200] When performing display control based on visual recognition, this invention is preferably applicable to smart glasses that also have a camera device for capturing images of the external environment. The smart glasses can display the captured external information in real time.

[0201] Example 7

[0202] Figure 23AThis diagram illustrates the configuration of an HMD (Head-Mounted Display) 2301, which is an image viewing device according to Embodiment 7. The HMD 2301 is mounted on the observer's head. Reference numeral 2302 indicates the observer's right eye, and reference numeral 2303 indicates the observer's left eye. Display lenses 2304 and 2305 form the right eyepiece optical system OR1, and display lenses 2306 and 2307 form the left eyepiece optical system OL1. Each eyepiece optical system is a coaxial optical system formed by multiple (2) display lenses. The observer's right eye 2302 is positioned at the exit pupil ER1 of the right eyepiece optical system OR1, and the observer's left eye 2303 is positioned at the exit pupil EL1 of the left eyepiece optical system OL1. The exit pupil ER1 is located at a distance E1 from the right eyepiece optical system OR1. Similarly, the exit pupil EL1 is located at a distance E1 from the left eyepiece optical system OL1. The surface of the right eyepiece optical system OR1 (the surface on the right eye 2302 side) and the surface of the left eyepiece optical system OL1 (the surface on the left eye 2303 side) are each provided with an optical film 2314 for lens protection or light convergence, etc.

[0203] Reference numerals 2308 and 2309 denote display devices for the right eye and left eye, respectively. The display device may be the display device according to Embodiment 1. Figure 23B This diagram illustrates the various external appearances of the HMD 2301 and the personal computer 2350 connected thereto. Each display device displays a display image (original image) corresponding to the image signal output from the personal computer 2350. In this regard, a wired or wireless connection can be established. Furthermore, the HMD 2301 may be a device with an internally installed image processing unit that operates independently.

[0204] Eyepiece optical systems OR1 and OL1 guide light from display devices 2308 and 2309 to exit pupils ER1 and EL1, respectively, thereby projecting a magnified virtual image of the displayed image onto the observer's right eye 2302 and left eye 2303. As a result, the observer can observe the virtual image of the displayed image on display devices 2308 and 2309 through eyepiece optical systems OR1 and OL1.

[0205] Although not shown, HMD 2301 may have a control device. This control device serves as a power source for supplying power to display devices 2308 and 2309, and controls the operation of display devices 2308 and 2309.

[0206] The control device may include a gaze detection unit for detecting the wearer's gaze. Infrared radiation can be used to detect the gaze. An infrared emitting unit emits infrared light towards the eyes of a user carefully viewing the displayed image. The reflected light from the eye is detected by a camera unit with a light receiving unit, thereby obtaining an image of the eye. A light reduction component for reducing light from the infrared emitting unit to the display unit in a planar image reduces the degradation of image display quality.

[0207] The user's gaze is detected in relation to a displayed image from an image of the eye captured by an infrared camera. Given known methods are applicable for gaze detection using images captured of the eye. As an example, a gaze detection method based on the Purkinje image obtained by reflecting illumination light at the cornea can be used.

[0208] More specifically, gaze detection processing based on the pupil-corneal reflection method is performed. Using the pupil-corneal reflection method, a gaze vector indicating the orientation (rotation angle) of the eyeball is calculated based on the pupil image and Purkinje image included in the captured image of the eyeball, thereby detecting the user's gaze.

[0209] Specifically, display devices 2308 and 2309 determine a first display area and a second display area other than the first display area based on gaze information. The first and second display areas can be determined by a control device, or they can be received from an external control device. Within the display areas of display devices 2308 and 2309, the display resolution of the first display area can be controlled to be higher than the display resolution of the second display area. In other words, the resolution of the second display area can be set lower than the resolution of the first display area.

[0210] Furthermore, the display area includes a first display area and a second display area different from the first display area, and a high-priority area is determined from the first and second display areas based on viewing information. The first and second display areas can be determined by the control device of the display device, or they can be received from an external control device. The resolution of the high-priority area can be controlled to be higher than the resolution of other areas. In other words, the resolution of the relatively low-priority area can be set low.

[0211] Incidentally, AI can be used to determine the primary display area and areas with high priority. The AI ​​can be a model configured to use an image of the eye and the direction the eye is actually looking at as training data to estimate the angle of the gaze from the eye and the distance to objects in front of the gaze. The AI ​​program can be owned by the display device, the camera device, or an external device. In the case of an external device having the AI ​​program, transmission to the display device is achieved via communication.

[0212] Therefore, the display device according to Embodiment 1 is applicable to various display components, camera devices, electronic equipment, and image display devices according to this embodiment.

[0213] The embodiments described above can be appropriately modified without departing from the technical concept. Incidentally, the disclosure of this specification includes not only the descriptions herein, but also all content that can be grasped from this specification and the accompanying drawings.

[0214] Although the invention has been described with reference to exemplary embodiments, it should be understood that the invention is not limited to the disclosed exemplary embodiments. The scope of the appended claims should be accorded the broadest interpretation to cover all such modifications and equivalent structures and functions.

Claims

1. A display device, comprising: substrate; Multiple pixels are arranged in a display area on the substrate; as well as A control circuit is configured to control the signals to be supplied to the pixel. The display area includes a first area and a second area surrounding the first area. A portion of the first region is designated as a third region whose position can be changed. Control the signal supplied to the pixel so that the display resolution of the fourth region (which is not the third region) in the first region becomes lower than the display resolution of the third region, and Through the circuit configuration of the pixels, the display resolution of the second region is set to be equal to or lower than the display resolution of the fourth region.

2. The display device according to claim 1, wherein, The number of light-emitting elements circuitically connected to the pixels in the second region is greater than the number of light-emitting elements circuitically connected to the pixels in the fourth region, thereby setting the display resolution of the second region to be equal to or lower than the display resolution of the fourth region.

3. The display device according to claim 1 or 2, wherein, Multiple light-emitting elements are evenly arranged in the display area, and Each of the plurality of pixels includes one or more light-emitting elements.

4. The display device according to claim 3, wherein, The plurality of light-emitting elements are arranged in a matrix including both row and column directions. The vertical scan signal lines arranged in the row direction and the horizontal scan signal lines arranged in the column direction are connected to each of the plurality of light-emitting elements, and In the second region, adjacent light-emitting elements in the row direction are connected to the same horizontal scan signal line.

5. The display device according to claim 4, wherein, Each of the plurality of pixels includes a plurality of sub-pixels with different emission colors, and Two or more light-emitting elements connected to the same horizontal scan signal line must all be light-emitting elements that emit the first color.

6. The display device according to claim 3, wherein, The vertical scan signal line and the horizontal scan signal line are connected to each of the plurality of light-emitting elements. The vertical scan signal line includes a write control line and an emission control line. Each of the plurality of pixels includes one or more light-emitting elements, driving transistors, write transistors, and light-emitting control transistors. The write control line is connected to the gate of the write transistor. The light-emitting control line is connected to the gate of the light-emitting control transistor. The horizontal scan signal line is connected to one of the source and drain terminals of the write transistor. The other of the source and drain of the write transistor is connected to the gate of the drive transistor. One of the source and drain terminals of the driving transistor is connected to the light-emitting element. The other of the source and drain of the driving transistor is connected to one of the source and drain of the light-emitting control transistor, and The source and drain of the light-emitting control transistor are connected to a power supply.

7. The display device according to claim 6, wherein, In the second region, A write transistor is provided for two or more adjacent light-emitting elements. The two or more light-emitting elements are each provided with two or more corresponding driving transistors, and The source and drain of the write transistor are connected to the gate of the two or more drive transistors.

8. The display device according to claim 6, wherein, In the second region, Two or more adjacent light-emitting elements are each provided with two or more corresponding write transistors, and One of the source and drain of the two or more write transistors is connected to the same horizontal scan signal line.

9. The display device according to claim 3, wherein, Each of the plurality of light-emitting elements is connected to the vertical scanning signal line and the horizontal scanning signal line, and In the fourth region, the same horizontal scanning signal is supplied to two or more adjacent light-emitting elements.

10. The display device according to claim 3, wherein, The plurality of light-emitting elements are arranged in a matrix including both row and column directions. Each of the plurality of light-emitting elements is connected to a vertical scan signal line arranged in the row direction and a horizontal scan signal line arranged in the column direction. In regions where the third region does not exist in the row direction, vertical scan signals are sequentially supplied to the light-emitting elements in multi-row units. In the region where the third region exists in the row direction, vertical scanning signals are sequentially supplied to the light-emitting element in row units.

11. The display device according to claim 1 or 2, wherein, The display area also includes a fifth area surrounding the second area, and Through the circuit configuration of the pixels, the display resolution of the fifth region is set to a value lower than that of the third region.

12. The display device according to claim 1 or 2, further comprising: Line of sight inspection department The control circuit sets the third region based on the detection results of the line-of-sight detection unit.

13. The display device according to claim 1 or 2, further comprising an imaging element, in, The control circuit will display the region of a predetermined object in the image captured by the imaging element as the third region.

14. The display device according to claim 13, wherein, The control circuit detects the predetermined object from the image captured by the imaging element by using a discrimination circuit that utilizes a learned model.

15. The display device according to claim 1 or 2, further comprising a region designation circuit, wherein, The control circuit sets the third region based on information from the region-designated circuit.

16. A photoelectric conversion device, comprising: Optical components; An imaging element configured to receive light that has passed through the optical component; as well as A display device configured to display images captured by the imaging element. The display device is the display device according to any one of claims 1 to 15.

17. An electronic device, comprising: The display device according to any one of claims 1 to 15; A housing on which the display device is disposed; as well as A communication circuit is disposed in the housing and configured to communicate with the outside.

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