Communication and distance measurement integrated system based on ZYNQ

Abstract

The Zynq chip is integrated with the ARM processor and the FPGA logic programming unit, the ARM processor and the FPGA logic programming unit can directly interact with each other, logic changing and embedded programming can be achieved on one board card, complex buses among multiple chips in the prior art are avoided, and peripheral circuit design is reduced. According to the invention, the distance measurement and communication integrated design is realized on the basis of the basic communication function, and compared with the traditional method, the method has the advantages that the equipment is simple and multiple peripherals do not need to be additionally mounted.

Description

Technical Field

[0001] The field of communication ranging technology can be applied in areas such as sensor networks, unmanned system networking, and other distributed networking. Background Technology

[0002] Wireless sensor networks (WSNs) are a type of distributed sensor network that offers advantages such as dynamic deployment of sensing devices and flexible networking, making them valuable for applications in both military and commercial fields. However, the dynamic changes in sensor locations within WSNs also introduce time-varying network topology. This necessitates the use of communication and ranging modules to acquire real-time distance relationships between sensors in order to dynamically adjust channel resource allocation and routing information. Communication and ranging functionality is the core of wireless sensor networking. Summary of the Invention

[0003] A ZYNQ-based communication ranging system includes a Zynq chip and a general-purpose radio frequency chip. The Zynq chip includes a PL terminal and a PS terminal. The PL terminal includes a DMA transmission module, a transmit processing module, a receive processing module, and a phase acquisition module. The PS terminal includes a network transmission module, a command control module, a radio frequency control module, and a bidirectional one-way ranging module.

[0004] The DMA transmission module at the PL end enables data interaction between the PL end and the PS end, including two data transmission directions: PL to PS and PS to PL. It is used to receive data transmitted from the user terminal via the PS end and store it in a FIFO before sending it to the transmission processing module. It is also used by the PL end to receive communication data processed by the processing module and upload it to the PS end.

[0005] The transmission processing module at the PL end is used to process and frame the data sent by the user terminal, generate communication ranging data frames, and send the generated data frames to the general-purpose radio frequency chip.

[0006] Furthermore, the transmission processing module includes several modules such as encoding, interleaving, mapping, pilot insertion, serial-to-parallel conversion, IFFT, parallel-to-serial conversion, cyclic prefix insertion, and framing, which process the raw data to obtain a time-domain communication ranging frame;

[0007] The receiving and processing module at the PL end is used to receive data collected by a general-purpose radio frequency chip and process the raw data to obtain communication data and synchronization information.

[0008] Furthermore, the receiving processing module includes several modules such as symbol synchronization, frequency offset compensation, cyclic prefix removal, serial-to-parallel conversion, FFT, parallel-to-serial conversion, channel equalization, demapping, deinterleaving, and decoding, which process the time-domain signal output by the general radio frequency module to obtain the original data and synchronization information;

[0009] The phase acquisition module at the PL end is used to provide a reference clock for the transmission processing module and the reception processing module at the PL end, and is also used to estimate the time delay of the synchronization information processed by the reception processing module to obtain the propagation time delay.

[0010] The network transmission module of the PS terminal is used to send the user terminal's instructions and data to the PS terminal via the UDP transmission protocol; it is also used to transmit the data received from the DMA transmission module and the ranging results calculated by the bidirectional one-way ranging module from the PS terminal to the user terminal via the UDP transmission protocol.

[0011] The command control module of the PS terminal is used for command control to interact with the user terminal. The user terminal implements general radio frequency module configuration and communication ranging functions through commands.

[0012] The bidirectional one-way ranging module at the PS end is used to calculate the distance between the terminals. It uses the time delay information estimated by the phase acquisition module at the PL end to calculate the distance between the two terminals.

[0013] The radio frequency control module at the PS end is used for initialization and parameter configuration of the general-purpose radio frequency chip;

[0014] The general-purpose radio frequency chip is used for DA conversion of transmitted signals, AD conversion of received signals, and transmission and reception of radio frequency signals. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the system block diagram provided by the present invention.

[0016] Figure 2 This is a schematic diagram of the transmission processing module of the present invention.

[0017] Figure 3 This is a schematic diagram of the receiving and processing module of the present invention. Detailed Implementation

[0018] The technical solutions in the embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0019] As attached Figure 1 The present invention is a ZYNQ-based integrated communication and ranging system, including a Zynq chip and a general-purpose radio frequency chip. The Zynq chip includes a PL terminal and a PS terminal. The PL terminal includes a DMA transmission module, a transmit processing module, a receive processing module, and a phase acquisition module. The PS terminal includes a network transmission module, a command control module, a radio frequency control module, and a bidirectional one-way ranging module.

[0020] The DMA transmission module at the PL end enables data interaction between the PL end and the PS end, including two data transmission directions: PL to PS and PS to PL. It is used to receive data transmitted from the user terminal via the PS end and store it in a FIFO before sending it to the transmission processing module. It is also used by the PL end to receive communication data processed by the processing module and upload it to the PS end.

[0021] Furthermore, the DMA module operates at an 8MHz clock speed, transmitting 8-bit data at a rate of 8MHz to the PL terminal. After parallel-to-serial conversion, it obtains raw data with a 1-bit width and a rate of 64MHz, which is stored in the FIFO and read out at a rate of 52MHz and sent to the transmit processing module.

[0022] The transmission processing module at the PL end is used to process and frame the data sent by the user terminal, generate communication ranging data frames, and send the generated data frames to the general-purpose radio frequency chip.

[0023] Furthermore, as shown in the appendix Figure 2 As shown, the transmission processing module includes several units such as encoding, interleaving, mapping, pilot insertion, serial-to-parallel conversion, IFFT, parallel-to-serial conversion, cyclic prefix insertion, and framing, which process the raw data to obtain a time-domain communication ranging frame.

[0024] Specifically, the encoding unit uses 2^17 convolutional coding to encode the original 52MHz data into 104MHz bit-width, 1-bit encoded data; the encoded data is stored in RAM according to sequential addresses, and the data is read from RAM according to the interleaved addresses to obtain interleaved 1-bit-width, 104MHz data; the mapping module performs QPSK modulation on the signal; a block pilot is inserted in each frame; the framing module inserts synchronization symbols into the data to complete the framing.

[0025] The receiving and processing module at the PL end is used to receive data collected by a general-purpose radio frequency chip and process the raw data to obtain communication data and synchronization information.

[0026] Furthermore, as shown in the appendix Figure 3 As shown, the receiving processing module includes several units such as symbol synchronization, frequency offset compensation, cyclic prefix removal, serial-to-parallel conversion, FFT, parallel-to-serial conversion, channel equalization, demapping, deinterleaving, and decoding. It processes the time-domain signal output by the general radio frequency module to obtain the original data and synchronization information.

[0027] Specifically, the symbol synchronization unit performs synchronization detection based on the correlation operation between the local symbol synchronization sequence and the received signal. After completing the symbol synchronization detection, it outputs a valid synchronization signal and subcarrier frequency offset estimation information to the phase acquisition module. The frequency offset compensation unit estimates the frequency offset based on the known symbol synchronization data and performs compensation. The compensated data is sequentially and alternately stored in two RAMs of the same size. The address is read to skip the cyclic prefix and obtain the data without the cyclic prefix. The channel equalization module performs channel estimation and equalization based on the known block pilot information. The demapping, deinterleaving, and decoding unit demodulates the signal, restores the correct order, and performs 2^18 convolutional decoding to recover the original data.

[0028] The phase acquisition module at the PL end is used to provide a reference clock for the transmission processing module and the reception processing module at the PL end, and is also used to estimate the time delay of the synchronization information processed by the reception processing module to obtain the propagation time delay.

[0029] Specifically, reference clocks of 8MHz, 52MHz, and 104MHz are provided to the transmitting and receiving processing units through clock frequency division; signal propagation delay is estimated based on symbol synchronization information and subcarrier frequency offset estimation of the receiving processing module through clock counting;

[0030] The network transmission module of the PS terminal is used to send the user terminal's instructions and data to the PS terminal via the UDP transmission protocol; it is also used to transmit the data received from the DMA transmission module and the ranging results calculated by the bidirectional one-way ranging module from the PS terminal to the user terminal via the UDP transmission protocol.

[0031] The command control module of the PS terminal is used for command control to interact with the user terminal. The user terminal implements general radio frequency module configuration and communication ranging functions through commands.

[0032] The bidirectional one-way ranging module at the PS end is used to calculate the distance between the terminals. It uses the time delay information estimated by the phase acquisition module at the PL end to calculate the distance between the two terminals.

[0033] The radio frequency control module at the PS end is used for initialization and parameter configuration of the general-purpose radio frequency chip;

[0034] The general-purpose radio frequency chip is used for DA conversion of transmitted signals, AD conversion of received signals, and transmission and reception of radio frequency signals.

Claims

1. A Zynq-based communication ranging system, comprising a Zynq chip and a general-purpose radio frequency chip, characterized in that: The Zynq chip includes a PL (Pulse Array) terminal and a PS (Power Switch) terminal. The PL terminal includes a DMA (Digital Transmission) module, a transmit processing module, a receive processing module, and a phase acquisition module. The PS terminal includes a network transmission module, a command control module, a radio frequency control module, and a bidirectional one-way ranging module. The DMA module of the PL terminal enables data interaction between the PL and PS terminals, including two data transmission directions: PL to PS and PS to PL. It is used to receive data transmitted from the user terminal via the PS terminal, store it in a FIFO, and send it to the transmit processing module. It is also used by the PL terminal to receive and process communication data from the processing module and then upload it to the PS terminal. The transmission processing module at the PL end is used to process and frame the data sent by the user terminal, generate communication ranging data frames, and send the generated data frames to the general-purpose radio frequency chip. Furthermore, the transmission processing module includes several modules such as encoding, interleaving, mapping, pilot insertion, serial-to-parallel conversion, IFFT, parallel-to-serial conversion, cyclic prefix insertion, and framing, which process the raw data to obtain a time-domain communication ranging frame; The receiving and processing module at the PL end is used to receive data collected by a general-purpose radio frequency chip and process the raw data to obtain communication data and synchronization information. Furthermore, the receiving processing module includes several modules such as symbol synchronization, frequency offset compensation, cyclic prefix removal, serial-to-parallel conversion, FFT, parallel-to-serial conversion, channel equalization, demapping, deinterleaving, and decoding, which process the time-domain signal output by the general radio frequency module to obtain the original data and synchronization information; The phase acquisition module at the PL end is used to provide a reference clock for the transmission processing module and the reception processing module at the PL end, and is also used to estimate the time delay of the synchronization information processed by the reception processing module to obtain the propagation time delay. The network transmission module of the PS terminal is used to send the user terminal's instructions and data to the PS terminal via the UDP transmission protocol; it is also used to transmit the data received from the DMA transmission module and the ranging results calculated by the bidirectional one-way ranging module from the PS terminal to the user terminal via the UDP transmission protocol. The command control module of the PS terminal is used for command control to interact with the user terminal. The user terminal implements general radio frequency module configuration and communication ranging functions through commands. The bidirectional one-way ranging module at the PS end is used to calculate the distance between the terminals. It uses the time delay information estimated by the phase acquisition module at the PL end to calculate the distance between the two terminals. The radio frequency control module at the PS end is used for initialization and parameter configuration of the general-purpose radio frequency chip; The general-purpose radio frequency chip is used for DA conversion of transmitted signals, AD conversion of received signals, and transmission and reception of radio frequency signals.

2. The ZYNQ-based communication ranging system according to claim 1, characterized in that, The specific method of the DMA transfer module is as follows: The DMA module operates at an 8MHz clock speed, transmitting 8-bit data at a rate of 8MHz to the PL terminal. After parallel-to-serial conversion, it obtains raw data with a 1-bit width and a rate of 64MHz, which is stored in the FIFO and read out at a rate of 52MHz and sent to the transmit processing module.

3. The ZYNQ-based communication ranging system according to claim 1, characterized in that, The specific method of the transmission processing module is as follows: The encoding unit is based on 2^17 convolutional coding, which encodes the original 52MHz data into 104MHz bit-width 1-bit encoded data; the encoded data is stored in RAM according to the sequential address, and the data is read out from RAM according to the interleaved address to obtain interleaved 1-bit-width 104MHz data; The mapping module performs QPSK modulation on the signal; a block pilot is inserted into each frame; the framing module inserts synchronization symbols into the data to complete the framing.

4. The ZYNQ-based communication ranging system according to claim 1, characterized in that, The specific method of the receiving and processing module is as follows: The symbol synchronization unit performs synchronization detection based on the correlation operation between the local symbol synchronization sequence and the received signal. After completing the symbol synchronization detection, it outputs a valid synchronization signal and subcarrier frequency offset estimation information to the phase acquisition module. The frequency offset compensation unit estimates the frequency offset based on the known symbol synchronization data and performs compensation. The compensated data is sequentially and alternately stored in two RAMs of the same size. The address is read to skip the cyclic prefix and obtain the data without the cyclic prefix. The channel equalization module performs channel estimation and equalization based on known block pilot information; the demapping, deinterleaving, and decoding units demodulate the signal, restore the correct order, and perform 2^18 convolutional decoding to recover the original data.

5. A ZYNQ-based communication ranging system according to claim 1, characterized in that, The specific method of the phase acquisition module is as follows: The transmitting and receiving processing units are provided with reference clocks of 8MHz, 52MHz, and 104MHz by clock frequency division; the signal propagation delay is estimated by clock counting based on the symbol synchronization information and subcarrier frequency offset estimation of the receiving processing module.

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