Bipolar half-bridge direct-current converter for fault topology reconstruction and control method of bipolar half-bridge direct-current converter

Abstract

According to the bipolar half-bridge direct-current converter for fault topology reconstruction and the control method thereof, the two input ends of an inverter circuit are connected with the positive electrode and the negative electrode of input voltage respectively, the two output ends of the inverter circuit are connected with the two ends of a primary winding of a high-frequency transformer Tr respectively, and the two ends of the primary winding are connected with a first excitation inductor in parallel; a dotted terminal of a secondary winding of the high-frequency transformer Tr passes through a leakage inductor Lk and then is connected with a midpoint of a first bridge arm of the half-bridge three-level bipolar output circuit, and a synonym terminal of the secondary winding of the high-frequency transformer Tr passes through a clamping capacitor Cs and then is connected with a midpoint of a second bridge arm of the half-bridge three-level bipolar output circuit. And two ends of the secondary winding are connected in parallel with the second excitation inductor. Bidirectional power flow is realized while the number of the switching tubes is prevented from being increased, and the power supply reliability is improved.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of bipolar DC converters, and more particularly relates to a bipolar half-bridge DC converter with fault topology reconfiguration and a control method thereof. BACKGROUND

[0002] In a bipolar DC distribution network, the two common fault types are open-circuit fault or short-circuit fault of one pole of the bipolar port. Among them, the single-pole open-circuit fault, i.e. the unbalanced power of the port, can be solved by appropriate voltage balancing measures. However, how to continue to ensure the stable operation of the other pole port under single-pole short-circuit fault is an important research point. At present, the traditional method to isolate single-pole short-circuit fault is to use a DC circuit breaker, and two diodes are connected in parallel with the bipolar DC bus to prevent the reverse charging of the DC bus capacitor by the line inductance during short-circuit fault. This scheme requires additional circuit, which increases the total cost of the system and reduces the power density of the system. Therefore, researchers try to integrate the single-pole short-circuit fault isolation function into the bipolar DC converter itself. The structures of various bipolar DC converters suitable for low-voltage DC distribution networks can be mainly divided into two types: independent type and multiplex type. The independent type of positive and negative pole ports has an inherent advantage in dealing with single-pole short-circuit fault, as the outputs of the positive and negative pole ports can be independently controlled, and the pulse blocking protection method can be used for the switch tube of the fault port to isolate the single-pole short-circuit fault. However, the existing independent type of positive and negative pole ports has a large number of switch tube devices and high cost. Professor Zhu Miao's team from Shanghai Jiaotong University proposed a bipolar half-bridge DC converter to solve this problem (Ma J, Zhu M, Li Y, et al. Monopolar fault reconfiguration of bipolar half bridge converter for reliable load supply in dc distribution system [J]. IEEE Transactions on Power Electronics, 2022, 37(9): 11305-11318), but due to the use of diodes in the rectifier circuit, the problem of bidirectional power flow cannot be solved. SUMMARY

[0003] To solve the problems in the prior art, the application provides a bipolar half-bridge DC converter with fault topology reconfiguration and a control method thereof.

[0004] The application adopts the following technical solutions.

[0005] The bipolar half-bridge DC converter of the first aspect of the application comprises an inverter circuit, a high-frequency transformer T r , a leakage inductor L k , a clamping capacitor C s and a half-bridge three-level bipolar output circuit, specifically: The two input terminals of the inverter circuit are connected to the positive and negative terminals of the input voltage respectively, the two output terminals of the inverter circuit are connected to the two ends of the primary winding of the high-frequency transformer T r , and the two ends of the primary winding are connected in parallel with the first excitation inductor; the same terminals of the secondary winding of the high-frequency transformer T r are connected to the midpoint of the first bridge arm of the half-bridge three-level bipolar output circuit through the leakage inductor L k , and the different terminals of the secondary winding of the high-frequency transformer T r are connected to the midpoint of the second bridge arm of the half-bridge three-level bipolar output circuit through the clamping capacitor C s , and the two ends of the secondary winding are connected in parallel with the second excitation inductor; the neutral line of the half-bridge three-level bipolar output circuit, one end of the first load and one end of the second load are connected, the positive output terminal of the half-bridge three-level bipolar output circuit is connected to the other end of the first load, and the negative output terminal is connected to the other end of the second load.

[0006] Preferably, the half-bridge three-level bipolar output circuit is composed of a fifth switch tube Q 5, a sixth switch tube Q 6, a seventh switch tube Q 7 and an eighth switch tube Q 8 connected in series, wherein the fifth switch tube Q 5 and the sixth switch tube Q 6 constitute the first bridge arm, the sixth switch tube Q 6 and the seventh switch tube Q 7 constitute the second bridge arm, the drain of the fifth switch tube Q 5 is the positive output terminal of the half-bridge three-level bipolar output circuit, and the drain of the eighth switch tube Q 5 is the negative output terminal of the half-bridge three-level bipolar output circuit.

[0007] Preferably, the bipolar half-bridge DC converter further comprises an input capacitor C in , a first output capacitor C o1 and a second output capacitor C o2input capacitor C in first output capacitor C o1 connected between two ends of the first load R o1 second output capacitor C o2 connected between two ends of the second load R o2

[0008] Preferably, the inverter circuit is a full-bridge circuit, which is composed of a leading bridge arm and a lagging bridge arm, the leading bridge arm is composed of a first switch tube Q 1 and a second switch tube Q 2 in series, the connecting point of the two switch tubes is connected to the same end of the primary winding of the high-frequency transformer T r as an output terminal of the full-bridge circuit; the lagging bridge arm is composed of a third switch tube Q 3 and a fourth switch tube Q 4 in series, the connecting point of the two switch tubes is connected to the different end of the primary winding of the high-frequency transformer T r as another output terminal of the full-bridge circuit.

[0009] Preferably, the clamping capacitor C s 、 input capacitor C in , first output capacitor C o1 and second output capacitor C o2 are , leakage inductance L k is , the transformation ratio of the high-frequency transformer is 2, and the switching frequency of all switch tubes is 10 kHz.

[0010] The second aspect of the present application provides a control method of a bipolar half-bridge DC converter applied to the fault topology reconstruction of the first aspect of the present application, comprising: controlling the full-bridge circuit to operate under fixed phase shift and fixed duty cycle; when no fault occurs, all switch tubes operate normally, the duty cycle of the fifth switch tube Q 5 is d , and the duty cycles of the sixth switch tube Q 6, the seventh switch tube Q 7 and the eighth switch tube Q 8 are 1-​d 0.5+ d 0.5- d ; the fifth switch tube Q 5 and the sixth switch tube Q 6 are set with a dead zone t d and the phase shift time of both is dT s , wherein T s is the switching period of all switch tubes; the seventh switch tube Q 7 and the eighth switch tube Q 8 are set with a dead zone t d and the phase shift time of both is (0.5+ d ) T s ; the driving of the fifth switch tube Q 5 lags behind the driving of the first switch tube Q 1 by a time length of φT s ; the driving of the seventh switch tube Q 7 lags behind the driving of the second switch tube Q 2 by a time length of φT s , φ is a phase shift ratio, and the bipolar port voltage balance control is performed by adjusting the duty cycle d ; the voltage regulation control is performed by adjusting φT s . When a unipolar short circuit fault occurs, the switch tube directly connected in series with the output end on the fault side is locked, and the duty cycle and the phase shift time of the switch tube directly connected in series with the locked switch tube are adjusted.

[0011] Preferably, the bipolar port voltage balance control is performed by adjusting the duty cycle d ; the voltage regulation control is performed by adjusting φT s . The bipolar port voltage balance control is to sample the difference between the output voltages of the positive output end and the negative output end of the half-bridge three-level bipolar output circuit, and to close-loop control the duty cycle d so that the difference between the output voltages is 0; The voltage regulation control is to sample the sum of the output voltages of the positive output end and the negative output end of the half-bridge three-level bipolar output circuit, and to close-loop control the phase shift ratio φ so that the sum of the output voltages is a set phase shift ratio value.

[0012] Preferably, the full-bridge circuit is controlled to operate under fixed phase shift and fixed duty cycle, specifically: the first switch tube Q 1 Q 2 Q 3 Q 4 Q the first switch tube Q 1 t 2 d and the phase shift time of the two is 0.5 T s the third switch tube Q 3 Q 4 t d and the phase shift time of the two is also 0.5 T s the first switch tube Q 1 Q 4 Q 2 Q 3

[0013] Preferably, when the unipolar short circuit fault occurs, the control lock of the switch tube directly connected in series with the corresponding output end of the fault side, and the duty cycle and the phase shift time of the switch tube directly connected in series with the corresponding switch tube of the lock are adjusted, in particular: When the positive output end of the half-bridge three-level bipolar output circuit has a short circuit fault, the duty cycle of the fifth switch tube Q 5 is 0, the duty cycle of the sixth switch tube Q 6 is 1; the duty cycle of the seventh switch tube Q 7 is 0.5+ d , the duty cycle of the eighth switch tube Q 8 is 0.5- d ; a dead zone is set between the seventh switch tube Q 7 and the eighth switch tube Q 8 t d and the phase shift time of the two is (0.5+ d ) T s ; the phase shift ratio φ is controlled to be 0, the phase shift time of the seventh switch tube Q 7 and the second switch tube Q 2 is 0; and by sampling the output voltage of the negative output end of the half-bridge three-level bipolar output circuit, the duty cycle d is closed-loop controlled to make the output voltage of the negative output end of the half-bridge three-level bipolar output circuit be the set negative port output voltage; When a short circuit fault occurs at the negative output terminal of the half-bridge three-level bipolar output circuit, the fifth switching transistor is controlled. Q The duty cycle of 5 is d The sixth switch Q The duty cycle of 6 is 1- d ; Seventh switch Q The duty cycle of switch 7 is 1, and the eighth switch is... Q The duty cycle of 8 is 0; control phase shift ratio φ The value remains unchanged at 0.5, and the fifth switch transistor... Q 5 and the first switching transistor Q The phase shift time of 1 is 0.5. T s Fifth switching transistor Q 5 and the sixth switching transistor Q 6. Set a dead zone between the two t d And the phase shift time of both is dT s Controlling the phase shift ratio φ The value remains unchanged at 0.5, and the fifth switch transistor... Q 5 and the first switching transistor Q The phase shift time of 1 is 0.5. T s The duty cycle is controlled in a closed loop by sampling the output voltage at the negative output terminal of the half-bridge three-level bipolar output circuit. d Make the output voltage of the negative output terminal of the half-bridge three-level bipolar output circuit the set negative port output voltage.

[0014] The beneficial effects of this invention are as follows: Compared with the prior art, 1. The half-bridge three-level bipolar output circuit of this invention includes four switching transistors, achieving bidirectional power flow without increasing the number of switching transistors. 2. The control method of this invention for the half-bridge three-level bipolar output circuit achieves output port voltage balancing under normal operating conditions and topology reconstruction under unipolar short-circuit fault conditions, improving power supply reliability. 3. A phase shift is generated between the full-bridge circuit and the half-bridge three-level bipolar output circuit of this invention. By controlling the phase shift ratio, closed-loop control of the total output voltage of the bipolar port is achieved, providing voltage regulation functionality. Attached Figure Description

[0015] Figure 1 This is a circuit diagram of the converter of the present invention; Figure 2 The waveforms of the primary voltage and current under fault-free conditions are shown. Figure 3 The waveforms of the two loads under asymmetrical load conditions when no faults occur; Figure 4 The waveforms of the drive signals of each switch transistor in the converter when no fault occurs; Figure 5 The voltage waveforms of two loads when the positive output end short circuit fault occurs; Figure 6 The driving signal waveforms of each switch tube of the converter when the positive output end short circuit fault occurs. DETAILED DESCRIPTION

[0016] In order to make the objects, technical solutions and advantages of the present application clearer, the technical solutions will be described clearly and completely below in conjunction with the accompanying drawings of the embodiments of the present application. The embodiments described in the present application are only a part of the embodiments of the present application, but not all the embodiments. Based on the spirit of the present application, all other embodiments obtained by those skilled in the art without creative labor are within the protection scope of the present application.

[0017] The present application adopts the following technical solutions.

[0018] As shown in Figure 1 Embodiment 1 of the present application proposes a bipolar half-bridge DC converter with fault topology reconstruction, which comprises an inverter circuit, a high-frequency transformer T r , a leakage inductance L k , a clamping capacitor C s and a half-bridge three-level bipolar output circuit, specifically: Two input ends of the inverter circuit are connected with positive and negative poles of an input voltage respectively, two output ends of the inverter circuit are connected with two ends of a primary winding of the high-frequency transformer T r , and the two ends of the primary winding are connected in parallel with a first excitation inductance; same name ends of a secondary winding of the high-frequency transformer T r are connected with a middle point of a first bridge arm of the half-bridge three-level bipolar output circuit through a leakage inductance L k , and different name ends of the secondary winding of the high-frequency transformer T r are connected with a middle point of a second bridge arm of the half-bridge three-level bipolar output circuit through a clamping capacitor C s , and the two ends of the secondary winding are connected in parallel with a second excitation inductance; a neutral line of the half-bridge three-level bipolar output circuit, one end of a first load and one end of a second load are connected, a positive output end of the half-bridge three-level bipolar output circuit is connected with the other end of the first load, and a negative output end is connected with the other end of the second load.

[0019] In the embodiment, preferably, the half-bridge three-level bipolar output circuit of the half-bridge three-level bipolar output circuit comprises a fifth switch tubeQ 5, the sixth switch tube Q 6, the seventh switch tube Q 7, the eighth switch tube Q 8 are connected in series, wherein the drain of the fifth switch tube Q 5 and the sixth switch tube Q 6 constitute a first bridge arm, the drain of the sixth switch tube Q 6 and the seventh switch tube Q 7 constitute a second bridge arm, the drain of the fifth switch tube Q 5 is the positive output terminal of the half-bridge three-level bipolar output circuit, the drain of the eighth switch tube Q 5 is the negative output terminal of the half-bridge three-level bipolar output circuit.

[0020] Preferably, the bipolar half-bridge DC converter further comprises an input capacitor C in , a first output capacitor C o1 and a second output capacitor C o2 The input capacitor C in is connected between two input terminals of the full-bridge circuit, the first output capacitor C o1 is connected across the first load R o1 , and the second output capacitor C o2 is connected across the second load R o2 .

[0021] Preferably, the inverter circuit is a full-bridge circuit, which is composed of a leading bridge arm and a lagging bridge arm, the leading bridge arm is composed of the first switch tube Q 1 and the second switch tube Q 2 connected in series, and the connection point of the two switch tubes is connected to the same terminal of the primary winding of the high-frequency transformer T r as an output terminal of the full-bridge circuit; The lagging bridge arm is composed of the third switch tube Q 3 and the fourth switch tube Q 4 connected in series, and the connection point of the two switch tubes is connected to the different terminal of the primary winding of the high-frequency transformer T r as another output terminal of the full-bridge circuit.

[0022] Preferably, the input voltage is 150V, the output voltage to the two loads is ±375V, the maximum output power is 12.5kW, and the clamping capacitor C s、 input capacitor C in , first output capacitor C o1 and second output capacitor C o2 are , leakage inductance L k is , the turns ratio of the high-frequency transformer is 2, and the switching frequency of all the switching tubes is 10 kHz.

[0023] Embodiment 2 of the present application proposes a control method of a bipolar half-bridge DC converter based on the fault topology reconfiguration described in Embodiment 1 of the present application, comprising: controlling the full-bridge circuit to operate under fixed phase shift and fixed duty cycle; In the embodiment, the full-bridge circuit is preferably controlled to operate under fixed phase shift and fixed duty cycle, specifically: the duty cycle of the first switching tube Q 1, the second switching tube Q 2, the third switching tube Q 3 and the fourth switching tube Q 4 is equal and is a constant value, the duty cycle of the first switching tube Q 1 and the second switching tube Q 2 is set to be a dead time, and the phase shift time of the first switching tube t 1 and the second switching tube T 2 is 0.5 Q s , the duty cycle of the third switching tube Q 3 and the fourth switching tube t 4 is set to be a dead time, and the phase shift time of the third switching tube T 3 and the fourth switching tube Q 4 is also 0.5 Q s , the phase shift time of the first switching tube Q 1 and the fourth switching tube Q 4 is 0, and the phase shift time of the second switching tube 2 and the third switching tube

[0024] 3 is 0. Q d When no fault occurs, all the switching tubes operate normally, the duty cycle of the fifth switching tube Q 5 is Q , the duty cycle of the sixth switching tube Q 6, the seventh switching tube d 7 and the eighth switching tube d 8 is 1- d , 0.5+ Q , 0.5- Q , respectively; the fifth switching tube t 5 and the sixth switching tubeQ 6a dead zone is set between the two t d and the phase shift time of the two is dT s wherein T s is the switching period of all the switching tubes; the driving of the seventh switching tube Q 7is lagged behind the driving of the eighth switching tube Q 8by a dead zone t d and the phase shift time of the two is (0.5+ d ) T s ; the driving of the fifth switching tube Q 5is lagged behind the driving of the first switching tube Q 1by a time length of φT s ; the driving of the seventh switching tube Q 7is lagged behind the driving of the second switching tube Q 2by a time length of φT s , φ is the phase shift ratio, the duty cycle is adjusted to perform the bipolar port voltage balance control, the phase shift ratio is adjusted to perform the voltage regulation control; d s . Preferably, in the embodiment, the duty cycle is adjusted to perform the bipolar port voltage balance control, the phase shift ratio is adjusted to perform the voltage regulation control, specifically: d the bipolar port voltage balance control is to sample the difference between the output voltages of the positive output end and the negative output end of the half-bridge three-level bipolar output circuit, and to close-loop control the duty cycle φT so that the difference between the output voltages is 0; the voltage regulation control is to sample the sum of the output voltages of the positive output end and the negative output end of the half-bridge three-level bipolar output circuit, and to close-loop control the phase shift ratio d so that the sum of the output voltages is the set phase shift ratio value. φ It should be noted that when the first load o1 and the second load

[0025] o2 are equal, the time length during which the secondary winding of the high-frequency transformer R r supplies power to the first load R o1 is T s , and the time length during which the secondary winding of the high-frequency transformer R o2 supplies power to the second load dT s is R ​o2 the length of time that the secondary winding of the high-frequency transformer supplies power to the load decreases; when the first load is greater than the second load d T s , the length of time that the secondary winding of the high-frequency transformer supplies power to the load decreases; when the first load is greater than the second load R o1 , the length of time that the secondary winding of the high-frequency transformer supplies power to the load decreases; when the first load is greater than the second load R o2 , the length of time that the secondary winding of the high-frequency transformer supplies power to the load decreases; when the first load is greater than the second load T r , the length of time that the secondary winding of the high-frequency transformer supplies power to the load decreases; when the first load is greater than the second load R o1 , the length of time that the secondary winding of the high-frequency transformer supplies power to the load decreases; when the first load is greater than the second load T r , the length of time that the secondary winding of the high-frequency transformer supplies power to the load decreases; when the first load is greater than the second load R o2 , the length of time that the secondary winding of the high-frequency transformer supplies power to the load decreases; when the first load is greater than the second load R o1 , the length of time that the secondary winding of the high-frequency transformer supplies power to the load decreases; when the first load is greater than the second load R o2 , the length of time that the secondary winding of the high-frequency transformer supplies power to the load decreases; when the first load is greater than the second load T r , the length of time that the secondary winding of the high-frequency transformer supplies power to the load decreases; when the first load is greater than the second load R o1 , the length of time that the secondary winding of the high-frequency transformer supplies power to the load decreases; when the first load is greater than the second load T r , the length of time that the secondary winding of the high-frequency transformer supplies power to the load decreases; when the first load is greater than the second load R o2 , the length of time that the secondary winding of the high-frequency transformer supplies power to the load decreases; when the first load is greater than the second load

[0026] When a single-pole short-circuit fault occurs, the switch tube directly connected in series with the output end on the fault side is controlled to be locked, and the duty cycle and phase shift time of the switch tube directly connected in series with the locked switch tube are adjusted.

[0027] Specifically, the duty cycles of the first switch tube Q 1, the second switch tube Q 2, the third switch tube Q 3, and the fourth switch tube Q 4 are set to 0.5.

[0028] In this embodiment, when a single-pole short-circuit fault occurs, the switch tube directly connected in series with the output end on the fault side is controlled to be locked, and the duty cycle and phase shift time of the switch tube directly connected in series with the locked switch tube are adjusted. When a short-circuit fault occurs at the positive output end, the duty cycle of the fifth switch tube Q 5 is 0, the duty cycle of the sixth switch tube Q 6 is 1, the phase shift time of the seventh switch tube Q 7 and the second switch tube Q 2 becomes 0; the other switch tubes remain unchanged, the duty cycle of the seventh switch tube Q 7 is still 0.5+ d , and the duty cycle of the eighth switch tube​Q 8 is still 0.5 d , the seventh switch tube Q 7 and the eighth switch tube Q 8 are both still set to have a dead zone t d and both have a phase shift time (0.5 d ) T s ; in one cycle, the secondary winding of the high-frequency transformer T r supplies power to the second load R o2 for a length of time (0.5 d ) T s ; the second output capacitor C o2 supplies power to the second load R o2 for a length of time (0.5-d) T s . When a short circuit fault occurs at the negative output end, the control phase shift ratio φ is kept at 0.5, the duty cycle of the seventh switch tube Q 7 is 1, the duty cycle of the eighth switch tube Q 8 is 0; the phase shift time of the fifth switch tube Q 5 and the first switch tube Q 1 is 0; the other switch tubes remain unchanged, the duty cycle of the fifth switch tube Q 5 is still d , the duty cycle of the sixth switch tube Q 6 is still 1 d , the fifth switch tube Q 5 and the sixth switch tube Q 6 are both still set to have a dead zone t d and both have a phase shift time dT s ; in one cycle, the secondary winding of the high-frequency transformer T r supplies power to the load R o1 for a length of time dT s ; the output capacitor C o1 supplies power to the load for a length of time (1 d ) T s .

[0029] Based on the above parameters, simulation is performed, and the simulation results are shown in Figures 2 to 6 . AsFigure 2 The figure shows the primary voltage and current when no fault occurs. Figure 3 Two load voltage waveforms under asymmetrical load conditions in a fault-free state are presented. It can be seen that the converter disclosed in this invention effectively achieves output port voltage balancing under asymmetrical load conditions through the aforementioned control method. The switching transistors of the converter in a fault-free state (…) Q 1 ~Q 8) The drive signal waveform is as follows Figure 4 As shown. Figure 5 Two load voltage waveforms are given when a short circuit fault occurs at the positive output terminal. Figure 6 The following are the conditions for a short circuit fault at the positive output terminal of the converter's switching transistors ( Q 1 ~Q From the drive signal waveform of 8), it can be seen that the fifth switch transistor is at this time. Q The duty cycle of switch 5 is 0, and the sixth switch is active. Q The duty cycle of switch 6 is 1, and the switch connected in series with the positive output terminal on the fault side is blocked; the seventh switch... Q The duty cycle of switch 7 is 0.5+d, and the eighth switch is... Q With the duty cycle of 8 open, the output terminal operates normally with power supplied. Within one cycle, the secondary winding supplies power to the second load. R o2 The power supply duration is (0.5+d). T s The second output capacitor C o2 To the second load R o2 The power supply duration is (0.5-d). T s .

[0030] This disclosure can be a system, method, and / or computer program product. A computer program product may include a computer-readable storage medium having computer-readable program instructions loaded thereon for causing a processor to implement various aspects of this disclosure.

[0031] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the specific implementation of the present invention. Any modifications or equivalent substitutions that do not depart from the spirit and scope of the present invention should be covered within the protection scope of the claims of the present invention.

Claims

1. A bipolar half-bridge DC converter with fault topology reconfiguration, comprising an inverter circuit, a high frequency transformer T r , a leakage inductance L k , a clamping capacitor C s and a half-bridge three-level bipolar output circuit, characterized in that The two input terminals of the inverter circuit are connected to the positive and negative terminals of the input voltage, respectively, and the two output terminals of the inverter circuit are connected to the high-frequency transformer, respectively. T r The two ends of the primary winding are connected, and the two ends of the primary winding are connected in parallel with the first magnetizing inductor; high-frequency transformer T r The secondary winding's corresponding terminal passes through leakage inductance. L k It is then connected to the midpoint of the first bridge arm of the half-bridge three-level bipolar output circuit, and the high-frequency transformer. T r The opposite terminals of the secondary winding are connected via clamping capacitors. C s It is then connected to the midpoint of the second bridge arm of the half-bridge three-level bipolar output circuit, and the two ends of the secondary winding are connected in parallel with the second magnetizing inductor; the neutral line of the half-bridge three-level bipolar output circuit, one end of the first load, and one end of the second load are all connected; the positive output terminal of the half-bridge three-level bipolar output circuit is connected to the other end of the first load, and the negative output terminal is connected to the other end of the second load.

2. The bipolar half-bridge DC converter of claim 1, wherein: The half-bridge three-level bipolar output circuit comprises a fifth switch tube Q 5, Q 6, Q 7, Q 8, Q 5, Q 6, Q 6, Q 7, Q 5, Q 5.

3. The bipolar half-bridge DC converter of claim 1, wherein: The bipolar half-bridge DC converter further comprises an input capacitor C in , a first output capacitor C o1 and a second output capacitor C o2 , the input capacitor C in being connected between two input terminals of the full-bridge circuit, the first output capacitor C o1 being connected between two terminals of the first load R o1 , the second output capacitor C o2 being connected between two terminals of the second load R o2 .

4. The bipolar half-bridge DC converter of claim 1, wherein: The inverter circuit is a full-bridge circuit, which is composed of a leading bridge arm and a lagging bridge arm, the leading bridge arm is composed of a first switch tube Q 1 and a second switch tube Q 2 in series, the connection point of the two switch tubes is connected with the same name end of the primary winding of the high-frequency transformer T r as an output end of the full-bridge circuit. The lagging bridge arm is composed of a third switch tube Q 3 and a fourth switch tube Q 4 in series, and the connection point of the two switch tubes is connected with the opposite-phase end of the primary winding of the high-frequency transformer as another output end of the full-bridge circuit. T r of the high-frequency transformer.

5. The bipolar half-bridge DC converter of claim 1, wherein: Clamping capacitor C s 、 Input capacitor C in , a first output capacitor C o1 and a second output capacitor C o2 are , the leakage inductance L k is , the transformer ratio of the high-frequency transformer is 2, and the switching frequency of all switching transistors is 10 kHz.

6. A control method for a bipolar half-bridge DC-DC converter applied to the fault topology reconfiguration of any one of claims 4-5, characterized by, including: controlling the full-bridge circuit to operate at a fixed phase shift and a fixed duty cycle; When no fault occurs, all switch tubes operate normally, the fifth switch tube Q 5 has a duty cycle of d , the sixth switch tube Q 6 has a duty cycle of Q , the seventh switch tube Q 7 has a duty cycle of d , and the eighth switch tube d 8 has a duty cycle of d ; the fifth switch tube Q 5 and the sixth switch tube Q 6 are provided with a dead zone t d therebetween, and the phase shift time of the two is dT s , wherein T s is the switching period of all switch tubes; the seventh switch tube Q 7 and the eighth switch tube Q 8 are provided with a dead zone t d therebetween, and the phase shift time of the two is (0.5+ d ) T s ; the driving lag of the fifth switch tube Q 5 relative to the driving of the first switch tube Q 1 is φT s ; the driving lag of the seventh switch tube Q 7 relative to the driving of the second switch tube Q 2 is also φT s , φ is a phase shift ratio, the bipolar port voltage balance control is performed by adjusting the duty cycle d , and the voltage regulation control is performed by adjusting φT s ; when a single-pole short-circuit fault occurs, controlling the switch directly connected in series with the output end on the fault side to be locked, and adjusting the duty cycle and phase shift time of the switch directly connected in series with the switch to be locked.

7. The control method of claim 6, wherein: The through duty cycle adjustment d The bipolar port voltage equalization control is performed by adjusting φT s The voltage regulation control is performed, specifically: The bipolar port voltage equalization control is to sample the difference between the output voltages of the positive output end and the negative output end of the half-bridge three-level bipolar output circuit, and to close-loop control the duty cycle d The difference between the output voltages is 0. The voltage regulation control is to sample the sum of the output voltages of the positive output end and the negative output end of the half-bridge three-level bipolar output circuit, and to close-loop control the phase shift ratio φ The sum of the output voltages is set to be the phase shift ratio value.

8. The control method of claim 6, wherein: controlling the full-bridge circuit to operate at a fixed phase shift and a fixed duty cycle, specifically: the first switch tube Q 1, the second switch tube Q 2, the third switch tube Q 3, and the fourth switch tube Q 4 have equal duty cycles and are constant, the first switch tube Q 1 and the second switch tube Q 2 are provided with a dead zone t d between them, and the phase shift time of both is 0.5 T s , the third switch tube Q 3 and the fourth switch tube Q 4 are provided with a dead zone t d between them, and the phase shift time of both is also 0.5 T s , the first switch tube Q 1 and the fourth switch tube Q 4 have a phase shift time of 0, the second switch tube Q 2 and the third switch tube Q 3 have a phase shift time of 0.

9. The control method of claim 6, wherein: when a single-pole short-circuit fault occurs, controlling the switch directly connected in series with the output end on the fault side to be locked, and adjusting the duty cycle and phase shift time of the switch directly connected in series with the switch to be locked, specifically: When the positive output end of the half-bridge three-level bipolar output circuit has a short circuit fault, the duty cycle of the fifth switch tube Q 5 is 0, and the duty cycle of the sixth switch tube Q 6 is 1; the duty cycle of the seventh switch tube Q 7 is 0.5+ d , and the duty cycle of the eighth switch tube Q 8 is 0.5- d ; the seventh switch tube Q 7 and the eighth switch tube Q 8 are arranged with a dead zone therebetween t d , the phase shift time of the seventh switch tube d 7 and the eighth switch tube T 8 is (0.5+ φ ) Q s ; the phase shift ratio is controlled to be 0, the phase shift time of the seventh switch tube Q 7 and the second switch tube d 2 is 0; and the output voltage of the negative output end of the half-bridge three-level bipolar output circuit is closed-loop controlled by sampling the output voltage of the negative output end of the half-bridge three-level bipolar output circuit, so that the output voltage of the negative output end of the half-bridge three-level bipolar output circuit is the set negative port output voltage; When the negative output end of the half-bridge three-level bipolar output circuit has a short circuit fault, the duty cycle of the fifth switch tube Q 5 is 0 d , the duty cycle of the sixth switch tube Q 6 is 1- d , the duty cycle of the seventh switch tube Q 7 is 1, the duty cycle of the eighth switch tube Q 8 is 0; the phase shift ratio φ is kept at 0.5, the phase shift time of the fifth switch tube Q 5 and the first switch tube Q 1 is 0.5 T s ; a dead zone is set between the fifth switch tube Q 5 and the sixth switch tube Q 6 t d , and the phase shift time of the two is dT s ; the phase shift ratio φ is kept at 0.5, the phase shift time of the fifth switch tube Q 5 and the first switch tube Q 1 is 0.5 T s ; by sampling the output voltage of the negative output end of the half-bridge three-level bipolar output circuit, the duty cycle d is closed-loop controlled to make the output voltage of the negative output end of the half-bridge three-level bipolar output circuit be the set negative port output voltage.

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