Solar cell and photovoltaic module

Abstract

The invention provides a solar cell and a photovoltaic module, and belongs to the technical field of solar cells. The solar cell comprises a silicon substrate, the silicon substrate comprises two opposite surfaces, at least one surface is provided with a first texture structure, and the first texture structure is a non-pyramid texture structure and comprises a plurality of sunken parts which are sunken towards the interior of the silicon substrate; the convex parts are located between the adjacent concave parts, and at least part of the convex parts are provided with divergent broken line structures or curve structures in the direction from the convex parts to the concave parts. The first texture structure on the surface of the silicon substrate is beneficial to considering the light trapping effect when the silicon substrate is applied to a light receiving area, the electric contact performance of a non-light receiving area and the quality of a film layer located on the surface of the silicon substrate, so that the efficiency and the double-sided rate of the solar cell are improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of solar cells, in particular, the present application relates to a solar cell and a photovoltaic module. BACKGROUND

[0002] With the attention and development of renewable energy and environmental sustainability, solar cells have become the core technology in new energy, and in recent years, significant progress has been made in efficiency improvement and large-scale application. However, based on the development demand of cost reduction and efficiency improvement, higher requirements are put forward for the optimization of the structure and preparation of solar cells.

[0003] The micro-morphology of the surface of the solar cell has a great influence on the performance of the cell, mainly reflected in its influence on the passivation effect, light trapping effect and electrical contact performance. Micro-morphology is generally divided into textured structure and polished surface structure, but the traditional micro-morphology is difficult to balance the light trapping effect and passivation performance of the cell, which has become a key technical bottleneck restricting the development of high-efficiency cells. SUMMARY

[0004] Therefore, in order to at least partially solve at least one of the above-mentioned technical problems, the present application provides a solar cell and a photovoltaic module.

[0005] In order to achieve the above-mentioned purpose, the technical scheme of the present application is as follows:

[0006] According to an embodiment of the present application, a solar cell is provided, comprising a silicon substrate, the silicon substrate comprising two opposite surfaces, at least one surface having a first texture structure, the first texture structure being a non-pyramid texture structure, the first texture structure comprising: a plurality of recessed portions, each recessed portion being recessed towards the inside of the silicon substrate; and a plurality of protruding portions between adjacent recessed portions, part of the protruding portions having a diverging fold line structure or a curved structure in the direction from the protruding portion to the recessed portion.

[0007] According to an embodiment of the present application, the surrounding of one protruding portion is surrounded by a plurality of recessed portions, the recessed portions have a bottom surface, the percentage of the protruding portion in the surface area of the first texture structure is less than or equal to 50%, greater than or equal to 10%; and / or, the maximum width of the recessed portion is 1-20 μm, and the depth is 0.1-10 μm.

[0008] According to an embodiment of the present application, the surrounding of one protruding portion is surrounded by a plurality of recessed portions, the percentage of the protruding portion in the surface area of the first texture structure is greater than 50%, less than or equal to 80%.

[0009] According to the embodiments of the present application, the protrusions have a plurality of side walls extending towards the recesses; some of the protrusions have a vertex, and adjacent side walls intersect to form a side edge, the side edge forms a divergent polyline structure or a curved structure around the vertex; and / or, some of the protrusions have a prismatic structure, and the opposite side walls intersect to form a top edge extending in a linear manner.

[0010] According to the embodiments of the present application, the recesses have a bottom surface, the bottom surface of the recesses comprises a plurality of sub-bottom surfaces, and the plurality of sub-bottom surfaces are connected to form a gentle hill, a step, a polyline, or a curved structure.

[0011] According to the embodiments of the present application, there is a height difference between at least some of the bottoms of the recesses, and the height difference between the bottoms of at least two recesses is greater than the height difference between the tops of two protrusions; and / or, the height difference between the bottoms of two recesses is 0.1-10 μm, and the height difference between the tops of two protrusions is 0.1-5 μm.

[0012] According to the embodiments of the present application, the protrusions have a plurality of side walls extending towards the recesses, and the included angle between two adjacent side walls is 90-150°; and / or, at least some of the side walls have a step structure distributed along the extension direction of the surface of the silicon substrate.

[0013] According to the embodiments of the present application, the protrusions located on opposite sides of one recess have side walls adjacent to the recess respectively, and the inclination angles of the two side walls are 5-85° respectively; and / or, the inclination angles of the two side walls are different, one of the inclination angles is 5-40°, and the other of the inclination angles is 40-85.

[0014] According to the embodiments of the present application, some of the protrusions also have a prismatic structure, and the area ratio of the prismatic structure is less than or equal to 50% of the area ratio of the protrusions.

[0015] According to the embodiments of the present application, at least some of the protrusions are arranged in a first direction to form a continuous or discontinuous linear protrusion structure, and the linear protrusion structure is spaced apart in a second direction intersecting the first direction.

[0016] According to the embodiments of the present application, the linear protrusion structure extends in a linear, curved, or polyline manner in the first direction; and / or, the spacing of the linear protrusion structure is 1-20 μm in the second direction; and / or, the number of linear protrusion structures within a range of 100 μm in the second direction is greater than or equal to 5; and / or, some of the protrusions in the linear protrusion structure are distributed in a string shape.

[0017] According to the embodiments of the present application, the surface of the silicon substrate has a plurality of particle protrusions; and / or, at least some of the particle protrusions are aggregated to form a plurality of cluster protrusions; and / or, the width of the particle protrusions is 0.01-2 μm, and the height is 0.01-1 μm.

[0018] According to the embodiments of the present application, the protrusions have a plurality of side walls extending towards the recesses, at least part of the side walls have transverse, diagonal or longitudinal textures; and / or, at least part of the side walls have oppositely arranged longitudinal textures.

[0019] According to the embodiments of the present application, the silicon substrate further comprises a pyramid texture structure; the first texture structure is located on one of the two surfaces of the silicon substrate, and the pyramid texture structure is located on the other of the two surfaces of the silicon substrate; the first texture structure comprises protrusions in the form of pyramid-like structures, and the pyramid texture structure comprises a plurality of pyramids; wherein the height of the pyramids is greater than the height of the pyramid-like structures; and / or, the ratio between the height of the pyramids and the height of the pyramid-like structures is 1-70; and / or, the ratio between the base width of the pyramids and the base width of the pyramid-like structures is 0.02-10; and / or, the vertex angle of the pyramids is smaller than the vertex angle of the pyramid-like structures; and / or, the vertex angle of the pyramids is 30-90°, and the vertex angle of the pyramid-like structures is 45-150°; and / or, the ratio between the number of side edges of the pyramids and the number of side edges of the pyramid-like structures is 0.3-5.

[0020] According to the embodiments of the present application, the solar cell further comprises two laminated films respectively located on at least one side surface of the silicon substrate, and the first texture structure is located on the surface of the silicon substrate corresponding to the at least one laminated film; wherein the at least one laminated film comprises a doped conductive layer arranged on the surface of the silicon substrate in a full surface manner or in a spaced manner, and a passivation or anti-reflection layer located on the surface of the doped conductive layer away from the silicon substrate; and the solar cell further comprises a plurality of electrodes located on the surface of the laminated film, and the electrodes are in electrical contact with the doped conductive layer through the passivation or anti-reflection layer.

[0021] According to the embodiments of the present application, the silicon substrate comprises a first surface and a second surface opposite to each other, and the two laminated films are respectively located on the first surface and the second surface; the laminated film located on the first surface comprises first doped conductive layers arranged on the first surface of the silicon substrate in a spaced manner, and the first doped conductive layers are separated by first spacing regions; and the laminated film located on the second surface comprises a second doped conductive layer arranged on the second surface of the silicon substrate in a full surface manner; wherein the first texture structure is located on the region of the first surface corresponding to the first doped conductive layers and the first spacing regions, and the first texture structure corresponding to the first spacing regions on the first surface is rougher than the first texture structure corresponding to the first doped conductive layers.

[0022] According to an embodiment of the present application, the silicon substrate includes opposite first and second surfaces, the first surface corresponding to the back surface of the cell, and two stack films are respectively located on the first and second surfaces; the stack film located on the first surface includes a first doped conductive layer, which is distributed on the first surface of the silicon substrate in an integral manner; the stack film located on the second surface includes a second doped conductive layer, which is distributed on the second surface of the silicon substrate in a spaced manner, and has a second spacing region between adjacent second doped conductive layers; wherein the first texture structure is located on the region of the first surface corresponding to the first doped conductive layer and the region of the second surface corresponding to the second doped conductive layer and the second spacing region, the first texture structure on the second surface corresponding to the second spacing region is coarser than the first texture structure corresponding to the second doped conductive layer, and / or the first texture structure on the second surface corresponding to the second doped conductive layer is coarser than the first texture structure on the first surface corresponding to the first doped conductive layer.

[0023] According to an embodiment of the present application, the silicon substrate includes opposite first and second surfaces, the first surface corresponding to the back surface of the cell, and two stack films are respectively located on the first and second surfaces; the stack film located on the first surface includes a first doped conductive layer, which is distributed on the first surface of the silicon substrate in an integral manner; the stack film located on the second surface includes a second doped conductive layer, which is distributed on the second surface of the silicon substrate in a spaced manner, and has a second spacing region between adjacent second doped conductive layers; wherein the first texture structure is located on the region of the first surface corresponding to the first doped conductive layer and the region of the second surface corresponding to the second doped conductive layer and the second spacing region, the first texture structure on the second surface corresponding to the second spacing region is coarser than the first texture structure corresponding to the second doped conductive layer, and / or the first texture structure on the second surface corresponding to the second doped conductive layer is coarser than the first texture structure on the first surface corresponding to the first doped conductive layer.

[0024] According to an embodiment of the present application, the silicon substrate includes opposite first and second surfaces, the first surface corresponding to the back surface of the cell, and two stack films are respectively located on the first and second surfaces; the stack film located on the first surface includes a first doped conductive layer, which is distributed on the first surface of the silicon substrate in an integral manner; the stack film located on the second surface includes a second doped conductive layer, which is distributed on the second surface of the silicon substrate in a spaced manner, and has a second spacing region between adjacent second doped conductive layers; wherein the first texture structure is located on the region of the first surface corresponding to the first doped conductive layer and the region of the second surface corresponding to the second doped conductive layer and the second spacing region, the first texture structure on the second surface corresponding to the second spacing region is coarser than the first texture structure corresponding to the second doped conductive layer, and / or the first texture structure on the second surface corresponding to the second doped conductive layer is coarser than the first texture structure on the first surface corresponding to the first doped conductive layer.

[0025] According to an embodiment of the present application, a photovoltaic module is provided, comprising the solar cell as described above.

[0026] According to the solar cell provided by the embodiment of the present application, the first texture structure on the surface of the silicon substrate comprises a plurality of recesses and a plurality of protrusions, the recesses provide a relatively gentle bottom surface, thereby facilitating the improvement of the film layer quality on the surface of the silicon substrate. Meanwhile, the protrusions between the recesses facilitate the provision of a suitable surface relief degree and specific surface area, which can take into account the improvement of the film layer quality, the reduction of the contact resistance of the electrode and the improvement of the light trapping effect when applied to the light receiving area, thereby improving the conversion efficiency and the bifaciality of the cell. Further, the photovoltaic module based on the solar cell of the present application can also achieve a higher conversion efficiency and bifaciality. BRIEF DESCRIPTION OF DRAWINGS

[0027] The above and other objects, features and advantages of the present application will become more apparent from the following description of the embodiments of the present application taken with reference to the accompanying drawings, in which:

[0028] Figure 1 SEM (Scanning Electron Microscope) image of the silicon substrate of the embodiment of the present application;

[0029] Figure 2 Structural schematic diagram of the protrusion of the embodiment of the present application, a is similar to a pyramid structure, b is a prism structure;

[0030] Figure 3 SEM (Scanning Electron Microscope) image of the silicon substrate of another embodiment of the present application, a is a prism structure, b is a combination of a prism structure and a similar pyramid structure;

[0031] Figure 4 SEM (Scanning Electron Microscope) image of the silicon substrate of another embodiment of the present application, wherein a-c show the bottom surfaces of recesses with different sizes;

[0032] Figure 5 Schematic diagram of the bottom surface shape of the recess on the silicon substrate of the embodiment of the present application, wherein a shows that the bottom surface is in a pyramid structure, b shows that the bottom surface is in a step structure, c shows that the bottom surface is in a zigzag structure, and d shows that the bottom surface is in a curved structure.

[0033] Figure 6 Characterization diagram of the bottom surface shape of the recess on the silicon substrate of the embodiment of the present application, a is an SEM image of the bottom surface in a step structure, b is an SEM image of the bottom surface in a pyramid structure, c is an optical microscope image of the bottom surface in a curved structure, and d is an optical microscope image of the bottom surface in a combination of a zigzag structure and a curved structure;

[0034] Figure 7 Local sectional SEM image of the recess on the silicon substrate of the embodiment of the present application;

[0035] Figure 8 A partial cross-sectional SEM view of a recess on a silicon substrate for another embodiment of the present application;

[0036] Figure 9 A cross-sectional SEM view of a silicon substrate for an embodiment of the present application;

[0037] Figure 10 A cross-sectional SEM view of a silicon substrate for another embodiment of the present application;

[0038] Figure 11 An SEM view of a raised portion of a silicon substrate for yet another embodiment of the present application;

[0039] Figure 12 A structural schematic of a linear raised structure of a silicon substrate for an embodiment of the present application;

[0040] Figure 13 An SEM view of a raised portion of a silicon substrate for yet another embodiment of the present application, where a~b are linear raised structures at different scales;

[0041] Figure 14 An SEM view of a granular raised portion of a silicon substrate for yet another embodiment of the present application, where a shows granular raised portions and b shows cluster raised portions;

[0042] Figure 15 An SEM view of a textured structure of a raised portion sidewall for yet another embodiment of the present application, where a shows a horizontal or diagonal line texture and b shows a vertical texture;

[0043] Figure 16 A structural schematic of a solar cell for another embodiment of the present application;

[0044] Figure 17 A structural schematic of a solar cell for yet another embodiment of the present application;

[0045] Figure 18 A structural schematic of a solar cell for yet another embodiment of the present application.

[0046] In the above figures, the meanings of the reference numerals are as follows:

[0047] 100: silicon substrate; 101a: first surface, 101b: second surface; 102: laminated film; 1021: first doped conductive layer, 1022: second doped conductive layer; 1031: first interface passivation layer, 1032: second interface passivation layer; 104: passivation or anti-reflection layer; 1041: first passivation or anti-reflection layer, 1042: second passivation or anti-reflection layer; 110: recessed portion; 111: bottom surface, 1111: sub-bottom surface; 120: protruding portion; 121: side wall; 1211: lateral texture; 1212: oblique linear texture, 1213: longitudinal texture; 122: top portion, 1221: top edge; 123: linear protruding structure; 130: granular protrusion; S1: first direction, S2: second direction; 200: electrode; 210: first electrode, 220: second electrode. DETAILED DESCRIPTION

[0048] For the purpose of the present application, the technical solutions and advantages will be more clearly apparent, the following will be combined with specific embodiments, and referring to the drawings, the present application is further described in detail.

[0049] In the following detailed description, for the purpose of explanation, a number of specific details are set forth in order to provide a thorough understanding of the embodiments according to the present application. It will be apparent, however, to one skilled in the art that one or more embodiments can be practiced without these specific details. In other instances, well-known structures and devices are described in brief or are omitted entirely without detriment to the understanding of the present application, in order to avoid unnecessarily obscuring the concept of the present application.

[0050] The terms used herein are merely used to describe specific embodiments, and are not intended to limit the present application. The term "comprising" used herein indicates the presence of a feature, step, operation, but does not exclude the presence or addition of one or more other features.

[0051] In the case of using expressions similar to "at least one of A, B, and C, etc.", in general, it should be interpreted to mean one or more of the items enumerated in the expression (for example, "a system having at least one of A, B, and C" should include, but not be limited to, a system having A alone, a system having B alone, a system having C alone, a system having both A and B, a system having both A and C, a system having both B and C, and / or a system having A, B, and C, etc.).

[0052] As used herein, relative terms such as "on", "above", or "upper" with respect to the relative position of two components (e.g., film layers or regions) can refer to the two components being in direct contact, or can refer to the two components being non-directly in contact. Similarly, as used herein, relative terms such as "under", "below", or "lower" with respect to the relative position of two components can refer to the two components being in direct contact, or can refer to the two components being non-directly in contact. For example, when one component (e.g., a film layer or region) is referred to as "on" another component, it can be directly on the other component, or there can be intervening components between the two. On the other hand, when a component is referred to as "directly on" another component, there are no components intervening between the two. In addition, when one component is referred to as "on" another component, the two are in a top-bottom relationship in a plan view, and the component can be above or below the other component, so the top-bottom relationship depends on the orientation of the device.

[0053] In a solar cell, the surface morphology of a silicon substrate has an impact on the reflectivity of light, the deposition quality of film layers, and the contact resistance of electrodes. However, conventional surface micro-morphologies often fail to balance passivation effect, light-trapping effect, and electrical contact performance. In particular, a solar cell including a tunnel oxide passivated contact (TOPCon) structure pays more attention to the optimization of passivation effect, and usually adopts a relatively flat surface morphology, which leads to poor light-trapping effect on the back surface and high contact resistance of electrodes.

[0054] In the process of implementing the concept of the present application, it is found that by forming a first texture structure on the surface of a silicon substrate, the first texture structure has recessed portions and protruding portions with specific structures, which can be beneficial to better balancing light-trapping effect, film layer quality, and electrical contact performance. When applied to a solar cell, it is beneficial to improving cell efficiency and bifaciality.

[0055] Specifically, according to an embodiment of one aspect of the present application, a solar cell is provided, including a silicon substrate, the silicon substrate including two opposite surfaces, at least one surface having a first texture structure.

[0056] According to some embodiments of the present application, the silicon substrate can be an N-type, P-type, or intrinsic type crystalline silicon substrate, can be selected from one of a semiconductor material such as single-crystal silicon, polycrystalline silicon, and microcrystalline silicon, and further can be selected as an N-type or P-type single-crystal silicon substrate. The conversion efficiency of a cell based on a single-crystal silicon substrate is higher than that of other types such as a polycrystalline silicon cell.

[0057] An N-type crystalline silicon substrate is obtained by introducing a donor impurity such as a VA group element such as phosphorus (P), arsenic (As), or antimony (Sb) into the semiconductor material, or a P-type crystalline silicon substrate is obtained by introducing an acceptor impurity such as a IIIA group element such as boron (B), aluminum (Al), or gallium (Ga) into the semiconductor material.

[0058] According to some embodiments of this application, the silicon substrate may include a first surface and a second surface opposite to each other. The first textured structure may be distributed on one surface of the silicon substrate, i.e., the first surface or the second surface, or simultaneously distributed on both opposite surfaces of the silicon substrate, i.e., the first surface and the second surface. When the silicon substrate is applied to a solar cell, the surface having the first textured structure may correspond to the front and / or back surface of the cell. Generally, the front surface of the cell serves as the light-receiving surface, and the back surface serves as the back-lighting surface, or it may be double-sided light-receiving, in which case both the front and back surfaces serve as light-receiving surfaces, and at least the non-electrode area of ​​the light-receiving surface may be the light-receiving area.

[0059] To facilitate the explanation of the first texture structure of the silicon substrate, Figure 1 Here is a scanning electron microscope (SEM) image of the silicon substrate according to an embodiment of this application, as shown. Figure 1 As shown, the first texture structure is a non-pyramid texture structure, which may include multiple recesses 110 and multiple protrusions 120. The multiple recesses 110 are recessed towards the interior of the silicon substrate; the multiple protrusions 120 are located between adjacent recesses 110.

[0060] According to some embodiments of this application, some protrusions 120 have a diverging broken line structure or curved structure in the direction from the protrusion 120 to the recess 110. Here, "diverging" can mean multiple broken lines or curves extending linearly from a certain position in all directions, thus creating a diverging shape. The number of broken lines or curves is not particularly limited and can be greater than or equal to two, for example, two, three, four, five, and so on.

[0061] According to some embodiments of this application, the protrusion 120 may be an undulating mountain structure similar to a pyramid texture structure, while the depression 110 may be a terrace structure similar to a pyramid base structure located between adjacent mountain structures, and the depression 110 is flatter than the protrusion 120.

[0062] According to some embodiments of this application, it has been found that by selecting a suitable texturing process to texturize the surface of a silicon substrate, and then combining it with a suitable polishing process, a specific first texture structure can be formed on the surface of the silicon substrate. Since the first texture structure includes multiple recesses 110 and multiple protrusions 120, the protrusions 120 located between the recesses 110 have a divergent zigzag structure or a curved structure, which is beneficial to provide a suitable surface undulation degree and specific surface area. This can take into account both the contact resistance of the electrodes and the light-trapping effect when applied to the light-receiving area. The light-receiving area corresponds to the front and / or back of the battery, and can at least correspond to the non-electrode area of ​​the surface, while also reducing the contact resistance of the electrodes.

[0063] In solar cells, since the film layers, such as a stacked film including a doped conductive layer, a passivation layer, or an antireflection layer, are conformally deposited on the silicon substrate 100, the same first texture structure can be observed on the surface of the solar cell. Therefore, the structure on the surface of the silicon substrate in this application can be obtained directly by testing the first texture structure in the solar cell product, or the stacked film on the surface of the cell can be removed to expose the surface of the silicon substrate before testing. The testing method can be, for example, scanning electron microscopy (SEM) or optical microscopy.

[0064] According to some embodiments of this application, Figure 2 This is a schematic diagram of the structure of the protrusion 120 in an embodiment of this application. a is a pyramid-like structure, and b is a prism structure. Figure 1 and Figure 2 As shown in Figure a, the protrusion 120 has a plurality of sidewalls 121 extending toward the recess 110. Some of the protrusions 120 have apexes, and adjacent sidewalls 121 intersect to form side edges. These side edges form the aforementioned divergent zigzag or curved structure around the apex. Thus, the sidewalls 121 of the protrusion 120 can form a pyramid-like structure with intersecting apex angles of the side edges. For example, as... Figure 1 and Figure 2 Figure a shows that part of the protrusion 120 has a pyramidal structure.

[0065] According to some embodiments of this application, such as Figure 2 As shown in Figure b, the protrusion 120 has a plurality of sidewalls 121 extending toward the recess 110, and the opposing sidewalls 121 of some of the protrusions 120 intersect to form a linearly extending top ridge 1221. Here, the linear extension shown in the figure can be a straight line, but is not limited to this; it can also be a curved line or a broken line. Thus, the sidewalls 121 of the protrusion 120 can form a prism structure.

[0066] For example, Figure 3 This is a scanning electron microscope (SEM) image of a silicon substrate according to another embodiment of this application. a) shows a prism structure, and b) shows a combination of a prism structure and a pyramidal-like structure. Figure 3 Figure a shows another portion of the protrusion 120, which has a prismatic structure. And it is not limited to this, as... Figure 3 As shown in Figure b, some of the protrusions 120 can also be a combination of prism structure and pyramid-like structure.

[0067] According to some embodiments of this application, in one optional implementation, such as Figure 1 and Figure 3As shown, a plurality of recesses 110 are arranged around a protrusion 120, the percentage of the surface area of the first texture structure occupied by the protrusion 120 is less than or equal to 50% and greater than or equal to 10%, for example, it can be 10%, 15%, 20%, 25%, 30%, 35%, 40%, 45%, 50%, etc.; at this time, the percentage of the surface area of the first texture structure occupied by the protrusion 120 is less than or equal to the percentage of the surface area of the first texture structure occupied by the recess 110. The present embodiment is applicable to application scenarios that take into account the passivation quality of the film layer, but is not limited to the above-mentioned application scenarios. For example, the passivation performance of the P-type doped polysilicon region is poorer than that of the N-type doped polysilicon region. Therefore, the structure of the present embodiment can be arranged in the P-type doped polysilicon region, which is beneficial to improving the film layer quality on the surface of the silicon substrate, for example, improving the film uniformity and crystallinity of the P-type doped polysilicon, further synergizing with the protrusion having the divergent polyline structure or curve structure as described above, and further reducing the electrode contact resistance of the non-light-receiving area while ensuring the light trapping effect applied to the light-receiving area, wherein the light-receiving area corresponds to the front surface and / or the back surface of the cell, and can at least correspond to the non-electrode area of the surface.

[0068] For the measurement of the area ratio, the present application does not make any limitation, and those skilled in the art can determine it by conventional methods in the art, for example, it can be measured by a scanning electron microscope (SEM). Because the protrusions and recesses have obvious differences in brightness or color in the overhead SEM test results of the silicon substrate, the area with brighter brightness or lighter color is the protrusion, and the area with darker brightness or darker color is the recess. Taking the protrusion as an example, at least one unit area size region in the SEM image, for example, 100 μm*100 μm, the area of the protrusion observed in each region is calculated by using an image processing algorithm, and the percentage of the area of the protrusion calculated in at least one region to the area of the selected region is calculated, and the average value is taken as the percentage of the surface area of the first texture structure occupied by the protrusion. The percentage of the surface area of the first texture structure occupied by the protrusion is similar to the foregoing, and will not be described in detail.

[0069] Further optionally, the ratio between the percentage of the surface area of the first texture structure occupied by the protrusion 120 and the percentage of the surface area of the first texture structure occupied by the recess 110 is 0.1-0.8; for example, it can be 0.1, 0.15, 0.2, 0.25, 0.3, 0.35, 0.4, 0.45, 0.5, 0.55, 0.6, 0.65, 0.7, 0.75, 0.8, etc.

[0070] In another alternative embodiment, a plurality of recesses 110 are surrounded by a protrusion 120, the percentage of the surface area of the first texture structure occupied by the protrusion 120 is greater than 50% and less than or equal to 80%, for example, it can be 55%, 60%, 65%, 70%, 75%, 80%, etc.; at this time, the percentage of the surface area of the first texture structure occupied by the protrusion 120 is greater than the percentage of the surface area of the first texture structure occupied by the recess 110. This embodiment is suitable for application scenarios that take into account the contact characteristics or light absorption of the electrode, but is not limited to the above-mentioned application scenarios, such as a solar cell with double-sided light receiving and a polyfinger on the back, the polyfinger area on the back can adopt the design of this embodiment, or the doped conductive area on the back of a double-sided light receiving TBC cell can adopt the design of this embodiment. In this way, the first texture structure of this embodiment can save the process time of polishing, thereby improving the production efficiency of the cell and reducing the cost.

[0071] According to some embodiments of the present application, the percentage of the surface area of the first texture structure occupied by the recess 110 can be 0.2-0.9; for example, it can be 0.2, 0.25, 0.3, 0.35, 0.4, 0.45, 0.5, 0.55, 0.6, 0.65, 0.7, 0.75, 0.8, 0.85, 0.9. By setting the recess 110 with a suitable area ratio, the film layer quality formed on the surface of the silicon substrate such as film uniformity, electrode contact resistance of the non-light receiving area and light trapping effect when applied to the light receiving area can be considered. The light receiving area corresponds to the front and / or back of the cell, and can at least correspond to the non-electrode area of the surface.

[0072] According to some embodiments of the present application, the maximum width of the recess 110 is 1-20 μm, for example, it can be 1 μm, 2 μm, 4 μm, 6 μm, 8 μm, 10 μm, 12 μm, 14 μm, 16 μm, 18 μm, 20 μm, etc.; the depth is 0.1-10 μm, for example, it can be 0.1 μm, 0.5 μm, 1.0 μm, 2 μm, 4 μm, 5 μm, 6 μm, 8 μm, 10 μm, 12 μm, 15 μm, 18 μm, 20 μm, etc. By controlling the width and depth of the recess, the surface of the silicon substrate has a suitable degree of undulating topography, thereby taking into account the film layer quality formed on the surface of the silicon substrate such as film uniformity, electrode contact resistance of the non-light receiving area and light trapping effect when applied to the light receiving area. The light receiving area corresponds to the front and / or back of the cell, and can at least correspond to the non-electrode area of the surface.

[0073] It should be noted that in some embodiments, the recesses 110 can have a bottom surface 111, and there is a relatively clear boundary between the bottom surface 111 and the sidewall of at least part of the protrusions 120; at this time, the "maximum width" of the recesses 110 can be the distance between the opposite edges of the bottom surface 111 or the diagonal length of the bottom surface 111, and the "depth" can be the distance between the bottom surface 111 and the top of the adjacent sidewall 121, which can correspond to the vertex of the similar pyramid structure or the top edge of the prism structure. In other embodiments, there is no relatively clear boundary between the bottom surface of the recesses 110 and the sidewall of part of the protrusions 120; at this time, the "maximum width" of the recesses 110 can be the spacing between adjacent protrusions 120, and the "depth" can be the distance between the bottom of the recesses 110 and the top of the adjacent protrusions 120.

[0074] Exemplarily, Figure 4 The scanning electron microscope (SEM) images of the silicon substrate according to another embodiment of the present application are shown, wherein a-c show the bottom surfaces of the recesses with different sizes. As shown in the a-c images of FIG. 6, Figure 4 As shown in the a-c images of FIG. 6, the first texture structure each includes a plurality of recesses 110 and a plurality of protrusions 120, and the percentage of the surface area of the first texture structure occupied by the recesses 110 is greater than the percentage of the surface area of the first texture structure occupied by the protrusions 120.

[0075] Further optionally, as shown in the b and c images of FIG. 6, in a unit area range on the surface of the silicon substrate, for example, in a range of 50 μm * 50 μm, the number of the protrusions 120 in the similar pyramid structure is less than the number of the protrusions 120 in the prism structure. Figure 4

[0076] In this way, by adjusting the percentage of the surface area of the first texture structure occupied by the recesses 110 to be greater than the percentage of the surface area of the first texture structure occupied by the protrusions 120, and / or the number distribution of the protrusions 120 in the similar pyramid structure in a unit area range on the surface of the silicon substrate to be less than the number distribution of the protrusions 120 in the prism structure, the quality of the film layer formed on the surface of the silicon substrate can be significantly improved, and / or the light absorption and the film layer quality can be balanced.

[0077] According to some embodiments of the present application, as shown in Figure 1 and Figure 3 ​As shown in FIGS. 1a and 1b, the bottom surface 111 of the recessed portion 110 can be a flat surface or a concave or convex polygonal surface. That is, from the thickness direction of the silicon substrate, the bottom surface of the recessed portion is relatively flat, which can be a flat surface or a substantially flat surface; from the perspective of the top view, the shape surrounded by the edge of the bottom surface of the recessed portion is a concave or convex polygonal shape. However, it is not limited thereto, and a topography with ups and downs or a curved and zigzag shape can also be formed. Specifically, the bottom surface 111 of the recessed portion 110 can include a plurality of sub-bottom surfaces 1111, and the plurality of sub-bottom surfaces 1111 are connected to form one or a combination of bump, step, zigzag, and curved structures. At this time, since the recessed portion 110 can provide a relatively flat bottom surface, it is beneficial to improve the quality of the film layer on the surface of the silicon substrate, such as film layer uniformity.

[0078] For the convenience of understanding, Figure 5 FIG. 1a is a schematic diagram of the bottom surface shape of the recessed portion of the silicon substrate according to an embodiment of the present application, and FIG. 1b is a schematic diagram of the bottom surface shape of the recessed portion of the silicon substrate according to another embodiment of the present application. Figure 5 FIG. 1a shows that the bottom surface 111 is a bump structure, which has a smaller height-width ratio compared to a similar pyramid structure, thereby being distinguished from the similar pyramid structure, FIG. 1b shows that the bottom surface 111 is a step structure, and FIG. 1c shows that the bottom surface 111 is a zigzag structure, and FIG. 1d shows that the bottom surface 111 is a curved structure. Of course, it is not limited thereto, and the plurality of sub-bottom surfaces 1111 can also be connected to form other types of structures, which will not be listed one by one.

[0079] Exemplarily, Figure 6 FIG. 2a is a schematic diagram of the bottom surface shape of the recessed portion of the silicon substrate according to an embodiment of the present application, and FIG. 2b is a schematic diagram of the bottom surface shape of the recessed portion of the silicon substrate according to another embodiment of the present application. Figure 6 The a frame of FIG. 2a shows that the bottom surface is a step structure. By setting the bottom surface 111 of the recessed portion 110 as a step structure, multiple-stage reflection can be formed when light is incident on the surface of the silicon substrate, the optical path is lengthened, and the light reflectivity is reduced. At the same time, the step structure can also increase the surface area of the silicon substrate, thereby facilitating the contact between the surface film layer, such as the passivation layer, and effectively reducing the density of the surface dangling bonds of the silicon substrate, thereby improving the passivation effect, and at the same time increasing the contact area of the surface film layer, such as the doped conductive layer, and reducing the contact resistance between the electrode and the doped conductive layer.

[0080] Further optionally, the step height of the step structure is 0.1-3 μm, which can be 0.1 μm, 0.5 μm, 1 μm, 1.2 μm, 1.5 μm, 1.8 μm, 2.0 μm, 2.2 μm, 2.5 μm, 2.8 μm, 3 μm, etc. By controlling the step height within a suitable range, the light trapping effect when applied to the light receiving area, the quality of the formed film layer, and the contact resistance of the electrode in the non-light receiving area can be better balanced. If the step height is too high, it is not conducive to the uniform deposition of the film layer.

[0081] As shown in FIG. 3a, the bottom surface 111 of the recessed portion 110 is a flat surface, and the bottom surface 111 of the recessed portion 110 is a flat surface. As shown in FIG. 3b, the bottom surface 111 of the recessed portion 110 is a flat surface, and the bottom surface 111 of the recessed portion 110 is a flat surface. Figure 6The b frame of figure shows that the bottom surface is in a gentle hill structure. By setting the bottom surface 111 of the recess 110 in a gentle hill structure, it is beneficial to improve the light trapping effect, reduce the light reflectivity, and reduce the electrode contact resistance of the non-light receiving area when applied to the light receiving area. The gentle hill structure can include a plurality of side edges formed by the intersection of the sub-bottom surfaces 1111, and the number of side edges can be 3, 4, 5, etc., without being limited thereto.

[0082] As shown in Figure 6 The c frame of figure shows that the bottom surface is in a curved structure, which is roughly in a worm shape or a fish carapace shape. The d frame shows that the bottom surface is in a combination structure of a broken line and a curve, for example, the bottom surface structure in the right frame of d figure forms a continuous area structure in a coral shape. By forming a rich microstructure morphology, it is beneficial to further improve the specific surface area of the silicon substrate surface, and the quality of the film layer formed on the silicon substrate surface, the electrode contact resistance of the non-light receiving area, and the light trapping effect when applied to the light receiving area can be better balanced. The light receiving area corresponds to the front and / or back of the cell, and can at least correspond to the non-electrode area of the surface. Moreover, the above irregular morphology can form more branch structures, which can provide more current paths for the solar cell, reduce the series resistance, and improve the fill factor. At the same time, the relatively rough surface is also beneficial to improve the electrode pulling force and avoid the slurry from falling off.

[0083] According to some embodiments of the present application, as shown in Figure 1 and Figure 3 The protruding part 120 has a plurality of side walls 121 extending from the recess part, and the included angle between two adjacent side walls 121 is 90°-150°, for example, it can be 90°, 95°, 100°, 105°, 110°, 115°, 120°, 125°, 130°, 135°, 140°, 145°, 150°, etc. By setting in this way, the problem of too sharp angle of the tower base bottom in the traditional square piece-shaped tower base structure can be improved. The average included angle between the side walls 121 of the present application is greater than 90°, and the angle is more gentle, which is more beneficial to the deposition of the film layer on the silicon substrate surface. When the film layer is a passivation layer, it is beneficial to improve the passivation performance. When the film layer is a doped conductive layer, it is beneficial to reduce the contact resistance between the electrode and the doped conductive layer.

[0084] Moreover, it is worth mentioning that a plurality of side walls 121 form a combination morphology similar to the prismatic structure / pyramid structure between adjacent recesses. This combination morphology structure is between the traditional pyramid structure and the traditional tower base structure, and balances the light trapping performance of the traditional pyramid structure and the passivation performance of the traditional tower base morphology, solves the contradiction of "high passivation-low light trapping" of the traditional polished surface, improves the light trapping performance, reduces the reflectivity, optimizes the passivation performance, and is beneficial to reduce the series resistance, improve the fill factor, and thus improve the cell conversion efficiency.

[0085] Further, with the increase of the number of side walls 121, the specific surface area is increased, which is beneficial for forming a light trapping structure when applied to the light receiving area, reducing light loss, and especially when applied to the light receiving area on the back of the cell, the light utilization rate of the back of the cell can be effectively improved, thereby improving the bifacial rate. Moreover, the side edges between adjacent side walls 121 can provide more anchor points for the deposition of the film layer, thereby improving the deposition quality of the film layer. For example, the number of side walls 121 can be greater than or equal to 6, such as 6, 7, 8, 9, 10, 11, or the like.

[0086] According to an embodiment of the present application, further as shown in the dashed line, Figure 3 At least part of the side wall 121 forms a step structure distributed along the extension direction of the surface of the silicon substrate, which is different from the step structure on the bottom surface 111, which is beneficial for further increasing the number of light reflection surfaces, prolonging the light layer, and thereby reducing the anti-reflection rate.

[0087] According to some embodiments of the present application, Figure 7 A partial cross-sectional SEM image of a silicon substrate according to an embodiment of the present application is shown in FIG. 1B, wherein Figure 7 As shown in FIG. 1B, the protruding part 120 on the opposite side of the recess 110 has a side wall 121 adjacent to the recess 110, and the inclination angle of the two side walls 121 can be 5-85°, such as 5°, 10°, 15°, 20°, 25°, 30°, 35°, 40°, 45°, 50°, 55°, 60°, 65°, 70°, 75°, 80°, 85°, or the like.

[0088] It should be noted that the "inclination angle" here can be the angle between the side wall 121 and the extension direction of the surface of the silicon substrate (which is perpendicular to the thickness direction of the silicon substrate). The inclination angles of the two side walls can be the same or different. When the inclination angles of the two side walls are different, it indicates that the protruding part is not a regular pyramid structure, and the inclination angles of the side walls are randomly distributed, increasing the number of multiple divergent broken lines or curved structures, which is applied to the scene with light receiving requirements, improving the light trapping effect or the bifacial rate.

[0089] Further, by setting a suitable inclination angle of the side wall, the protruding degree of the protruding part can also be adjusted, which is further beneficial for the deposition of the film layer such as the passivation layer or the doped conductive layer on the surface of the silicon substrate, improving the film layer quality, thereby improving the passivation effect. Moreover, when the electrode 200 is made on the silicon substrate, the metal paste can also be directed to penetrate in a certain direction, reducing the porosity of the contact area, thereby reducing the contact resistance.

[0090] According to some embodiments of the present application, Figure 8 A partial cross-sectional SEM image of a silicon substrate according to another embodiment of the present application is shown in FIG. 2B, wherein Figure 8As shown, the protrusions 120 located on opposite sides of a recess 110 each have a sidewall 121 adjacent to the recess 110. The inclination angle of one sidewall 121 is 5~40°, for example, 23.4° is shown in the figure, but it is not limited to this, and can also be 5°, 8°, 10°, 15°, 18°, 20°, 25°, 28°, 30°, 32°, 35°, 38°, 40°, etc. The inclination angle of the other sidewall 121 is 40~85°, for example, 47.6° is shown in the figure, but it is not limited to this, and can also be 40°, 42°, 45°, 50°, 53°, 55°, 60°, 65°, 68°, 70°, 75°, 76°, 80°, 85°, etc. The differentiated side tilt angle design facilitates the dispersion of film thickness deposited on the silicon substrate, preventing increased parasitic absorption in the light-receiving area due to excessively thick local films. Furthermore, it can disperse carrier recombination centers to different crystal planes of the silicon substrate, reducing the surface recombination rate and improving the open-circuit voltage when applied to solar cells.

[0091] According to the embodiments of this application, Figure 9 This is a cross-sectional SEM image of the silicon substrate according to an embodiment of this application, as shown below. Figure 9 As shown, the first texture structure of this application is a structure with high and low undulations along the thickness direction of the silicon substrate. The first texture structure includes a plurality of recesses 110 and a plurality of protrusions 112, with the protrusions 112 located between adjacent recesses 110.

[0092] According to some embodiments of this application, Figure 10 Here is a cross-sectional SEM image of a silicon substrate according to another embodiment of this application, as shown below. Figure 10 As shown, at least some of the recesses 110 have a height difference between their bottoms, and at least two recesses 110 have a height difference between their bottoms greater than the height difference between their tops 122. Here, the top 122 of the protrusion 120 can be, for example, the apex of a pyramidal structure or the apex of a prism; the bottom of the recess 110 can be the bottom surface 110 or the lowest point of the recess 110 in the thickness direction of the silicon substrate. Two recesses 110 can be adjacent or non-adjacent; similarly, two protrusions 120 can be adjacent or non-adjacent. Further, the height difference between the tops 122 of two protrusions 120 respectively adjacent to the two recesses 110 can be determined.

[0093] Therefore, by setting the first texture structure as a larger height difference of the recessed portions, i.e., the height of the recessed portions is more uneven than the relatively flat recessed portions, when applied to the light-receiving region, the reflectivity of the incident light can be increased, the light trapping effect can be improved, and the contact resistance of the electrode can be reduced, and the difference between the light trapping and contact performance of the recessed portions and the protruding portions can be reduced. In addition, the structure with high and low relief can also disperse the stress of the film layer, reduce the stress difference between the recessed portions and the protruding portions, and reduce the film layer cracking.

[0094] For example, the height difference between the bottoms of the two recessed portions 110 is 0.1-10 μm, such as 0.1 μm, 0.5 μm, 1 μm, 1.5 μm, 2 μm, 3 μm, 4 μm, 5 μm, 6 μm, 7 μm, 8 μm, 9 μm, 10 μm, etc., and the height difference between the tops 122 of the two protruding portions 120 is 0.1-5 μm, such as 0.1 μm, 0.2 μm, 0.4 μm, 1 μm, 1.5 μm, 2 μm, 3 μm, 4 μm, 5 μm, etc.

[0095] According to some embodiments of the present application, another part of the protruding portions 120 in the first texture structure of the present application can also have a similar frustum structure, Figure 11 The SEM of the protruding portion of the silicon substrate of another embodiment of the present application is shown in FIG. 10. Figure 11 As shown, the frame shows the case where the protruding portion 120 has a similar frustum structure. Here, the "similar frustum structure" has a platform connected to the side wall 121.

[0096] Optionally, the area ratio of the protruding portion 120 with a similar frustum structure is less than or equal to 50% of the area ratio of the protruding portion 120, and can be 0, 10%, 15%, 20%, 25%, 30%, 35%, 40%, 45%, 50%, etc. For example, as shown in FIGS. 10a-10c, the protruding portion 120 is mainly in a similar frustum structure and a prism structure, and less in a similar frustum structure. Figure 4

[0097] Therefore, by setting the area ratio of the similar frustum structure to be small, and cooperating with the recessed portion with a large bottom area, the light trapping effect can be improved when applied to the light-receiving region, wherein the light-receiving region corresponds to the front and / or back of the cell, and can at least correspond to the non-electrode region of the surface, and the contact resistance of the electrode can also be reduced.

[0098] ​According to some embodiments of the present application, the at least partial protrusions 120 are arranged along the first direction S1 to form a continuous or discontinuous linear protrusion structure, which is spaced apart in a second direction S2 intersecting the first direction S1. By arranging the linear protrusion structure, the light trapping effect can be further enhanced when applied to the light receiving region, the reflection can be reduced, and the contact resistance of the non-light receiving region can be reduced. The light receiving region corresponds to the front surface and / or the back surface of the cell, and can at least correspond to the non-electrode region of the surface.

[0099] It should be noted that the "linear" means that the protrusions 120 extend linearly, curvilinearly or polygonal linearly along the arrangement direction, i.e. the first direction S1, and that the length of the protrusion structure in the first direction is significantly greater than the width in the second direction, for example, at least 10:1, 20:1, 40:1, 50:1, etc.

[0100] According to some embodiments of the present application, the linear protrusion structure can extend linearly, curvilinearly or polygonal linearly along the first direction S1. Figure 12 The structure diagram of the linear protrusion structure of the silicon substrate according to the embodiments of the present application is schematically illustrated in the same figure, and for the actual product, one or more shapes can be selected and combined for use. The dashed box schematically shows the position of the recess 110, and does not represent the shape of the recess 110. The linear protrusion structure 123 can extend linearly, curvilinearly or polygonal linearly as shown in the left one of Figure 12 , the left two of Figure 12 , the left three of Figure 12 , or the right one of Figure 12 . Further optionally, part of the protrusions 120 in the linear protrusion structure 123 are in a string shape. However, it is not limited to this, and can also extend in other shapes.

[0101] Exemplarily, Figure 13 the SEM diagram of the linear protrusion structure of the silicon substrate according to another embodiment of the present application, wherein a~b are the linear protrusion structures in different scales, as shown in Figure 12 the left box of the a diagram shows that the linear protrusion structure 123 extends curvilinearly along the first direction S1, and further part of the protrusions 120 are distributed in a string shape; the right box shows that the linear protrusion structure 123 extends linearly along the first direction S1. As shown in Figure 13 the b diagram shows that the linear protrusion structure extends discontinuously linearly along the first direction S1.

[0102] Thus, by adjusting the morphology of the linear protrusion structure 123, especially by having some of the protrusions in the linear protrusion structure 123 arranged in a string pattern, the specific surface area can be increased, so that when the first texture structure is applied to the light-receiving area, the light-trapping effect can be further enhanced, the reflection can be reduced, and the electrode contact resistance of the non-light-receiving area can be reduced. The light-receiving area corresponds to the front and / or back of the battery, and can at least correspond to the non-electrode area of ​​the surface.

[0103] According to some embodiments of this application, this linear protrusion structure 123 can be aligned with the extension direction of the current collector electrode, thereby dispersing stress and improving the mechanical strength of the battery when welding current bus structures such as welding strips, and making it less likely for the battery cells to crack.

[0104] like Figure 13 As shown in Figures a and b, the spacing of the linear protrusions in the second direction can be 1~20μm, for example, it can be 1μm, 2μm, 3μm, 4μm, 5μm, 6μm, 7μm, 8μm, 9μm, 10μm, 11μm, 12μm, 13μm, 14μm, 15μm, 16μm, 17μm, 18μm, 19μm, 20μm, etc.

[0105] Optionally, the number of linear protrusions 123 within a 100μm range along the second direction is greater than or equal to 5, for example, 6, 7, 8, 9, 10... or more. By setting an appropriate number of linear protrusions, it is beneficial to obtain a suitable specific surface area, which can ensure a certain light-trapping effect when applied to the light-receiving area, and also helps to reduce the electrode contact resistance in the non-light-receiving area. The light-receiving area corresponds to the front and / or back of the battery, and can at least correspond to the non-electrode area of ​​that surface.

[0106] According to the embodiments of this application, Figure 14 This is a SEM image of a silicon substrate with particle bumps according to another embodiment of this application. a shows particle bumps, and b shows cluster bumps, as shown. Figure 14 As shown in Figure a, the surface of the silicon substrate 100 may also have multiple particle protrusions 130, distributed in the recess 110 and / or the protrusion 120; by setting the particle protrusions on the surface of the silicon substrate, it is beneficial to increase the multiple reflections of light and increase the light utilization rate without significantly degrading the passivation effect.

[0107] According to embodiments of this application, the distribution of multiple particle protrusions can be as follows: Figure 14 As shown in Figure a, the distribution is random or discrete. However, it is not limited to this, such as... Figure 14 As shown in Figure b, at least some of the particle protrusions 130 aggregate into multiple cluster protrusions 131. These cluster protrusions facilitate further increasing the multiple reflections of light, thereby increasing light utilization. Furthermore, the multiple cluster protrusions 131 can be distributed randomly or discretely.

[0108] According to the embodiments of the present application, the silicon substrate surface has particle protrusions, after the tunneling passivation structure is covered on the silicon substrate surface, the surface of the tunneling passivation structure also has similar particle protrusions, and after the passivation film or the anti-reflection film is further covered on the surface of the tunneling passivation structure, the surface of the passivation film or the anti-reflection film also has similar particle protrusions, that is, the particle protrusions on the surface of the silicon substrate will cause the tunneling passivation structure, the passivation film or the anti-reflection film to also have conformal particle protrusions, and further, at least part of the plurality of particle protrusions 130 on the surface of the tunneling passivation structure, the passivation film or the anti-reflection film can also be gathered into a plurality of cluster protrusions 131. The particle protrusions on the surface of the tunneling passivation structure, the passivation film or the anti-reflection film can compensate for the power loss caused by the parasitic absorption of the tunneling passivation structure on the basis of maintaining good tunneling passivation effect, and further improve the contribution of the tunneling passivation structure to the battery efficiency.

[0109] According to the embodiments of the present application, the width of the particle protrusion 130 is 0.01-2 μm, for example, it can be 0.01 μm, 0.05 μm, 1 μm, 1.2 μm, 1.5 μm, 1.8 μm, 2 μm, etc., and the height is 0.01-1 μm, for example, it can be 0.01 μm, 0.02 μm, 0.05 μm, 0.08 μm, 1 μm, etc. Here, the width of the particle protrusion 130 can be the maximum dimension in the surface direction of the silicon substrate, and the height can be the dimension in the direction away from the surface of the silicon substrate. By controlling the size of the particle protrusion within a suitable range, the adverse effects of the particle protrusion on the uniformity of the film layer deposition on the silicon substrate can be reduced to ensure the passivation effect, while the multiple reflection of light is facilitated to increase the light utilization.

[0110] According to the embodiments of the present application, the protruding portion 120 has a plurality of side walls 121 extending to the recessed portion 110, and at least part of the side walls 121 has transverse, diagonal or longitudinal texture.

[0111] Exemplarily, Figure 15 The SEM diagram of the texture structure of the side wall of the protruding portion according to another embodiment of the present application is shown, wherein a shows transverse or diagonal texture, and b shows longitudinal texture; as Figure 15 As shown in a of the figure, at least part of the side wall 121 has transverse texture 1211 or diagonal texture 1212; or as Figure 15 As shown in b of the figure, at least part of the side wall 121 has longitudinal texture 1213. When applied to a solar cell, the transverse texture 1211 or the diagonal texture 1212 is beneficial to increase the roughness of the side wall, which can increase the contact area of the silicon substrate 100 and the film layer such as the electrode on the silicon substrate 100, thereby improving the tensile performance and contact performance of the electrode. The longitudinal texture 1213 is beneficial to increase the number of light reflection areas and improve the light utilization.

[0112] Furthermore, such as Figure 15 As shown in Figure b, at least a portion of the sidewall 121 has a longitudinally arranged texture 1213, which can further increase the number of light-reflecting surfaces and improve light utilization.

[0113] Based on the first textured structure on the silicon substrate surface described in the embodiments of this application, compared with the traditional square-shaped tower base structure, the reflectivity of the silicon substrate surface is reduced from 38%~40% to 29%~34%. It can be seen that the first textured structure provided in the embodiments of this application is beneficial to improving the light utilization rate of the battery, especially when applied to the light-receiving area on the back of the battery, it is beneficial to further improve the bifaciality of the battery.

[0114] The first texture structure on the surface of the silicon substrate according to the embodiments of this application has been described above. Based on the morphology of the first texture structure described above, it can be obtained by selecting appropriate texturing and polishing processes. Specifically, it can include the following operations:

[0115] First, the original silicon substrate is texturized to form a textured structure on its surface; this textured structure may include pyramids. Second, the textured surface is polished to transform it into a first textured structure; the polishing solution used includes 0.3-5% (e.g., 0.3%, 0.5%, 1%, 2%, 3%, 4%, 5%, etc.) of an alkali such as NaOH and 0.1-3% (e.g., 0.1%, 0.5%, 1%, 1.5%, 2%, 2.5%, 3%, etc.) of a polishing additive. Third, the polished silicon substrate is cleaned and dried to obtain a silicon substrate with the first textured structure. The cleaning process may include, for example, ozone cleaning and mixed acid cleaning. It is understood that by adjusting appropriate texturizing and polishing conditions, such as temperature and time, based on different polishing solutions, a silicon substrate with the aforementioned first textured structure can be obtained.

[0116] According to some embodiments of this application, by adjusting the polishing slurry used for polishing, an alkali including organic and inorganic alkalis is employed. The inorganic alkali is sodium hydroxide or potassium hydroxide, and the organic alkali is one of tetramethylammonium hydroxide, ethylenediamine, ethylenetriamine, methyldiamine, and tetrabutylammonium hydroxide. Additives mainly include surfactants such as sodium benzoate, defoamers, and surfactants, which can help to further regulate the formation of, for example, particle protrusions on the surface of the silicon substrate and / or the formation of textured structures such as transverse, diagonal, or longitudinal textures on the sidewalls of the protrusions.

[0117] According to some embodiments of this application, for example... Figure 16As shown, the solar cell can further include a plurality of electrodes 200 located on the opposite two surfaces of the silicon substrate 100, each of the electrodes 200 extending in the same or substantially same direction as the first direction S1 and being spaced apart along the second direction S2. Here, the substantially same direction means that the included angle between the extending direction of the electrode 200 and the first direction S1 is less than 45°, optionally less than 30°, and further optionally less than 10°. In this way, setting the extending direction of the electrode 200 to be the same or substantially same as the extending direction of the linear protrusion structure 123 can be conducive to improving the electrode quality.

[0118] Further optionally, the electrode 200 can be a current collecting electrode, and a current collecting structure such as a current collecting electrode or other current collecting structure such as a solder strip is adapted to be connected to the current collecting electrode. When other current collecting structure is subsequently soldered to the current collecting electrode or the current collecting electrode, since the applying direction of the soldering force is not consistent with the extending direction of the linear protrusion structure, it is conducive to dispersing stress, thereby improving the mechanical strength of the cell and not easily causing cell cracking.

[0119] According to embodiments of the present application, the material of the electrode 200 can be copper, silver-coated copper, aluminum, silver, or the like, and can be made by printing, electrodeposition, or the like. For example, metal paste can be printed on the silicon substrate 100 by printing, and the metal paste can be sintered to realize metallization. The printing method can be screen printing, inkjet printing, or the like, and is preferably a low-cost screen printing method.

[0120] According to some embodiments of the present application, the solar cell can further include two laminated films 102 disposed on at least one side of the silicon substrate 100, which can be disposed on or in the surface of the silicon substrate 100. For example, Figure 16 As shown, the two laminated films 102 can be located on the first surface 101a and the second surface 101b of the silicon substrate 100, respectively, and the corresponding solar cell is a double-sided contact cell, but is not limited thereto. The two laminated films 102 can be located on the first surface 101a of the silicon substrate 100, and the corresponding solar cell is a back contact cell. The first texture structure is located on the surface of the silicon substrate corresponding to at least one laminated film 102, and the laminated film 102 can include a doped conductive layer and a passivation or anti-reflection layer disposed away from the silicon substrate. In this way, based on the first texture structure of the silicon substrate 100, it is conducive to improving the film formation quality of the doped conductive layer and improving the passivation effect.

[0121] Optionally, the material of the doped conductive layer may include at least one semiconductor material selected from monocrystalline silicon, amorphous silicon, polycrystalline silicon, microcrystalline silicon, etc. In some embodiments, the doped conductive layer may be deposited on the surface of the silicon substrate 100 by a chemical vapor deposition process. In other embodiments, the doped conductive layer may be obtained within the surface of the silicon substrate 100 by a doping process. The passivation or antireflection layer is located on the surface of the doped conductive layer away from the silicon substrate 100. The passivation or antireflection layer can simultaneously provide protection and passivation for the underlying silicon substrate or functional layer, such as a P-type or N-type doped conductive layer, and reduce the reflection of light incident on the third surface 101c or the fourth surface 101d. Exemplarily, the passivation or antireflection layer may be a single-layer film formed of silicon dioxide, aluminum oxide, silicon nitride, or silicon oxynitride, or a multilayer film composed of one or more of the aforementioned materials.

[0122] Optionally, the stacked film 102 may further include an interface passivation layer (not shown in the figure), located between the silicon substrate 100 and the doped conductive layer, for selectively passing charge carriers and achieving a field passivation effect, thereby improving the carrier separation and collection efficiency. Exemplarily, the interface passivation layer may be made of alumina, silicon oxide, titanium oxide, etc., and may form a tunneling oxide passivation contact (TOPCon) structure with the doped conductive layer.

[0123] Here, the laminated membrane 102 is suitable for selectively transporting charge carriers such as electrons or holes. For example... Figure 16 As shown, the stacked film 102 can be disposed on the entire surface of the silicon substrate 100, and the corresponding doped conductive layer is disposed on the entire surface of the silicon substrate. However, it is not limited to this. The stacked film 102 can also be disposed only on a portion of the surface of the silicon substrate 100, and the corresponding doped conductive layer is arranged at intervals on the surface of the silicon substrate.

[0124] For example, such as Figure 16 As shown, the silicon substrate 100 may include a first surface 101a and a second surface 101b opposite to each other, and a stacked film 102 may be located in a portion of the first surface 101a. The stacked film 102 located on the first surface 101a may include a first doped conductive layer 1021 and a first passivation or antireflection layer 1041, wherein: the first doped conductive layer 1021 extends in a direction substantially the same as the first direction S1 and is spaced apart in a second direction S2 intersecting the first direction S1, and there is a first gap between adjacent first doped conductive layers 1021; the first passivation or antireflection layer is located on the surface of the first doped conductive layer 1021 away from the silicon substrate 100.

[0125] According to some embodiments of the present application, the other stack film 102 covers the second surface 101b entirely, and the stack film 102 on the second surface 101b includes a second doped conductive layer 1021 and a second passivation or anti-reflection layer 1042, wherein the conductive type of the second doped conductive layer 1022 is opposite to that of the first doped conductive layer 1021.

[0126] Further optionally, the first doped conductive layer 1021 can be an N-type or P-type doped polysilicon layer to form a poly-finger structure with the electrode 200. And / or, the second doped conductive layer 1022 can be a doped layer formed in the surface of the silicon substrate 100 by a diffusion process. In this case, the solar cell is a TOPCon cell.

[0127] In this case, the first surface 101a corresponds to the back surface of the cell, and the first texture structure is located on the region of the first surface 101a corresponding to the first doped conductive layer 1021 and the first spacing region. In an optional embodiment, the first texture structure on the region of the first surface 101a outside the poly-finger structure (i.e., the first spacing region) is rougher than the first texture structure on the first doped conductive layer 1021 (i.e., the poly-finger). This is more conducive to improving the light trapping effect on the region of the first surface 101a outside the poly-finger structure and reducing the contact resistance of the electrode, while taking into account the passivation effect of the poly-finger region, such as the poly-finger region on the first surface forming a P-type doped polysilicon layer.

[0128] For example, the area ratio of the convex part of the first texture structure on the region outside the poly-finger structure on the surface of the silicon substrate can be greater than the area ratio of the convex part of the first texture structure on the poly-finger; and / or, the number or area ratio of the sub-bottom surface of the first texture structure on the region outside the poly-finger structure in a non-planar structure such as a pyramid, a step, a zigzag, and / or a curved structure can be greater than the number or area ratio of the sub-bottom surface of the first texture structure on the poly-finger; and / or, the distribution density of the linear convex structure of the first texture structure on the region outside the poly-finger structure can be greater than the distribution density of the linear convex structure of the first texture structure on the poly-finger, and so on. Similarly, the same distribution rules apply to the size of the bottom height difference of the concave part and the top height difference of the convex part, the distribution number or density of the particle protrusions, and the texture distribution number or density on the sidewall of the convex part. The distribution density can be the number of distributions per unit area.

[0129] According to some embodiments of the present application, for example, Figure 16As shown, one of the two surfaces of the silicon substrate 100, i.e. the first surface 101a has a first texture structure including protrusions in the form of pyramid-like structures, and the other surface, i.e. the second surface 101b has a second texture structure including a plurality of pyramids. The height of the pyramids is greater than the height of the pyramid-like structures, and / or the distribution density of the pyramids per unit length is greater than the distribution density of the pyramid-like structures per unit length; for example, the ratio between the height of the pyramids and the height of the pyramid-like structures is 1-70; for example, it can be 1, 10, 20, 30, 40, 50, 60, 70, etc.; and / or the height of the pyramids is 2-7 μm, for example, it can be 2 μm, 3 μm, 4 μm, 5 μm, 6 μm, 7 μm, etc., and the height of the pyramid-like structures is 0.1-2 μm, for example, it can be 0.1 μm, 0.5 μm, 1 μm, 1.5 μm, 2 μm, etc.; and / or the ratio between the base width of the pyramids and the base width of the pyramid-like structures is 0.02-10, for example, it can be 0.02, 0.1, 0.5, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, etc., preferably 0.1-8; and / or the base width of the pyramids is 0.1-20 μm, for example, it can be 0.1 μm, 0.5 μm, 1 μm, 5 μm, 10 μm, 15 μm, 20 μm, etc., and the base width of the pyramid-like structures is 0.2-5 μm, for example, it can be 0.2 μm, 0.8 μm, 1 μm, 2 μm, 3 μm, 4 μm, 5 μm, etc.; and / or the vertex angle of the pyramids is smaller than the vertex angle of the pyramid-like structures; and / or the vertex angle of the pyramids is 30-90°, for example, it can be 30°, 40°, 60°, 80°, 90°, etc., and the vertex angle of the pyramid-like structures is 45-150°, for example, it can be 45°, 60°, 80°, 90°, 110°, 130°, 150°, etc.; and / or the ratio between the number of side edges of the pyramids and the number of side edges of the pyramid-like structures is 0.3-5, for example, it can be 0.3, 0.5, 1, 1.5, 2, 2.5, 3, 3.5, 4, 4.5, 5, etc. In this way, the roughness of the second texture structure on the fourth surface 101d can be controlled to be greater than the roughness of the first texture structure on the third surface 101c, thereby more favorably improving the light trapping effect on the front surface of the battery and improving the electrical contact performance of the electrode, while simultaneously considering passivation, double-sided rate and contact resistance on the back surface of the battery.

[0130] In the solar cell, since the film layer, such as the stack film including the doped conductive layer, the passivation or anti-reflection layer, is conformally deposited on the silicon substrate 100, the same second texture structure can be observed on the surface of the solar cell. Thus, for the layer measurement of the second texture structure of the silicon substrate surface, the second texture structure on the solar cell product can be directly tested, or the stack film on the surface of the solar cell can be removed to expose the surface of the silicon substrate, and then the test is performed, and the test method can be, for example, a scanning electron microscope (SEM) or an optical microscope.

[0131] According to some embodiments of the present application, the solar cell can further include a first interface passivation layer 1031 between the silicon substrate 100 and the first doped conductive layer 1021, which can be, for example, aluminum oxide, silicon oxide, titanium oxide, etc., and the first doped conductive layer 1021 forms a TOPCon structure.

[0132] According to embodiments of the present application, the electrode 200 can include a first electrode 210 and a second electrode 220, wherein the first electrode 210 is located on the surface of the first doped conductive layer 1021 away from the silicon substrate 100 and is in electrical contact with the first doped conductive layer 1021; and the second electrode 220 is located on the surface of the second doped conductive layer 1022 away from the silicon substrate 100 and is in electrical contact with the second doped conductive layer 1022.

[0133] By testing the efficiency and fill factor of the TOPCon cell with the first texture structure and the TOPCon cell with the conventional tower base structure as shown in Figure 16 The results show that the electrode printed based on the first texture structure of the present application has better quality than the conventional tower base structure, the solar cell containing the first texture structure of the present application has an improved fill factor of 0.16 and a cell efficiency of 0.06% compared with the conventional tower base structure, and the first texture structure of the present application is more conducive to balancing the electrical contact performance, passivation effect and light trapping effect.

[0134] Table 1

[0135]

[0136] Exemplarily, Figure 17 The structure diagram of the solar cell according to another embodiment of the present application is shown in Figure 17As shown, the main difference from the above-mentioned TOPCon cell is that one stack film 102 covers the first surface 101a entirely, which includes a first doped conductive layer 1021 and a first passivation or anti-reflection layer 1041. Another stack film 102 is arranged on part of the second surface 101b, which includes a second doped conductive layer 1022 and a second passivation or anti-reflection layer 1042, wherein the second doped conductive layer 1022 extends in a direction substantially the same as the first direction S1 and is spaced apart along a second direction S2 intersecting the first direction S1; the second passivation or anti-reflection layer 1042 is located on the surface of the second doped conductive layer 1022 away from the silicon substrate 100.

[0137] One of the first doped conductive layer 1021 and the second doped conductive layer 1022 can be an N-type doped polysilicon layer, and the other can be a P-type doped polysilicon layer. The second doped conductive layer 1022 cooperates with the electrode 200 to form a poly-finger structure on the second surface. At this time, taking the second surface corresponding to the front surface of the cell as an example, the first texture structure is located on the region of the first surface 101a corresponding to the first doped conductive layer 1021 and the region of the second surface 101b corresponding to the second doped conductive layer and the second spacing region, respectively. Then, the first texture structure on the region of the second surface 101b outside the poly-finger structure (i.e., the second spacing region) is rougher than the first texture structure on the second doped conductive layer 1022 (i.e., the poly-finger), at which time the light trapping effect and the contact resistance of the electrode are prioritized. The roughness of the first texture structure, for example, the area ratio of the projection of the protruding part on the surface of the silicon substrate, the number or area ratio of the sub-bottom surface in the non-planar structure, the distribution density of the linear protruding structure, the height difference of the bottom of the recessed part and the height difference of the top of the protruding part, etc. have the above-mentioned similar distribution rules, the distribution number or density of the granular protrusions, the number or density of the texture on the side wall of the protruding part.

[0138] According to some embodiments of the present application, the first texture structure on the second surface 101b corresponding to the second doped conductive layer 1022 is rougher than the first texture structure on the first surface 101a corresponding to the first doped conductive layer 1021, at which time the light trapping effect and the contact resistance of the electrode on the front surface of the cell are prioritized. The roughness of the first texture structure, for example, the projection area ratio of the protruding part, the number or area ratio of the sub-bottom surface in the non-planar structure, the distribution density of the linear protruding structure, the height difference of the bottom and the top of the recessed part, the distribution number or density of the granular protrusions, the number or density of the texture distribution on the side wall of the protruding part, etc. have the above-mentioned similar distribution rules.

[0139] According to some embodiments of the present application, the stack film 102 on the first surface 101a can further include a first interface passivation layer 1031, and the stack film 102 on the second surface 101b can further include a second interface passivation layer 1032.

[0140] Of course, it is not limited to this, and the Figure 17 The first doped conductive layer 1021 in the solar cell shown in FIG. 1 can be arranged to extend in a direction substantially the same as the first direction S1 and be spaced apart along a second direction S2 intersecting the first direction S1, and the first doped conductive layer 1021 cooperates with the electrode 200 to form a poly-finger structure on the first surface. Taking the first surface 101a corresponding to the back surface of the cell as an example, the first texture structure on the side surface of the silicon substrate corresponding to the region outside the poly-finger structure on the first surface 101a (i.e., the first spacing region) is coarser than the first texture structure on the first doped conductive layer 1021 (i.e., the poly-finger). At this time, the light trapping effect and the contact resistance of the electrode are comprehensively considered. Thus, it is more conducive to improving the light trapping effect and the contact resistance of the electrode at the first surface 101a. Further, if the second surface 101b corresponds to the front surface of the cell and is the main light receiving surface, the first texture structure on the region outside the poly-finger structure on the second surface 101b (i.e., the second spacing region) is coarser than the first texture structure on the region outside the poly-finger structure on the first surface 101a (i.e., the first spacing region). At this time, the light trapping effect of the second surface is given priority. Optionally, the P-type doped semiconductor layer is located on the second surface, and the N-type doped semiconductor layer is located on the first surface. The first texture structure on the region of the poly-finger structure on the second surface 101b (i.e., the second doped conductive layer 1022) is smoother than the first texture structure on the region of the poly-finger structure on the first surface 101a (i.e., the first doped conductive layer 1021). At this time, the tunneling passivation effect of the P region is given priority. Thus, it is more conducive to improving the passivation effect of the P-type doped semiconductor layer. The roughness of the first texture structure, such as the area ratio of the protruding part on the silicon substrate, the number or area ratio of the sub-bottom surface of the non-planar structure, the distribution density of the linear protruding structure, the bottom height difference and top height difference of the recessed part, the distribution number or density of the particle protrusions, and the number or density of the texture distribution on the side wall of the protruding part, has the above similar distribution rule.

[0141] Of course, it can be understood that, for example Figure 16 or Figure 17The first textured structure can also not be arranged on the region of the first surface 101a corresponding to the first interval region, and / or the region of the second surface 101b corresponding to the second interval region, for example, a second textured structure can be arranged, and the like, without being limited thereto.

[0142] Exemplarily, Figure 18 A structure diagram of a solar cell according to another embodiment of the present application is shown in FIG. 4, which is similar to the structure diagram shown in FIG. 3, and the difference is that the first textured structure is arranged on the region of the first surface 101a corresponding to the first interval region, and the region of the second surface 101b corresponding to the second interval region. Figure 18 As shown, the two stacked films 102 are located on the first surface 101a, the stacked film located on the first surface includes the first doped conductive layer 1021 and the second doped conductive layer 1022, which are alternately distributed on the first surface 101a of the silicon substrate 100, and the passivation or anti-reflection layer 104 located on the surface of the first doped conductive layer 1021 and the second doped conductive layer 1022 away from the silicon substrate 100, wherein the first doped conductive layer 1021 can be an N-type doped conductive layer, and the second doped conductive layer 1022 can be a P-type doped conductive layer.

[0143] The first textured structure is arranged on the region of the first surface 101a corresponding to the first doped conductive layer 1021 and the second doped conductive layer 1022, respectively, and the first textured structure corresponding to the first doped conductive layer 1021 on the first surface 101a is rougher than the first textured structure corresponding to the second doped conductive layer 1021. In this way, the first textured structure corresponding to the N-type doped conductive layer on the first surface 101a is rougher than or equivalent to the first textured structure corresponding to the P-type doped conductive layer, which is beneficial to reducing the difference in the tunneling passivation effect between the PN two regions, improving the photoluminescence ability of the junction region, and improving the photoelectric conversion efficiency of the cell. The roughness of the first textured structure, for example, the area ratio of the protruding part on the silicon substrate, the number or area ratio of the sub-bottom surface in the non-planar structure, the distribution density of the linear protruding structure, the bottom height difference and the top height difference of the recessed part, the distribution number or density of the particle protrusion, and the number or density of the texture distribution on the side wall of the protruding part, and the like have the above similar distribution rules.

[0144] According to another aspect of the present application, a photovoltaic module is provided, which includes: a silicon substrate as described above; or a plurality of the above-mentioned solar cells as described above.

[0145] According to the embodiments of the present application, the above-mentioned solar cells can be connected in series to form a solar cell string; and an encapsulation layer covering the outer periphery of the solar cell.

[0146] According to the embodiments of the present application, the number of the series-connected solar cells can be 4-80, for example, 4, 24, 54, 72, 78, etc. The plurality of solar cells can form a plurality of solar cell strings, the cells in the solar cell string are connected in series, and the solar cell strings can be connected in series or in parallel, and the solar cell strings are connected through bus bars.

[0147] According to the embodiments of the present application, the encapsulation layer can include a back plate, an encapsulation adhesive film, a glass panel, etc. to improve the stability of the solar cell string. The glass panel is located on the front side of the solar cell string, and the back plate is located on the back side of the solar cell string, both of which play a protective role; the adhesive film is an adhesive film between the solar cell and the glass panel and the back plate, which plays a role of adhesion and fixation, and must be made of transparent material.

[0148] The above-described specific embodiments further illustrate the purpose, technical solutions and beneficial effects of the present application, and it should be understood that the above-described is only a specific embodiment of the present application and is not intended to limit the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A solar cell comprising a silicon substrate, the silicon substrate comprising two opposite surfaces, at least one surface having a first texture structure, the first texture structure being a non-pyramidal texture structure, the first texture structure comprising: a plurality of recesses each recessed towards an interior of the silicon substrate; and a plurality of protrusions located between adjacent recesses, part of the protrusions having a diverging fold line structure or a curved structure in a direction from the protrusion to the recess. 2.The solar cell of claim 1, wherein: a percentage of the protrusions in a surface area of the first texture structure is less than or equal to 50% and greater than or equal to 10%, and / or a maximum width of the recesses is 1-20 μm and a depth of the recesses is 0.1-10 μm; and / or a percentage of the protrusions in a surface area of the first texture structure is greater than 50% and less than or equal to 80%. 4.The solar cell of claim 1, wherein: the protrusions have a plurality of side walls extending towards the recesses; part of the protrusions have an apex, and adjacent side walls intersect to form a side edge around the apex in the diverging fold line structure or the curved structure; and / or part of the protrusions have a prismatic structure, and opposite side walls intersect to form a top edge extending in a line. the recesses have a bottom surface, the bottom surface of the recesses comprising a plurality of sub-bottom surfaces connected in a combination of one or more of a hill, a step, a fold line, or a curved line structure. a height difference exists between bottoms of at least part of the recesses, and the height difference between bottoms of at least two of the recesses is greater than a height difference between tops of at least two of the protrusions; and / or the height difference between bottoms of two of the recesses is 0.1-10 μm, and the height difference between tops of two of the protrusions is 0.1-5 μm. the protrusions have a plurality of side walls extending towards the recesses, an included angle between two adjacent side walls is 90-150°; and / or at least part of the side walls have a step structure distributed along a direction of extension of the surface of the silicon substrate.

3. The solar cell of claim 1, wherein, the protrusions located on opposite sides of one of the recesses each have a side wall adjacent to the recess, and an inclination angle of the two side walls is 5-85°; and / or the inclination angles of the two side walls are different, one of the inclination angles is 5-40°, and the other of the inclination angles is 40-85°. part of the protrusions have a prismatic structure, and opposite side walls intersect to form a top edge extending in a line. at least part of the protrusions are arranged in a first direction to form a continuous or discontinuous linear protrusion structure, and the linear protrusion structure is spaced apart in a second direction intersecting the first direction. the linear protrusion structure extends in a straight line, a curve, or a fold line in the first direction; and / or the spacing of the linear protrusion structure in the second direction is 1-20 μm. ​ ​ 5. The solar cell of claim 1, wherein, ​ 6. The solar cell of claim 1, wherein, ​ ​ 7. The solar cell of claim 1, wherein, ​ ​ ​ 8. The solar cell of claim 1, wherein, ​ ​ 9. The silicon substrate of claim 1, wherein, ​ 10. The solar cell of claim 1, wherein, ​ 11. The solar cell of claim 10, wherein, ​ ​ And / or, the number of the linear protrusion structures in a range of 100 μm along the second direction is greater than or equal to 5; And / or, the linear protrusion structures are arranged in a string shape.

12. The solar cell of claim 1, wherein, The surface of the silicon substrate has a plurality of particle protrusions distributed in the concave portions and / or the protrusion portions; At least part of the particle protrusions are gathered into a plurality of cluster protrusions; and / or, the width of the particle protrusions is 0.01-2 μm, and the height is 0.01-1 μm.

13. The solar cell of claim 1, wherein, The protrusion portion has a plurality of side walls extending to the concave portion, at least part of the side walls have transverse, diagonal or longitudinal textures; and / or, at least part of the side walls have oppositely arranged longitudinal textures.

14. The solar cell of claim 1, wherein, The silicon substrate further comprises a pyramid texture structure; the first texture structure is located on one of the two surfaces of the silicon substrate, and the pyramid texture structure is located on the other of the two surfaces of the silicon substrate; the first texture structure comprises protrusion portions in a similar pyramid structure, and the pyramid texture structure comprises a plurality of pyramids; Wherein, the height of the pyramid is greater than the height of the similar pyramid structure; and / or, the ratio between the height of the pyramid and the height of the similar pyramid structure is 1-70; and / or, the ratio between the bottom width of the pyramid and the bottom width of the similar pyramid structure is 0.02-10; and / or, the top angle of the pyramid is smaller than the top angle of the similar pyramid structure; and / or, the top angle of the pyramid is 30-90°, and the top angle of the similar pyramid structure is 45-150°; and / or, the ratio between the number of side edges of the pyramid and the number of side edges of the similar pyramid structure is 0.3-5.

15. The solar cell of claim 1, wherein, The solar cell further comprises: Two laminated films respectively located on at least one side of the silicon substrate, and the first texture structure is located on the surface of the silicon substrate corresponding to at least one of the laminated films, wherein at least one of the laminated films comprises: A doped conductive layer arranged on the surface of the silicon substrate in a full surface or an interval arrangement, and a passivation or anti-reflection layer located on the surface of the doped conductive layer away from the silicon substrate; The solar cell further comprises: A plurality of electrodes located on the surface of the laminated film, and the electrodes are in electrical contact with the doped conductive layer through the passivation or anti-reflection layer.

16. The solar cell of claim 15, wherein, The silicon substrate comprises opposite first and second surfaces, the first surface corresponds to the back surface of the cell, and two laminated films are respectively located on the first and second surfaces; The laminated film located on the first surface comprises first doped conductive layers arranged on the first surface of the silicon substrate in an interval arrangement, and has a first interval region between adjacent first doped conductive layers; The laminated film located on the second surface comprises a second doped conductive layer arranged on the second surface of the silicon substrate in a full surface; Wherein, the first texture structure is located on the region of the first surface corresponding to the first doped conductive layer and the first interval region, and the first texture structure corresponding to the first interval region on the first surface is rougher than the first texture structure corresponding to the first doped conductive layer.

17. The solar cell of claim 15, wherein, The silicon substrate comprises opposite first and second surfaces, the first surface corresponding to the back surface of the cell, the two stack films being respectively located on the first and second surfaces; The stack film located on the first surface comprises a first doped conductive layer, which is distributed on the first surface of the silicon substrate in an integral manner; The stack film located on the second surface comprises a second doped conductive layer, which is distributed on the second surface of the silicon substrate in a spaced manner, and has a second spacing region between adjacent second doped conductive layers; The first texture structure is located on the region of the first surface corresponding to the first doped conductive layer and the region of the second surface corresponding to the second doped conductive layer and the second spacing region; The first texture structure on the second surface corresponding to the second spacing region is coarser than the first texture structure corresponding to the second doped conductive layer, and / or the first texture structure on the second surface corresponding to the second doped conductive layer is coarser than the first texture structure on the first surface corresponding to the first doped conductive layer.

18. The solar cell of claim 15, wherein, The silicon substrate comprises opposite first and second surfaces, the first surface corresponding to the back surface of the cell, the two stack films being respectively located on the first and second surfaces; The stack film located on the first surface comprises a first doped conductive layer, which is distributed on the first surface of the silicon substrate in a spaced manner, and has a first spacing region between adjacent first doped conductive layers; The stack film located on the second surface comprises a second doped conductive layer, which is distributed on the second surface of the silicon substrate in a spaced manner, and has a second spacing region between adjacent second doped conductive layers; The first texture structure is located on the region of the first surface corresponding to the first doped conductive layer and the first spacing region and the region of the second surface corresponding to the second doped conductive layer and the second spacing region, The first texture structure on the second surface corresponding to the second spacing region is coarser than the first texture structure corresponding to the second doped conductive layer; and / or the first texture structure on the second surface corresponding to the second spacing region is coarser than the first texture structure on the first surface corresponding to the first spacing region; and / or the first texture structure on the second surface corresponding to the second doped conductive layer is coarser than the first texture structure on the first surface corresponding to the first doped conductive layer.

19. The solar cell of claim 15, wherein, The silicon substrate comprises opposite first and second surfaces, the first surface corresponding to the back surface of the cell, the two stack films being respectively located on the first and second surfaces; The stack film located on the first surface comprises a first doped conductive layer and a second doped conductive layer, which are alternately distributed on the first surface of the silicon substrate, the first doped conductive layer being an N-type doped conductive layer, and the second doped conductive layer being a P-type doped conductive layer; The first texture structures are located on the first surface in regions corresponding to the first doped conductive layer and the second doped conductive layer, respectively, the first texture structures on the first surface corresponding to the first doped conductive layer being coarser than the first texture structures on the first surface corresponding to the second doped conductive layer.

20. A photovoltaic module comprising the solar cell of any one of claims 1 to 19.

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