Method and device for detecting ground insulation degree of direct current bus and medium

Abstract

The embodiment of the invention provides a DC bus ground insulation degree detection method and device and a medium, and is applied to the technical field of electronic circuits. The method comprises the following steps: acquiring sampling signals of a detected loop corresponding to a target direct-current bus under excitation signals of different frequencies; wherein the sampling signal comprises a voltage response signal and a current response signal of the detected loop; performing frequency domain analysis based on the sampling signal to obtain an amplitude and a phase corresponding to each frequency component; based on the amplitude and the phase of each frequency component, performing fitting calculation to obtain a capacitance value of the measured loop; the capacitance value represents a real ground capacitance value of the target DC bus; and obtaining a ground insulation degree detection result of the target DC bus based on capacitance value analysis. The technical effect of improving the insulation degree detection accuracy is achieved.

Description

Technical Field

[0001] This application relates to the field of electronic circuit technology, and in particular to a method, equipment and medium for detecting the insulation of a DC bus to ground. Background Technology

[0002] In existing technologies, the insulation status of a DC bus to ground can be obtained by detecting the insulation of the DC bus in a power system, thereby enabling further equipment fault analysis and handling based on the insulation status of the DC bus.

[0003] In the prior art, the method for detecting the insulation of a DC bus to ground is as follows: by applying a DC voltage to the circuit under test, measuring the time it takes for the capacitor to charge to a set threshold, the capacitance value of the DC bus is calculated, and the insulation of the DC bus is determined using the capacitance value.

[0004] Because existing detection methods are susceptible to interference from power frequency noise and distributed capacitance, they suffer from low accuracy in detecting ground insulation. Summary of the Invention

[0005] This application provides a method, equipment, and medium for detecting the insulation resistance of a DC bus to ground, thereby improving the accuracy of the detection of the insulation resistance to ground.

[0006] In a first aspect, embodiments of this application provide a method for detecting the insulation degree of a DC bus to ground, including:

[0007] Acquire the sampled signals of the circuit under test corresponding to the target DC bus under different frequency excitation signals; wherein, the sampled signals include the voltage response signal and the current response signal of the circuit under test;

[0008] Frequency domain analysis is performed on the sampled signal to obtain the amplitude and phase of each frequency component.

[0009] The capacitance value of the circuit under test is calculated by fitting the amplitude and phase of each frequency component; the capacitance value represents the true ground capacitance value of the target DC bus.

[0010] The ground insulation test results of the target DC bus were obtained based on capacitance value analysis.

[0011] In one possible implementation, acquiring the sampled signals of the circuit under test corresponding to the target DC bus under excitation signals at different frequencies includes:

[0012] Apply excitation signals of different frequencies to the circuit under test and collect the response signals of the circuit under test under different excitation signals;

[0013] The response signal is amplified in segments to obtain the sampled signal.

[0014] In one possible implementation, the ground insulation test result of the target DC bus is obtained based on capacitance value analysis, including:

[0015] The insulation status of the target DC bus is obtained by comparing the capacitance value with the preset capacitance value range corresponding to the circuit under test.

[0016] Based on the capacitance value, a capacitance value sequence consisting of multiple consecutive measured capacitance values ​​within a preset time period is determined. Based on the capacitance value sequence, a degradation analysis is performed to obtain the degradation analysis results of the target DC bus.

[0017] The ground insulation test results of the target DC bus are determined based on the insulation condition and degradation analysis results.

[0018] In one possible implementation, the capacitance value of the circuit under test is calculated by fitting based on the amplitude and phase of each frequency component, including:

[0019] Based on the amplitude and phase of each frequency component, the first capacitance value corresponding to each frequency component is calculated.

[0020] Data is filtered based on each frequency component and its corresponding first capacitance value. Outliers are removed from multiple first capacitance values ​​to obtain multiple second capacitance values.

[0021] The true capacitance value of the circuit under test is obtained by fitting and calculating based on multiple second capacitance values.

[0022] Secondly, embodiments of this application provide a DC bus-to-ground insulation testing device, comprising:

[0023] The acquisition module is used to acquire the sampled signals of the circuit under test corresponding to the target DC bus under different frequency excitation signals; wherein, the sampled signals include the voltage response signal and the current response signal of the circuit under test;

[0024] The first processing module is used to perform frequency domain analysis based on the sampled signal to obtain the amplitude and phase of each frequency component.

[0025] The second processing module is used to fit and calculate the capacitance value of the circuit under test based on the amplitude and phase of each frequency component; the capacitance value represents the true ground capacitance value of the target DC bus.

[0026] The third processing module is used to obtain the ground insulation test results of the target DC bus based on capacitance value analysis.

[0027] In one possible implementation, the acquisition module is further configured to:

[0028] Apply excitation signals of different frequencies to the circuit under test and collect the response signals of the circuit under test under different excitation signals;

[0029] The response signal is amplified in segments to obtain the sampled signal.

[0030] In one possible implementation, the processing module is further configured to:

[0031] Based on the amplitude and phase of each frequency component, the first capacitance value corresponding to each frequency component is calculated.

[0032] Data is filtered based on each frequency component and its corresponding first capacitance value. Outliers are removed from multiple first capacitance values ​​to obtain multiple second capacitance values.

[0033] The true capacitance value of the circuit under test is obtained by fitting and calculating based on multiple second capacitance values.

[0034] In one possible implementation, the third processing module is further configured to:

[0035] The insulation status of the target DC bus is obtained by comparing the capacitance value with the preset capacitance value range corresponding to the circuit under test.

[0036] Based on the capacitance value, a capacitance value sequence consisting of multiple consecutive measured capacitance values ​​within a preset time period is determined. Based on the capacitance value sequence, a degradation analysis is performed to obtain the degradation analysis results of the target DC bus.

[0037] The ground insulation test results of the target DC bus are determined based on the insulation condition and degradation analysis results.

[0038] Thirdly, this application provides a DC bus insulation to ground testing device, including a motherboard and a core board. The device is used to implement the first aspect and various possible implementations of the first aspect. The core board and the motherboard are connected through the motherboard-subboard interface of the core board.

[0039] The motherboard is used to generate excitation signals of different frequencies, collect the response signals of the target DC bus under excitation signals of different frequencies, condition the collected response signals, and transmit the generated sampling signals to the core board through the motherboard-daughterboard interface.

[0040] The core board is used to receive sampling signals from the motherboard and daughterboard interfaces, perform frequency domain analysis and capacitance calculation based on the sampling signals to obtain the true capacitance value of the target DC bus, and generate the ground insulation test result of the target DC bus based on the true capacitance value.

[0041] In one possible implementation, the motherboard includes a signal conditioning circuit, a toroidal transformer control circuit, a system power supply circuit, and auxiliary function modules.

[0042] The input terminal of the signal conditioning circuit is connected to the output terminal of the first circuit under test of the target DC bus; the output terminal of the signal conditioning circuit is connected to the analog input interface of the core board.

[0043] The control signal input terminal of the toroidal transformer control circuit is connected to the control signal output terminal of the core board, and the output terminal of the toroidal transformer control circuit is connected to the input terminal of the circuit under test of the target DC bus.

[0044] The input terminal of the system power circuit is connected to the external power supply interface, and the output terminal of the system power circuit is connected to the power interface of the core board.

[0045] The auxiliary function module is connected to the control signal output terminal of the core board via a bus.

[0046] In one possible implementation, the signal conditioning circuit is used to preprocess the raw response signal of the target DC bus to obtain a sampled signal;

[0047] The toroidal transformer control circuit is used to receive the first control signal from the control signal output terminal of the core board and generate excitation signals of different frequencies based on the first control signal.

[0048] The system power supply circuit is used to receive voltage from the external power supply interface and convert it into data power supply voltage and analog power supply voltage applied to the core board; wherein the data power supply voltage and analog power supply voltage do not interfere with each other and provide a stable differential voltage for the core board;

[0049] The auxiliary function module is used to receive a second control signal from the control signal output terminal of the core board and to store data based on the second control signal.

[0050] In one possible implementation, the core board is also used to receive a sampled signal from an analog input interface, perform frequency domain analysis based on the sampled signal, and obtain the amplitude and phase corresponding to each frequency component.

[0051] The capacitance value of the target DC bus is calculated based on the amplitude and phase corresponding to each frequency component, and the ground insulation test result of the target DC bus is obtained based on the capacitance value analysis.

[0052] In one possible implementation, the core board includes a microcontroller, an active crystal oscillator, a working indicator light, a motherboard-daughterboard interface, decoupling capacitors, and a multi-channel analog-to-digital converter.

[0053] The microcontroller, active crystal oscillator, indicator lights, decoupling capacitors, and multi-channel analog-to-digital converter are connected to the motherboard via a motherboard-daughterboard interface.

[0054] Fourthly, embodiments of this application provide a computer-readable storage medium storing computer-executable instructions, which, when executed by a processor, are used to implement the first aspect and various possible implementations thereof.

[0055] Fifthly, embodiments of this application provide a computer program product, including a computer program that, when executed by a processor, implements the first aspect and various possible implementations thereof.

[0056] This application provides a method, device, and medium for detecting the ground insulation of a DC bus. The method acquires sampling signals of the tested circuit of the target DC bus under excitation signals at different frequencies; performs frequency domain analysis on the voltage and current response signals in the sampling signals to obtain the amplitude and phase of each frequency component. Based on the amplitude and phase of each frequency component, the capacitance value of the tested circuit is calculated, and analyzed to obtain the ground insulation detection result of the target DC bus. Compared with the prior art, this application uses excitation signals of different frequencies to stimulate the target DC bus, obtaining sampling signals of the tested circuit of the target DC bus under excitation signals at different frequencies; through frequency domain analysis and fitting calculation of the sampling signals, the influence of power frequency interference in the measurement environment on the DC bus measurement data is eliminated, ensuring that the finally calculated capacitance value is the true ground capacitance value of the target DC bus, thereby achieving the technical effect of improving the accuracy of insulation detection. Attached Figure Description

[0057] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0058] Figure 1 A flowchart illustrating the DC bus-to-ground insulation testing method provided in this application;

[0059] Figure 2 Schematic diagram of the DC bus-to-ground insulation testing equipment provided in this application Figure 1 ;

[0060] Figure 3 Schematic diagram of the DC bus-to-ground insulation testing equipment provided in this application Figure 2 ;

[0061] Figure 4 This is a schematic diagram of a signal conditioning circuit provided in an embodiment of this application;

[0062] Figure 5 This is a schematic diagram of the structure of the toroidal transformer control circuit provided in this application;

[0063] Figure 6 This is a schematic diagram of the system power supply circuit provided in an embodiment of this application;

[0064] Figure 7 A schematic diagram of the real-time clock circuit provided in this application;

[0065] Figure 8 A schematic diagram of the buzzer driver circuit provided in this application;

[0066] Figure 9 A schematic diagram of the temperature sensor interface circuit provided in this application;

[0067] Figure 10 A schematic diagram of the core board of the DC bus-to-ground insulation testing equipment provided in this application;

[0068] Figure 11 A functional framework diagram of the single-chip microcontroller for DC bus-to-ground insulation provided in this application;

[0069] Figure 12 This is a schematic diagram of the capacitance and inductance measuring instrument provided in this application;

[0070] Figure 13 This is a schematic diagram of the DC bus-to-ground insulation testing device provided in this application.

[0071] The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to particular embodiments. Detailed Implementation

[0072] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0073] First, let me explain the terms used in this application:

[0074] Joint Test Action Group (JTAG) refers to a standardized test interface protocol primarily used for internal chip testing, program downloading, and online debugging. In this application, the JTAG program download interface circuit is used to download firmware to the core board microcontroller and perform troubleshooting, serving as a crucial interface for system maintenance.

[0075] Electrically Erasable Programmable Read-Only Memory (EEPROM) refers to a non-volatile memory that can be repeatedly erased and rewritten electrically, retaining data even after power loss. In this application, EEPROM is used to store system parameters, achieving long-term parameter retention.

[0076] Universal Serial Bus (USB) refers to a universal data transmission interface standard that supports hot-swapping and plug-and-play. In this application, the USB communication circuit is used to realize data interaction between the core board and external devices, and can upload measurement results or receive control commands.

[0077] Universal Asynchronous Receiver / Transmitter (UART): This refers to an asynchronous serial communication protocol that uses two lines for transmitting and receiving data. In this application, a USB-to-UART circuit is used to convert USB signals into UART signals, enabling the microcontroller to communicate with USB-enabled devices.

[0078] Personal Computer (PC): refers to a computer device intended for personal use. In this application, the PC acts as a host computer, receiving measurement data sent by the core board or microcontroller via a USB interface, storing and further processing the data, and can also send configuration commands to the core board or microcontroller to instruct the core board on data processing and internal configuration settings.

[0079] In existing technologies, the methods for detecting ground insulation mainly focus on two aspects: capacitor charging time detection and grounding resistance detection. Capacitor charging time detection involves calculating the DC bus's ground capacitance based on the time it takes for the capacitor to charge to a preset threshold, and then using this capacitance to determine the insulation level. Grounding resistance detection involves calculating the grounding resistance using the DC bus electrical signal and Ohm's law, and then using this grounding resistance to determine the presence of an insulation fault.

[0080] However, capacitor charging detection is affected by environmental noise and distributed capacitance, resulting in measurement errors; similarly, grounding resistance detection is affected by power frequency noise and distributed capacitance, leading to measurement errors. Therefore, existing technologies suffer from low accuracy in insulation detection.

[0081] To address the aforementioned technical problems, this application proposes the following technical concept: For a target DC bus requiring insulation testing, its response signals under excitation signals of different frequencies are measured to obtain sampling signals for excitation signals of different frequencies; frequency domain analysis is performed on the sampling signals to obtain the amplitude and phase corresponding to different frequency components; the capacitance value is calculated by fitting the amplitude and phase, and this capacitance value represents the true ground capacitance value of the target DC bus; the ground insulation of the target DC bus is analyzed using this capacitance value to obtain the ground insulation test result of the target DC bus. Compared with the prior art, this application eliminates the influence of power frequency interference on the target DC bus during the testing process by collecting sampling signals corresponding to excitation signals of different frequencies and obtaining the capacitance value through frequency domain analysis and fitting calculation, thereby achieving the technical effect of improving the accuracy of insulation testing.

[0082] The technical solution of this application and how the technical solution of this application solves the above-mentioned technical problems are described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments of this application will now be described with reference to the accompanying drawings.

[0083] Figure 1 This is a flowchart illustrating the DC bus-to-ground insulation testing method provided in this application, as shown below. Figure 1 As shown, the method includes:

[0084] S101. Obtain the sampling signals of the circuit under test corresponding to the target DC bus under different frequency excitation signals.

[0085] In this step, the sampling signals include the voltage response signal and the current response signal of the circuit under test. The target DC bus refers to the DC power supply trunk line whose insulation to ground needs to be tested; for example, the DC bus of a photovoltaic inverter or the high-voltage DC bus of an electric vehicle. The circuit under test refers to the entire circuit including the target DC bus, parasitic capacitance to ground, and related connecting lines. The excitation signal refers to the AC signal artificially applied to the circuit under test to stimulate its frequency response characteristics. The sampling signals refer to the voltage and current responses generated by the circuit under test under the action of the excitation signal, which are the raw data for analyzing the circuit characteristics.

[0086] Alternatively, one possible way to obtain the sampled signal is as follows:

[0087] S1011. Apply excitation signals of different frequencies to the circuit under test and collect the response signals of the circuit under test under different frequencies of excitation signals.

[0088] In this step, applying the excitation signal refers to injecting AC signals of different frequencies into the circuit under test through a coupling circuit, avoiding interference with the normal operation of the DC bus. The coupling circuit can be an isolation transformer or capacitive coupling. The response signal refers to the voltage and current signals generated by the circuit under test under the action of the excitation signal due to the presence of capacitance and resistance to ground.

[0089] S1012. The response signal is amplified in segments to obtain the sampled signal.

[0090] In this step, segmented amplification refers to adjusting the amplifier gain in frequency segments according to the amplitude range of the response signal. The amplitudes of the response signal at different frequencies may vary significantly; direct amplification can easily lead to signal distortion or insufficient accuracy. Segmented amplification helps ensure signal accuracy.

[0091] S102. Perform frequency domain analysis based on the sampled signal to obtain the amplitude and phase corresponding to each frequency component.

[0092] In this step, frequency domain analysis refers to converting the voltage or current waveform in the time domain to the frequency domain. This conversion can be achieved using a Fourier transform. Amplitude refers to the signal strength of a specific frequency component, such as voltage amplitude or current amplitude. Phase refers to the phase difference between the voltage and current signals at that frequency.

[0093] For example, after performing Fourier transform analysis on the sampling signal of a photovoltaic bus:

[0094] The obtained 50Hz component: voltage amplitude U=2.5V, current amplitude I=0.5mA, phase difference φ=85°; 100Hz component: U=3.0V, I=0.75mA, φ=88.

[0095] S103. Based on the amplitude and phase of each frequency component, the capacitance value of the circuit under test is calculated by fitting.

[0096] In this step, the capacitance value represents the true ground capacitance of the target DC bus, referring to the parasitic capacitance to ground of the target DC bus, the magnitude of which is related to the insulation state. Fitting calculation refers to using capacitance calculation results at multiple frequencies, eliminating errors, and then selecting the optimal value to improve accuracy.

[0097] Alternatively, one possible way to calculate the capacitance value is as follows:

[0098] S1031. Based on the amplitude and phase of each frequency component, calculate the first capacitance value corresponding to each frequency component.

[0099] In this step, the first capacitance value refers to the capacitance value calculated based on the frequency domain parameters of a single frequency. Because it may be affected by noise and interference, it needs to be further verified.

[0100] For example, the following can be calculated using the frequency domain data from example S102:

[0101] Using the frequency domain data of S102, the following values ​​are calculated: at 50Hz: C1 = 0.5mA / (2π×50Hz×2.5V) = 1.27μF; at 100Hz: C2 = 0.75mA / (2π×100Hz×3.0V) = 1.99μF; thus, the first capacitance value sequence is obtained: [1.27μF, 1.99μF].

[0102] S1032. Based on each frequency component and its corresponding first capacitance value, perform data filtering, remove outliers from multiple first capacitance values, and obtain multiple second capacitance values.

[0103] In this step, outliers refer to values ​​that deviate significantly from the majority of the first capacitance values ​​due to signal interference or measurement errors. The second capacitance value refers to the effective capacitance value after removing outliers, which is closer to the true value.

[0104] Alternatively, outliers can be removed by using mathematical calculations to remove values ​​that deviate from the mean or the positive and negative standard deviations.

[0105] For example, the sequence of the first capacitance values ​​is [1.27μF, 1.99μF, 1.32μF, 5.8μF]. The calculated mean is approximately 2.6μF, and the standard deviation is approximately 1.9μF. The value of 5.8μF deviates from the mean by more than σ(2.6 + 1.9 = 4.5), and is therefore identified as an outlier and removed; thus, the second capacitance value is obtained: [1.27μF, 1.32μF, 1.99μF].

[0106] S1033. Based on multiple second capacitance values, a fitting calculation is performed to obtain the true capacitance value of the circuit under test.

[0107] In this step, fitting calculation refers to fusing multiple valid second capacitance values ​​using mathematical methods to obtain the result closest to the true value. The fitting calculation can be performed by taking the arithmetic mean or median of the second capacitance values, or by using the least squares method to fit the curve of capacitance value versus frequency and taking the median of the curve.

[0108] For example, the second capacitance value sequence is [1.27μF, 1.32μF, 1.99μF]. The arithmetic mean = (1.27 + 1.32 + 1.99) / 3 ≈ 1.53μF; this value is determined to be the true capacitance to ground of the circuit under test.

[0109] S104. The ground insulation test results of the target DC bus are obtained based on capacitance value analysis.

[0110] In this step, the insulation to ground refers to the insulation performance between the DC bus and ground. Changes in the capacitance to ground can indirectly reflect the insulation condition. The test results are a conclusion drawn based on the overall insulation condition and degradation trend.

[0111] Alternatively, one possible way to obtain the ground insulation test results is as follows:

[0112] S1041. Compare the capacitance value with the preset capacitance value range corresponding to the circuit under test to obtain the insulation status of the target DC bus.

[0113] In this step, the preset capacitance range refers to the capacitance to ground range under normal insulation conditions as defined by numerous experiments or standards. For example, the preset capacitance range can be set based on busbar length and environmental conditions. Insulation status is a qualitative description of the current insulation performance and can be categorized as: normal or abnormal.

[0114] For example, the preset capacitance value range is divided into three levels: normal (1.0-2.0μF), caution (2.0-3.0μF), and alarm (>3.0μF). The actual capacitance value is compared with the range, and if it falls into the corresponding range, the corresponding state is determined.

[0115] S1042. Based on the capacitance value, determine a capacitance value sequence composed of multiple consecutive measured capacitance values ​​within a preset time period, perform degradation analysis based on the capacitance value sequence, and obtain the degradation analysis result of the target DC bus.

[0116] In this step, the capacitance value sequence refers to the capacitance values ​​continuously measured within a preset time period. For example, the continuous capacitance values ​​within a week are [1.2μF, 1.3μF, 1.4μF, 1.53μF]. Degradation analysis refers to determining whether the insulation performance is continuously declining and whether continuous aging is occurring by analyzing the trend of the sequence.

[0117] For example, the monthly capacitance values ​​obtained from a certain DC bus are [1.2μF (January), 1.3μF (February), 1.4μF (March), 1.53μF (April)]. The average monthly increase is 0.11μF, and the trend line slope is positive and stable; the predicted capacitance value for June is approximately 1.75μF. The degradation analysis result is: "Slight degradation of insulation performance, no maintenance required at present, monthly inspection recommended."

[0118] Optionally, degradation analysis can use a pre-trained big data model to predict the degradation trend of the DC bus. This big data model can be a pre-loaded model or a model stored in the cloud, and can be loaded according to the specifications and service life of the DC bus.

[0119] S1043. Determine the ground insulation test results of the target DC bus based on the insulation condition and degradation analysis results.

[0120] In this step, the insulation resistance test result refers to a comprehensive insulation conclusion obtained by taking into account the current condition and the deterioration trend.

[0121] For example, if the current state is normal and there is no trend of deterioration → the result is "good insulation"; if the current state is normal but there is a clear trend of deterioration → the result is "normal insulation but there is a possibility of deterioration, it is recommended to shorten the testing cycle"; if the current state is abnormal and deteriorates rapidly → the result is "severely degraded insulation, immediate repair is required".

[0122] The DC bus insulation-to-ground detection method provided in this application acquires sampling signals of the target DC bus circuit under different frequency excitation signals. Frequency domain analysis is performed on the voltage and current response signals in the sampling signals to obtain the amplitude and phase of each frequency component. Based on the amplitude and phase of each frequency component, the capacitance value of the circuit under test is calculated. Analysis of this capacitance value yields the insulation-to-ground detection result of the target DC bus. Compared with existing technologies, this application utilizes excitation signals of different frequencies to stimulate the target DC bus, obtaining sampling signals of the target DC bus circuit under different frequency excitation signals. Through frequency domain analysis and fitting calculation of the sampling signals, the influence of power frequency interference in the measurement environment on the DC bus measurement data is eliminated, ensuring that the finally calculated capacitance value is the true capacitance-to-ground value of the target DC bus, thereby achieving the technical effect of improving the accuracy of insulation detection.

[0123] Figure 2 Schematic diagram of the DC bus-to-ground insulation testing equipment provided in this application Figure 1 ,like Figure 2 As shown, the device includes a motherboard 201 and a core board 202, and is used to implement, as Figure 1 In the method of the illustrated embodiment, the core board 202 and the mother board 201 are connected through the mother-daughter interface of the core board.

[0124] In this embodiment, the motherboard 201 is used to generate excitation signals of different frequencies, collect the response signals of the target DC bus under excitation signals of different frequencies, condition the collected response signals, and transmit the generated sampling signals to the core board 202 through the interface of the motherboard 201.

[0125] The core board 202 is used to receive sampling signals from the interface of the motherboard 201, perform frequency domain analysis and capacitance calculation based on the sampling signals to obtain the true capacitance value of the target DC bus, and generate the ground insulation test result of the target DC bus based on the true capacitance value.

[0126] Figure 3 Schematic diagram of the DC bus-to-ground insulation testing equipment provided in this application Figure 2 ,like Figure 3 As shown, the motherboard of the device includes a signal conditioning circuit 301, a toroidal transformer control circuit 302, a system power supply circuit 303, and an auxiliary function module 304.

[0127] In this embodiment, the input terminal of the signal conditioning circuit 301 is connected to the output terminal of the circuit under test of the target DC bus; the output terminal of the signal conditioning circuit 301 is connected to the analog input interface of the core board 305.

[0128] Optionally, the signal conditioning circuit 301 is used to preprocess the original response signal of the target DC bus to obtain a sampled signal.

[0129] In this embodiment, the sampled signal refers to the sampled signal obtained after conditioning the acquired raw current response signal and raw voltage response signal. This sampled signal includes both current and voltage signals, facilitating signal sampling by the core board.

[0130] For example, Figure 4 This is a schematic diagram of a signal conditioning circuit provided in an embodiment of this application, as shown below. Figure 4 As shown, the signal conditioning circuit includes:

[0131] Input terminal 401, first programmable gain amplifier 402, second programmable gain amplifier 403, dual-stage amplifier 404, first DC bias 405, second DC bias 406, first second-order active low-pass filter 407, second second-order active low-pass filter 408, first clamping diode 409, second clamping diode 410, inverting amplifier 411, first output terminal 412, and second output terminal 413.

[0132] The input terminal 401 is connected to the output terminal of the circuit under test of the target DC bus, and is used to acquire the current response signal and voltage response signal of the circuit under test.

[0133] The inverting amplifier 411 is connected to the input terminal 401, which inversely amplifies the voltage response signal acquired by the input terminal 401 and directs it to the first programmable gain amplifier 402.

[0134] The first programmable gain amplifier 402 acquires the voltage response signal processed by the inverting amplifier 411 and performs signal gain on the voltage response signal. The first programmable gain amplifier 402 includes an operational amplifier array, a resistor network, and analog switches, used to apply eight levels of gain to the voltage response signal. This is mainly achieved by switching the feedback resistor to change the gain factor of the operational amplifier, thereby adapting to response signals of different amplitudes. The eight gain levels refer to the gain levels of ×1, ×2, ×4, ×8, ×16, ×32, ×64, and ×128.

[0135] The first DC bias 405 is connected to the first programmable gain amplifier 402. The voltage response signal output by the first programmable gain amplifier 402 is subjected to DC bias processing. The DC component of the signal is adjusted to the midpoint of the allowable range of the multi-channel analog-to-digital converter of the core board, and an adjustable DC voltage is output to the first second-order active low-pass filter 407.

[0136] The first and second order active low-pass filter 407 is connected to the first DC bias 405 to filter the adjustable DC voltage, remove high-frequency noise from the voltage signal, retain the effective frequency components of the signal, obtain the filtered voltage signal, and transmit the filtered voltage signal to the first output terminal 412.

[0137] The first output terminal 412 is connected to the first second-order active low-pass filter 407, and is used to transmit the filtered voltage signal to the analog input interface of the core board.

[0138] The first clamping diode 409 is connected to the first output terminal 412 and is used to limit the filtered voltage signal output by the first output terminal 412 to the allowable range of the multi-channel analog-to-digital converter of the core board.

[0139] A dual-amplitude amplifier 404 is connected to an input terminal 401. The current response signal acquired at the input terminal 401 is amplified to two different levels to obtain a dual-amplitude current response signal, which then flows to a programmable gain amplifier. The gain of the two levels differs by a factor of 120.

[0140] The second programmable gain amplifier 403 acquires the current response signal after dual-level amplification, and performs signal gain on the current response signal to obtain the current signal after gain processing. The specific processing procedure can be referred to the processing of the voltage response signal. The maximum conditioning factor of this current response signal is 120*128.

[0141] The second DC bias 406 is connected to the second programmable gain amplifier 403. The current response signal output by the second programmable gain amplifier 403 is subjected to DC bias processing. The DC component of the signal is adjusted to the midpoint value of the allowable range of the multi-channel analog-to-digital converter of the core board, and an adjustable DC current is output to the second second-order active low-pass filter 408.

[0142] The second-order active low-pass filter 408 is connected to the second DC bias 406 and is used to filter the adjustable DC current, remove high-frequency noise from the current signal, retain the effective frequency components of the signal, obtain the filtered current signal, and transmit the filtered current signal to the second output terminal 413.

[0143] The second output terminal 413 is connected to the second-order active low-pass filter 408 and is used to transmit the filtered current signal to the analog input interface of the core board.

[0144] In this embodiment, the control signal input terminal of the toroidal transformer control circuit 302 is connected to the control signal output terminal of the core board 305, and the output terminal of the toroidal transformer control circuit 302 is connected to the input terminal of the test circuit of the target DC bus.

[0145] Optionally, the toroidal transformer control circuit 302 is used to receive a first control signal from the control signal output terminal of the core board 305, and generate excitation signals of different frequencies based on the first control signal.

[0146] It should be noted that the toroidal transformer control circuit in this embodiment is used to control the on / off state of the toroidal transformer, providing power to the transformer during the testing phase and outputting low-frequency excitation signals for inductance and capacitance testing.

[0147] For example, Figure 5 The schematic diagram of the toroidal transformer control circuit provided in this application is as follows: Figure 5 As shown, the toroidal transformer control circuit includes:

[0148] Resistor R1 is connected at one end to the control signal output terminal of the first control signal output of the core board. It refers to the current-limiting resistor for transistor Q1, used to limit the base current of transistor Q1 and prevent large current from damaging it.

[0149] One end of diode D1 is connected to the collector of transistor Q1, and the other end is connected to the output terminal OUT of the isolation power supply U1. Diode D1 refers to a freewheeling diode. When the coil of relay RE1 is de-energized, a reverse electromotive force is generated. Diode D1 provides protection against this reverse voltage surge, protecting components such as transistor Q1 from the impact of the reverse voltage.

[0150] Transistor Q1 has its base connected to the other end of resistor R1, and its collector connected to pin 8 of relay RE1. The transmitter is grounded. When there is a suitable signal at the base, transistor Q1 conducts, energizing the coil of relay RE1, causing the relay to operate and controlling the opening and closing of the control contacts.

[0151] The voltage regulator chip U1 has its IN pin, which is the input terminal of the voltage regulator chip and is used to connect to the DC voltage output by the rectifier bridge U2; the GND pin is grounded; and the OUT pin is the output terminal of the regulated DC voltage, used to output a stable 12V DC voltage. The function of the voltage regulator chip U1 is to regulate the rectified DC voltage to 12V, providing a stable power supply for subsequent circuits.

[0152] The voltage regulator chip U1 is connected to multiple filter capacitors C1, C2, C3, C4, and C5; these capacitors are connected in parallel between the IN and OUT terminals of the voltage regulator chip U1 and ground to filter out ripple noise from the isolated power supply output and ensure stable 12V power supply.

[0153] The rectifier bridge U2 has pin 1 connected to the IN pin of the isolated power supply; pin 4 grounded; and pins 2 and 3 connected to the power input terminal P2 of the toroidal transformer. It is used to rectify the AC voltage output from the toroidal transformer into DC voltage.

[0154] P1 refers to the AC switch connector. Pins 1 and 2 are used to connect the AC switch circuitry to control the circuit switching.

[0155] P2 refers to the 12V AC related connector. Pins 1 and 2 are used to connect to the 12V AC output of the toroidal transformer, providing input voltage for the rectifier bridge U2.

[0156] Pin 1 of relay RE1 is connected to the positive power supply line to power the relay coil. Contact pins 2-7 are connected to P1 to control the on / off state of the circuit, switching the power supply circuit to the toroidal transformer. During the contact switching process, different frequency excitation signals are generated, thereby generating the driving signals for inductive sensing and capacitance testing.

[0157] The toroidal transformer uses a double-tap design, with 3.0V and 20V taps respectively. The 3.0V tap generates the drive signal for inductance testing, while the 3.0V and 20V taps, connected in series, generate the drive signal for capacitance testing. This toroidal transformer only activates during testing, and its control circuit is as follows: Figure 5 As shown, U1 generates an independent 12V power supply for the relay, and the first control signal is provided by the microcontroller of the core board to realize the opening and closing of the P2 terminal.

[0158] In this embodiment, the input terminal of the system power circuit 303 is connected to the external power supply interface, and the output terminal of the system power circuit 303 is connected to the power interface of the core board 305.

[0159] Optionally, the system power supply circuit 303 is used to receive voltage from an external power supply interface and convert it into a data power supply voltage and an analog power supply voltage applied to the core board 305; wherein the data power supply voltage and the analog power supply voltage do not interfere with each other and provide a stable differential voltage for the core board 305.

[0160] For example, this application provides a system power supply circuit. Figure 6 This is a schematic diagram of the system power supply circuit provided in the embodiments of this application, such as... Figure 6 As shown, the power supply circuit includes an AC input terminal P1, a rectifier bridge U1, a voltage regulator chip U2, a filter capacitor combination C1, a voltage regulator chip U3, a filter capacitor combination C2, a voltage regulator chip U4, a filter capacitor combination C3, a voltage regulator chip combination U5, and a filter capacitor combination C4.

[0161] The AC input terminal P1 is connected to an external power supply interface to obtain AC power input, which is then converted into DC voltage by the rectifier bridge U1.

[0162] The output of rectifier bridge U1 is connected to the input of voltage regulator chip U2, which inputs DC voltage to voltage regulator chip U2. The output of voltage regulator chip U2 is connected in parallel with filter capacitor combination C1, which outputs a stable +8V voltage.

[0163] The negative correlation terminal of rectifier bridge U1 is connected to the input terminal of voltage regulator chip U3. The output terminal of voltage regulator chip and filter capacitor combination C2 are connected in parallel to convert the negative output of the negative correlation terminal of rectifier bridge into a stable -8V output voltage.

[0164] The output of rectifier bridge U1 is connected to the input of voltage regulator chip U4. A filter capacitor combination C3 is connected in parallel to the output of voltage regulator chip U4 to convert the DC voltage output by rectifier bridge U1 into a stable 5V output voltage. The input of voltage regulator chip U4 can also be connected to a +8V branch for power, converting the +8V voltage into a stable 5V output voltage.

[0165] Among them, the filter capacitor combination C1 to C4 are all composed of a 2200μF / 16V electrolytic capacitor and a 0.1μF ceramic capacitor connected in parallel.

[0166] The output of voltage regulator chip U4 is connected to the input of voltage regulator chip assembly U5, and the output of the voltage regulator chip assembly is connected in parallel with the filter capacitor assembly C4. Voltage regulator chip U5 is used to convert the 5V stable voltage generated by voltage regulator chip U4 into a stable 3.3V voltage output.

[0167] In this embodiment, the auxiliary function module 304 is connected to the control signal output terminal of the core board 305 via a bus.

[0168] Optionally, the auxiliary function module 304 is used to receive a second control signal from the control signal output terminal of the core board 305 and to store data based on the second control signal.

[0169] In this embodiment, the second control signal refers to the storage instruction generated by the core board during the calculation process for data that needs to be temporarily stored, which is used to control the auxiliary function module to store data.

[0170] For example, the auxiliary function module can be a random access memory (RAM) for temporarily storing real-time acquired data and intermediate calculation results. It is mainly used for storing temporary data during the core board's calculation process.

[0171] Optionally, in one possible implementation, the core board 305 is further configured to receive a sampled signal from the analog input interface, perform frequency domain analysis based on the sampled signal to obtain the amplitude and phase corresponding to each frequency component, calculate the capacitance value of the target DC bus based on the amplitude and phase corresponding to each frequency component, and analyze the capacitance value to obtain the ground insulation test result of the target DC bus.

[0172] In this embodiment, the method for obtaining the ground insulation test result of the target DC bus based on capacitance value analysis is as follows: the capacitance value is compared with the big data model preloaded in the core board, and the insulation status test result and the degradation degree prediction result for the capacitance value are output, thereby determining the ground insulation test result of the target DC bus.

[0173] Alternatively, in one possible implementation, the motherboard may also include RAM circuitry, display control interface circuitry, real-time clock circuitry, buzzer circuitry, temperature sensor interface circuitry, USB communication circuitry, EEPROM circuitry, display brightness adjustment circuitry, touchscreen control interface circuitry, optocoupler isolation design for gain control bus, motherboard / daughterboard interface circuitry, and JTAG program download interface circuitry.

[0174] In this embodiment, the RAM circuit board refers to the high-speed data cache area, which temporarily stores ADC sampling data, intermediate algorithm results, etc., and interacts with the core board microcontroller through the address bus and data bus to improve data processing efficiency. The display control interface circuit connects to the touch LCD screen, receives display commands and data from the core board microcontroller, and drives the screen to display measurement results and system status in real time. The real-time clock circuit provides high-precision real-time time, adds timestamps to measurement data, supports historical record tracing, and communicates with the microcontroller via the bus. The buzzer circuit receives control signals from the microcontroller and sounds an alarm when measurement abnormalities occur, providing a fault indication function. The temperature sensor interface circuit connects to a temperature sensor, collects equipment operating environment or circuit temperature data, and transmits it to the microcontroller for overheat protection and measurement accuracy compensation. The USB communication circuit uses USB-to-UART protocol conversion to enable data interaction between the core board and the PC, supporting measurement data upload, parameter configuration, and firmware updates. The EEPROM circuit stores system parameters, enables data retention even when power is off, and communicates with the microcontroller via the bus. The display brightness adjustment circuit receives control signals from the microcontroller and adjusts the LCD backlight brightness to adapt to different ambient light intensities. The touchscreen control interface circuit receives touch position signals from the touchscreen, converts them into digital instructions, and transmits them to the microcontroller for human-machine interaction. The optocoupler isolation design of the gain control bus isolates the gain control signals between the core board and the motherboard, preventing digital circuit noise from interfering with analog signal conditioning and improving measurement accuracy. The motherboard-daughter board interface circuit enables electrical interconnection between the core board and the motherboard via connectors, transmitting power, analog signals, digital control signals, and data buses; it serves as the physical hub for the two boards' collaborative operation. The JTAG program download interface circuit provides a microcontroller program download and online debugging interface, supports firmware updates and troubleshooting, and ensures system maintainability.

[0175] For example, this application provides a real-time clock circuit. Figure 7 The schematic diagram of the real-time clock circuit provided in this application is as follows: Figure 7 As shown, the circuit includes:

[0176] Real-time clock module U1. XTAL_32.768K: Y1 refers to an external 32.768kHz crystal oscillator, which provides a precise clock source for the real-time clock and ensures the accuracy of time counting. The 22pF capacitor C3 at both ends of the crystal oscillator is used for matching when the crystal oscillates and to stabilize the oscillation frequency.

[0177] INT1 and INT2 refer to interrupt output pins, which can be used to send interrupt signals to the main control chip when a specific time or event occurs, to achieve functions such as timed wake-up.

[0178] Pin 6 SDA and pin 5 SCL refer to the data line SDA and clock line SCL of the I²C bus, which are used to communicate with the host chip or other I²C devices and transmit information such as the real-time clock.

[0179] Pin 8, VDD, refers to the power supply pin. It is connected to a 3.3V power supply to power the real-time clock chip. Diode D1 provides unidirectional conduction and protection to prevent damage to the chip due to reverse power connection or other reasons. The 0.1μF capacitor C1 and the 22μF capacitor C2 are used for power supply filtering to remove noise on the power line and make the chip power supply more stable.

[0180] Pin 4, VSS, refers to the ground pin, which connects the chip to the system ground DGND to ensure a stable circuit potential reference.

[0181] For example, this application provides a buzzer driver circuit. Figure 8 This is a schematic diagram of the buzzer driver circuit provided in this application, as shown below. Figure 8 As shown, the circuit includes:

[0182] Transistor Q1 acts as a switching element. Its base receives the BEEP control signal through resistor R2 (2kΩ). When the BEEP signal is high, the transistor conducts, and buzzer B1 is powered on and emits sound. Resistor R1 (51Ω) is the current-limiting resistor for the buzzer to prevent excessive buzzer current. Capacitors C1 (0.1μF) and C2 (22μF) are used to filter the 5VD power supply to ensure stable power supply to the buzzer.

[0183] For example, this application provides an interface circuit for a temperature sensor. Figure 9 The schematic diagram of the temperature sensor interface circuit provided in this application is as follows: Figure 9 As shown, the circuit includes:

[0184] Connector P1 is used to connect to the temperature sensor via the I²C interface. The Temp_SDA pin is the I²C data line, which may be on the same line as the SDA pin of the real-time clock or connected to the I²C interface of the main control chip to transmit temperature data. The 3K3 resistor R1 and the 2R2 resistor R11 connected to the pin act as voltage dividers or pull-up / pull-down resistors to ensure the stability of the I²C bus level. The 0.1μF capacitor C14 and the 22nF capacitor C15 are used for power supply or signal filtering to make the temperature sensor communication more stable.

[0185] Based on the above embodiments, this embodiment further explains the structure of the core board. Figure 10 This is a schematic diagram of the core board of the DC bus-to-ground insulation testing equipment provided in this application, as shown below. Figure 10As shown, the core board includes: a microcontroller 1001, an active crystal oscillator 1002, a working indicator light 1003, a motherboard interface 1004, a decoupling capacitor 1005, and a multi-channel analog-to-digital converter 1006.

[0186] In this embodiment, the microcontroller 1001, the active crystal oscillator 1002, the working indicator light 1003, the decoupling capacitor 1005, and the multi-channel analog-to-digital converter 1006 are connected to the motherboard 1007 through the motherboard interface 1004.

[0187] Optionally, in one possible implementation, the output of the active crystal oscillator 1002 is directly connected to the clock input pin of the microcontroller 1001 to provide a stable reference clock for the microcontroller 1001. The indicator light 1003 is connected to the general-purpose input / output (GPIO) pin of the microcontroller 1001 via a current-limiting resistor. The microcontroller 1001 controls the indicator light's on / off state by outputting high and low level signals. The address bus, data bus, and control signal pins of the microcontroller 1001 are connected to the corresponding circuits on the motherboard via the motherboard interface 1004, enabling electrical interconnection and data exchange between the core board and the motherboard. The decoupling capacitor 1005 is connected in parallel between the power supply pins of the microcontroller 1001 and the active crystal oscillator 1002 and ground, with one end connected to the power supply and the other end connected to digital ground, used to filter out power supply noise and achieve stable power supply. The multi-channel analog-to-digital converter 1006 is a built-in module of the microcontroller 1001. Its analog input channel is connected to the signal processing unit of the microcontroller 1001 through internal circuitry. External analog signals are processed by the conditioning circuit and then connected to the analog input channel through the motherboard interface 1004. The multi-channel analog-to-digital converter 1006 is used to convert analog signals into digital signals for processing by the microcontroller 1001.

[0188] Based on the above embodiments, this application provides a microcontroller for detecting the insulation resistance of a DC bus to ground. Figure 11 This is a functional framework diagram of the microcontroller for DC bus-to-ground insulation provided in this application, as shown below. Figure 11 As shown, the framework includes:

[0189] The microcontroller includes a display control module 1101, an A / D acquisition control module 1102, a parameter calculation module 1103, a USB interface control module 1104, a time information acquisition module 1105, and a parameter power-off storage module 1106. It also includes an external LCD screen 1107, a PC 1108, a time chip 1109, and an external analog signal input port 1110.

[0190] In this embodiment, two external analog signals are converted from analog to digital by the A / D acquisition and control module 1102 inside the microcontroller. Based on the currently set operating mode, the microcontroller uses the parameter calculation module 1103 to perform a series of mathematical transformations on the converted digital signals to obtain the parameters required by the system. These parameters include voltage, current, capacitance, resistance, reactive power, and loss factor. These parameters can be displayed in real-time on the LCD screen 1107 via the display control module 1101, and can also be sent to the PC 1108 via the USB interface control module 1104 for storage and later analysis. Additionally, the microcontroller can read and display the current time from the time chip 1109 using the time information acquisition module 1105. Furthermore, after system startup, system settings can be configured, and these settings can be stored in the memory chip via the parameter power-down storage module 1106. The memory chip can be a flash chip.

[0191] Based on the above embodiments, this application provides a capacitance and inductance measuring instrument. Figure 12 This is a schematic diagram of the capacitance and inductance measuring instrument provided in this application, as shown below. Figure 12 As shown, the measuring instrument includes: a drive transformer 1201, a device under test 1202, an I / V conversion preamplifier module 1203, a multi-channel ADC 1204, a PGA 1205, an HVDA 1206, a USB to UART bridge controller 1207, an RTC real-time clock 1208, a 7-inch TFT resistive touch LCD screen 1209, a power supply 1210, and a USB interface 1211.

[0192] The drive transformer 1201 generates an ultra-low frequency excitation signal and injects it into the device under test 1202, enabling the circuit under test to generate detectable voltage and current response signals for subsequent calculation of insulation parameters. These insulation parameters include capacitance and leakage resistance.

[0193] The device under test 1202 refers to the DC bus system, and it is necessary to test the insulation status of the device under test 1202 to ground.

[0194] The I / V conversion preamplifier module 1203 includes three parts: a current clamp, an I / V converter, and a preamplifier. The current clamp is used for non-contact acquisition of the current signal from the device under test 1202 and outputs the current signal. The I / V converter converts the current signal from the current clamp into a voltage signal to meet the voltage input requirements of subsequent analog circuits. The preamplifier amplifies the weak voltage signal after I / V conversion to improve the signal-to-noise ratio.

[0195] PGA1205 refers to a programmable gain amplifier, which is used to dynamically adjust the signal amplification factor according to the signal strength to ensure that the signal amplitude matches the effective input range of the multi-channel ADC1204.

[0196] HVDA1206 refers to a high-voltage differential amplifier, which is used to directly acquire the high-voltage signal of the device under test 1202, and condition the high-voltage signal into a low-voltage signal that can be received by the multi-channel ADC1204 by differential amplification to match common-mode noise.

[0197] The multi-channel ADC1204 is used to simultaneously acquire voltage and current signals output by the HCDA and PGA1205, achieving synchronous sampling.

[0198] The microcontroller is used to run algorithms on the digital signals acquired by the multi-channel ADC1204, decompose the frequency components of the signal through Fourier transform, and calculate parameters such as capacitance, inductance, and resistance. It is also used to control the gain processing of the PGA1205, the sampling of the multi-channel ADC1204, the interaction with the 7-inch TFT resistive touch LCD screen 1209, and communication with external devices.

[0199] The RTC Real-Time Clock 1208 provides accurate timestamps for measurement data, facilitating traceability and data analysis.

[0200] The USB-to-UART bridge controller 1207 refers to a communication interface used to convert between USB and UART protocols, enabling a microcontroller to communicate with a PC via the USB interface 1211. The bridge controller coordinates the signal timing and data exchange between multiple modules, ensuring synchronized system operation.

[0201] The 7-inch TFT resistive touch LCD screen 1209 includes display and touch functions, used to display measurement results, system status, and settings interface information in real time. It also supports manual user operation for interactive control.

[0202] Power supply 1210 is used to power the various components inside the capacitance and inductance measuring instrument.

[0203] Figure 13 This is a schematic diagram of the DC bus-to-ground insulation testing device provided in this application, as shown below. Figure 13 As shown, the DC bus-to-ground insulation detection device provided in this embodiment includes:

[0204] The acquisition module 1301 is used to acquire the sampled signals of the circuit under test corresponding to the target DC bus under different frequency excitation signals; wherein, the sampled signals include the voltage response signal and the current response signal of the circuit under test;

[0205] The first processing module 1302 is used to perform frequency domain analysis based on the sampled signal to obtain the amplitude and phase of each frequency component.

[0206] The second processing module 1303 is used to calculate the capacitance value of the circuit under test based on the amplitude and phase of each frequency component; the capacitance value represents the true ground capacitance value of the target DC bus.

[0207] The third processing module 1304 is used to obtain the ground insulation test result of the target DC bus based on capacitance value analysis.

[0208] In one possible implementation, the acquisition module 1301 is further configured to:

[0209] Apply excitation signals of different frequencies to the circuit under test and collect the response signals of the circuit under test under different excitation signals;

[0210] The response signal is amplified in segments to obtain the sampled signal.

[0211] In one possible implementation, the processing module is further configured to:

[0212] Based on the amplitude and phase of each frequency component, the first capacitance value corresponding to each frequency component is calculated.

[0213] Data is filtered based on each frequency component and its corresponding first capacitance value. Outliers are removed from multiple first capacitance values ​​to obtain multiple second capacitance values.

[0214] The true capacitance value of the circuit under test is obtained by fitting and calculating based on multiple second capacitance values.

[0215] In one possible implementation, the third processing module 1304 is further configured to:

[0216] The insulation status of the target DC bus is obtained by comparing the capacitance value with the preset capacitance value range corresponding to the circuit under test.

[0217] Based on the capacitance value, a capacitance value sequence consisting of multiple consecutive measured capacitance values ​​within a preset time period is determined. Based on the capacitance value sequence, a degradation analysis is performed to obtain the degradation analysis results of the target DC bus.

[0218] The ground insulation test results of the target DC bus are determined based on the insulation condition and degradation analysis results.

[0219] In the above embodiments, it should be understood that the processor can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), etc. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the method disclosed in this invention can be directly implemented by a hardware processor, or implemented by a combination of hardware and software modules within the processor.

[0220] The memory may include random access memory (RAM) and may also include non-volatile memory (NVM), such as at least one disk storage device.

[0221] The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, etc. Buses can be categorized as address buses, data buses, control buses, etc. For ease of illustration, the buses shown in the accompanying drawings are not limited to a single bus or a single type of bus.

[0222] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the above-described method.

[0223] This application also provides a computer-readable storage medium storing computer-executable instructions, which, when executed by a processor, implement the above-described method.

[0224] The aforementioned readable storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk. The readable storage medium can be any available medium accessible to a general-purpose or special-purpose computer.

[0225] An exemplary readable storage medium is coupled to a processor, enabling the processor to read information from and write information to the readable storage medium. Of course, the readable storage medium can also be a component of the processor. The processor and the readable storage medium can reside in an Application Specific Integrated Circuit (ASIC). Alternatively, the processor and the readable storage medium can exist as discrete components in the device.

[0226] The division of units is merely a logical functional division; in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be indirect coupling or communication connection through some interfaces, devices, or units, and may be electrical, mechanical, or other forms.

[0227] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0228] In addition, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0229] If a function is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0230] Those skilled in the art will understand that all or part of the steps of the above-described method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When executed, the program performs the steps of the above-described method embodiments; and the aforementioned storage medium includes various media capable of storing program code, such as ROM, RAM, magnetic disks, or optical disks.

[0231] Finally, it should be noted that other embodiments of the invention will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This invention is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of the invention and include common knowledge or customary techniques in the art not disclosed herein, and is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of the invention is limited only by the appended claims.

Claims

1. A method for detecting the insulation degree of a DC bus to ground, characterized in that, The method includes: Acquire sampling signals of the circuit under test corresponding to the target DC bus under different frequency excitation signals; wherein, the sampling signals include the voltage response signal and the current response signal of the circuit under test; Frequency domain analysis is performed on the sampled signal to obtain the amplitude and phase of each frequency component. The capacitance value of the circuit under test is calculated by fitting the amplitude and phase of each frequency component; the capacitance value represents the true ground capacitance value of the target DC bus. The ground insulation test result of the target DC bus is obtained based on the capacitance value analysis.

2. The method according to claim 1, characterized in that, The acquisition of the sampled signals of the circuit under test corresponding to the target DC bus under excitation signals at different frequencies includes: Apply excitation signals of different frequencies to the circuit under test, and collect the response signals of the circuit under test under the excitation signals of different frequencies; The response signal is amplified in segments to obtain the sampled signal.

3. The method according to claim 1, characterized in that, The capacitance value of the circuit under test is calculated by fitting based on the amplitude and phase of each frequency component, including: Based on the amplitude and phase of each frequency component, the first capacitance value corresponding to each frequency component is calculated. Data is filtered based on each frequency component and its corresponding first capacitance value. Outliers are removed from the multiple first capacitance values ​​to obtain multiple second capacitance values. The true capacitance value of the circuit under test is obtained by fitting and calculating based on the multiple second capacitance values.

4. The method according to claim 1, characterized in that, The method of obtaining the ground insulation test result of the target DC bus based on the capacitance value analysis includes: The insulation state of the target DC bus is obtained by comparing the capacitance value with the preset capacitance value range corresponding to the circuit under test. Based on the capacitance value, a capacitance value sequence consisting of multiple consecutive measured capacitance values ​​within a preset time period is determined. Based on the capacitance value sequence, a degradation analysis is performed to obtain the degradation analysis result of the target DC bus. The ground insulation test result of the target DC bus is determined based on the insulation status and the degradation analysis results.

5. A DC bus insulation-to-ground testing device, comprising a motherboard and a core board, characterized in that, The device is used to implement the method as described in any one of claims 1-4, wherein the core board and the mother board are connected through the mother-daughter board interface of the core board; The motherboard is used to generate excitation signals of different frequencies, collect the response signals of the target DC bus under the excitation signals of different frequencies, condition the collected response signals, and transmit the generated sampling signals to the core board through the motherboard interface. The core board is used to receive sampling signals from the motherboard interface, perform frequency domain analysis and capacitance calculation based on the sampling signals to obtain the true capacitance value of the target DC bus, and generate the ground insulation test result of the target DC bus based on the true capacitance value.

6. The device according to claim 5, characterized in that, The motherboard includes a signal conditioning circuit, a toroidal transformer control circuit, a system power supply circuit, and auxiliary function modules; The input terminal of the signal conditioning circuit is connected to the output terminal of the circuit under test of the target DC bus; the output terminal of the signal conditioning circuit is connected to the analog input interface of the core board. The control signal input terminal of the ring transformer control circuit is connected to the control signal output terminal of the core board, and the output terminal of the ring transformer control circuit is connected to the input terminal of the tested circuit of the target DC bus. The input terminal of the system power circuit is connected to the external power supply interface, and the output terminal of the system power circuit is connected to the power interface of the core board. The auxiliary function module is connected to the control signal output terminal of the core board via a bus.

7. The device according to claim 6, characterized in that, The signal conditioning circuit is used to preprocess the original response signal of the target DC bus to obtain a sampled signal; The toroidal transformer control circuit is used to receive a first control signal from the control signal output terminal of the core board, and generate excitation signals of different frequencies based on the first control signal. The system power supply circuit is used to receive voltage from the external power supply interface and convert it into data power voltage and analog power voltage applied to the core board; wherein the data power voltage and the analog power voltage do not interfere with each other and provide a stable differential voltage for the core board; The auxiliary function module is used to receive a second control signal from the control signal output terminal of the core board and to store data based on the second control signal.

8. The device according to claim 7, characterized in that, The core board is also used to receive the sampled signal from the analog input interface, perform frequency domain analysis based on the sampled signal, and obtain the amplitude and phase corresponding to each frequency component; The capacitance value of the target DC bus is calculated based on the amplitude and phase corresponding to each frequency component, and the ground insulation test result of the target DC bus is obtained based on the capacitance value.

9. The device according to claim 5, characterized in that, The core board includes a microcontroller, an active crystal oscillator, a working indicator light, a motherboard-daughterboard interface, decoupling capacitors, and a multi-channel analog-to-digital converter; The microcontroller, the active crystal oscillator, the working indicator light, the decoupling capacitor, and the multi-channel analog-to-digital converter are connected to the motherboard via the motherboard interface.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions, which, when executed by a processor, are used to implement the method as described in any one of claims 1-4.

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