Communication method, device and system

Abstract

A communication method, apparatus and system, which can be applied to the technical field of communications, the method comprising: a reader-writer generates a first signal, the first signal being used for determining at least one of the following items: an initial position of a data signal, or a length of a chip in the data signal, the first signal being located before the data signal, and the first signal being adjacent to a first CP; wherein the first CP and the first chip have the same level, and the first chip is a chip adjacent to the first CP in the first signal; and the reader-writer sends the data signal to the equipment. According to the communication method provided by the invention, the influence of the CP on the detection accuracy of the jump edge in the indication signal can be reduced on the premise of ensuring relatively low power consumption of the A-IoT equipment, so that the error rate when a reader-writer transmits data to the A-IoT equipment is reduced.

Description

Technical Field

[0001] This application relates to the field of communication technology, and more specifically, to a communication method, apparatus, and system. Background Technology

[0002] With the widespread application of machine-type communication (MTC) and Internet of Things (IoT) communication in new radio (NR) systems, the number of IoT devices is increasing daily. To reduce the cost and power consumption of IoT devices, NR systems support the generation of chips (such as ON / OFF or Amplitude Shift Keying chips) that exhibit on / off waveforms using orthogonal frequency division multiplexing (OFDM), enabling IoT device receivers to demodulate data through envelope detection. Currently, in ambient Internet of Things (A-IoT) systems, when data is transmitted between readers and A-IoT devices, the receiver typically relies on line coding rules (such as Manchester coding) to detect the state of the transition edges or the duration between transition edges of the received chip.

[0003] However, the introduction of cyclic prefixes (CP) between OFDM symbols can cause sudden rising or falling edges between two adjacent OFDM symbols. If these rising or falling edges cannot be removed, they can lead to false detections when the receiver detects the transition edges. For the transmission from the reader to the A-IoT device, a time acquisition signal needs to be transmitted before the data signal is transmitted. Sudden rising or falling edges can cause the device's detection performance of the time acquisition signal to degrade.

[0004] Therefore, a communication scheme that can reduce the error rate of data signal acquisition signal detection in advance is urgently needed. Summary of the Invention

[0005] This application provides a communication method, apparatus, and system that can reduce the impact of CP on the detection accuracy of the transition edge in the indication signal while ensuring low power consumption of A-IoT devices, thereby reducing the error rate when the reader transmits data to the A-IoT device.

[0006] Firstly, a communication method is provided, which can be performed by a device, or by a chip or circuitry disposed within the device. Exemplarily, the device may also be referred to as a tag, a receiving device, or an A-IoT device, etc., and is used to receive data or information from a reader / writer.

[0007] The method includes: receiving a first signal, the first signal being used to determine at least one of the following: the start position of a data signal, or the length of a chip in the data signal, the first signal being located before the data signal and adjacent to a first CP; wherein the first CP and the first chip have the same level, and the first chip is the chip in the first signal adjacent to the first CP; and receiving the data signal.

[0008] Secondly, a communication method is provided, which can be executed by a reader / writer, or by a chip or circuit disposed in the reader / writer. For example, the reader / writer can also be referred to as a transmitting device, used to send data or information to a device.

[0009] The method includes: generating a first signal, the first signal being used to determine at least one of the following: the start position of a data signal, or the length of a chip in the data signal, the first signal being located before the data signal and adjacent to a first CP; wherein the first CP and the first chip have the same level, and the first chip is the chip in the first signal adjacent to the first CP; and transmitting the first signal.

[0010] The first chip can be a complete chip, for example, if the length of a complete chip is aμs, then the length of the first chip is aμs; or the first chip can be a part of a complete chip, for example, if the length of a complete chip is aμs, then the length of the first chip can be a / nμs, where n is an integer greater than 1.

[0011] The first signal being adjacent to the first CP can be understood as follows: the start time of the first signal and the end time of the first CP are the same, or the end time of the first signal and the start time of the first CP are the same. In other words, there is no time gap between the first signal and the first CP.

[0012] In some implementations, the device can detect the first signal to determine the starting position of the data signal. The data signal can be carried through the physical reader-to-device channel (PRDCH), the physical downlink-shared channel (PDSCH), or other channels. The starting position of the data signal can also be understood as the starting position of the channel used to transmit the data signal.

[0013] In the above technical solution, by designing the first signal such that the level of the chip adjacent to the first CP in the first signal is the same as the level of the first CP, the first CP will not cause virtual (i.e., not belonging to the first signal) rising or falling edges in the first signal. The performance of the device in detecting the first signal will not be affected by the level of the first CP. This helps to ensure the accuracy of the information related to the data signal (such as the start position or chip length) determined by the device, thereby reducing the detection error probability of the time acquisition signal. In addition, by designing the first signal, the device can ensure the performance of detecting the first signal without discarding the CP, thus avoiding the additional power consumption and implementation complexity caused by the device processing the CP.

[0014] In conjunction with the first or second aspect, in some implementations of the first or second aspect, the first signal is a start-indicator signal or a clock acquisition signal; wherein, when the first signal is a start-indicator signal, the first signal is also used to determine the start position of the clock acquisition signal. The aforementioned time acquisition signal includes both the start-indicator signal and the clock acquisition signal.

[0015] In the above technical solution, the start indication signal or clock capture signal does not include the first CP. Thus, when generating the chip of the start indication signal or clock capture signal, the length of the first CP can be ignored, which helps to reduce the complexity and difficulty of generating and designing the start indication signal or clock capture signal.

[0016] In conjunction with the first or second aspect, in some implementations of the first or second aspect, the start indication signal includes a first signal and a first CP, the start indication signal being used to determine at least one of the following: the start position of the clock capture signal, or the start position of the data signal; or, the clock capture signal includes the first signal and the first CP, the clock capture signal being used to determine at least one of the following: the start position of the data signal, or the length of the chip in the data signal.

[0017] In the above technical solution, the start indication signal or clock capture signal includes a first CP, thus avoiding the influence of CP on the start indication detection. Furthermore, since CP is part of the start indication signal, it is also utilized as the start indication signal, improving the detection time range of the start indication signal and helping to further enhance its detection performance.

[0018] In conjunction with the first or second aspect, in some implementations of the first or second aspect, the start indication signal or clock capture signal comprises M chips, the length of the first CP being less than or equal to the length of each of the M chips, where M is a positive integer.

[0019] In the above technical solution, the length of the first CP is less than or equal to the length of each chip, ensuring that the first CP includes only one level, which can reduce the complexity and difficulty of designing the detection signal of the CP for the start indication signal or clock capture signal.

[0020] In conjunction with the first or second aspect, in some implementations of the first or second aspect, the first CP is the CP of the first OFDM symbol; when M chips are located in the first OFDM symbol, the first chip is the first chip of the first OFDM symbol; or, when M chips are located in the second OFDM symbol, the first chip is the last chip of the second OFDM symbol, wherein the second OFDM symbol is located before and adjacent to the first OFDM symbol.

[0021] It should be noted that the two OFDM symbols in this application are adjacent to each other, meaning that the end time of the previous OFDM symbol and the start time of the CP of the next OFDM symbol are the same time. That is, there is a time interval between the two adjacent OFDM symbols, and this time interval is the length of the CP of the next OFDM symbol.

[0022] In the above technical solution, the start indication signal or clock capture signal is located in an OFDM symbol, and none of the M chips include the first CP, which helps to improve the detection efficiency of the start indication signal or clock capture signal.

[0023] In conjunction with the first or second aspect, in some implementations of the first or second aspect, the first CP is the CP of the first OFDM symbol, and the second OFDM symbol is located before and adjacent to the first OFDM symbol; the Q-th chip in the M chips is the first chip, wherein the first chip is the first chip of the first OFDM symbol, and the first Q-1 chips in the M chips are located in the second OFDM symbol; or, the first chip is the last chip of the second OFDM symbol, and the last MQ chips in the M chips are located in the first OFDM symbol.

[0024] In the above technical solution, the start indication signal or clock capture signal is located in at least two OFDM symbols, and none of the M chips includes the first CP. On the one hand, this helps to reduce the complexity and difficulty of generating and designing the start indication signal or clock capture signal; on the other hand, it increases the length and duration of the start indication signal or clock capture signal, thereby improving the detection performance.

[0025] In conjunction with the first or second aspect, in some implementations of the first or second aspect, the length of each of the M chips is... Where SCS is the sub-carrier space of the OFDM symbol, and L is the number of chips included in the OFDM symbol.

[0026] In conjunction with the first aspect or the second aspect, in some implementations of the first aspect or the second aspect, the first CP is the CP of the first OFDM symbol, the first chip among the M chips includes the first chip; the first chip is located in the first OFDM symbol, and the other parts of the first chip besides the first chip are the first CP.

[0027] In the above technical solution, the first chip among the M chips includes CP, so that OOK-1 (including the OOK modulation signal of one chip) and OOK-4 (including the OOK modulation signal of 6 chips) are both suitable for designing the time capture signal, so that the device can obtain the clock information of OOK-1 by dividing the clock capture signal by integer.

[0028] In conjunction with the first or second aspect, in some implementations of the first or second aspect, the first CP is the CP of the first OFDM symbol, the second OFDM symbol is located before and adjacent to the first OFDM symbol; the Qth chip in the M chips includes the first chip, wherein the first chip is located in the first OFDM symbol, and the other parts of the Qth chip besides the first chip are the first CP, and the first Q-1 chips in the M chips are located in the second OFDM symbol.

[0029] In the above technical solution, the start indication signal or clock capture signal is located in at least two OFDM symbols, and one of the M chips includes a first CP, so that the CP is also used as the start indication signal or clock capture signal, thereby improving the detection time range of the start indication signal or clock capture signal and helping to further improve the detection performance of the start indication signal.

[0030] In conjunction with the first or second aspect, in some implementations of the first or second aspect, the length of each of the M chips is... Where SCS is the subcarrier spacing of the OFDM symbol, L is the number of chips included in the OFDM symbol, and T CP The length of the first CP.

[0031] In conjunction with the first or second aspect, in some implementations of the first or second aspect, the voltage level of the first chip in the first OFDM symbol is the same as the voltage level of the last chip.

[0032] It should be noted that the first and last chips in the first OFDM symbol can both be complete chips, or the first chip and / or the last chip in the first OFDM symbol can be a part of a complete chip.

[0033] In the above technical solution, setting the level of the first chip and the level of the last chip in the first OFDM symbol to the same level helps to ensure that the level of the first CP is the same as the level of the first chip in the first OFDM symbol. This ensures that the CP of the OFDM symbol will not introduce virtual rising and / or falling edges to the first signal, thereby enabling the device to improve the accuracy of detecting the first signal without removing the CP.

[0034] Thirdly, embodiments of this application provide a communication device. This communication device may be a device or apparatus with a chip, or a device or apparatus with integrated circuitry, or a chip, chip system, module, or control unit within the aforementioned device or apparatus. It should be noted that in this application, the term "communication device" can refer to the communication device itself, or to a chip, functional module, or integrated circuit within the communication device that performs the methods provided in this application. This device is used to execute the methods provided in the first or second aspect. Specifically, the device may include units and / or modules for executing the methods provided in any implementation of the first or second aspect.

[0035] When the apparatus is used to perform the method provided in either the first aspect or the second aspect, the apparatus may include a transceiver unit (or transceiver module), or the apparatus may further include a processing unit (or processing module).

[0036] In some implementations, the processing unit may be at least one processor. The transceiver unit may be a transceiver, or an input / output interface. Optionally, the transceiver may be transceiver circuitry. Optionally, the input / output interface may be input / output circuitry.

[0037] In some implementations, the communication device is a chip, chip system, or circuit within a device or reader. The transceiver unit can be an input / output interface, interface circuit, output circuit, input circuit, pin, or related circuitry on the chip, chip system, or circuitry. The processing unit can be at least one processor, processing circuit, or logic circuit.

[0038] Fourthly, embodiments of this application provide a processor for executing the methods provided in the above aspects. Unless otherwise specified, or unless contradicted by its actual function or internal logic in the relevant description, the transmission and reception operations involved in the processor can be understood as processor output and reception, input, and other operations, or as transmission and reception operations performed by radio frequency circuits and antennas.

[0039] In conjunction with the fourth aspect, in some implementations of the fourth aspect, the processor is located in a communication device, which is either a device or a reader / writer.

[0040] Fifthly, embodiments of this application provide a communication system, which includes a device and a reader / writer. The device can execute the method provided in any of the implementations of the first aspect described above; the reader / writer can execute the method provided in any of the implementations of the second aspect described above.

[0041] Sixthly, embodiments of this application provide a computer-readable storage medium. This computer-readable storage medium stores instructions or program code that, when executed by a processor, can implement the method provided in any of the implementations of the first or second aspect described above.

[0042] In a seventh aspect, embodiments of this application provide a computer program product containing instructions. When the computer program product is run on a computer, it causes the computer to perform the method provided in any of the implementations of the first or second aspect described above.

[0043] Eighthly, embodiments of this application provide a chip. The chip includes a processor and a communication interface. The processor reads instructions stored in a memory through the communication interface and executes the method provided in any of the implementations of the first or second aspect described above.

[0044] Optionally, as one implementation, the chip also includes a memory storing computer programs or instructions. The processor is used to execute the computer programs or instructions stored in the memory. When the computer programs or instructions are executed, the processor is used to execute the method provided by any of the first or second aspects described above.

[0045] The beneficial effects of the third to eighth aspects mentioned above can be found in the descriptions of the beneficial effects in the first or second aspects, and will not be repeated here. Attached Figure Description

[0046] Figure 1 This is a schematic diagram of the communication system provided in an embodiment of this application;

[0047] Figure 2 This is a schematic diagram of the OFDM symbol structure;

[0048] Figure 3 This is a schematic diagram of the R2D signal transmission structure;

[0049] Figure 4 This is a schematic flowchart of the communication method provided in the embodiments of this application;

[0050] Figure 5 This is a schematic diagram of the OFDM symbol structure provided in the embodiments of this application;

[0051] Figure 6 This is another schematic diagram of the OFDM symbol structure provided in the embodiments of this application;

[0052] Figure 7 This is another schematic diagram of the OFDM symbol structure provided in the embodiments of this application;

[0053] Figure 8 This is another schematic diagram of the OFDM symbol structure provided in the embodiments of this application;

[0054] Figure 9 This is a schematic block diagram of an A-IoT device provided in an embodiment of this application;

[0055] Figure 10 This is another schematic block diagram of the A-IoT device provided in the embodiments of this application;

[0056] Figure 11 This is another schematic diagram of the communication device provided in the embodiments of this application;

[0057] Figure 12 This is another schematic diagram of the communication device provided in the embodiments of this application;

[0058] Figure 13 This is a schematic diagram of a chip system provided in an embodiment of this application. Detailed Implementation

[0059] The technical solutions in this application will now be described with reference to the accompanying drawings.

[0060] The technical solutions of this application can be applied to various communication systems, such as: Long Term Evolution (LTE) systems, LTE Frequency Division Duplex (FDD) systems, LTE Time Division Duplex (TDD) systems, Universal Mobile Telecommunication System (UMTS), 5th Generation (5G) systems, Future Communication Systems, or New Radio (NR) systems, Internet of Things (IoT) systems, non-terrestrial network (NTN) satellite communication systems, or other evolved communication systems, etc.

[0061] The technical solutions provided in this application can also be applied to machine-type communication (MTC), long-term evolution-machine (LTE-M) technology, device-to-device (D2D) networks, machine-to-machine (M2M) networks, Internet of Things (IoT) networks, or other networks. Among these, IoT networks may include, for example, vehicle-to-everything (V2X) networks. The communication methods in V2X systems are collectively referred to as vehicle-to-X (V2X), where X can represent anything. For example, V2X may include vehicle-to-vehicle (V2V) communication, vehicle-to-infrastructure (V2I) communication, vehicle-to-pedestrian (V2P) communication, or vehicle-to-network (V2N) communication, etc.

[0062] To facilitate understanding of the technical solution of this application, the network elements involved in this application are described below.

[0063] 1. Terminal equipment: can be called user equipment (UE), access terminal, user unit, user station, mobile station, mobile station, remote station, remote terminal, mobile device, user terminal, terminal, wireless communication equipment, user agent, or user device.

[0064] Terminal devices can be devices that provide voice / data connectivity to users, such as handheld devices with wireless connectivity, in-vehicle devices, etc. Currently, examples of terminals include: mobile phones, tablets, laptops, PDAs, mobile internet devices (MIDs), wearable devices, virtual reality (VR) devices, augmented reality (AR) devices, wireless terminals in industrial control, wireless terminals in self-driving vehicles, wireless terminals in remote medical surgery, wireless terminals in smart grids, wireless terminals in transportation safety, wireless terminals in smart cities, wireless terminals in smart homes, cellular phones, cordless phones, session initiation protocol (SIP) phones, wireless local loop (WLL) stations, personal digital assistants (PDAs), handheld devices with wireless communication capabilities, computing devices or other processing devices connected to wireless modems, in-vehicle devices, wearable devices, terminal devices in 5G networks, or future public land mobile communication networks. Terminal devices in a network (PLMN), etc.

[0065] In this embodiment, the terminal device can also be a wearable device. Wearable devices, also known as wearable smart devices, are a general term for devices that utilize wearable technology to intelligently design and develop everyday wearables, such as glasses, gloves, watches, clothing, and shoes. Wearable devices are portable devices that are worn directly on the body or integrated into the user's clothing or accessories. Wearable devices are not merely hardware devices, but also achieve powerful functions through software support, data interaction, and cloud interaction. Broadly speaking, wearable smart devices include those that are feature-rich, large in size, and can achieve complete or partial functions without relying on a smartphone, such as smartwatches or smart glasses, as well as those that focus on a specific type of application function and require the use of other devices such as smartphones, such as various smart bracelets and smart jewelry for vital sign monitoring.

[0066] Furthermore, in this embodiment, the terminal device can also be a terminal device in an IoT system. IoT is an important component of the future development of information technology. Its main technical feature is to connect objects to the network through communication technology, thereby realizing an intelligent network of human-machine interconnection and object-to-object interconnection.

[0067] 2. Access Network: Provides network access functionality for terminal devices and can utilize transmission tunnels of varying quality based on user level and service requirements. Access networks can employ different access technologies. Currently, there are two types of wireless access technologies: 3GPP access technologies (such as those used in 3G, 4G, or 5G systems) and non-3GPP access technologies. 3GPP access technologies refer to those conforming to 3GPP standards and specifications. For example, access network equipment in a 5G system is called a next-generation node base station (gNB). Non-3GPP access technologies refer to those that do not conform to 3GPP standards and specifications, such as air interface technologies represented by access points (APs) in Wireless Fidelity (WiFi).

[0068] An access network that uses wireless communication technology to implement access network functions can be called a radio access network (RAN). The RAN manages radio resources, provides access services to terminal devices, and forwards control signals and user data between the terminal and the core network. The RAN can also be an open RAN (O-RAN).

[0069] RAN nodes, also known as radio access network devices, RAN entities, or access nodes, are used to help terminals access communication systems wirelessly. In one application scenario, an RAN node can be a base station, an evolved NodeB (eNodeB), a transmission reception point (TRP), a next-generation NodeB (gNB) in a 5G mobile communication system, a base station in a future communication system, or an access node in a WiFi system. RAN nodes can be macro base stations, micro base stations, indoor stations, relay nodes, or donor nodes.

[0070] In another application scenario, multiple RAN nodes can collaborate to help terminals achieve wireless access, with different RAN nodes implementing different functions of the base station. For example, a RAN node can be a central unit (CU), a distributed unit (DU), or a radio unit (RU). The CU performs the functions of the base station's Radio Resource Control (RRC) and Packet Data Convergence Protocol (PDCP), and can also perform the functions of the Service Data Adaptation Protocol (SDAP). The DU performs the functions of the base station's Radio Link Control (RANC) and Medium Access Control (MAC) layers, and can also perform some or all of the physical layer functions. For specific descriptions of these protocol layers, refer to the relevant 3GPP technical specifications. The RU can be used to implement radio frequency signal transmission and reception. The CU and DU can be two independent RAN nodes, or they can be integrated into the same RAN node, such as within a baseband unit (BBU). RUs can be included in radio frequency equipment, such as remote radio units (RRUs) or active antenna units (AAUs). CUs can be further divided into two types of RAN nodes: CU-control plane and CU-user plane.

[0071] In different systems, RAN nodes can have different names. For example, in an O-RAN system, a CU can also be called an open CU (O-CU), a DU can also be called an open DU (O-DU), and an RU can be called an open RU (O-RU). In this application, the RAN node can be implemented through software modules, hardware modules, or a combination of software and hardware modules. For example, a RAN node can be a server loaded with the corresponding software modules. The embodiments of this application do not limit the specific technology or device form used in the RAN node.

[0072] It should be understood that the access network can provide services to the cell. Terminal devices can communicate with the cell through the transmission resources (e.g., frequency domain resources, or spectrum resources) allocated by the access network devices.

[0073] 3. Tag: A tag is a device capable of responding to paging messages such as instructions or commands. Tags can be (electronic) tags (radio frequency identification, RFID), meaning a tag-like or card-like chip containing information is attached to a person or object, and read and identified using radio waves. They can be divided into active, passive, and semi-active types. Passive tags can also be called passive Internet of Things (IoT) devices, and can be considered a type of terminal device; alternatively, tags can also be placed within terminal devices. It should be noted that the terminal devices here mainly refer to those in A-IoT.

[0074] 4. Read / write device (or reader): This refers to a device with reading and writing capabilities. It can be understood as a device that communicates with tags or terminal devices in A-IoT. A reader / writer can be a terminal device, an access network device (e.g., a base station), a relay node or intermediate node, or any other device with read / write functionality.

[0075] To facilitate understanding of the technical solution of this application, the concepts involved in this application will be briefly introduced below.

[0076] 1. Amplitude Shift Keying (ASK): ASK is equivalent to amplitude modulation in analog signals, except that the carrier signal is multiplied by binary digits. Amplitude shift treats frequency and phase as constants and amplitude as a variable, transmitting information bits through changes in the carrier's amplitude. If the possible states of a digitally modulated signal correspond one-to-one with binary information symbols or their corresponding baseband signal states, then the modulated signal is called a binary digital modulated signal. Keying using binary information symbols, that is, using two different amplitudes to represent binary "0" and "1", is called binary amplitude shift keying, denoted by ASK. For example, a higher amplitude carrier can represent bit "1" and a lower amplitude carrier can represent bit "0"; or, a higher amplitude carrier can represent bit "0" and a lower amplitude carrier can represent bit "1".

[0077] 2. On-off keying (OOK): OOK is a type of binary amplitude shift keying and a special case of ASK.

[0078] 3. Chip: Such as an OOK chip or an ASK chip. One chip represents one amplitude shift keying level, such as an ASK level or an OOK level. An OFDM symbol can include multiple chips; more specifically, an OFDM symbol can include an integer number of chips, or an OFDM symbol and its CP can include an integer number of chips. For an OOK chip, when the amplitude (or envelope, level, or energy) of the OOK chip is high (e.g., above a certain threshold, or non-zero), the state of the OOK chip is said to be high level, ON, or the symbol {1}; when the amplitude (or envelope, level, or energy) of the OOK chip is low (e.g., below a certain threshold, or zero), the state of the OOK chip is said to be low level, OFF, {0}, or the symbol {0}. The level of amplitude can be defined relative to the receiver's amplitude demodulation threshold; amplitudes greater than the demodulation threshold are called high amplitudes, and amplitudes less than the demodulation threshold are called low amplitudes. A chip can be described as a time unit, a unit of time, a symbol, or a modulation symbol. In one definition, a chip is the time unit occupied by the encoded bits after the information bits have been encoded using line codes.

[0079] 4. Envelope Detection: A signal detection method that uses a high-frequency signal as input and obtains the envelope or amplitude line of the low-frequency original signal through a half-wave or full-wave rectifier circuit. The receiver, based on the obtained envelope of the original signal, digitally samples the envelope and compares it with an amplitude or energy threshold set by the receiver to determine whether the digitally sampled signal is ON or OFF.

[0080] 5. CP: This is formed by copying a certain number of samples from the tail of each OFDM symbol to the head of each OFDM symbol. CP has two functions: 1) to resist inter-symbol interference in OFDM caused by multipath delay; 2) to enable time boundary alignment of the next time slot after OFDM symbols are combined into a time slot.

[0081] 6. PRDCH: A channel used to carry data transmission from the reader to A-IoT devices.

[0082] Figure 1 An architecture diagram of a communication system applied in an embodiment of this application is shown.

[0083] like Figure 1As shown in (a), system 101 includes a reader and an A-IoT device. The reader and the A-IoT device can communicate with each other, for example, through the A-IoT air interface (uu interface). The communication link from the reader to the A-IoT device to transmit data is called the reader-to-device (R2D) communication link, and the communication link from the A-IoT device to the reader to transmit data is called the device-to-reader (D2R) communication link.

[0084] like Figure 1 As shown in (b), system 102 includes a reader / writer, a relay node, and an A-IoT device. The reader / writer and the relay node can communicate via a UU interface, and the relay node and the A-IoT device can also communicate via a UU interface. The relay node can act as a reader / writer communicating with the A-IoT device, or it can forward information between the A-IoT device and the reader / writer, with the A-IoT device communicating with the reader / writer through the relay node. Therefore, in system 102, the communication link for transmitting data from the reader / writer or relay node to the A-IoT device is called an R2D communication link, and the communication link for transmitting data from the A-IoT device to the relay node or reader / writer is called a D2R communication link.

[0085] For example, Figure 1 The reader / writer can be an access network device such as a gNB, pole station, small station, or micro station, or it can be a terminal device or other device with read / write function; the A-IoT device can be a terminal device with a peak power consumption of about 1 microwatt (μW), or it can be a terminal device with a peak power consumption of less than or equal to n*100μW, where n is an integer greater than 0 and less than 10; the relay node can be a terminal device, micro base station, or other device capable of A-IoT communication.

[0086] In current A-IoT systems, the clock sampling offset (SFO) of A-IoT devices is relatively large; for example, the SFO is 10. 5A deviation of 10% (parts per million, PPM) means that when the equipment (or receiver) demodulates the received OFDM symbol, it needs to clock-track the rising or falling edges of the OFDM symbol according to the rules introduced by the line coding, and detect the information bits based on the state of the transition edge (rising or falling) or the time length between transition edges. An OFDM symbol consists of multiple chips; however, the introduction of CP (Current Processing) can cause sudden rising or falling edges between adjacent chips of two OFDM symbols. If these sudden rising or falling edges cannot be removed, it will lead to false detections when the equipment detects the signal. Figure 2 As shown, if the last chip of the first OFDM symbol (OFDM symbol 1) is low, the first chip of the second OFDM symbol (OFDM symbol 2) is low. The CP of OFDM symbol 2 is copied from the tail of OFDM symbol 2. If the tail of OFDM symbol 2 (i.e., the last chip) is high, the introduction of CP will cause a sudden rising and falling edge between the last chip of OFDM symbol 1 and the first chip of OFDM symbol 2.

[0087] Taking the reader / writer using Manchester encoding to perform line encoding on the transmitted OFDM symbols as an example, the device needs to detect the received OFDM symbols based on the Manchester encoding. For instance, with a Manchester encoding factor of 2, information bit "1" is encoded as 10, and information bit "0" is encoded as 01. Figure 2 The OFDM symbol 1 shown contains 4 chips carrying 11 information bits, while OFDM symbol 2 carries 00 information bits. In this scenario, given the value of the previous information bit, the device can use a transition edge of the previous information bit as a reference time for tracking. It can detect the signal at reference time +T and reference time +2T respectively to determine the value of the current information bit, where T is the length of a chip. If a transition edge is detected at both reference time +T and reference time +2T, the current information bit is the same as the previous information bit; if no transition edge is detected at reference time +T, but only at reference time +2T, the current information bit is inverted compared to the previous information bit. For example, Figure 2 The last information bit of OFDM symbol 1 is "1", which means Figure 2Using the last falling edge of OFDM symbol 1 as a reference time, without the introduction of CP, the device would not detect the transition edge at reference time +T, but would detect it at reference time +2T. Therefore, the first information bit of OFDM symbol 2 would be the opposite of the last information bit of OFDM symbol 1, and would be detected as bit "0". However, due to the introduction of CP, a false rising edge (and falling edge) that should not exist occurs, causing a false edge to be detected at reference time +T. Following the aforementioned detection method, the device would consider the first information bit of OFDM symbol 2 to be the same as the previous information bit (i.e., the last information bit of OFDM symbol 1), and would falsely detect it as "1".

[0088] A-IoT systems are asynchronous systems; therefore, before receiving the PRDCH, the device needs to obtain the start position of the PRDCH and the length of the chips in the PRDCH. Thus, the reader / writer needs to send a time acquisition signal to the device before sending the PRDCH. Figure 3 As shown, the time acquisition signal includes a start-indicator signal and a clock acquisition signal, with the clock acquisition signal following and adjacent to the start-indicator signal. The start-indicator signal is used to determine the start position of subsequent clock acquisition signals and / or the start position of the PRDCH. The clock acquisition signal is used to determine the length of the chips in the PRDCH and / or the start position of the PRDCH. It should be noted that the start-indicator signal and the clock acquisition signal being adjacent means that the end time of the start-indicator signal and the start time of the clock acquisition signal are the same, with no time interval between the two signals. The device determines the start position of the PRDCH and the length of the chips in the PRDCH based on the time acquisition signal, and then receives the PRDCH or the data signals carried on the PRDCH.

[0089] As described above, if the time acquisition signal is located across multiple OFDM symbols, the presence of the CP (Clipping Point) between OFDM symbols may lead to false detections when the device detects the time acquisition signal. This means incorrect determination of the start position of the PRDCH and / or the length of the chips within the PRDCH, resulting in data transmission errors between the reader and receiver. In the 3rd Generation Partnership Project (3GPP) RAN1#116bis meeting, a proposal was made to use the last edge within each OFDM symbol as the reference time to determine the CP position and remove the sampling points contained in the CP, thereby eliminating the problem of virtual rising and falling edges caused by the CP. However, this method may introduce additional power consumption and processing complexity to the device, and the device needs to store the number of counted sampling points, placing certain demands on its storage capacity. Furthermore, before receiving the PRDCH, the device needs to receive the time acquisition signal. In other words, when the device receives the time acquisition signal or the start indication signal in the time acquisition signal, it is in the blind detection stage and has not yet obtained enough reference clock information. Therefore, even if the device has the ability to remove the CP, it cannot remove the CP because the start position of the OFDM symbol and the start position of the CP cannot be determined at this time. Consequently, it cannot eliminate the impact of the virtual rising and falling edges introduced by the CP on the signal detection performance.

[0090] In view of this, embodiments of this application provide a communication method and apparatus that design the time acquisition signal before R2D data transmission to reduce the impact of CP on the detection performance of the time acquisition signal.

[0091] Figure 4 A schematic flowchart of a communication method provided in an embodiment of this application is shown. This method can be executed by a reader / writer and a device. More specifically, the reader / writer can be... Figure 1 The reader / writer in the device can be a chip or chip system embedded within it; the device can be... Figure 1 For A-IoT devices, the method 400 may include S410 to S430.

[0092] S410, the reader generates the first signal.

[0093] It should be noted that generating the first signal may also include acquiring the first signal or determining the first signal.

[0094] The first signal is used to determine at least one of the following: the starting position of the data signal, or the length of the chip in the data signal; the first signal is located before the data signal and is adjacent to the first CP; wherein the first CP and the first chip have the same level, and the first chip is the chip in the first signal that is adjacent to the first CP.

[0095] For example, the adjacency of the first signal and the first CP can be understood as: the start time of the first signal and the end time of the first CP are the same time, or the end time of the first signal and the start time of the first CP are the same time. That is to say, there is no time interval between the first signal and the first CP.

[0096] For example, the data signal may be transmitted via PRDCH or other channels, and the starting position of the data signal may be understood as at least one of the following: the starting position of the channel used to carry the data signal, the starting position of PRDCH, or the starting position of R2D transmission. Here, "position" can also be understood as time or point in time.

[0097] It should be noted that, in this application, when the amplitude (or envelope, level, or energy) of the chip is high (e.g., above a certain threshold, or non-zero), the state of the chip is referred to as high level, ON, or the symbol {1}; when the amplitude (or envelope, level, or energy) of the chip is low (e.g., below a certain threshold, or zero), the state of the chip is referred to as low level, OFF, {0}, or the symbol {0}.

[0098] S420, the reader sends the first signal to the device.

[0099] This step can also be understood as the device receiving the first signal from the reader.

[0100] S430, the reader sends data signals to the device.

[0101] This step can also be understood as the device receiving data signals from the reader / writer.

[0102] Understandably, the device detects the first signal to determine the starting position of the data signal.

[0103] In some implementations, the first signal is a start indication signal or a clock capture signal; wherein, when the first signal is a start indication signal, the first signal is also used to determine the start position of the clock capture signal. That is, when the reader generates the start indication signal or the clock capture signal, the first CP is not used as part of the chip of the start indication signal or the clock capture signal.

[0104] In some implementations, the start indication signal includes a first signal and a first CP, the start indication signal being used to determine at least one of the following: the start position of the clock capture signal, or the start position of the data signal; or, the clock capture signal includes a first signal and a first CP, the clock capture signal being used to determine at least one of the following: the start position of the data signal, or the length of the chip in the data signal. That is, when the reader generates the start indication signal or the clock capture signal, the first CP is used as part of the chip of the start indication signal or the clock capture signal.

[0105] It should be noted that the start indication signal can also be described as the start indication section, and the clock capture signal can also be described as the clock acquisition signal or the clock capture section. A chip can be described as a time unit, or the minimum time unit, or a unit time unit, or the minimum level length, or a unit level length. In one definition, a chip is the time unit occupied by the encoded bits after the information bits are encoded using line code. The chip length is the duration of the time unit, or the duration of the minimum time unit, or the minimum level length, or the unit level length.

[0106] In some implementations, the start indication signal or clock capture signal comprises M chips, where M is a positive integer. In practice, the length of the first CP may be less than or equal to the length of each of the M chips; or the length of the first CP may be greater than the length of each of the M chips. Specifically, the length of the first CP can be a shorter length than the standard CP length, i.e., 4.7 μs, or it may be a longer length than the standard CP length, i.e., 5.2 μs. The "length" of the aforementioned chips or CP can be understood as the time duration occupied by the chip or CP in the time domain.

[0107] For ease of understanding, the following is combined with Figures 5 to 7 The possible forms of the start indication signal or clock capture signal are described separately when the length of the first CP is less than or equal to the length of each of the M chips (e.g., T0) and when the length of the first CP is greater than the length of each of the M chips.

[0108] When the length of the first CP is less than or equal to the length of each of the M chips, the relationship between the M chips, the first chip, and the OFDM symbol in the start indication signal or clock capture signal can include any one of the following 1) to 4):

[0109] 1) The first CP is the CP of the first OFDM symbol. When M chips are located in the first OFDM symbol, the first chip is the first chip of the first OFDM symbol; or, when M chips are located in the second OFDM symbol, the first chip is the last chip of the second OFDM symbol, wherein the second OFDM symbol is located before the first OFDM symbol and adjacent to the first OFDM symbol.

[0110] ① For the case where M chips are located in the first OFDM symbol, and the first chip is the first chip of the first OFDM symbol:

[0111] In one example, such as Figure 5 As shown in (a), OFDM symbol 1 can be regarded as an example of the first OFDM symbol, chip 1 can be regarded as an example of the first chip, and CP1 can be regarded as an example of the first CP. It can be seen that the start indication signal includes 2 chips, that is, M equals 2, and CP1 does not belong to either of the 2 chips of the start indication signal.

[0112] In one implementation of this example, the first chip of the start indication signal (i.e., chip 1) is low, or the start indication signal is low, and CP1 is low. This allows the device to consider CP1 as part of the start indication signal, thus ensuring that the detection of the start indication signal is not affected by CP1. Alternatively, the device can also consider CP1 as part of chip 1, thus ensuring that the detection of the start indication signal is not affected by CP1. It should be understood that when the first CP (e.g., CP1) is considered part of the first chip (e.g., chip 1), the length of the first chip is longer than the lengths of all other chips in the M chips except the first chip by the length of CP.

[0113] Furthermore, the start position of the start indication signal can be considered aligned with the start position of the OFDM symbol containing CP1, or it can be considered aligned with the start position of the OFDM symbol not containing CP1. When CP1 is low, OFDM symbol 1 ends with a low level. In one case, the end chip of OFDM symbol 1 is the last chip of the clock capture signal, and the end position of the clock capture signal is aligned with the end position of the OFDM symbol, for example, as shown below. Figure 5 As shown in (a), OFDM symbol 1 comprises 6 chips, the start indication signal comprises 2 chips (i.e., M equals 2) with a state of {00}, and the clock capture signal comprises 4 chips with a state of {1010}. Alternatively, if the last one or more chips of OFDM symbol 1 include one or more chips from the data signal, then the one or more chips in the data signal are low, and these one or more chips may not carry any bits.

[0114] In another implementation of this example, the first chip of the start indication signal is high, or the start indication signal is a signal that is high followed by low. OFDM symbol 1 ends with a high level, and CP1 is high. This allows the device to consider CP1 as part of the start indication signal or as part of the first chip when detecting the start indication signal, thus ensuring that the detection of the start indication signal is not affected by CP1. The start position of the start indication signal can be considered aligned with the start position of the OFDM symbol containing CP1, or it can be considered aligned with the start position of the OFDM symbol not containing CP1. In one case, the end chip of OFDM symbol 1 is the last chip of the clock capture signal. In this case, the end position of the clock capture signal is aligned with the end position of OFDM symbol 1. For example, OFDM symbol 1 includes 6 chips, the start indication signal includes 2 chips (i.e., M equals 2), the state is {10}, and the clock capture signal includes 4 chips, the state is {1001}. In another case, if the last one or more chips of OFDM symbol 1 include one or more chips in the data signal, then the one or more chips in the data signal are at a low level, and these one or more chips may not carry bits.

[0115] In another example, such as Figure 5 As shown in (b), OFDM symbol 2 can be considered as an example of the first OFDM symbol, chip 1 as an example of the first chip, and CP2 as an example of the first CP. Therefore, the clock capture signal consists of four chips, M equals 4, and CP2 does not belong to any of the four chips. It is understandable that since the first chip of the clock capture signal (i.e., chip 1) is high, CP2 needs to be high. This way, when the device detects the clock capture signal, it will consider CP2 as part of the clock capture signal or as part of the first chip, thus ensuring that the performance of the clock capture signal detection is not affected by CP2. To ensure that CP2 is high, OFDM symbol 2 needs to end with a high level. In one case, the ending chip of OFDM symbol 2 is the last chip of the clock capture signal, then the end position of the clock capture signal is aligned with the end position of OFDM symbol 2.

[0116] ② For the case where M chips are located in the second OFDM symbol, and the first chip is the last chip of the second OFDM symbol, such as... Figure 5As shown in (c), OFDM symbol 2 can be considered as an example of the first OFDM symbol, OFDM symbol 1 can be considered as an example of the second OFDM symbol, chip 1 can be considered as an example of the first chip, and CP2 can be considered as an example of the first CP. Therefore, the start indication signal includes two chips, i.e., M equals 2, and CP2 does not belong to either of the two chips. It is understandable that since the last chip of the start indication signal (i.e., chip 1) is low, CP2 is low, so that when the device detects the start indication signal, it can consider CP2 as part of the start indication signal or as part of the first chip, thus ensuring that the detection of the start indication signal and the subsequent clock capture signal is not affected by CP2. To ensure that CP2 is low, OFDM symbol 2 needs to end with a low level. In one case, the ending chip of OFDM symbol 2 is the last chip of the clock capture signal, then the end position of the clock capture signal is aligned with the end position of OFDM symbol 2.

[0117] Understandably, in this scenario, the first CP does not belong to any of the M chips, and the M chips are located in one OFDM symbol. Alternatively, the first CP is part of the first chip among the M chips, and the M chips are located in one OFDM symbol. When the first CP is part of the first chip among the M chips, the length of the first chip is longer than the length of each of the other M chips (excluding the first one) by the length of the CP.

[0118] 2) The first CP is the CP of the first OFDM symbol. The first chip in the M chips includes the first chip, which is located in the first OFDM symbol. The other parts of the first chip besides the first chip are the first CP. It can be understood that in this scenario, the first chip and the last M-1 chips in the M chips are located in one OFDM symbol.

[0119] In one example, such as Figure 6 As shown in (a), OFDM symbol 1 can be considered as an example of the first OFDM symbol, chip 1 can be considered as an example of the first chip, and CP1 can be considered as an example of the first CP. Therefore, the start indication signal includes two chips, i.e., M equals 2. The first chip includes chip 1 and CP1, and chip 1 and the second chip are located in OFDM symbol 1. It can be understood that... Figure 6As shown in (a), chip 1 is low, OFDM symbol 1 ends with a low level, and CP1 is low. In one case, the ending chip of OFDM symbol 1 is the last chip of the clock capture signal, then the end position of the clock capture signal is aligned with the end position of the OFDM symbol. For example, the OFDM symbol includes 6 chips, the start indication signal includes 2 chips with a state of {00}, and the clock capture signal includes 4 chips with a state of {1010}. Optionally, chip 1 is high, and CP1 is high, so that the detection performance of the device is not affected by CP1 when detecting the start indication signal. When CP1 is high, OFDM symbol 1 ends with a high level. In one case, the end chip of OFDM symbol 1 is the last chip of the clock capture signal. In this case, the end position of the clock capture signal is aligned with the end position of the OFDM symbol. For example, the OFDM symbol includes 6 chips, the start indication signal includes 2 chips with a state of {10}, and the clock capture signal includes 4 chips with a state of {1001} or {1011}.

[0120] In another example, such as Figure 6 As shown in (b), OFDM symbol 2 can be considered as an example of the first OFDM symbol, chip 1 as an example of the first chip, and CP2 as an example of the first CP. Therefore, the clock capture signal includes four chips, i.e., M equals 4. The first chip includes chip 1 and CP2, and chip 1 and the last three chips of the clock capture signal are located in OFDM symbol 2. It is understood that chip 1 is high and CP2 is high, so the detection performance of the device will not be affected by CP2 when detecting the clock capture signal. To ensure that CP2 is high, OFDM symbol 2 needs to end with a high level. In one case, the ending chip of OFDM symbol 2 is the last chip of the clock capture signal, then the end position of the clock capture signal is aligned with the end position of the OFDM symbol. For example, OFDM symbol 2 includes six chips, and the clock capture signal includes six chips, with a state of {101001}.

[0121] Understandably, in this scenario, the first CP is the first chip among M chips, and all other chips in the M chips except the first chip are located in one OFDM symbol. That is to say, the first chip in this scenario (such as chip 1) may not be a complete chip, and the length of the first chip is less than the length of each of the M chips.

[0122] 3) The first CP is the CP of the first OFDM symbol, and the second OFDM symbol is located before and adjacent to the first OFDM symbol; the Qth chip in the M chips is the first chip, where the first chip is the first chip of the first OFDM symbol, and the first Q-1 chips in the M chips are located in the second OFDM symbol; or, the first chip is the last chip of the second OFDM symbol, and the last MQ chips in the M chips are located in the first OFDM symbol.

[0123] For the case where the first chip is the last chip of the second OFDM symbol, and the last MQ chips out of the M chips are located within the first OFDM symbol, such as... Figure 6 As shown in (c), OFDM symbol 2 can be considered an example of the first OFDM symbol, OFDM symbol 1 can be considered an example of the second OFDM symbol, chip 1 can be considered an example of the first chip, and CP2 can be considered an example of the first CP. Therefore, the clock capture signal consists of 6 chips, with the second chip being chip 1, i.e., M equals 6 and Q equals 2. Chip 1 is located in OFDM symbol 1 and is the last chip of OFDM symbol 1. The last four chips, i.e., chips ③ to ⑥, are located in OFDM symbol 2. It is understandable that when chip 1 is low and CP2 is low, the device can consider CP2 as part of the start indication signal or as part of the first chip when detecting the clock capture signal, thus ensuring that the detection accuracy of the start indication signal and the clock capture signal is not affected by CP2. When CP2 is low, OFDM symbol 2 needs to end with a low level. In one case, the end chip of OFDM symbol 2 is the last chip of the clock capture signal. In this case, the end position of the clock capture signal is aligned with the end position of the OFDM symbol. For example, OFDM symbol 2 includes 6 chips (i.e., L equals 6), the clock capture signal includes 6 chips (i.e., M equals 6), and the state is {101010}.

[0124] For the case where the first chip is the first chip of the first OFDM symbol, and the first Q-1 chips out of the M chips are located in the second OFDM symbol, such as Figure 6As shown in (d), OFDM symbol 2 can be considered as an example of the first OFDM symbol, OFDM signal 1 can be considered as an example of the second OFDM symbol, chip 1 can be considered as an example of the first chip, and CP2 can be considered as an example of the first CP. Therefore, the clock capture signal consists of 6 chips, with the third chip being chip 1, i.e., M equals 6 and Q equals 3. Chip 1 and the last three chips (chips ④ to ⑥) are located in OFDM symbol 2, while the first two chips, i.e., chips ① and ②, are located in OFDM symbol 1. It is understandable that since chip 1 is high, CP2 can also be high. Thus, when the device detects the clock capture signal, it will treat CP2 as part of the clock capture signal, ensuring that the detection performance of the clock capture signal is not affected by CP2. When CP2 is high, OFDM symbol 2 ends with a high level. In one case, the end chip of OFDM symbol 2 is the last chip of the clock capture signal. In this case, the end position of the clock capture signal is aligned with the end position of the OFDM symbol. For example, OFDM symbol 2 includes 6 chips (i.e., L equals 6), the clock capture signal includes 6 chips (i.e., M equals 6), and the state is {101001}.

[0125] Understandably, in this scenario, the first CP does not belong to any of the M chips, and the M chips are located in different OFDM symbols. Alternatively, the first CP is part of the first chip among the M chips, and the M chips are located in one OFDM symbol. When the first CP is part of the first chip among the M chips, the length of the first chip is longer than the length of each of the other M chips (excluding the first one) by the length of the CP.

[0126] 4) The first CP is the CP of the first OFDM symbol. The second OFDM symbol is located before and adjacent to the first OFDM symbol. The Q-th chip out of M chips includes the first chip, where the first chip is located in the first OFDM symbol, and the remaining part of the Q-th chip, excluding the first chip, constitutes the first CP. The first Q-1 chips out of the M chips are located in the second OFDM symbol. It can be understood that in this scenario, the first chip and the last MQ chips out of the M chips are located in one OFDM symbol. For example... Figure 6As shown in (e), OFDM symbol 2 can be considered as an example of the first OFDM symbol, OFDM signal 1 can be considered as an example of the second OFDM symbol, chip 1 can be considered as an example of the first chip, CP2 can be considered as an example of the first CP, and chip ③ is an example of the Q-th chip. It can be seen that the clock capture signal includes 6 chips. The third chip (chip ③) includes chip 1 and CP2, i.e., M equals 6, Q equals 3, and chip 1 and the last 3 chips (chips ④ to ⑥) are located in OFDM symbol 2, while the first 2 chips, i.e., chips ① and ②, are located in OFDM symbol 1. It is understandable that when chip 1 is high, CP2 is high, so the detection performance of the clock capture signal will not be affected by CP2 when the device detects the clock capture signal. When CP2 is high, OFDM symbol 2 ends with a high level. In one case, the end chip of OFDM symbol 2 is the last chip of the clock capture signal. In this case, the end position of the clock capture signal is aligned with the end position of the OFDM symbol. For example, OFDM symbol 2 includes 6 chips, the clock capture signal includes 6 chips, and the state is {101001}.

[0127] Alternatively, when the first chip is located in the second OFDM symbol, the portion of the Q-th chip other than the first chip is the first CP, and the last MQ chips out of the M chips are located in the first OFDM symbol. For example... Figure 6 As shown in (f), OFDM symbol 2 can be considered as an example of the first OFDM symbol, OFDM signal 1 can be considered as an example of the second OFDM symbol, chip 1 can be considered as an example of the first chip, and CP2 can be considered as an example of the first CP. Therefore, the clock capture signal consists of 6 chips. The second chip (i.e., chip ②) includes chip 1 and CP2, meaning M equals 6 and Q equals 2. Chip 1 and the preceding chip (chip ①) are located in OFDM symbol 1, while the last four chips (chips ③ to ⑥) are located in OFDM symbol 2. When chip 1 is low, CP2 is low, ensuring that the detection performance of the device is not affected by CP2 when detecting the start indication signal and the clock capture signal. To ensure that CP2 is low, OFDM symbol 2 needs to end with a low level. In one case, the end chip of OFDM symbol 2 is the last chip of the clock capture signal. In this case, the end position of the clock capture signal is aligned with the end position of the OFDM symbol. For example, OFDM symbol 2 includes 6 chips, and the clock capture signal includes 6 chips with the state {101010}.

[0128] Understandably, in this scenario, the first CP belongs to the Q-th chip out of M chips, and the M chips are located in different OFDM symbols. That is to say, the first chip in this scenario (such as chip 1) may not be a complete chip, and the length of the first chip is less than the length of each of the M chips.

[0129] from Figure 5 and Figure 6 It can be seen that when the start indication signal or clock capture signal is adjacent to CP, or when the start indication signal or clock capture signal includes CP, if the length of CP is less than or equal to the length of one chip in the start indication signal or clock capture signal, the level of CP is the same as the level of the chip in the start indication signal or clock capture signal that is closest to CP. In this way, before R2D data transmission, the transmitted time capture signal will not introduce virtual rising and falling edges due to CP, which helps to ensure signal demodulation performance and thus reduce data transmission errors.

[0130] It should be noted that in the embodiments of this application, "M chips excluding the first CP" is not equivalent to "the start indication signal or clock capture signal excluding the first CP". M chips excluding the first CP means that when the reader generates M chips, it does not consider the length of the first CP. In the actual start indication signal or clock capture signal of the reader, the signal may include the first CP; or, the device receives the start indication signal or clock capture signal and regards the first CP as part of the signal or a chip among the M chips. That is, the length of the start indication signal or clock capture signal can be the sum of the length of the M chips and the length of the first CP.

[0131] When the length of the CP is less than or equal to the length of one chip, since the first CP may or may not belong to any of the M chips, an OFDM symbol includes L chips, the OFDM symbol length is 1 / SCS (where SCS is the subcarrier spacing), and the length of the first CP is T. CP At that time, the length T0 of each of the M chips can include the following two cases:

[0132] Case 1: If the first CP does not belong to any of the M chips, then the length of a chip in the OFDM symbol is... That is, the length of each of the M chips is At this time, the length of the start indication signal or clock capture signal is For example, when L is 6 and the subcarrier spacing is 15 kHz, T CP 4.7 μs or T CP Taking 5.2μs as an example, the length of one chip is The length of the start indication signal or clock capture signal containing M chips is (11.1*M+4.7)μs or (11.1*M+5.2)μs. It should be noted that if the first CP does not belong to any of the M chips, and the first CP is adjacent to the first chip among the M chips, the length of the first chip among the M chips can also be... The length of each of the M chips, excluding the first chip, is...

[0133] Case 2: If the first CP is part of a certain chip among M chips, then the length of a chip in the OFDM symbol is... That is, the length of each of the M chips is At this time, the length of the start indication signal or clock capture signal is For example, when L is 6 and the subcarrier spacing is 15 kHz, T CP Taking 4.7μs as an example, the length of one chip is The length of the start indication signal or clock capture signal containing M chips is (11.9*M) μs. Alternatively, the length of one chip is... The length of the start indication signal or clock capture signal containing M chips is (12.0*M)μs.

[0134] It should be noted that the length of each chip can also be understood as any of the following: the length of a time unit, the length of the smallest time unit, or the length of the smallest chip.

[0135] In one implementation, the OFDM symbol length can be defined as the number of samples or the minimum number of time units N. OFDM The length of the first CP can be defined as the number of sample points N. CP In case 1 above, the length of each of the M chips can be... At this time, the length of the start indication signal or clock capture signal is... In scenario 2 above, the length of each of the M chips is... At this time, the length of the start indication signal or clock capture signal is... For example, N CP Choose 9 or 10, N OFDM The value is 128, and L can be any one of 1, 2, 4, 6, 8, or 12. For example, if L is 4, N... CP The length is 9. In case 1, the length of each of the M chips is 32 samples, and the length of the start indication signal or clock capture signal is 32*M+9 samples; in case 2, the length of each of the M chips is... or Each sample point, the length of the start indication signal or clock capture signal is... *M samples. It should be understood that, for case 1, where the first CP is adjacent to the first chip among the M chips, the length of the first chip among the M chips can also be... The length of each of the M chips, excluding the first chip, is...

[0136] In one implementation, the length of the start indicator signal can be defined as a range of values. In one possible case, the minimum length of the start indicator signal is... The maximum value is Among them, T CP1 For a shorter length than the standard CP length, T CP2 The length is longer than the standard CP length; in another possible case, the minimum length of the start indication signal is... The maximum value is Among them, T CP1 For a shorter length than the standard CP length, T CP2 The length is longer than the standard CP length; the device detects the length of the start indication signal within the range of values ​​and considers it to have detected the start indication signal.

[0137] In one implementation, the length of the start indicator signal can be defined as a range of values. In one possible case, the minimum length of the start indicator signal is... The maximum value is In another possible scenario, the minimum length of the start indication signal is... The maximum value is Among them, T CP1 For a shorter conventional CP length (e.g., 4.7 μs), T CP2 If the length of the standard CP is relatively long (e.g., 5.2 μs), the device detects the length of the start indication signal within the range of values ​​and considers it to have detected the start indication signal.

[0138] In one implementation, the starting position of the first signal is predefined as the starting position of the 0th or 7th OFDM symbol within the current time slot. The starting position of the OFDM symbol includes either a starting position containing a CP or a starting position not containing a CP. For a subcarrier spacing of 15 kHz, a time slot includes 14 OFDM symbols, defined as the 0th to 13th OFDM symbols. In another implementation, the starting position of the first signal is predefined as the starting position of the 13th OFDM symbol within the current time slot. The starting position of the OFDM symbol includes either a starting position containing a CP or a starting position not containing a CP. For a subcarrier spacing of 15 kHz, a time slot includes 14 OFDM symbols, defined as the 0th to 13th OFDM symbols.

[0139] In one implementation, the first signal indicates the subcarrier spacing used by the data signal, for example, indicating whether the subcarrier spacing used by the data signal is 15 kHz or 30 kHz; in another possible implementation, the first signal is a start indication signal, and different lengths of the first signal indicate the subcarrier spacing used by the data signal; in yet another possible implementation, the first signal is a clock capture signal, and different combinations or patterns of the level of the first signal indicate the subcarrier spacing used by the data signal.

[0140] For situations 1 and 2 above, the reader can generate OFDM symbols in the following two ways:

[0141] Method 1: For the OFDM symbol in Case 1, the reader can generate the OFDM symbol through the following steps s1 and s2 or steps s1 and s2'. s1: The reader performs a Discrete Fourier Transform (DFT) on the N′-point time-domain sequence to obtain the N′-point frequency-domain signal. Each chip maps to N′ / L points in the frequency-domain signal. s2: The N′-point frequency-domain signal is processed by FFTShift (which moves the zero-frequency component to the center of the spectrum), and the Y points in the middle of the spectrum are truncated. After truncation, zero padding is applied to both sides of the spectrum to create N′ points. Then, an Inverse Fast Fourier Transform (IFFT) is performed on the zero-padded spectrum to obtain the OFDM symbol. Optionally, after executing s1, the reader can execute s2': pad the N'-point frequency domain signal with zeros on both sides to make the spectrum N points, and then perform an N-point IFFT on the zero-padded spectrum. Wherein, N≥N'.

[0142] Method 2: For the OFDM symbol described in Case 2, the reader can generate the OFDM symbol through the following steps S1 and S2 or steps S1 and S2'. S1: The reader performs a DFT on the N′-point time-domain sequence to obtain the N′-point frequency-domain signal. The first chip in the OFDM symbol maps to N′ / LL′ points in the frequency-domain signal, and each of the following L-1 chips maps to (N′-(N′ / LL′)) / (L-1) points in the frequency domain. S2: Perform FFTShift processing on the N′-point frequency-domain signal and truncate the Y points in the middle of the spectrum. After truncation, zero-padding is performed on both sides of the spectrum to create N′ points, and then an N′-point IFFT is performed on the zero-padding spectrum. Optionally, after executing S1, the reader can execute S2': zero-padding is performed on both sides of the N′-point frequency-domain signal to create N points, and then an N-point IFFT is performed on the zero-padding spectrum.

[0143] Optionally, the value of L in Method 2 is determined based on the CP length and OFDM symbol length. For example, it can be the ratio of the CP length to the OFDM symbol length multiplied by N′ and then rounded up or down. or in This indicates that 'a' is rounded up. This indicates that 'a' is rounded down.

[0144] It should be noted that, Figure 5 and Figure 6 The number of chips included in the OFDM symbol shown, as well as the number of chips included in the start indication signal and the clock capture signal, is for illustrative purposes only. In actual implementation, the number of chips included in each OFDM symbol, start indication signal, and clock capture signal can be in the form of [formula missing]. Furthermore, Figure 6 The clock capture signal shown in (c) to (f) is illustrative only, as it is carried by two OFDM symbols. In actual implementation, the clock capture signal can be carried by more than two OFDM symbols, that is, the M chips of the clock capture signal are located in more than two OFDM symbols. For the above application scenario, the design method of the CP level between two adjacent OFDM symbols can refer to Figure 6 The descriptions of (c) to (f) in the text will not be repeated here.

[0145] Figure 7 This illustrates the case where the length of the first CP is greater than the length of each of the M chips. When the length of the first CP is greater than the length of each of the M chips, the relationship between the first CP and the start indication signal or clock capture signal can include at least one of the following: a portion of the first CP is a portion of the start indication signal; a portion of the first CP is a portion of the clock capture signal. In one example, such as... Figure 7As shown in (a), the first CP is CP2 of OFDM symbol 2, and the first part of CP2 is the end of the high level before the start indication signal, and the second part of CP2 is the start of the start indication signal. Further, the second part of CP2 is low, OFDM symbol 2 ends with a low level, and the first chip of the start indication signal is low or the start indication signal itself is low; the last chip of the preceding OFDM symbol (i.e., OFDM symbol 1) adjacent to OFDM symbol 2 is high, to maintain consistency with the level of the first part of CP2. More specifically, OFDM symbol 2 ends with a combination of high-level and low-level chips. In one case, the last two chips of OFDM symbol 2 are chips of the clock capture signal, and the end position of the clock capture signal is aligned with the end position of OFDM symbol 2. The last two chips of the clock capture signal are a combination of high-level and low-level chips. In another case, the last two chips of OFDM symbol 2 are chips in the data signal. These two chips in the data signal are fixed as a combination of a high-level chip and a low-level chip, and these two chips do not carry bits or information.

[0146] In another example, such as Figure 7 As shown in (b), the first CP is CP2 of OFDM symbol 2, and the first part of CP2 is the end part of the start indication signal, while the second part of CP2 is the start part of the clock capture signal. Further, since the last chip of OFDM symbol 1 is low, the first part of CP2 needs to be low; and since the first chip of OFDM symbol 2 is high, the second part of CP2 needs to be high so that the detection accuracy is not affected by CP2 when the device detects the time capture signal. To ensure the low-to-high characteristic of CP2, OFDM symbol 2 needs to end with a combination of low-level and high-level chips. In one case, the last two chips of OFDM symbol 2 are chips of the clock capture signal, and the end position of the clock capture signal is aligned with the end position of OFDM symbol 2. The last two chips of the clock capture signal are a combination of low-level and high-level chips. In another case, the last two chips of OFDM symbol 2 are chips in the data signal. These two chips in the data signal are fixed as a combination of low-level chips and high-level chips, and these two chips do not carry bits or information.

[0147] for Figure 7 In the case shown, none of the chips included in the start indication signal or clock capture signal include the CP, meaning that the length of a chip in an OFDM symbol is... T CP，part1 T is the length of the first part of CP. CP，part2 T is the length of the second part of CP. CP，part1+T CP，part2 =T CP That is, T CP Let be the length of CP. Figure 7 The signal form shown in (a) is T. CP , The length of the start indication signal is Where 'a' represents the number of chips of the start indication signal located in OFDM symbol 2. Figure 7 The signal form shown in (b) is as follows: The length of the start indication signal is Where b is the number of chips of the start indication signal located in OFDM symbol 1; the length of the clock capture signal is... Where c is the number of chips in the clock capture signal located in OFDM symbol 2. For example, assuming each OFDM symbol includes 24 chips and the subcarrier spacing of the OFDM symbol is 15kHz, then the length of each chip in the start indication signal or clock capture signal is 66.7μs / 24 = 2.78μs. Figure 7 The signal format shown in (a) has a start indicator signal length of 2.78*(a+1)μs, where a is the number of chips of the start indicator signal located in OFDM symbol 2. For Figure 7 The signal format shown in (b) has a start indication signal length of (2.78*b+(4.7-2.78))μs, where b is the number of chips of the start indication signal located in OFDM symbol 1; and a clock capture signal length of 2.78*(c+1)μs, where c is the number of chips of the clock capture signal located in OFDM symbol 2.

[0148] The above combination Figures 5 to 7 This section describes the scenario where the level of the first CP (Programmable Component) is the same as the level of the first chip in the first signal. In actual implementation, the level of the CP adjacent to the starting chip of the first signal can also be different from the level of the starting chip, but the level of this CP must be the same as the level of the last chip of the preceding OFDM symbol. For example, if the first signal is a start indication signal, and the start position of the first signal is aligned with the start position of an OFDM symbol (excluding the CP), the level of the CP of this OFDM symbol can be different from the level of the first chip of the first signal, but the level of the CP of this OFDM symbol must be the same as the level of the last chip of the preceding OFDM symbol. Specifically... Figure 8As shown, the start indication signal is located in OFDM symbol 2, and the first chip of the start indication signal is low, meaning the first chip of OFDM symbol 2 is low. Furthermore, OFDM symbol 2 ends with a high level; since CP2 is obtained by copying the last chip of OFDM symbol 2, CP2 is also high. This high level CP2 is the same as the level of the last chip of OFDM symbol 1, thus CP2 will not affect the accuracy of the signal preceding CP2.

[0149] In other words, the embodiments of this application can also be applied to other signal transmissions. When generating a signal, it is necessary to ensure that the CP of the OFDM symbol is the same as the level of the first chip of the OFDM symbol itself, and / or to ensure that the CP of the OFDM symbol is the same as the level of the last chip of the adjacent preceding OFDM symbol, so that the CP will not introduce virtual rising and falling edges, which helps to improve the signal demodulation performance.

[0150] The above combination Figures 1 to 8 The communication method provided in the embodiments of this application is explained. In the various embodiments of this application, unless otherwise specified or there is a logical conflict, the terms and / or descriptions between the various embodiments are consistent and can be referenced by each other. The technical features in different embodiments can be combined to form new embodiments according to their inherent logical relationship.

[0151] The following is combined with Figures 9 to 13 This application provides a detailed description of the communication device provided in its embodiments. It should be understood that the descriptions of the device embodiments correspond to the descriptions of the method embodiments; therefore, any content not described in detail here will be referred to the method embodiments above, and for the sake of brevity, will not be repeated here.

[0152] Figure 9 A schematic block diagram of an A-IoT device provided in an embodiment of the application is shown. Figure 9 The device shown is a terminal device with a peak power consumption of approximately 1μW, and it includes the following components:

[0153] 1. Antenna: Used to transmit and receive radio frequency (RF) signals in the form of electromagnetic waves. The RF energy reception and receiver / transmitter can be shared or separated.

[0154] 2. Matching network: Used to match the impedance between the antenna and other parts (including modules related to the RF energy harvester and receiver).

[0155] 3. RF energy harvester: includes a rectifier used to convert radio frequency signals (AC) into DC.

[0156] 4. Energy storage device (e.g., capacitor): Used to store energy collected from the RF energy receiver.

[0157] 5. Power Management Unit (PMU): This module manages the energy stored from the energy harvester and provides energy to the active units that need it.

[0158] 6. Digital baseband logic (BB): This includes functional modules such as encoders, decoders, and controllers.

[0159] 7. Memory: Includes two types of memory: 1) Non-volatile memory such as EEPROM, which can permanently store device identifiers (ID); 2) Registers that temporarily store information, which can only store information when there is sufficient energy in the energy storage.

[0160] 8. Clock generator: Used to provide clock signals.

[0161] 9. Receiver-related modules (which can be considered as receivers), including: RF band-pass filter (BPF): used to improve frequency selectivity; RF envelope-demodulation (ED): used to detect the envelope from the RF signal; baseband low-pass filter (LPF): used to filter out harmonics and high-frequency components, improving the signal quality input to the comparator; and a comparator, used to determine whether the input signal level is high or low.

[0162] 10. Transmission-related modules (which can be considered as transmitters) include: a backscatter modulator for switching impedance and modulating the backscatter signal with the transmit signal from the baseband logic.

[0163] Figure 10 A schematic block diagram of yet another A-IoT device provided in the application embodiment is shown. Figure 10 The device shown is a terminal device with a peak power consumption of less than or equal to n*100μW (n is greater than or equal to 1 and less than 10). This device actively transmits signals by generating a carrier internally. In addition to the antenna, matching network, RF energy harvester, PMU, digital baseband logic, memory, and clock generator, this device may also include the following components:

[0164] 1. Local oscillator (LO): Used to generate a carrier frequency for the transmitter or a carrier frequency offset for the intermediate frequency (IF) receiver.

[0165] 2. In addition to the RF BPF, BB LPF, and comparator, the receiving modules also include: a mixer for converting RF signals to IF signals; an IF amplifier for amplifying IF signals; an IF filter for filtering out RF and LO signals from the IF signal; an IFED for detecting the envelope from the IF signal; a BB amplifier for amplifying baseband signals; and an N-bit analog-to-digital converter (ADC) for converting analog signals to digital signals.

[0166] 3. Transmission-related modules, including: a modulator for modulating baseband bits, which may also be part of the baseband logic module; a digital-to-analog converter (DAC) for converting digital signals into analog signals; an LPF for filtering out unwanted signals; a mixer for converting baseband signals to RF frequency range; and a power amplifier (PA) for amplifying the transmitted signal.

[0167] It should be noted that, Figure 10 The dashed boxes in the diagram indicate optional modules. Furthermore, Figure 9 and Figure 10 The received related module shown can be used to implement Figure 4 The steps performed by the device are shown.

[0168] Figure 11 This is a schematic block diagram of a communication device 2000 provided in an embodiment of this application. The communication device 2000 can be a device or a reader / writer, or it can be a chip or module in a device or reader / writer, used to implement... Figure 4 The actions performed by the device or reader in the illustrated embodiments can be found in the relevant descriptions in the above method embodiments.

[0169] The communication device 2000 includes a transceiver unit 2010 (or transceiver module) and a processing unit 2020 (or processing module). The processing unit 2020 can be used to implement corresponding processing functions, such as generating a first signal. The transceiver unit 2010 can be used to implement corresponding information receiving or information acquisition functions, and the transceiver unit 2010 may include a sending unit and a receiving unit. The sending unit is used to execute the sending action of the communication device, and the receiving unit is used to execute the receiving action of the communication device. For ease of description, the sending unit and the receiving unit are combined into one transceiver unit in this embodiment. This will be explained uniformly here and will not be repeated later. The transceiver unit 2010 can implement corresponding communication functions. The transceiver unit 2010 can also be called a communication interface or a communication module.

[0170] It should be noted that the communication device 2000 may include a transmitting unit but not a receiving unit. Alternatively, the communication device 2000 may include a receiving unit but not a transmitting unit. The specific choice depends on whether the above-described scheme executed by the communication device 2000 includes both transmitting and receiving actions.

[0171] Optionally, the communication device 2000 further includes a storage unit for storing programs or code for executing the aforementioned methods. Alternatively, the storage unit can store instructions and / or data, and the processing unit 2020 can read the instructions and / or data from the storage unit to enable the communication device 2000 to implement the aforementioned method embodiments. For example, the communication device 2000 can be used to execute... Figure 4 The scheme shown in the figure.

[0172] It should be understood that the specific process of each unit performing the above-mentioned corresponding steps has been described in detail in the above method embodiments, and will not be repeated here for the sake of brevity.

[0173] It should also be understood that the above-described device 2000 can be embodied in the form of a functional unit. The term "unit" here can refer to an application-specific integrated circuit (ASIC), electronic circuitry, a processor (e.g., a shared processor, a proprietary processor, or a group processor, etc.) and memory for executing one or more software or firmware programs, integrated logic circuitry, and / or other suitable components supporting the described functions. In an alternative example, those skilled in the art will understand that device 2000 can specifically be the communication device in the above embodiments, and can be used to execute the various processes and / or steps corresponding to the communication device in the above method embodiments; to avoid repetition, these will not be described again here.

[0174] The apparatus 2000 described above has the function of implementing the corresponding steps performed by the communication device in the above method. The function can be implemented in hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above functions; for example, the transceiver unit can be replaced by a transceiver (e.g., the transmitting unit in the transceiver unit can be replaced by a transmitter, and the receiving unit in the transceiver unit can be replaced by a receiver), and other units, such as processing units, can be replaced by processors, each executing the transceiver operations and related processing operations in its respective method embodiment.

[0175] In addition, the aforementioned transceiver unit may also be a transceiver circuit (for example, it may include a transmitting circuit or a receiving circuit), and the processing unit may be a processing circuit.

[0176] Figure 12A schematic diagram of another communication device 2100 provided in an embodiment of this application is shown. The device 2100 includes a processor 2110 coupled to a memory 2120 for storing computer programs or instructions and / or data. The processor 2110 is used to execute the computer programs or instructions stored in the memory 2120, or to read the data stored in the memory 2120, to perform the methods in the above method embodiments.

[0177] Optionally, the processor 2110 may be one or more.

[0178] Optionally, the memory 2120 may be one or more.

[0179] Alternatively, the memory 2120 may also be referred to as a storage medium or storage device. The memory 2120 may be integrated with the processor 2110 or may be set separately.

[0180] Optionally, such as Figure 12 As shown, the device 2100 also includes a transceiver 2130 for receiving and / or transmitting signals. For example, a processor 2110 controls the transceiver 2130 to receive and / or transmit signals.

[0181] As an example, processor 2110 may have Figure 11 The processing unit 2020 shown has the function of a storage unit, the memory 2120 can have the function of a storage unit, and the transceiver 2130 can have the function of a storage unit. Figure 11 The transceiver unit 2010 shown has the following functions. The processor 2110 is used to execute computer programs or instructions stored in the memory 2120 to implement the relevant operations of the communication device in the various method embodiments described above.

[0182] It should be understood that the processor mentioned in the embodiments of this application can be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor can be a microprocessor or any conventional processor.

[0183] It should also be understood that the memory mentioned in the embodiments of this application can be volatile memory and / or non-volatile memory. Non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. Volatile memory can be random access memory (RAM). For example, RAM can be used as an external cache. By way of example and not limitation, RAM includes the following forms: static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous linked dynamic random access memory (SLDRAM), and direct rambus RAM (DR RAM).

[0184] It should be noted that when the processor is a general-purpose processor, DSP, ASIC, FPGA, or other programmable logic device, discrete gate or transistor logic device, or discrete hardware component, the memory (storage module) can be integrated into the processor.

[0185] It should also be noted that the memory described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0186] Figure 13 The diagram shows a schematic of a chip system 2200 provided in an embodiment of this application. The chip system 2200 (or may also be referred to as a processing system) includes logic circuitry 2210 and an input / output interface 2220.

[0187] The logic circuit 2210 can be a processing circuit in the chip system 2200. The logic circuit 2210 can be coupled to a memory unit, calling instructions from the memory unit, enabling the chip system 2200 to implement the methods and functions of the embodiments of this application. The input / output interface 2220 can be an input / output circuit in the chip system 2200, outputting processed information from the chip system 2200, or inputting data or signaling information to be processed into the chip system 2200 for processing.

[0188] As one option, the chip system 2200 is used to implement the operations performed by the device or reader in the various method embodiments described above.

[0189] For example, logic circuit 2210 is used to implement processing-related operations performed by the device or reader in the above method embodiments; input / output interface 2220 is used to implement sending and / or receiving-related operations performed by the device or reader in the above method embodiments.

[0190] This application also provides a processor for coupling with a memory for performing the methods and functions of the device or reader involved in any of the above embodiments.

[0191] In another embodiment of this application, a computer program product comprising a computer program or instructions is provided, wherein the method of the foregoing embodiments is implemented when the computer program product is run on a computer.

[0192] This application also provides a computer-readable storage medium storing computer instructions for implementing the methods executed by a device or reader in the above-described method embodiments.

[0193] For example, when the computer program is executed by a computer, it enables the computer to implement the methods performed by the device or reader in the various embodiments of the above methods.

[0194] This application also provides a computer program product comprising instructions which, when executed by a computer, implement the methods performed by a device or reader in the above-described method embodiments.

[0195] This application embodiment also provides a communication system, which includes the device or reader / writer described in the above embodiments, and the device or reader / writer is used to perform... Figure 4 The method in the illustrated embodiment.

[0196] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0197] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0198] In the description of the embodiments of this application, unless otherwise stated, " / " means "or", for example, A / B can mean A or B; "and / or" in this document describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. In this application, "at least one" means one or more, and "more" means two or more. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or multiple items. For example, at least one of a, b, or c can represent: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple.

[0199] The use of prefixes such as "first" and "second" in this application embodiment is solely for distinguishing different descriptive objects and does not limit the position, order, priority, quantity, or content of the described objects. The use of ordinal numbers and other prefixes to distinguish descriptive objects in this application embodiment does not constitute a limitation on the described objects. The description of the described objects is found in the claims or the context of the embodiments, and the use of such prefixes should not constitute unnecessary restrictions.

[0200] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0201] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0202] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0203] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to existing technology, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0204] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A communication method, characterized in that, include: Receive a first signal, the first signal being used to determine at least one of the following: the start position of a data signal, or the length of a chip in the data signal, the first signal being located before the data signal, and the first signal being adjacent to a first cyclic prefix CP; Wherein, the first CP and the first chip have the same level, and the first chip is the chip in the first signal that is adjacent to the first CP; Receive the data signal.

2. A communication method, characterized in that, include: A first signal is generated, the first signal being used to determine at least one of the following: the start position of the data signal, or the length of the chip in the data signal, the first signal being located before the data signal, and the first signal being adjacent to the first cyclic prefix CP; Wherein, the first CP and the first chip have the same level, and the first chip is the chip in the first signal that is adjacent to the first CP; Send the first signal.

3. The method according to claim 1 or 2, characterized in that, The first signal is a start indication signal or a clock capture signal; wherein, when the first signal is the start indication signal, the first signal is also used to determine the start position of the clock capture signal.

4. The method according to claim 1 or 2, characterized in that, The start indication signal includes the first signal and the first CP, and the start indication signal is used to determine at least one of the following: the start position of the clock capture signal, or the start position of the data signal; Alternatively, the clock capture signal includes the first signal and the first CP, and the clock capture signal is used to determine at least one of the following: the starting position of the data signal, or the length of the chip in the data signal.

5. The method according to claim 3 or 4, characterized in that, The start indication signal or the clock capture signal comprises M chips, and the length of the first CP is less than or equal to the length of each of the M chips, where M is a positive integer.

6. The method according to claim 5, characterized in that, The first CP is the CP of the first Orthogonal Frequency Division Multiplexing (OFDM) symbol; When the M chips are located in the first OFDM symbol, the first chip is the first chip of the first OFDM symbol; or, When the M chips are located in the second OFDM symbol, the first chip is the last chip of the second OFDM symbol, wherein the second OFDM symbol is located before and adjacent to the first OFDM symbol.

7. The method according to claim 5, characterized in that, The first CP is the CP of the first OFDM symbol, and the second OFDM symbol is located before and adjacent to the first OFDM symbol; the Q-th chip among the M chips is the first chip, wherein, The first chip is the first chip of the first OFDM symbol, and the first Q-1 chips of the M chips are located in the second OFDM symbol; or, The first chip is the last chip of the second OFDM symbol, and the last MQ chips of the M chips are located in the first OFDM symbol.

8. The method according to claim 6 or 7, characterized in that, The length of each of the M chips is... Where SCS is the subcarrier spacing of the OFDM symbol, and L is the number of chips included in the OFDM symbol.

9. The method according to claim 5, characterized in that, The first CP is the CP of the first OFDM symbol, and the first chip among the M chips includes the first chip; The first chip is located in the first OFDM symbol, and the other parts of the first chip other than the first chip are the first CP.

10. The method according to claim 5, characterized in that, The first CP is the CP of the first OFDM symbol, and the second OFDM symbol is located before and adjacent to the first OFDM symbol; the Q-th chip in the M chips includes the first chip, wherein, The first chip is located in the first OFDM symbol, and the other parts of the Qth chip, excluding the first chip, are the first CP, and the first Q-1 chips of the M chips are located in the second OFDM symbol.

11. The method according to claim 9 or 10, characterized in that, The length of each of the M chips is... Where SCS is the subcarrier spacing of the OFDM symbol, L is the number of chips included in the OFDM symbol, and T CP The length of the first CP.

12. The method according to any one of claims 6 to 11, characterized in that, The voltage level of the first chip in the first OFDM symbol is the same as that of the last chip.

13. A communication device, characterized in that, Includes a module for performing the method as described in any one of claims 1 to 12.

14. A communication device, characterized in that, The device includes at least one processor coupled to at least one memory, the at least one processor being configured to execute a computer program or instructions stored in the at least one memory to cause the communication device to perform the method as described in any one of claims 1 to 12.

15. A communication system, characterized in that, Including device readers; The device is used to perform the communication method as described in any one of claims 1 and 3 to 12; The reader / writer is used to perform the communication method as described in any one of claims 2 to 12.

16. A computer-readable storage medium, characterized in that, It stores instructions or program code thereon, which, when executed by a processor, cause the processor to implement the method as described in any one of claims 1 to 12.

17. A computer program product, characterized in that, The computer program product includes: computer program code, which, when executed, implements the method as described in any one of claims 1 to 12.

18. A chip, characterized in that, The chip includes a processor and a communication interface, the communication interface being used to send information to and / or receive information from other communication devices besides the communication device including the chip, and the processor being used to perform the method as described in any one of claims 1 to 12.

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