Test method and test system for digital optical fiber repeater

Abstract

The invention provides a test method and a test system for a digital optical fiber repeater, an external signal source is not needed, the resource occupation is low, and the independent test of each part of the digital optical fiber repeater is supported, the test method comprises the following steps: a waveform data packet is pre-stored, and the waveform data packet comprises waveform data intercepted from a standard test signal; in response to the test instruction, performing signal reconstruction based on a pre-stored waveform data packet, and generating a test waveform conforming to a communication standard; outputting the test waveform to a radio frequency hardware link of the digital optical fiber repeater, processing the test waveform through the radio frequency hardware link, converting the test waveform into a testable radio frequency signal, and outputting the testable radio frequency signal; and demodulating the output radio frequency signal through the test equipment, and carrying out radio frequency parameter calibration.

Description

Technical Field

[0001] This invention relates to the field of communication equipment testing technology, and in particular to a testing method and system for a digital fiber optic repeater. Background Technology

[0002] In existing technologies, digital fiber optic repeater testing faces several limitations that urgently need to be addressed: First, the testing process must rely on an external signal source as the test stimulus, which not only requires additional expensive signal generation equipment but also introduces complex cable connections and signal matching, significantly increasing the complexity and hardware cost of the testing system; Second, traditional NR waveform data uses an ultra-long frame structure with 122,880 sampling points. This design consumes nearly 40% of the FPGA's on-chip storage resources and increases the depth of the signal processing pipeline, resulting in data processing latency generally exceeding 15ms.

[0003] The working principle of a digital fiber optic repeater is as follows: The near-end unit acquires the radio frequency signal, which is preprocessed by a low-noise amplifier. Then, the electro-optical conversion module modulates the radio frequency signal into a specific wavelength optical signal. The optical signal travels along the optical fiber to the far-end unit, where the optical signal is separated by a wavelength division multiplexer, converted back into a radio frequency signal by photoelectric conversion, and then boosted by a high-linearity power amplifier.

[0004] like Figure 3 As shown, traditional testing schemes for digital fiber optic repeaters employ a rigid testing process. This requires the device under test (DUT) to be fully assembled and have a complete link connection established—that is, the near-end unit must be synchronized with the far-end unit via fiber optic cable—before core tests such as RF parameter calibration (e.g., output power, ACPR) can be performed. This serial testing mode results in a single complete test cycle exceeding 45 minutes, with 8-10 minutes dedicated solely to device warm-up. Furthermore, because each functional module cannot be tested independently, the possibility of modular parallel testing is completely lost, severely hindering the improvement of production line testing efficiency. In addition, this testing method lacks scenario adaptability; it cannot flexibly adjust test parameters according to different testing needs, nor can it support rapid response to sudden testing tasks, severely limiting the applicability of the testing scheme. Summary of the Invention

[0005] The purpose of this invention is to provide a testing method and system for digital fiber optic repeaters, which aims to solve the problems existing in the background technology, with low resource consumption and support for independent testing of various components of digital fiber optic repeaters.

[0006] The technical solution is as follows: A testing method for a digital fiber optic repeater, comprising the following steps: Waveform data packets are pre-stored, the waveform data packets including waveform data extracted from standard test signals; In response to test commands, the signal is reconstructed based on pre-stored waveform data packets to generate test waveforms that conform to communication standards; The test waveform is output to the RF hardware link of the digital fiber optic repeater. The RF hardware link processes the test waveform and converts it into a testable RF signal for output. Radio frequency (RF) parameters are calibrated by demodulating the output RF signal using testing equipment.

[0007] Furthermore, the process of reconstructing the signal based on pre-stored waveform data packets to generate a test waveform that conforms to communication standards also includes the following steps: A periodic phase address signal is generated by a phase controller; The phase address signal is used to address the lookup table, which establishes a mapping relationship between phase and amplitude value. The amplitude value corresponding to the phase address signal is read from the lookup table. The amplitude value is buffered and output through a register to form a cut-off test waveform.

[0008] Furthermore, a feature point cyclic generation algorithm is used to process the captured test waveform and reconstruct the complete test waveform.

[0009] Furthermore, the length of the extracted waveform data is less than 5% of the original length of the standard test waveform data.

[0010] Furthermore, generating test waveforms that conform to communication standards includes the following steps: A periodic phase address signal is generated by a phase controller; The phase address signal is used to address the lookup table, which establishes a mapping relationship between phase and amplitude value. The amplitude value corresponding to the phase address signal is read from the lookup table. The amplitude value is buffered and output through a register to form a test waveform.

[0011] Furthermore, before outputting the test waveform to the RF hardware link of the digital fiber optic repeater, the following steps are also included: The peak-to-average power ratio (PAPR) of the test waveform is adjusted by executing the CFR algorithm.

[0012] Furthermore, before outputting the test waveform to the RF hardware link of the digital fiber optic repeater, the following steps are also included: The processed test waveform is then subjected to power control to adjust it to the target power level.

[0013] Furthermore, the aforementioned test methods for digital fiber optic repeaters were independently applied to the near-end and far-end units of the digital fiber optic repeater.

[0014] Furthermore, the waveform data packets are configured with multiple corresponding to different communication standards. According to the test requirements, the corresponding waveform data packets can be selected to support switching tests between different communication standard signals.

[0015] A testing system for a digital fiber optic repeater, characterized in that it comprises: A storage module, the storage module including pre-stored waveform data, the waveform data packet including waveform data extracted from a standard test signal; The processing module, in response to a test command, reconstructs the signal based on a pre-stored waveform data packet to generate a test waveform that conforms to the communication standard. The radio frequency module is used to process test waveforms and convert them into testable radio frequency signals for output. The test module demodulates the output RF signal and performs RF parameter calibration.

[0016] This invention generates test waveforms internally, significantly reducing testing costs and complexity. It simplifies the setup of the testing environment, eliminating the need for complex external cable connections, calibration, and maintenance, thus greatly improving the convenience and economy of testing. Using the method of this invention, there is no need to store complete waveform data; only the extracted waveform data segments need to be stored. The complete signal can then be reconstructed through a cyclic generation algorithm, saving system storage resources. The method of this invention enables separate and independent testing of the near-end and far-end machines, eliminating the need for complete machine assembly and the establishment of a full-link system. The near-end and far-end machines can be calibrated and tested independently without the need for connection between them. Using the method of this invention, the original testing cycle can be significantly shortened, greatly improving testing efficiency. Furthermore, the method of this invention has highly flexible and configurable testing capabilities, supporting dynamic switching of multiple standards such as 5G NR / LTE, which can be achieved simply by loading different waveform data packets; the method of this invention supports configuration of peak-to-average power ratio and power adjustment, allowing test engineers to flexibly configure the peak-to-average power ratio and power of the signal according to different verification requirements, making the method of this invention adaptable to a variety of test scenarios and widely applicable. Attached Figure Description

[0017] Figure 1 This is a schematic diagram illustrating the steps of a testing method for a digital fiber optic repeater in one embodiment of the present invention; Figure 2 This is a block diagram of the test system for a digital fiber optic repeater according to one embodiment of the present invention; Figure 3 This is a schematic diagram illustrating the testing of a digital fiber optic repeater in the prior art; Figure 4A schematic diagram illustrating the independent testing of the near-end and far-end units of a digital fiber optic repeater in the embodiment is shown. Figure 5 A schematic diagram of the near-end unit test connection for a digital fiber optic repeater; Figure 6 This is a schematic diagram of the remote unit test connection for a digital fiber optic repeater. Detailed Implementation

[0018] like Figure 1 As shown, a testing method for a digital fiber optic repeater according to the present invention includes the following steps: Step 1: Pre-store waveform data packets in the internal storage unit of the digital fiber optic repeater. The waveform data packets include waveform data extracted from the standard test signal. Step 2: In response to the test command, reconstruct the signal based on the pre-stored waveform data packet to generate a test waveform that conforms to the communication standard; Step 3: Output the test waveform to the RF hardware link of the digital fiber optic repeater. The RF hardware link processes the test waveform and converts it into a testable RF signal for output. Step 4: Demodulate the output RF signal using a spectrum analyzer and calibrate the RF parameters.

[0019] In one embodiment, in step 1, waveform data packets are pre-stored in the internal storage unit of the digital fiber optic repeater, and the waveform data packets include waveform data extracted from standard test signals.

[0020] In a FPGA's Block RAM or distributed RAM, waveform data packets are pre-stored. These packets contain truncated waveform data segments, which are not the complete standard test signal but rather a small segment of data containing its core features extracted from the standard signal. For example, by analyzing a 1ms standard waveform with 122,880 sampling points, a feature sequence of only 4,384 points can be extracted, representing only 3.57% of the data required by traditional methods. This represents a reduction of nearly 96.4% in data volume compared to traditional approaches. This segment already contains all the crucial information needed to reconstruct the complete signal demodulation. In embodiments, the length of the truncated waveform data is typically less than 5% of the original length of the standard test waveform.

[0021] In one embodiment, step 2, generating a test waveform that conforms to the communication standard, includes the following steps: A periodic phase address signal is generated by a phase controller; The lookup table is addressed using the phase address signal. The lookup table establishes a mapping relationship between phase and amplitude values. The amplitude value corresponding to the phase address signal is read from the lookup table. The amplitude value is buffered and output through a register to form a test waveform.

[0022] A phase controller can generate or adjust the phase of a signal to meet specific system requirements. Phase controllers typically use an accumulator to increment an initial phase value. Driven by the system clock, the accumulator continuously increments a preset phase increment value, thereby rapidly generating a series of continuously changing phase address signals. The accumulator output can be used as an index in a lookup table. This phase increment value determines the frequency of the final output signal, exhibiting extremely high adjustment accuracy.

[0023] A lookup table is a data structure used for fast lookups. Physically, it's a programmable ROM based on SRAM, with its core consisting of 2^N memory cells, where N is the number of input bits. Truncation of waveform data segments is configured in the lookup table, forming a mapping between phase and amplitude. The phase address signal is used as the lookup table's address input, and the lookup table outputs the corresponding amplitude value based on the input phase address. To ensure the stability and purity of the signal timing, the amplitude value output from the lookup table is buffered through at least one register. The register outputs a continuous digital test waveform, reconstructing a test signal that conforms to communication standards in both the time and frequency domains.

[0024] In step 2, a feature point cyclic generation algorithm is used to process the truncated waveform data segment and reconstruct the complete test waveform. Traditional NR 100MHz can demodulate data of 1ms length, requiring at least 122,880 points. After truncating, only 4,384 points are available. Then, through cyclic generation, the length reaches 1ms. However, the FPGA only needs to process the 4,384 points multiple times, instead of 122,880 points, thus reducing the processing difficulty for the FPGA and saving FPGA memory.

[0025] In one embodiment, in step 3, the digital test waveform can be further processed before being output to the RF module: The peak-to-average power ratio (PAPR) of a waveform can be dynamically reduced or adjusted using a peak-to-average power ratio (PAPR), for example, configured to 8.0 dB or 8.5 dB, to simulate different signal conditions and stress test the linearity of the power amplifier. A digital multiplier controls the gain or attenuation of the entire waveform data stream, adjusting it to a target power level to meet the requirements of different test items such as gain and maximum output power. The introduction of the CFR algorithm effectively optimizes the peak-to-average power ratio (PAPR) characteristics of the test waveform, ensuring signal quality stability at different power levels. This enables the test system to flexibly respond to sudden test tasks and multi-scenario switching requirements, solving the inherent problem of poor adaptability of traditional solutions.

[0026] In one embodiment, in step 4, the processed digital test waveform is sent to the RF hardware circuit, which typically includes a digital-to-analog converter, filters, amplifiers / attenuators, etc., to convert the digital signal into an analog RF signal. The final output RF signal is then sent to the test module, i.e., an external spectrum analyzer. The spectrum analyzer demodulates the output signal, determines whether any link components are damaged, and adjusts various parameters to complete the verification and calibration.

[0027] In one embodiment, the aforementioned testing method for digital fiber optic repeaters can be performed independently on the near-end and far-end units of a digital fiber optic repeater. This overcomes the limitation that the entire unit must be assembled and a full-link connection must be established before testing can be performed. It allows the near-end and far-end units to independently complete RF parameter calibration. The near-end and far-end units can perform RF link calibration and testing in parallel and independently without waiting for the other unit or the entire unit to be assembled. This can significantly shorten the single test cycle from more than 45 minutes.

[0028] In the existing cascaded testing mode, once a performance failure occurs, it is difficult to quickly determine whether the problem is with the near-end machine, the far-end machine, or the link itself. Troubleshooting is time-consuming and labor-intensive. The independent testing method in this embodiment makes fault isolation and location extremely simple and efficient, which can greatly shorten debugging and repair time and reduce production and maintenance costs.

[0029] In one embodiment, multiple waveform data packets are configured for different communication standards. The appropriate waveform data packet is selected based on testing requirements to support switching tests between different communication standard signals. In this embodiment, preset waveform data packets for different communication standards such as 5G NR / LTE, combined with dynamic peak-to-average power ratio configuration and precise target power control, can quickly respond to diverse testing needs.

[0030] like Figure 5 , 6 As shown, in uplink tests at the near-end unit or downlink tests at the far-end unit, the method described in the embodiment can be used to test the transmission links at both the near and far ends independently. Figure 5 In the near-end unit uplink test, the main antenna port is connected to the spectrum analyzer as shown by the red path. The FPGA generates a signal, and the spectrum analyzer demodulates and tests it. Figure 6 In the remote unit's downlink test, the antenna port is connected to the spectrum analyzer via the red path. The FPGA generates a signal, which is then demodulated and tested by the spectrum analyzer. Conversely, in the near-end unit's downlink test, a signal source generates a signal, and the FPGA or MCU reads the data for testing. Similarly, in the remote unit's uplink test, a signal source generates a signal, and the FPGA or MCU in the near-end unit reads the data for testing.

[0031] See Figure 2This embodiment discloses a test system for a digital fiber optic repeater. The system mainly includes a storage module 1, a processing module 2, a radio frequency module 3, and a test module 4. The storage module 1 and the processing module 2 are usually integrated into an FPGA chip inside a digital fiber optic repeater. The storage module 1 includes pre-stored waveform data, and the waveform data packet includes waveform data extracted from standard test signals. In response to the test command, the processing module 2 reconstructs the signal based on the pre-stored waveform data packet and generates a test waveform that conforms to the communication standard. RF module 3 is used to process the test waveform and convert it into a testable RF signal output; Test module 4 demodulates the output RF signal and performs RF parameter calibration.

[0032] Existing technologies heavily rely on expensive external vector signal generators as test excitation sources, resulting in high hardware costs for test systems. They also introduce complex cable connections, calibration, and maintenance work, making test environment setup difficult and inflexible. This embodiment achieves self-generation of test excitation by generating standard test waveforms in the FPGA, making the device independent and convenient.

[0033] Traditionally, embedding test waveforms involves storing massive amounts of complete waveform data, which drastically consumes FPGA on-chip storage resources, directly increasing product material costs. In this embodiment, storing a small segment of waveform data containing key features allows for the reconstruction of a complete, demodulated, high-quality signal. This reduces hardware resource consumption and enables powerful built-in testing functionality on lower-cost, smaller-capacity FPGAs, providing strong technical support for product cost control and market competitiveness.

[0034] Figure 3 A schematic diagram illustrating the testing of digital fiber optic repeaters in the prior art is shown; Figure 4 The illustration shows a schematic diagram of the test method for a digital fiber optic repeater being performed independently on the near-end and far-end units of the digital fiber optic repeater in the embodiment, for comparison. Figure 3 and Figure 4 As can be seen, the near-end and remote-end machines need to be cascaded, and near-end and remote-end synchronization must be considered, which not only increases the verification difficulty but also reduces flexibility. The system adopted in the embodiment can independently test and verify the near-end and remote-end machines, saving testing costs and enabling more precise problem localization, with high flexibility and efficiency.

[0035] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from the spirit or essential characteristics of the invention. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, it is intended that all variations falling within the meaning and scope of equivalents of the claims be included within the present invention.

[0036] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A test method for a digital fiber optic repeater, characterized in that, Includes the following steps: Waveform data packets are pre-stored, the waveform data packets including waveform data extracted from standard test signals; In response to test commands, the signal is reconstructed based on pre-stored waveform data packets to generate test waveforms that conform to communication standards; The test waveform is output to the RF hardware link of the digital fiber optic repeater. The RF hardware link processes the test waveform and converts it into a testable RF signal for output. Radio frequency (RF) parameters are calibrated by demodulating the output RF signal using testing equipment.

2. The testing method for a digital fiber optic repeater according to claim 1, characterized in that: The method of reconstructing signals based on pre-stored waveform data packets to generate test waveforms that conform to communication standards also includes the following steps: A periodic phase address signal is generated by a phase controller; The phase address signal is used to address the lookup table, which establishes a mapping relationship between phase and amplitude value. The amplitude value corresponding to the phase address signal is read from the lookup table. The amplitude value is buffered and output through a register to form a cut-off test waveform.

3. The testing method for a digital fiber optic repeater according to claim 1, characterized in that: The intercepted test waveform is processed using a feature point cyclic generation algorithm to reconstruct the complete test waveform.

4. The testing method for a digital fiber optic repeater according to claim 3, characterized in that: The length of the extracted waveform data is less than 5% of the original length of the standard test waveform data.

5. The testing method for a digital fiber optic repeater according to claim 1, characterized in that: Before outputting the test waveform to the RF hardware link of the digital fiber optic repeater, the following steps are also included: The peak-to-average power ratio (PAPR) of the test waveform is adjusted by executing the CFR algorithm.

6. The testing method for a digital fiber optic repeater according to claim 1, characterized in that: Before outputting the test waveform to the RF hardware link of the digital fiber optic repeater, the following steps are also included: The processed test waveform is then subjected to power control to adjust it to the target power level.

7. The testing method for a digital fiber optic repeater according to claim 1, characterized in that: The aforementioned test method for digital fiber optic repeaters was performed independently on the near-end and far-end units of the digital fiber optic repeater.

8. The testing method for a digital fiber optic repeater according to claim 1, characterized in that: The waveform data packets are configured with multiple options for different communication standards. By selecting the appropriate waveform data packet according to the test requirements, the test can be switched between different communication standard signals.

9. A testing system for a digital fiber optic repeater, characterized in that, include: A storage module, the storage module including pre-stored waveform data, the waveform data packet including waveform data extracted from a standard test signal; The processing module responds to the test command by reconstructing the signal based on the pre-stored waveform data packet to generate a test waveform that conforms to the communication standard. The radio frequency (RF) module is used to process test waveforms and convert them into testable RF signal outputs. The test module demodulates the output RF signal and performs RF parameter calibration.

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