Synchronous programmable double-path current source relative deviation calibration device and method
By combining sampling resistors and double-throw switches, and utilizing programmable resistor modules and a host computer to calculate the current source deviation signal, relative deviation calibration of synchronous programmable dual current sources was achieved. This solved the SQUID lockout problem caused by excessive current source output deviation and improved the stability of the CCC system.
Patent Information
- Application Number
- CN202511323153.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-16
- Publication Date
- 2025-11-18
AI Technical Summary
In a synchronous programmable dual current source system, the differences in the reference voltage values, range resistor values, transconductance amplifier errors, and nonlinearity of the DAC chip between the two current sources can lead to excessive relative deviations in the current source outputs, causing the superconducting quantum interference device (SQUID) to lose lock.
By combining sampling resistors, double-throw switches, and a host computer, the relative deviation signal of the current source under different code values is collected and calculated. The programmable resistor module is used to reduce the thermal effect of the sampling resistor and the influence of voltage noise. A reference current source is selected for relative deviation calibration, and the output is compensated to reduce the deviation.
This effectively reduces the relative deviation of the synchronous current source output, ensures stable locking of the superconducting quantum interference device (SQUID), and improves the stability and reliability of the CCC system.
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Figure CN120972068A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application belongs to the technical field of measurement, and particularly relates to a synchronous programmable dual-channel current source relative deviation calibration device and method. BACKGROUND
[0002] The synchronous programmable dual-channel current source is widely used in current comparator type bridges. In a direct current comparator bridge (DCC), an alternating current comparator bridge (ACC) and a low-temperature superconducting current comparator bridge (CCC), dual-channel current sources are used as excitation sources on both sides of the bridge. In some cases, the relative deviation of the dual-channel current source has an important influence on the system performance.
[0003] In the CCC system, the superconducting quantum interference device (SQUID) as a detection unbalanced flux device is a very sensitive instrument, and the linear working range is very small. A slight disturbance will deviate from the normal working point, and therefore, the system stability depends on the SQUID to a certain extent. For the unbalanced flux caused by a small current impact, the SQUID can return to the stable working point through self-adjustment. However, in the process of eliminating the thermoelectric potential, the two current sources need to be synchronously output. Due to the differences in the reference voltage value, the gear resistance value, the trans-impedance amplifier error and the nonlinearity of the DAC chip of the two synchronous current sources, the relative deviation of the output current of the two current source DACs is too large when refreshing the same code value, and the superconducting quantum interference device (SQUID) as a zero pointer instrument in the CCC system is out of lock. SUMMARY
[0004] In view of the above out-of-lock problem, the present application provides a synchronous programmable dual-channel current source relative deviation calibration device and method, which reduces the deviation of the output of the dual-channel synchronous current source by compensating for the deviation, and further enables the superconducting quantum interference device to be stably locked.
[0005] The first aspect of the present application provides a synchronous programmable dual-channel current source relative deviation calibration device, comprising:
[0006] The dual-channel synchronous current source is used to respond to the code value information sent by the upper computer and output the corresponding current.
[0007] The sampling resistor is used to convert the current relative deviation signal into a voltage relative deviation signal.
[0008] The double-throw switch is used to control the polarity of the relative deviation signal.
[0009] The upper computer is used to send a code value response signal to the dual-channel synchronous current source, record and process the voltage relative deviation data under the corresponding code value of the current source, and write the processed relative deviation data into the current source for relative deviation calibration. The relative deviation calibration comprises:
[0010] The host computer issues a code value signal and controls the double-pole switch to select the closed contact;
[0011] The current source outputs a corresponding current signal in response to the code value signal, the current signal flows into the sampling resistor, and after amplifying the voltage signal on the sampling resistor, the deviation signal generated under different code values is collected and calculated.
[0012] The host computer calculates the relative deviation data under all code values and writes it into the current source for compensation output, thereby realizing relative deviation calibration.
[0013] The second aspect of the application provides a relative deviation calibration method for synchronous programmable double-channel current sources, applied to the above-mentioned device, comprising the following steps:
[0014] Step 1: Connect the device and power on, and set the initial code value and code value threshold on the host computer.
[0015] Step 2: The host computer issues a code value signal and controls the double-pole switch to select the closed contact; the current source outputs a corresponding current signal in response, and the sampling resistor generates a corresponding voltage; after amplifying the voltage signal on the sampling resistor, the deviation signal generated under different code values is collected and calculated.
[0016] Step 3: Select a reference current source, the host computer calculates the relative deviation data under all code values and writes it into the reference current source for compensation output, thereby realizing relative deviation calibration.
[0017] Step 4: Repeat steps 1-3 to complete the relative deviation calibration of all output current positions of the double-channel synchronous current source.
[0018] Based on the above technical solution, the application has the following beneficial effects:
[0019] (1) The application greatly reduces the current flowing through the sampling resistor by the specific connection between the double-channel synchronous current source, the programmable resistance module and the sampling resistor, and greatly avoids the influence of the thermal effect of the sampling resistor itself on the relative deviation data.
[0020] At the same time, the application selects a programmable resistance value matched with the current position of the double-channel synchronous current source, which can reduce the influence of voltage noise output by the current source on the relative deviation data.
[0021] (2) The application controls the double-pole switch action by the host computer and sends a corresponding response code value to the corresponding synchronous current source for output, thereby obtaining the relative deviation signal data of the double-channel synchronous current source under all output current positions.
[0022] Meanwhile, the two synchronous current sources can compensate the deviation signal. The application selects to compensate the reference current source for the relative deviation signal, solves the problem of the excessive current deviation caused by the reference voltage value difference of the two synchronous current sources, the error of the trans-impedance amplifier and the non-linear difference of the DAC chip, and further solves the problem of the SQUID (Superconducting Quantum Interference Device) losing lock in the CCC system. BRIEF DESCRIPTION OF DRAWINGS
[0023] Figure 1 An electrical connection diagram of a relative deviation calibration device of a synchronous programmable dual-channel current source according to an embodiment of the application;
[0024] Figure 2 A first programmable resistance module block diagram according to an embodiment of the application;
[0025] Figure 3 A synchronous current source block diagram according to an embodiment of the application;
[0026] Figure 4 A flowchart of a relative deviation test method of a synchronous programmable dual-channel current source according to an embodiment of the application;
[0027] Figure 5 A relative deviation test result diagram of a relative synchronous programmable dual-channel current source according to an embodiment of the application (without compensation).
[0028] Figure 6 A relative deviation test result diagram of a relative synchronous programmable dual-channel current source according to an embodiment of the application (with compensation). DETAILED DESCRIPTION
[0029] In order to more clearly illustrate the technical solutions in the embodiments of the application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments. Obviously, the drawings described in the following only constitute some embodiments of the application, and for those skilled in the art, other drawings can also be obtained without creative labor on the basis of these drawings.
[0030] As shown in Figures 1-6 , the application embodiment provides a relative deviation calibration device of a synchronous programmable dual-channel current source, which comprises:
[0031] The dual-channel synchronous current source is used to respond to the code value information sent by the upper computer and output corresponding current.
[0032] The sampling resistor is used to convert the current relative deviation signal into a voltage relative deviation signal.
[0033] The double-throw switch is used to control the polarity of the relative deviation signal.
[0034] The upper computer is used for sending a code value response signal to the double-path synchronous current source, recording and processing voltage relative deviation data corresponding to the code value of the current source, and writing the processed relative deviation data into the current source for relative deviation calibration. The relative deviation calibration comprises:
[0035] The upper computer issues a code value signal and controls the double-pole switch to select the closed contact;
[0036] The current source outputs a corresponding current signal in response to the code value signal, the current signal flows into the sampling resistor, and after the voltage signal on the sampling resistor is amplified, the deviation signal generated under different code values is collected and calculated;
[0037] The upper computer calculates the relative deviation data under all code values and writes it into the current source for compensation output, thereby realizing relative deviation calibration.
[0038] Further, the code value signal is transmitted from the upper computer to the current source through an optical isolator. The optical isolator is used to realize conversion communication between the upper computer and the current source and ensure that the double-path synchronous current source does not share a common ground.
[0039] Further, the device further comprises a programmable resistance module containing power resistors whose resistance values sum up to the upper limit of the resistance value that can be driven by the measured current source, for suppressing voltage noise of the output current of the synchronous current source.
[0040] Further, in the double-path synchronous current source:
[0041] The positive output end of the first synchronous current source is connected in series with the first programmable resistance module, and then connected to the CH end of the sampling resistor; and the reverse output end is connected to the CL end of the sampling resistor.
[0042] The positive output end of the second synchronous current source is connected to the second programmable resistance module, and then connected to the CL end of the sampling resistor; and the reverse output end is connected to the CH end of the sampling resistor.
[0043] Further, an instrument amplifier is connected in parallel with the sampling resistor, for amplifying the voltage signal on the sampling resistor.
[0044] Further, each of the double-path synchronous current sources is connected to an isolated power supply for obtaining positive and negative power supplies without a common point.
[0045] Further, the double-path synchronous current source transmits signals in the following manner:
[0046] The DAC module outputs a corresponding voltage signal in response to the code value issued by the upper computer, the voltage signal is converted into a current signal through the transconductance amplifier module, and the current signal is output as the overall output current signal after passing through the power amplifier module.
[0047] The embodiment of the application further provides a relative deviation calibration method of a synchronous programmable dual-channel current source, which is applied to the device and comprises the following steps:
[0048] Step 1: connecting the device and powering on, and setting initial code values and code value thresholds by the upper computer.
[0049] Step 2: the upper computer sequentially sends code value signals and controls the double-pole switch to select the closed contact; the current source responds to output corresponding current signals, and the sampling resistor generates corresponding voltage; after the voltage signal on the sampling resistor is amplified, the deviation signals generated under different code values are collected and calculated.
[0050] Step 3: selecting a reference current source, the upper computer calculates the relative deviation data under all code values and writes into the reference current source for compensation output, so that the relative deviation calibration is realized.
[0051] Step 4: repeating steps 1-3, the relative deviation calibration of all output current positions of the dual-channel synchronous current source is completed.
[0052] Further, the step 2 comprises:
[0053] Step 2.1: the upper computer sends initial code values to the current source, controls the double-pole switch to select the closed contact, and collects the voltage signals amplified at the two ends of the sampling resistor under different contacts.
[0054] Step 2.2: calculating the initial deviation signals generated by the dual-channel synchronous current source on the sampling resistor under the initial code values.
[0055] Step 2.3: the upper computer sends code values to the current source in the form of increasing the code value of a single current source and keeping the code value of another current source unchanged, then increasing the code value of the another current source and keeping the code value of the single current source unchanged, controls the double-pole switch to select the closed contact, and collects the voltage signals amplified at the two ends of the sampling resistor under different contacts.
[0056] Step 2.4: calculating the deviation signals generated by the dual-channel synchronous current source on the sampling resistor under different code values.
[0057] Step 2.5: repeating steps 2.3-2.4 until the code value threshold is accumulated.
[0058] Further, in the step 3, the calculation method of the relative deviation data is: calculating the sum of the deviation signals under different code values; dividing the initial deviation signal by the sum and multiplying the code value threshold.
[0059] As Figure 1As shown, based on the same concept as the above embodiment, the application example 1 provides a synchronous programmable dual-channel current source relative deviation calibration device, which comprises: a first synchronous current source and a second synchronous current source as a measured object, a first optical isolator and a second optical isolator, a first isolated power supply and a second isolated power supply, a first programmable resistance module and a second programmable resistance module, a relay switch driver, a magnetic latching relay dual-channel single-pole double-throw switch, a sampling resistor, an instrument amplifier, a high-precision multimeter, and an upper computer.
[0060] Wherein:
[0061] The first synchronous current source and the second synchronous current source are used to respond to the code value information sent by the upper computer and output corresponding current. The positive output end of the first synchronous current source is connected in series with the first programmable resistance module, and then connected with the CH end of the sampling resistor. The negative output end of the first synchronous current source is connected to the CL end of the sampling resistor. The negative output end of the second synchronous current source is connected to the CH end of the sampling resistor, and the positive output end is connected with the second programmable resistance module, and then connected with the CL end of the sampling resistor. The above connection makes the current of the first synchronous current source and the second synchronous current source flow in opposite directions through the sampling resistor.
[0062] The sampling resistor is used to convert the current relative deviation signal into a voltage relative deviation signal, wherein the PH and PL ends (i.e. voltage high end and voltage low end) of the sampling resistor are respectively connected to the two input ends of the magnetic latching relay dual-channel single-pole double-throw switch.
[0063] The magnetic latching relay dual-channel single-pole double-throw switch is used to control the polarity of the relative deviation voltage signal. The first output end of the first channel is connected to the non-inverting input end of the instrument amplifier, and the second output end is connected to the inverting input end of the instrument amplifier. The first output end of the second channel is connected to the inverting input end of the instrument amplifier, and the second output end is connected to the non-inverting input end of the instrument amplifier, so that the polarity of the output signal can be controlled to be positive or negative by the magnetic latching relay dual-channel single-pole double-throw switch.
[0064] The instrument amplifier is used to amplify the voltage relative deviation signal. The reference end is connected to the input low end of the high-precision multimeter, and the output end is connected to the input high end of the high-precision multimeter.
[0065] The high-precision multimeter is connected to the upper computer through a communication bus, and is used to collect the voltage deviation signal under the corresponding code value of the synchronous current source.
[0066] The host computer is configured to send a code value response signal to the synchronous current source, record and process voltage relative deviation data corresponding to the code value of the current source, and write the processed relative deviation data to the current source for compensation.
[0067] The first optical isolator and the second optical isolator are configured to realize electrical-optical-electrical conversion communication between the host computer and the current source. The internal structures of the two optical isolators are the same, and both integrate optical fiber communication signal receiving and transmitting circuits. The first optical isolator and the second optical isolator are used to ensure that the two synchronous current sources do not share a common ground during the relative deviation test.
[0068] Further, the host computer is connected to the receiving end of the first synchronous current source through the transmitting end of the first optical isolator by using an optical fiber, and the receiving end of the first optical isolator is connected to the transmitting end of the first synchronous current source by using an optical fiber. The host computer is further connected to the receiving end of the second synchronous current source through the transmitting end of the second optical isolator by using an optical fiber, and the receiving end of the second optical isolator is connected to the transmitting end of the second synchronous current source by using an optical fiber.
[0069] The relay switch driver is configured to control whether the magnetic latching relay double-path single-throw switch is in a positive connection state or a reverse connection state. One end of the relay switch driver is connected to the host computer through a serial communication line, and the other end is connected to the magnetic latching relay double-path single-throw switch.
[0070] The first isolated power supply and the second isolated power supply are configured to provide positive and negative power supplies for the synchronous current source. The first isolated power supply is connected to the first synchronous current source through a power supply line, and the second isolated power supply is connected to the second synchronous current source through a power supply line. The two isolated power supplies are composed of two battery groups to supply power to the two current sources, and ensure that the two synchronous current sources do not share a common ground.
[0071] In particular, considering the influence of the DAC output voltage range from negative to positive and the power supply ripple on the output of the synchronous current source, the first isolated power supply and the second isolated power supply are each designed as a pair of battery groups, in which two batteries are connected in series with the middle point connected to the ground of the corresponding synchronous current source to provide positive and negative power supplies for the synchronous current source.
[0072] The instrument amplifier can change the gain by selecting the resistance value through the DIP switch. Since the voltage on the sampling resistor when the two current sources output the same code value is usually between several tens of μV and several hundred μV, the amplification gain of the instrument amplifier is usually set to G=1000 during the test.
[0073] The sampling resistor selected in the embodiment of the application is a 100Ω four-wire method standard resistor. At the same time, the current range matched with the 100Ω sampling resistor for the two synchronous current sources is 5mA.
[0074] The high-precision multimeter is used for collecting and displaying the difference voltage data between the sampling resistors, and uploading the data to the host computer through a communication bus for storage and calculation.
[0075] Further, the host computer comprises a protocol conversion communication unit, a programmable resistance control unit, a switch driving control unit and a data acquisition unit.
[0076] Further, the data acquisition unit is used for recording each data content collected by the multimeter and calculating the difference data under the corresponding code value.
[0077] The protocol conversion communication unit can configure the calibration code value range, and after starting calibration, the starting code value is sent to the current source response, and after the two synchronous current source responses are completed, the host computer will reply with a successful response signal, and the host computer will send the next code value to the current source response after receiving the successful response signals of the two synchronous current sources, and the cycle continues until the code value threshold.
[0078] The switch driving control unit defaults the first contact to be closed, and in operation, the first contact closure or the second contact closure will be automatically switched according to the code value information sent by the host computer.
[0079] The programmable resistance control unit is provided with BIT1, BIT2 and BIT3 buttons, which can be opened singly, multiple or all closed, and all closed means that all power resistors are short-circuited.
[0080] As shown in Figure 2 The first programmable resistance module and the second programmable resistance module have the same internal structure, which is composed of a driver, a relay and a power resistor. A normally closed relay is connected in parallel with each power resistor, and under the control of the host computer, the power resistor is connected to the current loop or is short-circuited. In the application example, three power resistors are selected in series, and one or more power resistors in series can also be used, and the sum of the resistance values of the series power resistors should be equal to the upper limit of the resistance value that can be driven by the measured current source. Before starting calibration, the two programmable resistance modules should be set to the required resistance value or all power resistors should be short-circuited through the host computer according to the required load condition.
[0081] As shown in Figure 3 The synchronous current source is a voltage-controlled Holland current source, and its internal structure mainly includes:
[0082] DAC module, two 16-bit DAC chips are included in the DAC module, the two DAC chips are divided into high-bit DAC and low-bit DAC by a same-phase proportional adder, and the ratio of the output voltages of the two DACs is changed to improve the current output resolution of the synchronous current source. In the synchronous programmable current source provided in the application example, the ratio of 1 LSB voltage of the high-bit DAC to the low-bit DAC is 128:1.
[0083] Transconductance amplifier module, the main internal structure is a gear resistance module with a programmable resistance value. Its function is to control the switching of the internal relay to change the resistance value of the gear resistance and thus adjust the current output range of the current source. The output current ranges of the two synchronous current sources are the same, including 5μA, 50μA, 500μA, 5mA, 50mA, and 100mA.
[0084] Power amplifier module, which is a composite operational amplifier circuit composed of multiple operational amplifiers. In the application example, multiple LT1010 precision operational amplifiers are selected to form a composite operational amplifier by short-circuiting the input stage and the output stage, which can enhance the current output capability of the synchronous current source and enable it to easily output large currents of 50mA and 100mA.
[0085] In the synchronous current source, the DAC module responds to the voltage signal corresponding to the code value issued by the upper computer and outputs the voltage signal. The voltage signal is converted into a current signal after passing through the transconductance amplifier module, and then the power amplifier module outputs the current signal as the output current signal of the synchronous current source as a whole.
[0086] Furthermore, the high-bit DAC and the low-bit DAC in the DAC module are designed for bipolar output, i.e., both the high-bit DAC and the low-bit DAC can output positive and negative voltages. The relationship between the DAC output voltage and the code value is as follows:
[0087]
[0088] wherein, is the high-bit DAC output voltage value, D is the decimal code value responded by the DAC, V ref is the reference voltage of the synchronous current source.
[0089] Both the high-bit DAC and the low-bit DAC are 16-bit, so the current source can output a decimal code value ranging from 0 to 65535, with the intermediate point code value being 32768. The reference voltage of the synchronous current source is designed to be 2.5V, so the theoretically output voltage range of the high-bit DAC is -2.5V to 2.5V, and the output voltage of the low-bit DAC is multiplied by the ratio of the LSB voltage between the high-bit DAC output voltage value.
[0090] For example, Figure 4As shown, based on the same concept as the above method, the application example 2 also provides a relative deviation calibration method of the synchronous programmable dual-channel current source applied to the above application example 1, which comprises the following steps:
[0091] Step 1: Connect the above device, and power on each component in the device. Set the resistance values of the two programmable resistance modules to 100Ω, select the instrument amplifier gain to 1000 by turning the dial switch, and set the initial code values i=j=0 sent to the two synchronous current sources in the upper computer.
[0092] Step 2: After starting the test, the upper computer sends a command to the relay switch driver to control the magnetic latching relay single-pole double-throw switch to close the first contact.
[0093] Step 3: The upper computer sends the response code value i to the first synchronous current source through the first optical isolator, and sends the response code value j to the second synchronous current source through the second optical isolator. After waiting for 100mS for the reading to stabilize, the upper computer continuously reads the voltage value measured by the high-precision multimeter, and records the average reading D i+ .
[0094] Step 4: The total execution time of the step 3 program is set to 500mS, i.e. the upper computer waits for 500mS to control the switching magnetic latching relay single-pole double-throw switch to close the second contact after receiving the current source response success instruction. After waiting for 100mS for the reading to stabilize, the upper computer continuously reads the voltage value measured by the high-precision multimeter, and records the average reading D i- . Calculate the initial deviation signal v i generated by the two-channel current source on the sampling resistor under the first synchronous current source code value i and the second synchronous current source code value j:
[0095]
[0096] Where G is the instrument amplifier gain, which is 1000.
[0097] Step 5: The time for collecting data to complete after the second contact is closed in step 4 is 500mS, i.e. the upper computer sends the code value i=i+1 to the first synchronous current source through the first optical isolator and the code value unchanged to the second synchronous current source through the second optical isolator after starting for 1S. The upper computer continuously reads the voltage value measured by the high-precision multimeter, and records the average reading D Δi- .
[0098] Step 6: The total time for completing step 5 is 500mS, i.e. the upper computer controls the switching magnetic latching relay single-pole double-throw switch to close the first contact after starting for 1.5S. The upper computer continuously reads the voltage value measured by the high-precision multimeter, and records the average reading D Δi+The first synchronous current source generates a deviation signal Δv on the sampling resistor under code value i and i = i + 1 i :
[0099]
[0100] Step 7: The host computer sends code value j = j + 1 to the second synchronous current source, and sends the code value to the first synchronous current source unchanged, and repeats steps 3-6 until i and j are accumulated to the set code value threshold, i.e. 65535.
[0101] Step 8: Select the first synchronous current source as the reference current source, calculate the relative deviation signal e of the two current sources under all code values i i , and write e i into the first synchronous current source for compensation output.
[0102]
[0103] Where N is the maximum code value 65535 of the 16-bit DAC of the current source.
[0104] The relative deviation data of the two synchronous current sources under the same high code value of 5mA current range obtained by the above steps is shown in Table 1 Figure 5 It can be found that under the joint action of the difference in reference voltage value, the error of the transconductance amplifier and the non-linear difference of the DAC chip, the relative deviation signal of the two synchronous current sources at the two ends of the code value response range is too large when responding to the same high code value, and the relative deviation in most ranges is greater than 0.65 LSB (theoretically greater than 0.65 LSB will cause the SQUID to lose lock), so the relative deviation calibration will affect the normal work of the CCC system.
[0105] Where the formula for calculating one LSB voltage of the high DAC is as follows, which is about 0.0000763V:
[0106]
[0107] Where V ref is the reference voltage 2.5V, n is the number of DAC bits 16, and DAC is bipolar output denominator divided by 2.
[0108] The synchronous current source is designed as a double-DAC over-adder 1:128 output, which can improve the resolution of the output voltage from 16 bits to 23 bits. Meanwhile, the low-bit DAC can be used to compensate the output of the high-bit DAC. The voltage of one LSB of the low-bit DAC is 1 / 128 of the voltage of one LSB of the high-bit DAC, which is about 0.000000596 V. The relative deviation data is written into the first synchronous current source, and the relative deviation of the current source output of the two synchronous current sources at the 5 mA scale is reduced by the low-bit DAC of the first synchronous current source.
[0109] The relative deviation signal of the above-mentioned Figure 5 is converted into the compensation amount required by the first synchronous current source, and the compensation amount is written into the program of the first synchronous current source. Then, the relative deviation test is performed to obtain the test result as shown in Figure 6 . It can be found that the overall deviation is within 0.5 LSB, so the SQUID can be normally locked after the relative deviation is calibrated.
[0110] The comparison voltage used in the CCC system in the present application example 2 is 0.5 V, so the sampling resistances matched with different current scales are different: the sampling resistance at the 5 μA scale is 100 KΩ, the sampling resistance at the 50 μA scale is 10 KΩ, the sampling resistance at the 500 μA scale is 1 KΩ, the sampling resistance at the 5 mA scale is 100 Ω, the sampling resistance at the 50 mA scale is 10 Ω, and the sampling resistance at the 100 mA scale is 1 Ω.
[0111] The above-mentioned step is for the current output scale of the two current sources being 5 mA. If the relative deviations of the two current sources at the 5 μA, 50 μA, 500 μA, 50 mA, and 100 mA scales are required to be tested, the present application example 2 further provides the following two schemes:
[0112] Scheme one: at each current scale, the data is collected according to the above-mentioned relative deviation calibration method, and only the sampling resistances need to be matched with the scales.
[0113] Scheme two: end-point calibration. The 5 mA scale is taken as the reference scale, and the voltage values of the end points (0 code and 65535 code under the respective matched sampling resistances) at each current scale are tested in the above-mentioned step. Taking the 5 μA and 5 mA reference scales as examples, the end points are fitted first, and then the end-point calibration function is obtained.
[0114]
[0115]
[0116] wherein, , are the fitted values of the current outputs at the 5 μA scale and the 5 mA scale, V 5uA_65535 , V 5uA_0 are the voltage data of the 65535 code and the 0 code end points at the 5 μA scale, V5mA_65535 , V 5mA_0 is the voltage data of 65535 code and 0 code end point under 5mA gear, D N is the code value range of high bit DAC brush, which is 0~65535.
[0117] Set , , the calibration function can be expressed as:
[0118]
[0119] Wherein, R SS / R XS is the theoretical ratio of the sampling resistance under 5mA gear to the sampling resistance under 5uA gear, R S / R X is the real ratio of the sampling resistance under 5mA gear to the sampling resistance under 5uA gear, D N is the code value range of high bit DAC brush, which is 0~65535.
[0120] Based on this, the calibration function Y1 of the first synchronous current source in 5uA gear aligning with its 5mA gear, and the calibration function Y2 of the second synchronous current source in 5uA gear aligning with its 5mA gear can be obtained; that is, the first synchronous current source program adds the output of the calibration function Y1 on the basis of the relative deviation data written in 5mA gear, and the second synchronous current source program adds the output of the calibration function Y2. The relative deviation calibration of the two current sources under 5uA can be completed, and this scheme can reduce the time of deviation calibration compared with scheme one.
[0121] In summary, the present application can reduce the relative deviation of the current output of the two synchronous current sources in the synchronous commutation function, so that the magnetic flux mutation when the two current sources output the same current through each coil does not exceed the range in which the SQUID chip can normally work, so that the superconducting quantum interference device (SQUID) in the CCC system can work stably and be locked, and the stability of the locking is improved.
[0122] The principle and implementation mode of the present application are described by applying specific examples in the present application, and the above embodiment is only used to help understand the method and core idea of the present application; meanwhile, for those skilled in the art, according to the idea of the present application, the specific implementation mode and application range will be changed. In summary, the content of the specification should not be understood as a limitation of the present application.
Claims
1. A synchronous programmable dual-channel current source relative deviation calibration device, characterized in that, include: Dual-channel synchronous current source, used to respond to code value information sent by the host computer and output corresponding current; The sampling resistor is used to convert the relative current deviation signal into a relative voltage deviation signal; A double-throw switch is used to control the polarity of the relative deviation signal; The host computer is used to send code response signals to the dual-channel synchronous current source, record and process the voltage relative deviation data under the corresponding code value of the current source, and write the processed relative deviation data into the current source for relative deviation calibration. The relative deviation calibration includes: The host computer sends a code value signal and controls the double-throw switch to select the closed contact; The current source responds to the code value signal and outputs a corresponding current signal. The current signal flows into the sampling resistor, amplifies the voltage signal on the sampling resistor, and collects and calculates the deviation signal generated under different code values. The host computer calculates the relative deviation data for all code values and writes it into the current source for compensation output, thereby achieving relative deviation calibration.
2. The apparatus according to claim 1, characterized in that, The code value signal is transmitted from the host computer to the current source via an optical isolator; The optical isolator is used to realize the conversion communication between the host computer and the current source, and to ensure that the dual synchronous current sources do not share a common ground.
3. The apparatus according to claim 1 or 2, characterized in that, Also includes: A programmable resistor module, in which the sum of the resistance values of the power resistors is equal to the upper limit of the resistance value that the current source under test can drive, is used to suppress voltage noise of the output current of the synchronous current source.
4. The apparatus according to claim 3, characterized in that, In the dual-channel synchronous current source: The positive output terminal of the first synchronous current source is connected in series with the first programmable resistor module, and then connected to the CH terminal of the sampling resistor; its negative output terminal is connected to the CL terminal of the sampling resistor. The positive output terminal of the second synchronous current source is connected to the second programmable resistor module, and then to the CL terminal of the sampling resistor; its negative output terminal is connected to the CH terminal of the sampling resistor.
5. The apparatus according to claim 1, characterized in that, An instrumentation amplifier is connected in parallel with the sampling resistor to amplify the voltage signal across the sampling resistor.
6. The apparatus according to claim 2, characterized in that, Each of the dual synchronous current sources is connected to an isolated power supply, so that there is no common point of contact while obtaining positive and negative power.
7. The apparatus according to claim 1, characterized in that, The signal transmission method in the dual-channel synchronous current source is as follows: The DAC module receives the code value sent by the host computer and outputs the corresponding voltage signal. The voltage signal is converted into a current signal after passing through the transconductance amplifier module. The current signal is then passed through the power amplifier module and used as the overall output current signal.
8. A synchronous programmable dual-channel current source relative deviation calibration method, employing the apparatus as described in any one of claims 1-7, characterized in that, Includes the following steps: Step 1: Connect the device and power it on. Set the initial code value and code value threshold on the host computer. Step 2: The host computer sequentially sends code value signals and controls the double-throw switch to select the closed contact; the current source responds and outputs the corresponding current signal, and the sampling resistor generates the corresponding voltage; after amplifying the voltage signal on the sampling resistor, the deviation signal generated under different code values is collected and calculated. Step 3: Select a reference current source. The host computer calculates the relative deviation data under all code values and writes it into the reference current source for compensation output, thereby realizing relative deviation calibration. Step 4: Repeat steps 1 to 3 to complete the relative deviation calibration of all output current levels of the dual-channel synchronous current source.
9. The method according to claim 8, characterized in that, Step 2 includes: Step 2.1: The host computer sends the initial code value to the current source, controls the double-throw switch to select the closed contact, and collects the voltage signal amplified across the sampling resistor at different contact points; Step 2.2: Calculate the initial deviation signal generated by the dual-channel synchronous current source on the sampling resistor under the initial code value; Step 2.3: The host computer sends a code value to the current source in the form of increasing the code value of one current source while keeping the code value of another current source unchanged, and then increasing the code value of the other current source while keeping the code value of the single current source unchanged. The host computer controls the double-throw switch to select the closed contact and collects the voltage signal amplified at different contact points across the sampling resistor. Step 2.4: Calculate the deviation signal generated by the dual-channel synchronous current source on the sampling resistor under different code values; Step 2.5: Repeat steps 2.3-2.4 until the accumulated value reaches the set code value threshold.
10. The method according to claim 8 or 9, characterized in that, In step 3, the relative deviation data is calculated as follows: the sum of the deviation signals under different code values is calculated; the initial deviation signal is divided by the sum, and then multiplied by the code value threshold.
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Power supply test circuit and power supply test method
CN121348155A