Vector reconstruction harmonic suppression method for permanent magnet synchronous motor powered by three-level inverter

Abstract

The invention discloses a vector reconstruction harmonic suppression method for a three-level inverter power supply permanent magnet synchronous motor, and relates to the technical field of motor harmonic and noise suppression. Calculating action time of three basic vectors, selecting the three basic vectors, adjusting an original vector synthesis sequence in a single carrier period into a vector reconstruction synthesis sequence, calculating three time nodes of a fifth-segment sequence and a sixth-segment sequence according to the original vector synthesis sequence, and calculating the time nodes of the fifth-segment sequence and the sixth-segment sequence; the action duration of the two basic vectors after adjustment is calculated according to the vector reconstruction synthesis sequence, the numerical value of a switching time node of a three-level inverter switching tube is updated according to the action duration, and the assigned value of a time register is calculated and updated in a circulating mode in the operation process of the permanent magnet synchronous motor system. And generating a PWM (Pulse Width Modulation) driving signal to control a three-level inverter switching tube to drive a motor. Improvement is carried out based on a traditional SVPWM technology, the high-frequency harmonic performance of the three-level inverter and the motor driving system can be remarkably improved, system cost and operation difficulty do not need to be increased, and the method is simple and easy to implement.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of motor harmonic and noise suppression, and particularly relates to a vector reconstruction harmonic suppression method for a three-level inverter powered permanent magnet synchronous motor. BACKGROUND

[0002] Since the commonly used two-level inverter cannot meet the demand of high voltage and high power, at present, the permanent magnet synchronous motor (PMSM) driving system generally adopts a multi-level inverter (mostly a three-level voltage source inverter), which has the advantages of high switching power and low harmonic, and is widely used in power systems, steel rolling and ship propulsion fields.

[0003] However, the pulse width modulation (PWM) technology commonly used to drive the inverter inevitably introduces harmonics due to the action of the switching tube, and the space vector pulse width modulation (SVPWM) technology with a fixed carrier frequency f c The output PWM voltage and current harmonics of the SVPWM technology are mainly concentrated near the integer multiple frequency band (such as f c , 2f c , 3f c , etc.). In order to reduce switching loss, the three-level inverter usually selects a lower switching frequency, and the small inductance characteristic of the permanent magnet synchronous motor further aggravates the high-frequency PWM harmonics, resulting in problems such as electromagnetic vibration and noise, electromagnetic interference (EMI) and torque fluctuation. Therefore, it is of great significance to suppress the high-frequency PWM harmonics of the three-level inverter.

[0004] Most of the existing three-level inverter harmonic suppression algorithm researches can only eliminate the integer harmonic of the fundamental frequency (such as SHEPWM, SSVPWM), but both of them may aggravate the high-frequency PWM harmonics. The ZSSVPWM technology proposed by some scholars can reduce part of the PWM harmonics, but the effect is very limited. Although the two-level inverter harmonic suppression algorithm (such as RPWM, MSVPWM) is studied more, it can disperse the harmonic spectrum, but cannot completely eliminate the harmonics, and may worsen the low-frequency characteristics or increase the switching loss, and cannot be applied to the three-level inverter. In addition to adjusting the PWM algorithm, the topology can also be modified to suppress harmonics (such as sine wave filter, interleaved parallel topology), but there are size, cost and application scenario restrictions.

[0005] Therefore, it is urgent to improve the three-level SVPWM algorithm based on the reconstruction vector to eliminate the PWM harmonic content of the carrier frequency and its odd times of the inverter and motor driving system, so as to obtain better harmonic characteristics and reduce the various negative effects of PWM harmonics in engineering applications. SUMMARY

[0006] To address the shortcomings of the prior art, this invention provides a vector reconfiguration harmonic suppression method for a three-level inverter-powered permanent magnet synchronous motor. This method is an improvement on the traditional SVPWM technology and can significantly improve the high-frequency harmonic performance of the three-level inverter and motor drive system without increasing system cost or computational complexity, making it simple and easy to implement.

[0007] To achieve the above objectives, the present invention adopts the following technical solution: a vector reconfiguration harmonic suppression method for a three-level inverter-powered permanent magnet synchronous motor, comprising the following steps:

[0008] Step 1: Based on the given voltage signal U of the dq axis of the permanent magnet synchronous motor d and U q The target voltage vector U in SVPWM is obtained. ref αβ axis component input signal V α and V β The sector numbers (N, n) are determined by a 6×6 partitioning method, where N represents the large sector and n represents the small sector. This is then combined with the carrier frequency f in SVPWM. c The corresponding carrier period T s The action times of the three basic vectors, t1, t2, and t3, are calculated and stored in the time register of the digital controller.

[0009] Step 2: Using the seven-segment three-level SVPWM selection rule, three basic vectors V1, V2, and V3 are selected according to the sector numbers (N, n). V1 and V2 are selected for sequence reconstruction adjustment without changing their phase angle and amplitude. The single carrier period T is then adjusted. s The original vector synthesis sequence V3-V1-V2-V3-V2-V1-V3 is adjusted to the vector reconstruction synthesis sequence V3-V1-V2-V3-V1-V2-V3. The fourth segment V3 of the reconstructed synthesis sequence is then moved from the carrier period T. s Dividing the waveform into two segments at halfway point, resulting in two identical vector sequences V3-V1-V2-V3-V3-V1-V2-V3 for both the first and second halves of the cycle, the originally symmetrical phase voltage waveform becomes a harmonic function, and the equivalent carrier frequency increases to 2f. c This eliminates odd-order carrier frequency harmonics in phase voltage and phase current;

[0010] Step 3: Read the corresponding basic vector action times t1, t2, and t3 from the time register of the digital controller, and assign them to the three basic vectors V1, V2, and V3 in a one-to-one correspondence with the original vector synthesis sequence. Calculate the start time node T of the fifth segment V2 of the original vector synthesis sequence. 11 The end time node T of the fifth sequence V2 22 And the end time node T of the sixth sequence V133 ;

[0011] Step four: calculate the corresponding basic vectors V1 and V2 in the adjusted action time length according to the vector reconstruction synthesis sequence and , and update the values of three-level inverter switch time nodes T 11 , T 22 and T 33 , so as to complete the update assignment of the reconstructed time register in the digital controller program;

[0012] Step five: the time register corresponding assignment is calculated and updated in the process of the permanent magnet synchronous motor system running, and the PWM driving signal is generated to control the three-level inverter switch to drive the permanent magnet synchronous motor system.

[0013] Further, the calculation formula of the three time nodes T 11 , T 22 and T 33 in step three is: .

[0014] Further, the calculation formula of the action time length and in step four is: , and the update calculation formula of the three time nodes T 11 , T 22 and T 33 is: .

[0015] Compared with the prior art, the beneficial effects of the present application are: the present application is based on the control method of the traditional SVPWM, according to the voltage space vector synthesis method of the SVPWM technology, the sequence and action time of the corresponding basic vector are changed to perform vector reconstruction synthesis, which is an improved SVPWM technology, which can be applied to the three-level voltage source inverter driving system of the permanent magnet synchronous motor, can greatly suppress the high frequency PWM harmonic amplitude near the switching frequency caused by PWM, significantly improve the high frequency harmonic performance of the inverter and the motor system, effectively reduce the negative effects of electromagnetic vibration and noise, electromagnetic interference and torque fluctuation, and has very high application value for the high-power PMSM driving system using three-level inverter. In addition, the method of the present application does not need to change the hardware topology or increase the hardware equipment, only needs to write program algorithm in the digital controller, which can be realized, will not increase the cost of the system, and mainly is logical judgment and elementary mathematical operation, will not increase the operation difficulty to occupy the processor resources, the whole operation and control is simple and easy to operate. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1This is a flowchart of the steps of the method of the present invention;

[0017] Figure 2 This is a comparison diagram of the original vector synthesis sequence and the vector reconstruction synthesis sequence of the present invention;

[0018] Figure 3 This is a comparison chart of phase current FFT analysis in the embodiments;

[0019] Figure 4 This is a comparison diagram of the phase current power spectrum in the embodiments;

[0020] Figure 5 This is a comparison diagram of the acoustic noise spectrum in the embodiments;

[0021] Figure 6 This is a comparison curve of the inverter output efficiency in the embodiment. Detailed Implementation

[0022] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the invention, not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0023] like Figures 1-2 As shown, a vector reconfiguration harmonic suppression method for a three-level inverter-powered permanent magnet synchronous motor is described, and its process is combined with... Figure 1 As shown, it includes the following steps:

[0024] Step 1: Obtain the dq axis feedback signal i by performing Clark and Park transforms on the current and position sampling signals of the permanent magnet synchronous motor. d and i q The given voltage signal U for the dq axis is calculated through PI regulation using speed and current closed loops. d and U q Then, the target voltage vector U in SVPWM is obtained by using the inverse Park transform. ref αβ axis component input signal V α and V β At this point, the sector numbers (N, n) are determined using a standard 6×6 partitioning method, where N represents the large sector and n represents the small sector. This is then combined with the carrier frequency f in SVPWM. c The corresponding carrier period T s The action times of the three basic vectors, t1, t2, and t3, can be calculated and stored in the time register of the digital controller for later reading and use.

[0025] Step 2: Using the traditional seven-segment three-level SVPWM selection rules, select three base vectors V1, V2, and V3 according to the sector numbers (N, n) to synthesize the target voltage vector U. ref A single carrier period T s The original vector synthesis sequence of the internal seven-segment three-level SVPWM is combined Figure 2 As shown in section a), two basic vectors, V1 and V2, are selected for sequence reconstruction adjustment. For a single carrier period T... s Combined with the adjusted vector reconstruction synthesis sequence Figure 2 As shown in section b), the original base vector's action time (vector length) remains unchanged, and only the synthesis sequence of the selected base vectors V1 and V2 is adjusted to obtain the reconstructed target vector. However, it does not change its phase angle and amplitude. After reconstruction of the synthesized sequence, the original single carrier period T s The seven-segment switch sequence (V3-V1-V2-V3-V2-V1-V3) that was centrally symmetric is no longer symmetric, but becomes (V3-V1-V2-V3-V1-V2-V3). The fourth segment of the reconstructed sequence, V3, is then transferred from the carrier period T. s The period is divided into two segments at halfway point, becoming two identical vector sequences (V3-V1-V2-V3-V3-V1-V2-V3) for the first and second halves of the cycle. Therefore, the single carrier period T... s The originally symmetrical phase voltage waveform also becomes a harmonic function (i.e., the phase voltage waveform is exactly the same in the first half of the cycle and the second half of the cycle), thus increasing the equivalent carrier frequency to 2f. c This eliminates odd-order carrier frequency harmonics (such as f) in phase voltage and phase current. c 3f c ).

[0026] Step 3: Read the corresponding fundamental vector action times t1, t2, and t3 from the time register of the digital controller, and compare them with the three fundamental vectors V1, V2, and V3. Figure 2 By assigning values ​​to the original vector composite sequence in part a) one by one, the start time node T of the fifth segment V2 of the original vector composite sequence can be calculated accordingly. 11 The end time node T of the fifth sequence V2 22 (This is also the start time of the sixth sequence V1), and the end time T of the sixth sequence V1. 33 The calculation formula is expressed as follows:

[0027]

[0028] Step four: calculate the corresponding basic vectors V1 and V2 in the adjusted action time according to the vector reconstruction of the synthesized sequence in part b) of the second comparison and , and update the values of the switching time nodes T 11 , T 22 and T 33 of the three-level inverter switch, so that the updated time register assignment in the digital controller program is completed, and the calculation formula is as follows:

[0029]

[0030]

[0031] Step five: continuously calculate and update the assignment of the time register according to the sampled and fed back i d and i q during the operation of the permanent magnet synchronous motor system, generate PWM driving signals to control the three-level inverter switch, so as to realize the driving of the permanent magnet synchronous motor system, eliminate the odd carrier frequency PWM harmonics of the phase voltage and the phase current, and improve the harmonic performance of the system.

[0032] In summary, the application provides a PWM harmonic suppression method suitable for driving a three-level inverter of a permanent magnet synchronous motor, which is an improved three-level SVPWM high-frequency harmonic suppression method based on effective voltage vector reconstruction. The method of the application is based on the traditional three-level SVPWM algorithm, and the synthesized sequence of the target voltage vector U s in a single carrier cycle T ref is reconstructed, that is, the action time of the original voltage vector is kept unchanged, and only the action sequence of the effective vector is adjusted to obtain the reconstructed target vector , but the phase angle and amplitude are not changed. After the vector sequence is reconstructed, the originally center-symmetric seven-segment switching sequence in a single carrier cycle T s is no longer symmetric, and the originally symmetric waveform of the phase voltage becomes an even harmonic function, that is, the waveform in the first half cycle is the same as that in the second half cycle, so that the equivalent carrier frequency is increased to 2f c , thereby eliminating the odd carrier frequency harmonics (such as f c , 3f c ) of the phase voltage and the phase current. In addition, the method of the application can also optimize the switching loss of the inverter. With the same switching frequency, the method of the application can reduce the switching loss of the inverter according to different power factor angles, thereby improving the output efficiency of the motor driving system.

[0033] Embodiment

[0034] The embodiment takes a diode clamped type (NPC) three-level inverter driving permanent magnet synchronous motor system as an example, and compares experimental effects of a traditional three-level SVPWM and the method.

[0035] System configuration:

[0036] The inverter is an NPC three-level topology, the carrier frequency f c =4kHz (carrier period T s =1 / f c =250us), the permanent magnet synchronous motor parameters are adapted to high-voltage and high-power scenes, and a digital controller adopts a DSP chip (TMS320F28377D) to realize algorithm operation and signal output.

[0037] Effect verification:

[0038] When the carrier frequency f c =4kHz and the modulation ratio is 0.5, the fast Fourier transform (FFT) analysis comparison of the traditional three-level SVPWM and the method is shown in Figure 3 , the total harmonic distortion (THD) of the load phase current is reduced from 2.67% to 2.25%, and it can be seen that the content of the carrier frequency and its third harmonic is almost eliminated after vector reconstruction.

[0039] The power spectrum harmonic analysis of the load phase current is shown in Figure 4 , it can be seen that the PWM harmonic amplitude at 4kHz and 12kHz is reduced by 11.86dBW and 12.22dBW respectively after the application of the method, and the harmonic content of the odd times of the carrier frequency is greatly reduced.

[0040] The acoustic noise spectrum verification analysis is shown in Figure 5 , it can be seen that the noise harmonic amplitude at 4kHz and 12kHz is reduced by 8.8dBV and 1.57dBV respectively after the application of the method, and the high-frequency acoustic noise is significantly reduced.

[0041] Therefore, the method can effectively suppress the high-frequency PWM harmonic and high-frequency noise of the three-level inverter and PMSM.

[0042] When the same switching frequency (4kHz) and different modulation ratios (0.3~1.1) are used, the three-level inverter output efficiency using the method is improved compared with the traditional three-level SVPWM, and the comparison is shown in Figure 6As shown, it can be proved that the method can reduce the switching loss of the inverter while obtaining better harmonic characteristics.

[0043] In summary, the vector reconstruction technology based on three-level SVPWM makes the permanent magnet synchronous motor system driven by the three-level inverter reduce the current harmonics and high-frequency noise greatly without increasing the energy consumption.

[0044] It is apparent for those skilled in the art that the present application is not limited to the details of the foregoing exemplary embodiments, and that the present application can be implemented in other embodiments without departing from the spirit or essential characteristics of the present application. Therefore, the embodiments should be considered in a descriptive sense only and not for purposes of limitation. The scope of the present application should be defined by the appended claims rather than the foregoing description, and all changes that come within the meaning and range of equivalents of the claims are intended to be embraced therein. No reference signs in the claims should be considered as limiting the scope of the claims.

[0045] In addition, it should be understood that although the present specification is described in terms of embodiments, not every embodiment contains only one independent technical solution, and the description of the specification is only for the sake of clarity, and those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can be combined appropriately to form other embodiments that those skilled in the art can understand.

Claims

1. A method for suppressing vector reconfiguration harmonics in a three-level inverter-powered permanent magnet synchronous motor, characterized in that: Includes the following steps: Step 1: Based on the given voltage signal U of the dq axis of the permanent magnet synchronous motor d and U q The target voltage vector U in SVPWM is obtained. ref αβ axis component input signal V α and V β The sector numbers (N, n) are determined by a 6×6 partitioning method, where N represents the large sector and n represents the small sector. This is then combined with the carrier frequency f in SVPWM. c The corresponding carrier period T s The action times of the three basic vectors, t1, t2, and t3, are calculated and stored in the time register of the digital controller. Step 2: Using the seven-segment three-level SVPWM selection rule, three basic vectors V1, V2, and V3 are selected according to the sector numbers (N, n). V1 and V2 are selected for sequence reconstruction adjustment without changing their phase angle and amplitude. The single carrier period T is then adjusted. s The original vector synthesis sequence V3-V1-V2-V3-V2-V1-V3 is adjusted to the vector reconstruction synthesis sequence V3-V1-V2-V3-V1-V2-V3. The fourth segment V3 of the reconstructed synthesis sequence is then moved from the carrier period T. s Dividing the waveform into two segments at halfway point, resulting in two identical vector sequences V3-V1-V2-V3-V3-V1-V2-V3 for both the first and second halves of the cycle, the originally symmetrical phase voltage waveform becomes a harmonic function, and the equivalent carrier frequency increases to 2f. c This eliminates odd-order carrier frequency harmonics in phase voltage and phase current; Step 3: Read the corresponding basic vector action times t1, t2, and t3 from the time register of the digital controller, and assign them to the three basic vectors V1, V2, and V3 in a one-to-one correspondence with the original vector synthesis sequence. Calculate the start time node T of the fifth segment of the original vector synthesis sequence, V2. 11 The end time node T of the fifth sequence V2 22 And the end time node T of the sixth sequence V1 33 ; Step 4: Calculate the adjusted motion durations of the corresponding base vectors V1 and V2 by comparing them with the vector reconstruction and synthesis sequence. and Based on this, update the switching time node T of the three-level inverter switching transistors. 11 T 22 and T 33 The value is then used to update and assign the reconstructed time register in the digital controller program; Step 5: During the operation of the permanent magnet synchronous motor system, the corresponding values ​​of the time register are calculated and updated cyclically to generate PWM drive signals to control the three-level inverter switching transistors to drive the permanent magnet synchronous motor system.

2. The vector reconstruction harmonic suppression method for a three-level inverter-powered permanent magnet synchronous motor according to claim 1, characterized in that: The three time nodes T in step three 11 T 22 and T 33 The calculation formula is expressed as: .

3. The vector reconfiguration harmonic suppression method for a three-level inverter-powered permanent magnet synchronous motor according to claim 2, characterized in that: The duration of the action in step four and The calculation formula is expressed as: Three time points T 11 T 22 and T 33 The update calculation formula is expressed as: .

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